cb0183369270ddcf5da1050be0c4a5224ebc7709
[mesa.git] / src / mesa / drivers / dri / i965 / brw_fs_copy_propagation.cpp
1 /*
2 * Copyright © 2012 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 /** @file brw_fs_copy_propagation.cpp
25 *
26 * Support for global copy propagation in two passes: A local pass that does
27 * intra-block copy (and constant) propagation, and a global pass that uses
28 * dataflow analysis on the copies available at the end of each block to re-do
29 * local copy propagation with more copies available.
30 *
31 * See Muchnick's Advanced Compiler Design and Implementation, section
32 * 12.5 (p356).
33 */
34
35 #define ACP_HASH_SIZE 16
36
37 #include "util/bitset.h"
38 #include "brw_fs.h"
39 #include "brw_cfg.h"
40
41 namespace { /* avoid conflict with opt_copy_propagation_elements */
42 struct acp_entry : public exec_node {
43 fs_reg dst;
44 fs_reg src;
45 uint8_t regs_written;
46 enum opcode opcode;
47 bool saturate;
48 };
49
50 struct block_data {
51 /**
52 * Which entries in the fs_copy_prop_dataflow acp table are live at the
53 * start of this block. This is the useful output of the analysis, since
54 * it lets us plug those into the local copy propagation on the second
55 * pass.
56 */
57 BITSET_WORD *livein;
58
59 /**
60 * Which entries in the fs_copy_prop_dataflow acp table are live at the end
61 * of this block. This is done in initial setup from the per-block acps
62 * returned by the first local copy prop pass.
63 */
64 BITSET_WORD *liveout;
65
66 /**
67 * Which entries in the fs_copy_prop_dataflow acp table are generated by
68 * instructions in this block which reach the end of the block without
69 * being killed.
70 */
71 BITSET_WORD *copy;
72
73 /**
74 * Which entries in the fs_copy_prop_dataflow acp table are killed over the
75 * course of this block.
76 */
77 BITSET_WORD *kill;
78 };
79
80 class fs_copy_prop_dataflow
81 {
82 public:
83 fs_copy_prop_dataflow(void *mem_ctx, cfg_t *cfg,
84 exec_list *out_acp[ACP_HASH_SIZE]);
85
86 void setup_initial_values();
87 void run();
88
89 void dump_block_data() const;
90
91 void *mem_ctx;
92 cfg_t *cfg;
93
94 acp_entry **acp;
95 int num_acp;
96 int bitset_words;
97
98 struct block_data *bd;
99 };
100 } /* anonymous namespace */
101
102 fs_copy_prop_dataflow::fs_copy_prop_dataflow(void *mem_ctx, cfg_t *cfg,
103 exec_list *out_acp[ACP_HASH_SIZE])
104 : mem_ctx(mem_ctx), cfg(cfg)
105 {
106 bd = rzalloc_array(mem_ctx, struct block_data, cfg->num_blocks);
107
108 num_acp = 0;
109 foreach_block (block, cfg) {
110 for (int i = 0; i < ACP_HASH_SIZE; i++) {
111 num_acp += out_acp[block->num][i].length();
112 }
113 }
114
115 acp = rzalloc_array(mem_ctx, struct acp_entry *, num_acp);
116
117 bitset_words = BITSET_WORDS(num_acp);
118
119 int next_acp = 0;
120 foreach_block (block, cfg) {
121 bd[block->num].livein = rzalloc_array(bd, BITSET_WORD, bitset_words);
122 bd[block->num].liveout = rzalloc_array(bd, BITSET_WORD, bitset_words);
123 bd[block->num].copy = rzalloc_array(bd, BITSET_WORD, bitset_words);
124 bd[block->num].kill = rzalloc_array(bd, BITSET_WORD, bitset_words);
125
126 for (int i = 0; i < ACP_HASH_SIZE; i++) {
127 foreach_in_list(acp_entry, entry, &out_acp[block->num][i]) {
128 acp[next_acp] = entry;
129
130 /* opt_copy_propagate_local populates out_acp with copies created
131 * in a block which are still live at the end of the block. This
132 * is exactly what we want in the COPY set.
133 */
134 BITSET_SET(bd[block->num].copy, next_acp);
135
136 next_acp++;
137 }
138 }
139 }
140
141 assert(next_acp == num_acp);
142
143 setup_initial_values();
144 run();
145 }
146
147 /**
148 * Set up initial values for each of the data flow sets, prior to running
149 * the fixed-point algorithm.
150 */
151 void
152 fs_copy_prop_dataflow::setup_initial_values()
153 {
154 /* Initialize the COPY and KILL sets. */
155 foreach_block (block, cfg) {
156 foreach_inst_in_block(fs_inst, inst, block) {
157 if (inst->dst.file != VGRF)
158 continue;
159
160 /* Mark ACP entries which are killed by this instruction. */
161 for (int i = 0; i < num_acp; i++) {
162 if (inst->overwrites_reg(acp[i]->dst) ||
163 inst->overwrites_reg(acp[i]->src)) {
164 BITSET_SET(bd[block->num].kill, i);
165 }
166 }
167 }
168 }
169
170 /* Populate the initial values for the livein and liveout sets. For the
171 * block at the start of the program, livein = 0 and liveout = copy.
172 * For the others, set liveout to 0 (the empty set) and livein to ~0
173 * (the universal set).
174 */
175 foreach_block (block, cfg) {
176 if (block->parents.is_empty()) {
177 for (int i = 0; i < bitset_words; i++) {
178 bd[block->num].livein[i] = 0u;
179 bd[block->num].liveout[i] = bd[block->num].copy[i];
180 }
181 } else {
182 for (int i = 0; i < bitset_words; i++) {
183 bd[block->num].liveout[i] = 0u;
184 bd[block->num].livein[i] = ~0u;
185 }
186 }
187 }
188 }
189
190 /**
191 * Walk the set of instructions in the block, marking which entries in the acp
192 * are killed by the block.
193 */
194 void
195 fs_copy_prop_dataflow::run()
196 {
197 bool progress;
198
199 do {
200 progress = false;
201
202 /* Update liveout for all blocks. */
203 foreach_block (block, cfg) {
204 if (block->parents.is_empty())
205 continue;
206
207 for (int i = 0; i < bitset_words; i++) {
208 const BITSET_WORD old_liveout = bd[block->num].liveout[i];
209
210 bd[block->num].liveout[i] =
211 bd[block->num].copy[i] | (bd[block->num].livein[i] &
212 ~bd[block->num].kill[i]);
213
214 if (old_liveout != bd[block->num].liveout[i])
215 progress = true;
216 }
217 }
218
219 /* Update livein for all blocks. If a copy is live out of all parent
220 * blocks, it's live coming in to this block.
221 */
222 foreach_block (block, cfg) {
223 if (block->parents.is_empty())
224 continue;
225
226 for (int i = 0; i < bitset_words; i++) {
227 const BITSET_WORD old_livein = bd[block->num].livein[i];
228
229 bd[block->num].livein[i] = ~0u;
230 foreach_list_typed(bblock_link, parent_link, link, &block->parents) {
231 bblock_t *parent = parent_link->block;
232 bd[block->num].livein[i] &= bd[parent->num].liveout[i];
233 }
234
235 if (old_livein != bd[block->num].livein[i])
236 progress = true;
237 }
238 }
239 } while (progress);
240 }
241
242 void
243 fs_copy_prop_dataflow::dump_block_data() const
244 {
245 foreach_block (block, cfg) {
246 fprintf(stderr, "Block %d [%d, %d] (parents ", block->num,
247 block->start_ip, block->end_ip);
248 foreach_list_typed(bblock_link, link, link, &block->parents) {
249 bblock_t *parent = link->block;
250 fprintf(stderr, "%d ", parent->num);
251 }
252 fprintf(stderr, "):\n");
253 fprintf(stderr, " livein = 0x");
254 for (int i = 0; i < bitset_words; i++)
255 fprintf(stderr, "%08x", bd[block->num].livein[i]);
256 fprintf(stderr, ", liveout = 0x");
257 for (int i = 0; i < bitset_words; i++)
258 fprintf(stderr, "%08x", bd[block->num].liveout[i]);
259 fprintf(stderr, ",\n copy = 0x");
260 for (int i = 0; i < bitset_words; i++)
261 fprintf(stderr, "%08x", bd[block->num].copy[i]);
262 fprintf(stderr, ", kill = 0x");
263 for (int i = 0; i < bitset_words; i++)
264 fprintf(stderr, "%08x", bd[block->num].kill[i]);
265 fprintf(stderr, "\n");
266 }
267 }
268
269 static bool
270 is_logic_op(enum opcode opcode)
271 {
272 return (opcode == BRW_OPCODE_AND ||
273 opcode == BRW_OPCODE_OR ||
274 opcode == BRW_OPCODE_XOR ||
275 opcode == BRW_OPCODE_NOT);
276 }
277
278 bool
279 fs_visitor::try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry)
280 {
281 if (inst->src[arg].file != VGRF)
282 return false;
283
284 if (entry->src.file == IMM)
285 return false;
286 assert(entry->src.file == VGRF || entry->src.file == UNIFORM ||
287 entry->src.file == ATTR);
288
289 if (entry->opcode == SHADER_OPCODE_LOAD_PAYLOAD &&
290 inst->opcode == SHADER_OPCODE_LOAD_PAYLOAD)
291 return false;
292
293 assert(entry->dst.file == VGRF);
294 if (inst->src[arg].nr != entry->dst.nr)
295 return false;
296
297 /* Bail if inst is reading a range that isn't contained in the range
298 * that entry is writing.
299 */
300 if (inst->src[arg].reg_offset < entry->dst.reg_offset ||
301 (inst->src[arg].reg_offset * 32 + inst->src[arg].subreg_offset +
302 inst->regs_read(arg) * inst->src[arg].stride * 32) >
303 (entry->dst.reg_offset + entry->regs_written) * 32)
304 return false;
305
306 /* we can't generally copy-propagate UD negations because we
307 * can end up accessing the resulting values as signed integers
308 * instead. See also resolve_ud_negate() and comment in
309 * fs_generator::generate_code.
310 */
311 if (entry->src.type == BRW_REGISTER_TYPE_UD &&
312 entry->src.negate)
313 return false;
314
315 bool has_source_modifiers = entry->src.abs || entry->src.negate;
316
317 if ((has_source_modifiers || entry->src.file == UNIFORM ||
318 !entry->src.is_contiguous()) &&
319 !inst->can_do_source_mods(devinfo))
320 return false;
321
322 if (has_source_modifiers &&
323 inst->opcode == SHADER_OPCODE_GEN4_SCRATCH_WRITE)
324 return false;
325
326 /* Bail if the result of composing both strides would exceed the
327 * hardware limit.
328 */
329 if (entry->src.stride * inst->src[arg].stride > 4)
330 return false;
331
332 /* Bail if the instruction type is larger than the execution type of the
333 * copy, what implies that each channel is reading multiple channels of the
334 * destination of the copy, and simply replacing the sources would give a
335 * program with different semantics.
336 */
337 if (type_sz(entry->dst.type) < type_sz(inst->src[arg].type))
338 return false;
339
340 /* Bail if the result of composing both strides cannot be expressed
341 * as another stride. This avoids, for example, trying to transform
342 * this:
343 *
344 * MOV (8) rX<1>UD rY<0;1,0>UD
345 * FOO (8) ... rX<8;8,1>UW
346 *
347 * into this:
348 *
349 * FOO (8) ... rY<0;1,0>UW
350 *
351 * Which would have different semantics.
352 */
353 if (entry->src.stride != 1 &&
354 (inst->src[arg].stride *
355 type_sz(inst->src[arg].type)) % type_sz(entry->src.type) != 0)
356 return false;
357
358 if (has_source_modifiers &&
359 entry->dst.type != inst->src[arg].type &&
360 !inst->can_change_types())
361 return false;
362
363 if (devinfo->gen >= 8 && (entry->src.negate || entry->src.abs) &&
364 is_logic_op(inst->opcode)) {
365 return false;
366 }
367
368 if (entry->saturate) {
369 switch(inst->opcode) {
370 case BRW_OPCODE_SEL:
371 if (inst->src[1].file != IMM ||
372 inst->src[1].f < 0.0 ||
373 inst->src[1].f > 1.0) {
374 return false;
375 }
376 break;
377 default:
378 return false;
379 }
380 }
381
382 inst->src[arg].file = entry->src.file;
383 inst->src[arg].nr = entry->src.nr;
384 inst->src[arg].stride *= entry->src.stride;
385 inst->saturate = inst->saturate || entry->saturate;
386
387 switch (entry->src.file) {
388 case UNIFORM:
389 case BAD_FILE:
390 case HW_REG:
391 inst->src[arg].reg_offset = entry->src.reg_offset;
392 inst->src[arg].subreg_offset = entry->src.subreg_offset;
393 break;
394 case ATTR:
395 case VGRF:
396 {
397 /* In this case, we'll just leave the width alone. The source
398 * register could have different widths depending on how it is
399 * being used. For instance, if only half of the register was
400 * used then we want to preserve that and continue to only use
401 * half.
402 *
403 * Also, we have to deal with mapping parts of vgrfs to other
404 * parts of vgrfs so we have to do some reg_offset magic.
405 */
406
407 /* Compute the offset of inst->src[arg] relative to inst->dst */
408 assert(entry->dst.subreg_offset == 0);
409 int rel_offset = inst->src[arg].reg_offset - entry->dst.reg_offset;
410 int rel_suboffset = inst->src[arg].subreg_offset;
411
412 /* Compute the final register offset (in bytes) */
413 int offset = entry->src.reg_offset * 32 + entry->src.subreg_offset;
414 offset += rel_offset * 32 + rel_suboffset;
415 inst->src[arg].reg_offset = offset / 32;
416 inst->src[arg].subreg_offset = offset % 32;
417 }
418 break;
419
420 case MRF:
421 case IMM:
422 unreachable("not reached");
423 }
424
425 if (has_source_modifiers) {
426 if (entry->dst.type != inst->src[arg].type) {
427 /* We are propagating source modifiers from a MOV with a different
428 * type. If we got here, then we can just change the source and
429 * destination types of the instruction and keep going.
430 */
431 assert(inst->can_change_types());
432 for (int i = 0; i < inst->sources; i++) {
433 inst->src[i].type = entry->dst.type;
434 }
435 inst->dst.type = entry->dst.type;
436 }
437
438 if (!inst->src[arg].abs) {
439 inst->src[arg].abs = entry->src.abs;
440 inst->src[arg].negate ^= entry->src.negate;
441 }
442 }
443
444 return true;
445 }
446
447
448 bool
449 fs_visitor::try_constant_propagate(fs_inst *inst, acp_entry *entry)
450 {
451 bool progress = false;
452
453 if (entry->src.file != IMM)
454 return false;
455 if (entry->saturate)
456 return false;
457
458 for (int i = inst->sources - 1; i >= 0; i--) {
459 if (inst->src[i].file != VGRF)
460 continue;
461
462 assert(entry->dst.file == VGRF);
463 if (inst->src[i].nr != entry->dst.nr)
464 continue;
465
466 /* Bail if inst is reading a range that isn't contained in the range
467 * that entry is writing.
468 */
469 if (inst->src[i].reg_offset < entry->dst.reg_offset ||
470 (inst->src[i].reg_offset * 32 + inst->src[i].subreg_offset +
471 inst->regs_read(i) * inst->src[i].stride * 32) >
472 (entry->dst.reg_offset + entry->regs_written) * 32)
473 continue;
474
475 fs_reg val = entry->src;
476 val.type = inst->src[i].type;
477
478 if (inst->src[i].abs) {
479 if ((devinfo->gen >= 8 && is_logic_op(inst->opcode)) ||
480 !brw_abs_immediate(val.type, &val)) {
481 continue;
482 }
483 }
484
485 if (inst->src[i].negate) {
486 if ((devinfo->gen >= 8 && is_logic_op(inst->opcode)) ||
487 !brw_negate_immediate(val.type, &val)) {
488 continue;
489 }
490 }
491
492 switch (inst->opcode) {
493 case BRW_OPCODE_MOV:
494 case SHADER_OPCODE_LOAD_PAYLOAD:
495 inst->src[i] = val;
496 progress = true;
497 break;
498
499 case SHADER_OPCODE_INT_QUOTIENT:
500 case SHADER_OPCODE_INT_REMAINDER:
501 /* FINISHME: Promote non-float constants and remove this. */
502 if (devinfo->gen < 8)
503 break;
504 /* fallthrough */
505 case SHADER_OPCODE_POW:
506 /* Allow constant propagation into src1 (except on Gen 6), and let
507 * constant combining promote the constant on Gen < 8.
508 *
509 * While Gen 6 MATH can take a scalar source, its source and
510 * destination offsets must be equal and we cannot ensure that.
511 */
512 if (devinfo->gen == 6)
513 break;
514 /* fallthrough */
515 case BRW_OPCODE_BFI1:
516 case BRW_OPCODE_ASR:
517 case BRW_OPCODE_SHL:
518 case BRW_OPCODE_SHR:
519 case BRW_OPCODE_SUBB:
520 if (i == 1) {
521 inst->src[i] = val;
522 progress = true;
523 }
524 break;
525
526 case BRW_OPCODE_MACH:
527 case BRW_OPCODE_MUL:
528 case SHADER_OPCODE_MULH:
529 case BRW_OPCODE_ADD:
530 case BRW_OPCODE_OR:
531 case BRW_OPCODE_AND:
532 case BRW_OPCODE_XOR:
533 case BRW_OPCODE_ADDC:
534 if (i == 1) {
535 inst->src[i] = val;
536 progress = true;
537 } else if (i == 0 && inst->src[1].file != IMM) {
538 /* Fit this constant in by commuting the operands.
539 * Exception: we can't do this for 32-bit integer MUL/MACH
540 * because it's asymmetric.
541 *
542 * The BSpec says for Broadwell that
543 *
544 * "When multiplying DW x DW, the dst cannot be accumulator."
545 *
546 * Integer MUL with a non-accumulator destination will be lowered
547 * by lower_integer_multiplication(), so don't restrict it.
548 */
549 if (((inst->opcode == BRW_OPCODE_MUL &&
550 inst->dst.is_accumulator()) ||
551 inst->opcode == BRW_OPCODE_MACH) &&
552 (inst->src[1].type == BRW_REGISTER_TYPE_D ||
553 inst->src[1].type == BRW_REGISTER_TYPE_UD))
554 break;
555 inst->src[0] = inst->src[1];
556 inst->src[1] = val;
557 progress = true;
558 }
559 break;
560
561 case BRW_OPCODE_CMP:
562 case BRW_OPCODE_IF:
563 if (i == 1) {
564 inst->src[i] = val;
565 progress = true;
566 } else if (i == 0 && inst->src[1].file != IMM) {
567 enum brw_conditional_mod new_cmod;
568
569 new_cmod = brw_swap_cmod(inst->conditional_mod);
570 if (new_cmod != BRW_CONDITIONAL_NONE) {
571 /* Fit this constant in by swapping the operands and
572 * flipping the test
573 */
574 inst->src[0] = inst->src[1];
575 inst->src[1] = val;
576 inst->conditional_mod = new_cmod;
577 progress = true;
578 }
579 }
580 break;
581
582 case BRW_OPCODE_SEL:
583 if (i == 1) {
584 inst->src[i] = val;
585 progress = true;
586 } else if (i == 0 && inst->src[1].file != IMM) {
587 inst->src[0] = inst->src[1];
588 inst->src[1] = val;
589
590 /* If this was predicated, flipping operands means
591 * we also need to flip the predicate.
592 */
593 if (inst->conditional_mod == BRW_CONDITIONAL_NONE) {
594 inst->predicate_inverse =
595 !inst->predicate_inverse;
596 }
597 progress = true;
598 }
599 break;
600
601 case SHADER_OPCODE_RCP:
602 /* The hardware doesn't do math on immediate values
603 * (because why are you doing that, seriously?), but
604 * the correct answer is to just constant fold it
605 * anyway.
606 */
607 assert(i == 0);
608 if (inst->src[0].f != 0.0f) {
609 inst->opcode = BRW_OPCODE_MOV;
610 inst->src[0] = val;
611 inst->src[0].f = 1.0f / inst->src[0].f;
612 progress = true;
613 }
614 break;
615
616 case SHADER_OPCODE_UNTYPED_ATOMIC:
617 case SHADER_OPCODE_UNTYPED_SURFACE_READ:
618 case SHADER_OPCODE_UNTYPED_SURFACE_WRITE:
619 case SHADER_OPCODE_TYPED_ATOMIC:
620 case SHADER_OPCODE_TYPED_SURFACE_READ:
621 case SHADER_OPCODE_TYPED_SURFACE_WRITE:
622 /* We only propagate into the surface argument of the
623 * instruction. Everything else goes through LOAD_PAYLOAD.
624 */
625 if (i == 1) {
626 inst->src[i] = val;
627 progress = true;
628 }
629 break;
630
631 case FS_OPCODE_UNIFORM_PULL_CONSTANT_LOAD:
632 case SHADER_OPCODE_BROADCAST:
633 inst->src[i] = val;
634 progress = true;
635 break;
636
637 case BRW_OPCODE_MAD:
638 case BRW_OPCODE_LRP:
639 inst->src[i] = val;
640 progress = true;
641 break;
642
643 default:
644 break;
645 }
646 }
647
648 return progress;
649 }
650
651 static bool
652 can_propagate_from(fs_inst *inst)
653 {
654 return (inst->opcode == BRW_OPCODE_MOV &&
655 inst->dst.file == VGRF &&
656 ((inst->src[0].file == VGRF &&
657 (inst->src[0].nr != inst->dst.nr ||
658 inst->src[0].reg_offset != inst->dst.reg_offset)) ||
659 inst->src[0].file == ATTR ||
660 inst->src[0].file == UNIFORM ||
661 inst->src[0].file == IMM) &&
662 inst->src[0].type == inst->dst.type &&
663 !inst->is_partial_write());
664 }
665
666 /* Walks a basic block and does copy propagation on it using the acp
667 * list.
668 */
669 bool
670 fs_visitor::opt_copy_propagate_local(void *copy_prop_ctx, bblock_t *block,
671 exec_list *acp)
672 {
673 bool progress = false;
674
675 foreach_inst_in_block(fs_inst, inst, block) {
676 /* Try propagating into this instruction. */
677 for (int i = 0; i < inst->sources; i++) {
678 if (inst->src[i].file != VGRF)
679 continue;
680
681 foreach_in_list(acp_entry, entry, &acp[inst->src[i].nr % ACP_HASH_SIZE]) {
682 if (try_constant_propagate(inst, entry))
683 progress = true;
684
685 if (try_copy_propagate(inst, i, entry))
686 progress = true;
687 }
688 }
689
690 /* kill the destination from the ACP */
691 if (inst->dst.file == VGRF) {
692 foreach_in_list_safe(acp_entry, entry, &acp[inst->dst.nr % ACP_HASH_SIZE]) {
693 if (inst->overwrites_reg(entry->dst)) {
694 entry->remove();
695 }
696 }
697
698 /* Oops, we only have the chaining hash based on the destination, not
699 * the source, so walk across the entire table.
700 */
701 for (int i = 0; i < ACP_HASH_SIZE; i++) {
702 foreach_in_list_safe(acp_entry, entry, &acp[i]) {
703 if (inst->overwrites_reg(entry->src))
704 entry->remove();
705 }
706 }
707 }
708
709 /* If this instruction's source could potentially be folded into the
710 * operand of another instruction, add it to the ACP.
711 */
712 if (can_propagate_from(inst)) {
713 acp_entry *entry = ralloc(copy_prop_ctx, acp_entry);
714 entry->dst = inst->dst;
715 entry->src = inst->src[0];
716 entry->regs_written = inst->regs_written;
717 entry->opcode = inst->opcode;
718 entry->saturate = inst->saturate;
719 acp[entry->dst.nr % ACP_HASH_SIZE].push_tail(entry);
720 } else if (inst->opcode == SHADER_OPCODE_LOAD_PAYLOAD &&
721 inst->dst.file == VGRF) {
722 int offset = 0;
723 for (int i = 0; i < inst->sources; i++) {
724 int effective_width = i < inst->header_size ? 8 : inst->exec_size;
725 int regs_written = effective_width / 8;
726 if (inst->src[i].file == VGRF) {
727 acp_entry *entry = ralloc(copy_prop_ctx, acp_entry);
728 entry->dst = inst->dst;
729 entry->dst.reg_offset = offset;
730 entry->src = inst->src[i];
731 entry->regs_written = regs_written;
732 entry->opcode = inst->opcode;
733 if (!entry->dst.equals(inst->src[i])) {
734 acp[entry->dst.nr % ACP_HASH_SIZE].push_tail(entry);
735 } else {
736 ralloc_free(entry);
737 }
738 }
739 offset += regs_written;
740 }
741 }
742 }
743
744 return progress;
745 }
746
747 bool
748 fs_visitor::opt_copy_propagate()
749 {
750 bool progress = false;
751 void *copy_prop_ctx = ralloc_context(NULL);
752 exec_list *out_acp[cfg->num_blocks];
753
754 for (int i = 0; i < cfg->num_blocks; i++)
755 out_acp[i] = new exec_list [ACP_HASH_SIZE];
756
757 /* First, walk through each block doing local copy propagation and getting
758 * the set of copies available at the end of the block.
759 */
760 foreach_block (block, cfg) {
761 progress = opt_copy_propagate_local(copy_prop_ctx, block,
762 out_acp[block->num]) || progress;
763 }
764
765 /* Do dataflow analysis for those available copies. */
766 fs_copy_prop_dataflow dataflow(copy_prop_ctx, cfg, out_acp);
767
768 /* Next, re-run local copy propagation, this time with the set of copies
769 * provided by the dataflow analysis available at the start of a block.
770 */
771 foreach_block (block, cfg) {
772 exec_list in_acp[ACP_HASH_SIZE];
773
774 for (int i = 0; i < dataflow.num_acp; i++) {
775 if (BITSET_TEST(dataflow.bd[block->num].livein, i)) {
776 struct acp_entry *entry = dataflow.acp[i];
777 in_acp[entry->dst.nr % ACP_HASH_SIZE].push_tail(entry);
778 }
779 }
780
781 progress = opt_copy_propagate_local(copy_prop_ctx, block, in_acp) || progress;
782 }
783
784 for (int i = 0; i < cfg->num_blocks; i++)
785 delete [] out_acp[i];
786 ralloc_free(copy_prop_ctx);
787
788 if (progress)
789 invalidate_live_intervals();
790
791 return progress;
792 }