src/mesa/drivers/dri/i965/brw_gs_emit.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #include "main/glheader.h"
  34 #include "main/macros.h"
  35 #include "main/enums.h"
  36
  37 #include "shader/program.h"
  38 #include "intel_batchbuffer.h"
  39
  40 #include "brw_defines.h"
  41 #include "brw_context.h"
  42 #include "brw_eu.h"
  43 #include "brw_gs.h"
  44
  45 static void brw_gs_alloc_regs( struct brw_gs_compile *c,
  46                                GLuint nr_verts )
  47 {
  48    GLuint i = 0,j;
  49
  50    /* Register usage is static, precompute here:
  51     */
  52    c->reg.R0 = retype(brw_vec8_grf(i, 0), BRW_REGISTER_TYPE_UD); i++;
  53
  54    /* Payload vertices plus space for more generated vertices:
  55     */
  56    for (j = 0; j < nr_verts; j++) {
  57       c->reg.vertex[j] = brw_vec4_grf(i, 0);
  58       i += c->nr_regs;
  59    }
  60
  61    c->prog_data.urb_read_length = c->nr_regs;
  62    c->prog_data.total_grf = i;
  63 }
  64
  65
  66 static void brw_gs_emit_vue(struct brw_gs_compile *c,
  67                             struct brw_reg vert,
  68                             GLboolean last,
  69                             GLuint header)
  70 {
  71    struct brw_compile *p = &c->func;
  72    GLboolean allocate = !last;
  73
  74    /* Overwrite PrimType and PrimStart in the message header, for
  75     * each vertex in turn:
  76     */
  77    brw_MOV(p, get_element_ud(c->reg.R0, 2), brw_imm_ud(header));
  78
  79    /* Copy the vertex from vertn into m1..mN+1:
  80     */
  81    brw_copy8(p, brw_message_reg(1), vert, c->nr_regs);
  82
  83    /* Send each vertex as a seperate write to the urb.  This is
  84     * different to the concept in brw_sf_emit.c, where subsequent
  85     * writes are used to build up a single urb entry.  Each of these
  86     * writes instantiates a seperate urb entry, and a new one must be
  87     * allocated each time.
  88     */
  89    brw_urb_WRITE(p,
  90                  allocate ? c->reg.R0 : retype(brw_null_reg(), BRW_REGISTER_TYPE_UD),
  91                  0,
  92                  c->reg.R0,
  93                  allocate,
  94                  1,             /* used */
  95                  c->nr_regs + 1, /* msg length */
  96                  allocate ? 1 : 0, /* response length */
  97                  allocate ? 0 : 1, /* eot */
  98                  1,             /* writes_complete */
  99                  0,             /* urb offset */
 100                  BRW_URB_SWIZZLE_NONE);
 101 }
 102
 103 static void brw_gs_ff_sync(struct brw_gs_compile *c, int num_prim)
 104 {
 105         struct brw_compile *p = &c->func;
 106         brw_MOV(p, get_element_ud(c->reg.R0, 1), brw_imm_ud(num_prim));
 107         brw_ff_sync(p,
 108                                 c->reg.R0,
 109                                 0,
 110                                 c->reg.R0,
 111                                 1,
 112                                 1,              /* used */
 113                                 1,      /* msg length */
 114                                 1,              /* response length */
 115                                 0,              /* eot */
 116                                 1,              /* write compelete */
 117                                 0,              /* urb offset */
 118                                 BRW_URB_SWIZZLE_NONE);
 119 }
 120
 121
 122 void brw_gs_quads( struct brw_gs_compile *c, struct brw_gs_prog_key *key )
 123 {
 124    struct intel_context *intel = &c->func.brw->intel;
 125
 126    brw_gs_alloc_regs(c, 4);
 127
 128    /* Use polygons for correct edgeflag behaviour. Note that vertex 3
 129     * is the PV for quads, but vertex 0 for polygons:
 130     */
 131    if (intel->needs_ff_sync)
 132            brw_gs_ff_sync(c, 1);
 133    if (key->pv_first) {
 134       brw_gs_emit_vue(c, c->reg.vertex[0], 0, ((_3DPRIM_POLYGON << 2) | R02_PRIM_START));
 135       brw_gs_emit_vue(c, c->reg.vertex[1], 0, (_3DPRIM_POLYGON << 2));
 136       brw_gs_emit_vue(c, c->reg.vertex[2], 0, (_3DPRIM_POLYGON << 2));
 137       brw_gs_emit_vue(c, c->reg.vertex[3], 1, ((_3DPRIM_POLYGON << 2) | R02_PRIM_END));
 138    }
 139    else {
 140       brw_gs_emit_vue(c, c->reg.vertex[3], 0, ((_3DPRIM_POLYGON << 2) | R02_PRIM_START));
 141       brw_gs_emit_vue(c, c->reg.vertex[0], 0, (_3DPRIM_POLYGON << 2));
 142       brw_gs_emit_vue(c, c->reg.vertex[1], 0, (_3DPRIM_POLYGON << 2));
 143       brw_gs_emit_vue(c, c->reg.vertex[2], 1, ((_3DPRIM_POLYGON << 2) | R02_PRIM_END));
 144    }
 145 }
 146
 147 void brw_gs_quad_strip( struct brw_gs_compile *c, struct brw_gs_prog_key *key )
 148 {
 149    struct intel_context *intel = &c->func.brw->intel;
 150
 151    brw_gs_alloc_regs(c, 4);
 152
 153    if (intel->needs_ff_sync)
 154            brw_gs_ff_sync(c, 1);
 155    if (key->pv_first) {
 156       brw_gs_emit_vue(c, c->reg.vertex[0], 0, ((_3DPRIM_POLYGON << 2) | R02_PRIM_START));
 157       brw_gs_emit_vue(c, c->reg.vertex[1], 0, (_3DPRIM_POLYGON << 2));
 158       brw_gs_emit_vue(c, c->reg.vertex[2], 0, (_3DPRIM_POLYGON << 2));
 159       brw_gs_emit_vue(c, c->reg.vertex[3], 1, ((_3DPRIM_POLYGON << 2) | R02_PRIM_END));
 160    }
 161    else {
 162       brw_gs_emit_vue(c, c->reg.vertex[2], 0, ((_3DPRIM_POLYGON << 2) | R02_PRIM_START));
 163       brw_gs_emit_vue(c, c->reg.vertex[3], 0, (_3DPRIM_POLYGON << 2));
 164       brw_gs_emit_vue(c, c->reg.vertex[0], 0, (_3DPRIM_POLYGON << 2));
 165       brw_gs_emit_vue(c, c->reg.vertex[1], 1, ((_3DPRIM_POLYGON << 2) | R02_PRIM_END));
 166    }
 167 }
 168
 169 void brw_gs_tris( struct brw_gs_compile *c )
 170 {
 171    struct intel_context *intel = &c->func.brw->intel;
 172
 173    brw_gs_alloc_regs(c, 3);
 174
 175    if (intel->needs_ff_sync)
 176            brw_gs_ff_sync(c, 1);
 177    brw_gs_emit_vue(c, c->reg.vertex[0], 0, ((_3DPRIM_TRILIST << 2) | R02_PRIM_START));
 178    brw_gs_emit_vue(c, c->reg.vertex[1], 0, (_3DPRIM_TRILIST << 2));
 179    brw_gs_emit_vue(c, c->reg.vertex[2], 1, ((_3DPRIM_TRILIST << 2) | R02_PRIM_END));
 180 }
 181
 182 void brw_gs_lines( struct brw_gs_compile *c )
 183 {
 184    struct intel_context *intel = &c->func.brw->intel;
 185
 186    brw_gs_alloc_regs(c, 2);
 187
 188    if (intel->needs_ff_sync)
 189            brw_gs_ff_sync(c, 1);
 190    brw_gs_emit_vue(c, c->reg.vertex[0], 0, ((_3DPRIM_LINESTRIP << 2) | R02_PRIM_START));
 191    brw_gs_emit_vue(c, c->reg.vertex[1], 1, ((_3DPRIM_LINESTRIP << 2) | R02_PRIM_END));
 192 }
 193
 194 void brw_gs_points( struct brw_gs_compile *c )
 195 {
 196    struct intel_context *intel = &c->func.brw->intel;
 197
 198    brw_gs_alloc_regs(c, 1);
 199
 200    if (intel->needs_ff_sync)
 201            brw_gs_ff_sync(c, 1);
 202    brw_gs_emit_vue(c, c->reg.vertex[0], 1, ((_3DPRIM_POINTLIST << 2) | R02_PRIM_START | R02_PRIM_END));
 203 }
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