src/mesa/drivers/dri/i965/brw_gs_emit.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #include "main/glheader.h"
  34 #include "main/macros.h"
  35 #include "main/enums.h"
  36
  37 #include "shader/program.h"
  38 #include "intel_batchbuffer.h"
  39
  40 #include "brw_defines.h"
  41 #include "brw_context.h"
  42 #include "brw_eu.h"
  43 #include "brw_util.h"
  44 #include "brw_gs.h"
  45
  46 static void brw_gs_alloc_regs( struct brw_gs_compile *c,
  47                                GLuint nr_verts )
  48 {
  49    GLuint i = 0,j;
  50
  51    /* Register usage is static, precompute here:
  52     */
  53    c->reg.R0 = retype(brw_vec8_grf(i, 0), BRW_REGISTER_TYPE_UD); i++;
  54
  55    /* Payload vertices plus space for more generated vertices:
  56     */
  57    for (j = 0; j < nr_verts; j++) {
  58       c->reg.vertex[j] = brw_vec4_grf(i, 0);
  59       i += c->nr_regs;
  60    }
  61
  62    c->prog_data.urb_read_length = c->nr_regs;
  63    c->prog_data.total_grf = i;
  64 }
  65
  66
  67 static void brw_gs_emit_vue(struct brw_gs_compile *c,
  68                             struct brw_reg vert,
  69                             GLboolean last,
  70                             GLuint header)
  71 {
  72    struct brw_compile *p = &c->func;
  73    GLboolean allocate = !last;
  74
  75    /* Overwrite PrimType and PrimStart in the message header, for
  76     * each vertex in turn:
  77     */
  78    brw_MOV(p, get_element_ud(c->reg.R0, 2), brw_imm_ud(header));
  79
  80    /* Copy the vertex from vertn into m1..mN+1:
  81     */
  82    brw_copy8(p, brw_message_reg(1), vert, c->nr_regs);
  83
  84    /* Send each vertex as a seperate write to the urb.  This is
  85     * different to the concept in brw_sf_emit.c, where subsequent
  86     * writes are used to build up a single urb entry.  Each of these
  87     * writes instantiates a seperate urb entry, and a new one must be
  88     * allocated each time.
  89     */
  90    brw_urb_WRITE(p,
  91                  allocate ? c->reg.R0 : retype(brw_null_reg(), BRW_REGISTER_TYPE_UD),
  92                  0,
  93                  c->reg.R0,
  94                  allocate,
  95                  1,             /* used */
  96                  c->nr_regs + 1, /* msg length */
  97                  allocate ? 1 : 0, /* response length */
  98                  allocate ? 0 : 1, /* eot */
  99                  1,             /* writes_complete */
 100                  0,             /* urb offset */
 101                  BRW_URB_SWIZZLE_NONE);
 102 }
 103
 104 static void brw_gs_ff_sync(struct brw_gs_compile *c, int num_prim)
 105 {
 106         struct brw_compile *p = &c->func;
 107         brw_MOV(p, get_element_ud(c->reg.R0, 1), brw_imm_ud(num_prim));
 108         brw_ff_sync(p,
 109                                 c->reg.R0,
 110                                 0,
 111                                 c->reg.R0,
 112                                 1,
 113                                 1,              /* used */
 114                                 1,      /* msg length */
 115                                 1,              /* response length */
 116                                 0,              /* eot */
 117                                 1,              /* write compelete */
 118                                 0,              /* urb offset */
 119                                 BRW_URB_SWIZZLE_NONE);
 120 }
 121
 122
 123 void brw_gs_quads( struct brw_gs_compile *c, struct brw_gs_prog_key *key )
 124 {
 125    struct intel_context *intel = &c->func.brw->intel;
 126
 127    brw_gs_alloc_regs(c, 4);
 128
 129    /* Use polygons for correct edgeflag behaviour. Note that vertex 3
 130     * is the PV for quads, but vertex 0 for polygons:
 131     */
 132    if (intel->needs_ff_sync)
 133            brw_gs_ff_sync(c, 1);
 134    if (key->pv_first) {
 135       brw_gs_emit_vue(c, c->reg.vertex[0], 0, ((_3DPRIM_POLYGON << 2) | R02_PRIM_START));
 136       brw_gs_emit_vue(c, c->reg.vertex[1], 0, (_3DPRIM_POLYGON << 2));
 137       brw_gs_emit_vue(c, c->reg.vertex[2], 0, (_3DPRIM_POLYGON << 2));
 138       brw_gs_emit_vue(c, c->reg.vertex[3], 1, ((_3DPRIM_POLYGON << 2) | R02_PRIM_END));
 139    }
 140    else {
 141       brw_gs_emit_vue(c, c->reg.vertex[3], 0, ((_3DPRIM_POLYGON << 2) | R02_PRIM_START));
 142       brw_gs_emit_vue(c, c->reg.vertex[0], 0, (_3DPRIM_POLYGON << 2));
 143       brw_gs_emit_vue(c, c->reg.vertex[1], 0, (_3DPRIM_POLYGON << 2));
 144       brw_gs_emit_vue(c, c->reg.vertex[2], 1, ((_3DPRIM_POLYGON << 2) | R02_PRIM_END));
 145    }
 146 }
 147
 148 void brw_gs_quad_strip( struct brw_gs_compile *c, struct brw_gs_prog_key *key )
 149 {
 150    struct intel_context *intel = &c->func.brw->intel;
 151
 152    brw_gs_alloc_regs(c, 4);
 153
 154    if (intel->needs_ff_sync)
 155            brw_gs_ff_sync(c, 1);
 156    if (key->pv_first) {
 157       brw_gs_emit_vue(c, c->reg.vertex[0], 0, ((_3DPRIM_POLYGON << 2) | R02_PRIM_START));
 158       brw_gs_emit_vue(c, c->reg.vertex[1], 0, (_3DPRIM_POLYGON << 2));
 159       brw_gs_emit_vue(c, c->reg.vertex[2], 0, (_3DPRIM_POLYGON << 2));
 160       brw_gs_emit_vue(c, c->reg.vertex[3], 1, ((_3DPRIM_POLYGON << 2) | R02_PRIM_END));
 161    }
 162    else {
 163       brw_gs_emit_vue(c, c->reg.vertex[2], 0, ((_3DPRIM_POLYGON << 2) | R02_PRIM_START));
 164       brw_gs_emit_vue(c, c->reg.vertex[3], 0, (_3DPRIM_POLYGON << 2));
 165       brw_gs_emit_vue(c, c->reg.vertex[0], 0, (_3DPRIM_POLYGON << 2));
 166       brw_gs_emit_vue(c, c->reg.vertex[1], 1, ((_3DPRIM_POLYGON << 2) | R02_PRIM_END));
 167    }
 168 }
 169
 170 void brw_gs_tris( struct brw_gs_compile *c )
 171 {
 172    struct intel_context *intel = &c->func.brw->intel;
 173
 174    brw_gs_alloc_regs(c, 3);
 175
 176    if (intel->needs_ff_sync)
 177            brw_gs_ff_sync(c, 1);
 178    brw_gs_emit_vue(c, c->reg.vertex[0], 0, ((_3DPRIM_TRILIST << 2) | R02_PRIM_START));
 179    brw_gs_emit_vue(c, c->reg.vertex[1], 0, (_3DPRIM_TRILIST << 2));
 180    brw_gs_emit_vue(c, c->reg.vertex[2], 1, ((_3DPRIM_TRILIST << 2) | R02_PRIM_END));
 181 }
 182
 183 void brw_gs_lines( struct brw_gs_compile *c )
 184 {
 185    struct intel_context *intel = &c->func.brw->intel;
 186
 187    brw_gs_alloc_regs(c, 2);
 188
 189    if (intel->needs_ff_sync)
 190            brw_gs_ff_sync(c, 1);
 191    brw_gs_emit_vue(c, c->reg.vertex[0], 0, ((_3DPRIM_LINESTRIP << 2) | R02_PRIM_START));
 192    brw_gs_emit_vue(c, c->reg.vertex[1], 1, ((_3DPRIM_LINESTRIP << 2) | R02_PRIM_END));
 193 }
 194
 195 void brw_gs_points( struct brw_gs_compile *c )
 196 {
 197    struct intel_context *intel = &c->func.brw->intel;
 198
 199    brw_gs_alloc_regs(c, 1);
 200
 201    if (intel->needs_ff_sync)
 202            brw_gs_ff_sync(c, 1);
 203    brw_gs_emit_vue(c, c->reg.vertex[0], 1, ((_3DPRIM_POINTLIST << 2) | R02_PRIM_START | R02_PRIM_END));
 204 }
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