src/mesa/drivers/dri/i965/brw_link.cpp

   1 /*
   2  * Copyright © 2015 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "main/macros.h"
  25 #include "brw_context.h"
  26 #include "brw_vs.h"
  27 #include "brw_gs.h"
  28 #include "brw_fs.h"
  29 #include "brw_cfg.h"
  30 #include "brw_nir.h"
  31 #include "brw_program.h"
  32 #include "glsl/ir_optimization.h"
  33 #include "glsl/glsl_parser_extras.h"
  34 #include "main/shaderapi.h"
  35
  36 /**
  37  * Performs a compile of the shader stages even when we don't know
  38  * what non-orthogonal state will be set, in the hope that it reflects
  39  * the eventual NOS used, and thus allows us to produce link failures.
  40  */
  41 static bool
  42 brw_shader_precompile(struct gl_context *ctx,
  43                       struct gl_shader_program *sh_prog)
  44 {
  45    struct gl_shader *vs = sh_prog->_LinkedShaders[MESA_SHADER_VERTEX];
  46    struct gl_shader *gs = sh_prog->_LinkedShaders[MESA_SHADER_GEOMETRY];
  47    struct gl_shader *fs = sh_prog->_LinkedShaders[MESA_SHADER_FRAGMENT];
  48    struct gl_shader *cs = sh_prog->_LinkedShaders[MESA_SHADER_COMPUTE];
  49
  50    if (fs && !brw_fs_precompile(ctx, sh_prog, fs->Program))
  51       return false;
  52
  53    if (gs && !brw_gs_precompile(ctx, sh_prog, gs->Program))
  54       return false;
  55
  56    if (vs && !brw_vs_precompile(ctx, sh_prog, vs->Program))
  57       return false;
  58
  59    if (cs && !brw_cs_precompile(ctx, sh_prog, cs->Program))
  60       return false;
  61
  62    return true;
  63 }
  64
  65 static void
  66 brw_lower_packing_builtins(struct brw_context *brw,
  67                            gl_shader_stage shader_type,
  68                            exec_list *ir)
  69 {
  70    const struct brw_compiler *compiler = brw->intelScreen->compiler;
  71
  72    int ops = LOWER_PACK_SNORM_2x16
  73            | LOWER_UNPACK_SNORM_2x16
  74            | LOWER_PACK_UNORM_2x16
  75            | LOWER_UNPACK_UNORM_2x16;
  76
  77    if (compiler->scalar_stage[shader_type]) {
  78       ops |= LOWER_UNPACK_UNORM_4x8
  79            | LOWER_UNPACK_SNORM_4x8
  80            | LOWER_PACK_UNORM_4x8
  81            | LOWER_PACK_SNORM_4x8;
  82    }
  83
  84    if (brw->gen >= 7) {
  85       /* Gen7 introduced the f32to16 and f16to32 instructions, which can be
  86        * used to execute packHalf2x16 and unpackHalf2x16. For AOS code, no
  87        * lowering is needed. For SOA code, the Half2x16 ops must be
  88        * scalarized.
  89        */
  90       if (compiler->scalar_stage[shader_type]) {
  91          ops |= LOWER_PACK_HALF_2x16_TO_SPLIT
  92              |  LOWER_UNPACK_HALF_2x16_TO_SPLIT;
  93       }
  94    } else {
  95       ops |= LOWER_PACK_HALF_2x16
  96           |  LOWER_UNPACK_HALF_2x16;
  97    }
  98
  99    lower_packing_builtins(ir, ops);
 100 }
 101
 102 static void
 103 process_glsl_ir(gl_shader_stage stage,
 104                 struct brw_context *brw,
 105                 struct gl_shader_program *shader_prog,
 106                 struct gl_shader *shader)
 107 {
 108    struct gl_context *ctx = &brw->ctx;
 109    const struct brw_compiler *compiler = brw->intelScreen->compiler;
 110    const struct gl_shader_compiler_options *options =
 111       &ctx->Const.ShaderCompilerOptions[shader->Stage];
 112
 113    /* Temporary memory context for any new IR. */
 114    void *mem_ctx = ralloc_context(NULL);
 115
 116    ralloc_adopt(mem_ctx, shader->ir);
 117
 118    /* lower_packing_builtins() inserts arithmetic instructions, so it
 119     * must precede lower_instructions().
 120     */
 121    brw_lower_packing_builtins(brw, shader->Stage, shader->ir);
 122    do_mat_op_to_vec(shader->ir);
 123    const int bitfield_insert = brw->gen >= 7 ? BITFIELD_INSERT_TO_BFM_BFI : 0;
 124    lower_instructions(shader->ir,
 125                       MOD_TO_FLOOR |
 126                       DIV_TO_MUL_RCP |
 127                       SUB_TO_ADD_NEG |
 128                       EXP_TO_EXP2 |
 129                       LOG_TO_LOG2 |
 130                       bitfield_insert |
 131                       LDEXP_TO_ARITH |
 132                       CARRY_TO_ARITH |
 133                       BORROW_TO_ARITH);
 134
 135    /* Pre-gen6 HW can only nest if-statements 16 deep.  Beyond this,
 136     * if-statements need to be flattened.
 137     */
 138    if (brw->gen < 6)
 139       lower_if_to_cond_assign(shader->ir, 16);
 140
 141    do_lower_texture_projection(shader->ir);
 142    brw_lower_texture_gradients(brw, shader->ir);
 143    do_vec_index_to_cond_assign(shader->ir);
 144    lower_vector_insert(shader->ir, true);
 145    lower_offset_arrays(shader->ir);
 146    brw_do_lower_unnormalized_offset(shader->ir);
 147    lower_noise(shader->ir);
 148    lower_quadop_vector(shader->ir, false);
 149
 150    bool lowered_variable_indexing =
 151       lower_variable_index_to_cond_assign((gl_shader_stage)stage,
 152                                           shader->ir,
 153                                           options->EmitNoIndirectInput,
 154                                           options->EmitNoIndirectOutput,
 155                                           options->EmitNoIndirectTemp,
 156                                           options->EmitNoIndirectUniform);
 157
 158    if (unlikely(brw->perf_debug && lowered_variable_indexing)) {
 159       perf_debug("Unsupported form of variable indexing in %s; falling "
 160                  "back to very inefficient code generation\n",
 161                  _mesa_shader_stage_to_abbrev(shader->Stage));
 162    }
 163
 164    bool progress;
 165    do {
 166       progress = false;
 167
 168       if (compiler->scalar_stage[shader->Stage]) {
 169          brw_do_channel_expressions(shader->ir);
 170          brw_do_vector_splitting(shader->ir);
 171       }
 172
 173       progress = do_lower_jumps(shader->ir, true, true,
 174                                 true, /* main return */
 175                                 false, /* continue */
 176                                 false /* loops */
 177                                 ) || progress;
 178
 179       progress = do_common_optimization(shader->ir, true, true,
 180                                         options, ctx->Const.NativeIntegers) || progress;
 181    } while (progress);
 182
 183    validate_ir_tree(shader->ir);
 184
 185    /* Now that we've finished altering the linked IR, reparent any live IR back
 186     * to the permanent memory context, and free the temporary one (discarding any
 187     * junk we optimized away).
 188     */
 189    reparent_ir(shader->ir, shader->ir);
 190    ralloc_free(mem_ctx);
 191
 192    if (ctx->_Shader->Flags & GLSL_DUMP) {
 193       fprintf(stderr, "\n");
 194       fprintf(stderr, "GLSL IR for linked %s program %d:\n",
 195               _mesa_shader_stage_to_string(shader->Stage),
 196               shader_prog->Name);
 197       _mesa_print_ir(stderr, shader->ir, NULL);
 198       fprintf(stderr, "\n");
 199    }
 200 }
 201
 202 extern "C" GLboolean
 203 brw_link_shader(struct gl_context *ctx, struct gl_shader_program *shProg)
 204 {
 205    struct brw_context *brw = brw_context(ctx);
 206    const struct brw_compiler *compiler = brw->intelScreen->compiler;
 207    unsigned int stage;
 208
 209    for (stage = 0; stage < ARRAY_SIZE(shProg->_LinkedShaders); stage++) {
 210       struct gl_shader *shader = shProg->_LinkedShaders[stage];
 211       if (!shader)
 212          continue;
 213
 214       struct gl_program *prog =
 215          ctx->Driver.NewProgram(ctx, _mesa_shader_stage_to_program(stage),
 216                                 shader->Name);
 217       if (!prog)
 218         return false;
 219       prog->Parameters = _mesa_new_parameter_list();
 220
 221       _mesa_copy_linked_program_data((gl_shader_stage) stage, shProg, prog);
 222
 223       process_glsl_ir((gl_shader_stage) stage, brw, shProg, shader);
 224
 225       /* Make a pass over the IR to add state references for any built-in
 226        * uniforms that are used.  This has to be done now (during linking).
 227        * Code generation doesn't happen until the first time this shader is
 228        * used for rendering.  Waiting until then to generate the parameters is
 229        * too late.  At that point, the values for the built-in uniforms won't
 230        * get sent to the shader.
 231        */
 232       foreach_in_list(ir_instruction, node, shader->ir) {
 233          ir_variable *var = node->as_variable();
 234
 235          if ((var == NULL) || (var->data.mode != ir_var_uniform)
 236              || (strncmp(var->name, "gl_", 3) != 0))
 237             continue;
 238
 239          const ir_state_slot *const slots = var->get_state_slots();
 240          assert(slots != NULL);
 241
 242          for (unsigned int i = 0; i < var->get_num_state_slots(); i++) {
 243             _mesa_add_state_reference(prog->Parameters,
 244                                       (gl_state_index *) slots[i].tokens);
 245          }
 246       }
 247
 248       do_set_program_inouts(shader->ir, prog, shader->Stage);
 249
 250       prog->SamplersUsed = shader->active_samplers;
 251       prog->ShadowSamplers = shader->shadow_samplers;
 252       _mesa_update_shader_textures_used(shProg, prog);
 253
 254       _mesa_reference_program(ctx, &shader->Program, prog);
 255
 256       brw_add_texrect_params(prog);
 257
 258       prog->nir = brw_create_nir(brw, shProg, prog, (gl_shader_stage) stage,
 259                                  compiler->scalar_stage[stage]);
 260
 261       _mesa_reference_program(ctx, &prog, NULL);
 262    }
 263
 264    if ((ctx->_Shader->Flags & GLSL_DUMP) && shProg->Name != 0) {
 265       for (unsigned i = 0; i < shProg->NumShaders; i++) {
 266          const struct gl_shader *sh = shProg->Shaders[i];
 267          if (!sh)
 268             continue;
 269
 270          fprintf(stderr, "GLSL %s shader %d source for linked program %d:\n",
 271                  _mesa_shader_stage_to_string(sh->Stage),
 272                  i, shProg->Name);
 273          fprintf(stderr, "%s", sh->Source);
 274          fprintf(stderr, "\n");
 275       }
 276    }
 277
 278    if (brw->precompile && !brw_shader_precompile(ctx, shProg))
 279       return false;
 280
 281    return true;
 282 }