src/mesa/drivers/dri/i965/brw_link.cpp

   1 /*
   2  * Copyright © 2015 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "brw_context.h"
  25 #include "brw_shader.h"
  26 #include "brw_fs.h"
  27 #include "brw_nir.h"
  28 #include "brw_program.h"
  29 #include "glsl/ir_optimization.h"
  30 #include "program/program.h"
  31 #include "main/shaderapi.h"
  32 #include "main/uniforms.h"
  33
  34 /**
  35  * Performs a compile of the shader stages even when we don't know
  36  * what non-orthogonal state will be set, in the hope that it reflects
  37  * the eventual NOS used, and thus allows us to produce link failures.
  38  */
  39 static bool
  40 brw_shader_precompile(struct gl_context *ctx,
  41                       struct gl_shader_program *sh_prog)
  42 {
  43    struct gl_shader *vs = sh_prog->_LinkedShaders[MESA_SHADER_VERTEX];
  44    struct gl_shader *tcs = sh_prog->_LinkedShaders[MESA_SHADER_TESS_CTRL];
  45    struct gl_shader *tes = sh_prog->_LinkedShaders[MESA_SHADER_TESS_EVAL];
  46    struct gl_shader *gs = sh_prog->_LinkedShaders[MESA_SHADER_GEOMETRY];
  47    struct gl_shader *fs = sh_prog->_LinkedShaders[MESA_SHADER_FRAGMENT];
  48    struct gl_shader *cs = sh_prog->_LinkedShaders[MESA_SHADER_COMPUTE];
  49
  50    if (fs && !brw_fs_precompile(ctx, sh_prog, fs->Program))
  51       return false;
  52
  53    if (gs && !brw_gs_precompile(ctx, sh_prog, gs->Program))
  54       return false;
  55
  56    if (tes && !brw_tes_precompile(ctx, sh_prog, tes->Program))
  57       return false;
  58
  59    if (tcs && !brw_tcs_precompile(ctx, sh_prog, tcs->Program))
  60       return false;
  61
  62    if (vs && !brw_vs_precompile(ctx, sh_prog, vs->Program))
  63       return false;
  64
  65    if (cs && !brw_cs_precompile(ctx, sh_prog, cs->Program))
  66       return false;
  67
  68    return true;
  69 }
  70
  71 static void
  72 brw_lower_packing_builtins(struct brw_context *brw,
  73                            gl_shader_stage shader_type,
  74                            exec_list *ir)
  75 {
  76    const struct brw_compiler *compiler = brw->intelScreen->compiler;
  77
  78    int ops = LOWER_PACK_SNORM_2x16
  79            | LOWER_UNPACK_SNORM_2x16
  80            | LOWER_PACK_UNORM_2x16
  81            | LOWER_UNPACK_UNORM_2x16;
  82
  83    if (compiler->scalar_stage[shader_type]) {
  84       ops |= LOWER_UNPACK_UNORM_4x8
  85            | LOWER_UNPACK_SNORM_4x8
  86            | LOWER_PACK_UNORM_4x8
  87            | LOWER_PACK_SNORM_4x8;
  88    }
  89
  90    if (brw->gen < 7) {
  91       ops |= LOWER_PACK_HALF_2x16
  92           |  LOWER_UNPACK_HALF_2x16;
  93    }
  94
  95    lower_packing_builtins(ir, ops);
  96 }
  97
  98 static void
  99 process_glsl_ir(gl_shader_stage stage,
 100                 struct brw_context *brw,
 101                 struct gl_shader_program *shader_prog,
 102                 struct gl_shader *shader)
 103 {
 104    struct gl_context *ctx = &brw->ctx;
 105    const struct brw_compiler *compiler = brw->intelScreen->compiler;
 106    const struct gl_shader_compiler_options *options =
 107       &ctx->Const.ShaderCompilerOptions[shader->Stage];
 108
 109    /* Temporary memory context for any new IR. */
 110    void *mem_ctx = ralloc_context(NULL);
 111
 112    ralloc_adopt(mem_ctx, shader->ir);
 113
 114    /* lower_packing_builtins() inserts arithmetic instructions, so it
 115     * must precede lower_instructions().
 116     */
 117    brw_lower_packing_builtins(brw, shader->Stage, shader->ir);
 118    do_mat_op_to_vec(shader->ir);
 119    lower_instructions(shader->ir,
 120                       MOD_TO_FLOOR |
 121                       DIV_TO_MUL_RCP |
 122                       SUB_TO_ADD_NEG |
 123                       EXP_TO_EXP2 |
 124                       LOG_TO_LOG2 |
 125                       LDEXP_TO_ARITH |
 126                       CARRY_TO_ARITH |
 127                       BORROW_TO_ARITH);
 128
 129    /* Pre-gen6 HW can only nest if-statements 16 deep.  Beyond this,
 130     * if-statements need to be flattened.
 131     */
 132    if (brw->gen < 6)
 133       lower_if_to_cond_assign(shader->ir, 16);
 134
 135    do_lower_texture_projection(shader->ir);
 136    brw_lower_texture_gradients(brw, shader->ir);
 137    do_vec_index_to_cond_assign(shader->ir);
 138    lower_vector_insert(shader->ir, true);
 139    lower_offset_arrays(shader->ir);
 140    brw_do_lower_unnormalized_offset(shader->ir);
 141    lower_noise(shader->ir);
 142    lower_quadop_vector(shader->ir, false);
 143
 144    bool lowered_variable_indexing =
 145       lower_variable_index_to_cond_assign((gl_shader_stage)stage,
 146                                           shader->ir,
 147                                           options->EmitNoIndirectInput,
 148                                           options->EmitNoIndirectOutput,
 149                                           options->EmitNoIndirectTemp,
 150                                           options->EmitNoIndirectUniform);
 151
 152    if (unlikely(brw->perf_debug && lowered_variable_indexing)) {
 153       perf_debug("Unsupported form of variable indexing in %s; falling "
 154                  "back to very inefficient code generation\n",
 155                  _mesa_shader_stage_to_abbrev(shader->Stage));
 156    }
 157
 158    bool progress;
 159    do {
 160       progress = false;
 161
 162       if (compiler->scalar_stage[shader->Stage]) {
 163          brw_do_channel_expressions(shader->ir);
 164          brw_do_vector_splitting(shader->ir);
 165       }
 166
 167       progress = do_lower_jumps(shader->ir, true, true,
 168                                 true, /* main return */
 169                                 false, /* continue */
 170                                 false /* loops */
 171                                 ) || progress;
 172
 173       progress = do_common_optimization(shader->ir, true, true,
 174                                         options, ctx->Const.NativeIntegers) || progress;
 175    } while (progress);
 176
 177    validate_ir_tree(shader->ir);
 178
 179    /* Now that we've finished altering the linked IR, reparent any live IR back
 180     * to the permanent memory context, and free the temporary one (discarding any
 181     * junk we optimized away).
 182     */
 183    reparent_ir(shader->ir, shader->ir);
 184    ralloc_free(mem_ctx);
 185
 186    if (ctx->_Shader->Flags & GLSL_DUMP) {
 187       fprintf(stderr, "\n");
 188       fprintf(stderr, "GLSL IR for linked %s program %d:\n",
 189               _mesa_shader_stage_to_string(shader->Stage),
 190               shader_prog->Name);
 191       _mesa_print_ir(stderr, shader->ir, NULL);
 192       fprintf(stderr, "\n");
 193    }
 194 }
 195
 196 extern "C" GLboolean
 197 brw_link_shader(struct gl_context *ctx, struct gl_shader_program *shProg)
 198 {
 199    struct brw_context *brw = brw_context(ctx);
 200    const struct brw_compiler *compiler = brw->intelScreen->compiler;
 201    unsigned int stage;
 202
 203    for (stage = 0; stage < ARRAY_SIZE(shProg->_LinkedShaders); stage++) {
 204       struct gl_shader *shader = shProg->_LinkedShaders[stage];
 205       if (!shader)
 206          continue;
 207
 208       struct gl_program *prog =
 209          ctx->Driver.NewProgram(ctx, _mesa_shader_stage_to_program(stage),
 210                                 shader->Name);
 211       if (!prog)
 212         return false;
 213       prog->Parameters = _mesa_new_parameter_list();
 214
 215       _mesa_copy_linked_program_data((gl_shader_stage) stage, shProg, prog);
 216
 217       process_glsl_ir((gl_shader_stage) stage, brw, shProg, shader);
 218
 219       /* Make a pass over the IR to add state references for any built-in
 220        * uniforms that are used.  This has to be done now (during linking).
 221        * Code generation doesn't happen until the first time this shader is
 222        * used for rendering.  Waiting until then to generate the parameters is
 223        * too late.  At that point, the values for the built-in uniforms won't
 224        * get sent to the shader.
 225        */
 226       foreach_in_list(ir_instruction, node, shader->ir) {
 227          ir_variable *var = node->as_variable();
 228
 229          if ((var == NULL) || (var->data.mode != ir_var_uniform)
 230              || (strncmp(var->name, "gl_", 3) != 0))
 231             continue;
 232
 233          const ir_state_slot *const slots = var->get_state_slots();
 234          assert(slots != NULL);
 235
 236          for (unsigned int i = 0; i < var->get_num_state_slots(); i++) {
 237             _mesa_add_state_reference(prog->Parameters,
 238                                       (gl_state_index *) slots[i].tokens);
 239          }
 240       }
 241
 242       do_set_program_inouts(shader->ir, prog, shader->Stage);
 243
 244       prog->SamplersUsed = shader->active_samplers;
 245       prog->ShadowSamplers = shader->shadow_samplers;
 246       _mesa_update_shader_textures_used(shProg, prog);
 247
 248       _mesa_reference_program(ctx, &shader->Program, prog);
 249
 250       brw_add_texrect_params(prog);
 251
 252       prog->nir = brw_create_nir(brw, shProg, prog, (gl_shader_stage) stage,
 253                                  compiler->scalar_stage[stage]);
 254
 255       _mesa_reference_program(ctx, &prog, NULL);
 256    }
 257
 258    if ((ctx->_Shader->Flags & GLSL_DUMP) && shProg->Name != 0) {
 259       for (unsigned i = 0; i < shProg->NumShaders; i++) {
 260          const struct gl_shader *sh = shProg->Shaders[i];
 261          if (!sh)
 262             continue;
 263
 264          fprintf(stderr, "GLSL %s shader %d source for linked program %d:\n",
 265                  _mesa_shader_stage_to_string(sh->Stage),
 266                  i, shProg->Name);
 267          fprintf(stderr, "%s", sh->Source);
 268          fprintf(stderr, "\n");
 269       }
 270    }
 271
 272    if (brw->precompile && !brw_shader_precompile(ctx, shProg))
 273       return false;
 274
 275    return true;
 276 }