src/mesa/drivers/dri/i965/brw_nir.h

   1 /*
   2  * Copyright © 2015 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #pragma once
  25
  26 #include "brw_context.h"
  27 #include "glsl/nir/nir.h"
  28
  29 #ifdef __cplusplus
  30 extern "C" {
  31 #endif
  32
  33 /* Flags set in the instr->pass_flags field by i965 analysis passes */
  34 enum {
  35    BRW_NIR_NON_BOOLEAN           = 0x0,
  36
  37    /* Indicates that the given instruction's destination is a boolean
  38     * value but that it needs to be resolved before it can be used.
  39     * On Gen <= 5, CMP instructions return a 32-bit value where the bottom
  40     * bit represents the actual true/false value of the compare and the top
  41     * 31 bits are undefined.  In order to use this value, we have to do a
  42     * "resolve" operation by replacing the value of the CMP with -(x & 1)
  43     * to sign-extend the bottom bit to 0/~0.
  44     */
  45    BRW_NIR_BOOLEAN_NEEDS_RESOLVE = 0x1,
  46
  47    /* Indicates that the given instruction's destination is a boolean
  48     * value that has intentionally been left unresolved.  Not all boolean
  49     * values need to be resolved immediately.  For instance, if we have
  50     *
  51     *    CMP r1 r2 r3
  52     *    CMP r4 r5 r6
  53     *    AND r7 r1 r4
  54     *
  55     * We don't have to resolve the result of the two CMP instructions
  56     * immediately because the AND still does an AND of the bottom bits.
  57     * Instead, we can save ourselves instructions by delaying the resolve
  58     * until after the AND.  The result of the two CMP instructions is left
  59     * as BRW_NIR_BOOLEAN_UNRESOLVED.
  60     */
  61    BRW_NIR_BOOLEAN_UNRESOLVED    = 0x2,
  62
  63    /* Indicates a that the given instruction's destination is a boolean
  64     * value that does not need a resolve.  For instance, if you AND two
  65     * values that are BRW_NIR_BOOLEAN_NEEDS_RESOLVE then we know that both
  66     * values will be 0/~0 before we get them and the result of the AND is
  67     * also guaranteed to be 0/~0 and does not need a resolve.
  68     */
  69    BRW_NIR_BOOLEAN_NO_RESOLVE    = 0x3,
  70
  71    /* A mask to mask the boolean status values off of instr->pass_flags */
  72    BRW_NIR_BOOLEAN_MASK          = 0x3,
  73 };
  74
  75 void brw_nir_analyze_boolean_resolves(nir_shader *nir);
  76
  77 nir_shader *brw_create_nir(struct brw_context *brw,
  78                            const struct gl_shader_program *shader_prog,
  79                            const struct gl_program *prog,
  80                            gl_shader_stage stage);
  81
  82 void
  83 brw_process_nir(nir_shader *nir,
  84                 const struct brw_device_info *devinfo,
  85                 const struct gl_shader_program *shader_prog,
  86                 gl_shader_stage stage);
  87
  88 #ifdef __cplusplus
  89 }
  90 #endif