i965: Add nir based intrinsic lowering and thread ID uniform
[mesa.git] / src / mesa / drivers / dri / i965 / brw_nir_intrinsics.c
1 /*
2 * Copyright (c) 2016 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "brw_nir.h"
25 #include "compiler/nir/nir_builder.h"
26
27 struct lower_intrinsics_state {
28 nir_shader *nir;
29 union {
30 struct brw_stage_prog_data *prog_data;
31 struct brw_cs_prog_data *cs_prog_data;
32 };
33 nir_function_impl *impl;
34 bool progress;
35 nir_builder builder;
36 bool cs_thread_id_used;
37 };
38
39 static nir_ssa_def *
40 read_thread_local_id(struct lower_intrinsics_state *state)
41 {
42 assert(state->cs_prog_data->thread_local_id_index >= 0);
43 state->cs_thread_id_used = true;
44 const int id_index = state->cs_prog_data->thread_local_id_index;
45
46 nir_builder *b = &state->builder;
47 nir_shader *nir = state->nir;
48 nir_intrinsic_instr *load =
49 nir_intrinsic_instr_create(nir, nir_intrinsic_load_uniform);
50 load->num_components = 1;
51 load->src[0] = nir_src_for_ssa(nir_imm_int(b, 0));
52 nir_ssa_dest_init(&load->instr, &load->dest, 1, 32, NULL);
53 nir_intrinsic_set_base(load, id_index * sizeof(uint32_t));
54 nir_intrinsic_set_range(load, sizeof(uint32_t));
55 nir_builder_instr_insert(b, &load->instr);
56 return &load->dest.ssa;
57 }
58
59 static bool
60 lower_cs_intrinsics_convert_block(struct lower_intrinsics_state *state,
61 nir_block *block)
62 {
63 bool progress = false;
64 nir_builder *b = &state->builder;
65 nir_shader *nir = state->nir;
66
67 nir_foreach_instr_safe(instr, block) {
68 if (instr->type != nir_instr_type_intrinsic)
69 continue;
70
71 nir_intrinsic_instr *intrinsic = nir_instr_as_intrinsic(instr);
72
73 b->cursor = nir_after_instr(&intrinsic->instr);
74
75 nir_ssa_def *sysval;
76 switch (intrinsic->intrinsic) {
77 case nir_intrinsic_load_local_invocation_index: {
78 assert(nir->stage == MESA_SHADER_COMPUTE);
79 /* We construct the local invocation index from:
80 *
81 * gl_LocalInvocationIndex =
82 * cs_thread_local_id + channel_num;
83 */
84 nir_ssa_def *thread_local_id = read_thread_local_id(state);
85 nir_ssa_def *channel =
86 nir_load_system_value(b, nir_intrinsic_load_channel_num, 0);
87 sysval = nir_iadd(b, channel, thread_local_id);
88 break;
89 }
90
91 case nir_intrinsic_load_local_invocation_id: {
92 assert(nir->stage == MESA_SHADER_COMPUTE);
93 /* We lower gl_LocalInvocationID from gl_LocalInvocationIndex based
94 * on this formula:
95 *
96 * gl_LocalInvocationID.x =
97 * gl_LocalInvocationIndex % gl_WorkGroupSize.x;
98 * gl_LocalInvocationID.y =
99 * (gl_LocalInvocationIndex / gl_WorkGroupSize.x) %
100 * gl_WorkGroupSize.y;
101 * gl_LocalInvocationID.z =
102 * (gl_LocalInvocationIndex /
103 * (gl_WorkGroupSize.x * gl_WorkGroupSize.y)) %
104 * gl_WorkGroupSize.z;
105 */
106 unsigned *size = nir->info.cs.local_size;
107
108 nir_ssa_def *local_index =
109 nir_load_system_value(b, nir_intrinsic_load_local_invocation_index, 0);
110
111 nir_const_value uvec3;
112 uvec3.u32[0] = 1;
113 uvec3.u32[1] = size[0];
114 uvec3.u32[2] = size[0] * size[1];
115 nir_ssa_def *div_val = nir_build_imm(b, 3, 32, uvec3);
116 uvec3.u32[0] = size[0];
117 uvec3.u32[1] = size[1];
118 uvec3.u32[2] = size[2];
119 nir_ssa_def *mod_val = nir_build_imm(b, 3, 32, uvec3);
120
121 sysval = nir_imod(b, nir_idiv(b, local_index, div_val), mod_val);
122 break;
123 }
124
125 default:
126 continue;
127 }
128
129 nir_ssa_def_rewrite_uses(&intrinsic->dest.ssa, nir_src_for_ssa(sysval));
130 nir_instr_remove(&intrinsic->instr);
131
132 state->progress = true;
133 }
134
135 return progress;
136 }
137
138 static void
139 lower_cs_intrinsics_convert_impl(struct lower_intrinsics_state *state)
140 {
141 nir_builder_init(&state->builder, state->impl);
142
143 nir_foreach_block(block, state->impl) {
144 lower_cs_intrinsics_convert_block(state, block);
145 }
146
147 nir_metadata_preserve(state->impl,
148 nir_metadata_block_index | nir_metadata_dominance);
149 }
150
151 bool
152 brw_nir_lower_intrinsics(nir_shader *nir, struct brw_stage_prog_data *prog_data)
153 {
154 /* Currently we only lower intrinsics for compute shaders */
155 if (nir->stage != MESA_SHADER_COMPUTE)
156 return false;
157
158 bool progress = false;
159 struct lower_intrinsics_state state;
160 memset(&state, 0, sizeof(state));
161 state.nir = nir;
162 state.prog_data = prog_data;
163
164 /* Currently this pass only lowers intrinsics using the uniform specified
165 * by thread_local_id_index.
166 */
167 if (nir->stage == MESA_SHADER_COMPUTE &&
168 state.cs_prog_data->thread_local_id_index < 0)
169 return false;
170
171 do {
172 state.progress = false;
173 nir_foreach_function(function, nir) {
174 if (function->impl) {
175 state.impl = function->impl;
176 lower_cs_intrinsics_convert_impl(&state);
177 }
178 }
179 progress |= state.progress;
180 } while (state.progress);
181
182 if (nir->stage == MESA_SHADER_COMPUTE && !state.cs_thread_id_used)
183 state.cs_prog_data->thread_local_id_index = -1;
184
185 return progress;
186 }