45dca69823fd385ab9e65a380b1fd9e83a2dcf14
[mesa.git] / src / mesa / drivers / dri / i965 / brw_state_batch.c
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keithw@vmware.com>
30 */
31
32 #include "brw_state.h"
33 #include "intel_batchbuffer.h"
34 #include "main/imports.h"
35 #include "util/ralloc.h"
36
37 static void
38 brw_track_state_batch(struct brw_context *brw,
39 enum aub_state_struct_type type,
40 uint32_t offset,
41 int size)
42 {
43 struct intel_batchbuffer *batch = &brw->batch;
44
45 if (!brw->state_batch_list) {
46 /* Our structs are always aligned to at least 32 bytes, so
47 * our array doesn't need to be any larger
48 */
49 brw->state_batch_list = ralloc_size(brw, sizeof(*brw->state_batch_list) *
50 batch->bo->size / 32);
51 }
52
53 brw->state_batch_list[brw->state_batch_count].offset = offset;
54 brw->state_batch_list[brw->state_batch_count].size = size;
55 brw->state_batch_list[brw->state_batch_count].type = type;
56 brw->state_batch_count++;
57 }
58
59 /**
60 * Convenience function to populate a single drm_intel_aub_annotation data
61 * structure.
62 */
63 static inline void
64 make_annotation(drm_intel_aub_annotation *annotation, uint32_t type,
65 uint32_t subtype, uint32_t ending_offset)
66 {
67 annotation->type = type;
68 annotation->subtype = subtype;
69 annotation->ending_offset = ending_offset;
70 }
71
72 /**
73 * Generate a set of aub file annotations for the current batch buffer, and
74 * deliver them to DRM.
75 *
76 * The "used" section of the batch buffer (the portion containing batch
77 * commands) is annotated with AUB_TRACE_TYPE_BATCH. The remainder of the
78 * batch buffer (which contains data structures pointed to by batch commands)
79 * is annotated according to the type of each data structure.
80 */
81 void
82 brw_annotate_aub(struct brw_context *brw)
83 {
84 unsigned annotation_count = 2 * brw->state_batch_count + 1;
85 drm_intel_aub_annotation annotations[annotation_count];
86 int a = 0;
87 make_annotation(&annotations[a++], AUB_TRACE_TYPE_BATCH, 0,
88 4*brw->batch.used);
89 for (int i = brw->state_batch_count; i-- > 0; ) {
90 uint32_t type = brw->state_batch_list[i].type;
91 uint32_t start_offset = brw->state_batch_list[i].offset;
92 uint32_t end_offset = start_offset + brw->state_batch_list[i].size;
93 make_annotation(&annotations[a++], AUB_TRACE_TYPE_NOTYPE, 0,
94 start_offset);
95 make_annotation(&annotations[a++], AUB_TRACE_TYPE(type),
96 AUB_TRACE_SUBTYPE(type), end_offset);
97 }
98 assert(a == annotation_count);
99 drm_intel_bufmgr_gem_set_aub_annotations(brw->batch.bo, annotations,
100 annotation_count);
101 }
102
103 /**
104 * Allocates a block of space in the batchbuffer for indirect state.
105 *
106 * We don't want to allocate separate BOs for every bit of indirect
107 * state in the driver. It means overallocating by a significant
108 * margin (4096 bytes, even if the object is just a 20-byte surface
109 * state), and more buffers to walk and count for aperture size checking.
110 *
111 * However, due to the restrictions inposed by the aperture size
112 * checking performance hacks, we can't have the batch point at a
113 * separate indirect state buffer, because once the batch points at
114 * it, no more relocations can be added to it. So, we sneak these
115 * buffers in at the top of the batchbuffer.
116 */
117 void *
118 brw_state_batch(struct brw_context *brw,
119 enum aub_state_struct_type type,
120 int size,
121 int alignment,
122 uint32_t *out_offset)
123 {
124 struct intel_batchbuffer *batch = &brw->batch;
125 uint32_t offset;
126
127 assert(size < batch->bo->size);
128 offset = ROUND_DOWN_TO(batch->state_batch_offset - size, alignment);
129
130 /* If allocating from the top would wrap below the batchbuffer, or
131 * if the batch's used space (plus the reserved pad) collides with our
132 * space, then flush and try again.
133 */
134 if (batch->state_batch_offset < size ||
135 offset < 4*batch->used + batch->reserved_space) {
136 intel_batchbuffer_flush(brw);
137 offset = ROUND_DOWN_TO(batch->state_batch_offset - size, alignment);
138 }
139
140 batch->state_batch_offset = offset;
141
142 if (unlikely(INTEL_DEBUG & (DEBUG_BATCH | DEBUG_AUB)))
143 brw_track_state_batch(brw, type, offset, size);
144
145 *out_offset = offset;
146 return batch->map + (offset>>2);
147 }