src/mesa/drivers/dri/i965/brw_tex_layout.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32 /* Code to layout images in a mipmap tree for i965.
  33  */
  34
  35 #include "intel_mipmap_tree.h"
  36 #include "intel_tex_layout.h"
  37 #include "intel_context.h"
  38 #include "main/macros.h"
  39 #include "intel_chipset.h"
  40
  41 #define FILE_DEBUG_FLAG DEBUG_MIPTREE
  42
  43 GLboolean brw_miptree_layout(struct intel_context *intel,
  44                              struct intel_mipmap_tree *mt,
  45                              uint32_t tiling)
  46 {
  47    /* XXX: these vary depending on image format: */
  48    /* GLint align_w = 4; */
  49
  50    switch (mt->target) {
  51    case GL_TEXTURE_CUBE_MAP:
  52       if (IS_IGDNG(intel->intelScreen->deviceID)) {
  53           GLuint align_h = 2, align_w = 4;
  54           GLuint level;
  55           GLuint x = 0;
  56           GLuint y = 0;
  57           GLuint width = mt->width0;
  58           GLuint height = mt->height0;
  59           GLuint qpitch = 0;
  60           GLuint y_pitch = 0;
  61
  62           mt->pitch = mt->width0;
  63           intel_get_texture_alignment_unit(mt->internal_format, &align_w, &align_h);
  64           y_pitch = ALIGN(height, align_h);
  65
  66           if (mt->compressed) {
  67               mt->pitch = ALIGN(mt->width0, align_w);
  68           }
  69
  70           if (mt->first_level != mt->last_level) {
  71               GLuint mip1_width;
  72
  73               if (mt->compressed) {
  74                   mip1_width = ALIGN(minify(mt->width0), align_w)
  75                       + ALIGN(minify(minify(mt->width0)), align_w);
  76               } else {
  77                   mip1_width = ALIGN(minify(mt->width0), align_w)
  78                       + minify(minify(mt->width0));
  79               }
  80
  81               if (mip1_width > mt->pitch) {
  82                   mt->pitch = mip1_width;
  83               }
  84           }
  85
  86           mt->pitch = intel_miptree_pitch_align(intel, mt, tiling, mt->pitch);
  87
  88           if (mt->compressed) {
  89               qpitch = (y_pitch + ALIGN(minify(y_pitch), align_h) + 11 * align_h) / 4;
  90               mt->total_height = (y_pitch + ALIGN(minify(y_pitch), align_h) + 11 * align_h) / 4 * 6;
  91           } else {
  92               qpitch = (y_pitch + ALIGN(minify(y_pitch), align_h) + 11 * align_h);
  93               mt->total_height = (y_pitch + ALIGN(minify(y_pitch), align_h) + 11 * align_h) * 6;
  94           }
  95
  96           for (level = mt->first_level; level <= mt->last_level; level++) {
  97               GLuint img_height;
  98               GLuint nr_images = 6;
  99               GLuint q = 0;
 100
 101               intel_miptree_set_level_info(mt, level, nr_images, x, y, width,
 102                                            height, 1);
 103
 104               for (q = 0; q < nr_images; q++)
 105                   intel_miptree_set_image_offset(mt, level, q,
 106                                                  x, y + q * qpitch);
 107
 108               if (mt->compressed)
 109                   img_height = MAX2(1, height/4);
 110               else
 111                   img_height = ALIGN(height, align_h);
 112
 113               if (level == mt->first_level + 1) {
 114                   x += ALIGN(width, align_w);
 115               }
 116               else {
 117                   y += img_height;
 118               }
 119
 120               width  = minify(width);
 121               height = minify(height);
 122           }
 123
 124           break;
 125       }
 126
 127    case GL_TEXTURE_3D: {
 128       GLuint width  = mt->width0;
 129       GLuint height = mt->height0;
 130       GLuint depth = mt->depth0;
 131       GLuint pack_x_pitch, pack_x_nr;
 132       GLuint pack_y_pitch;
 133       GLuint level;
 134       GLuint align_h = 2;
 135       GLuint align_w = 4;
 136
 137       mt->total_height = 0;
 138       intel_get_texture_alignment_unit(mt->internal_format, &align_w, &align_h);
 139
 140       if (mt->compressed) {
 141           mt->pitch = ALIGN(width, align_w);
 142           pack_y_pitch = (height + 3) / 4;
 143       } else {
 144          mt->pitch = intel_miptree_pitch_align (intel, mt, tiling, mt->width0);
 145          pack_y_pitch = ALIGN(mt->height0, align_h);
 146       }
 147
 148       pack_x_pitch = width;
 149       pack_x_nr = 1;
 150
 151       for (level = mt->first_level ; level <= mt->last_level ; level++) {
 152          GLuint nr_images = mt->target == GL_TEXTURE_3D ? depth : 6;
 153          GLint x = 0;
 154          GLint y = 0;
 155          GLint q, j;
 156
 157          intel_miptree_set_level_info(mt, level, nr_images,
 158                                       0, mt->total_height,
 159                                       width, height, depth);
 160
 161          for (q = 0; q < nr_images;) {
 162             for (j = 0; j < pack_x_nr && q < nr_images; j++, q++) {
 163                intel_miptree_set_image_offset(mt, level, q, x, y);
 164                x += pack_x_pitch;
 165             }
 166
 167             x = 0;
 168             y += pack_y_pitch;
 169          }
 170
 171
 172          mt->total_height += y;
 173          width  = minify(width);
 174          height = minify(height);
 175          depth  = minify(depth);
 176
 177          if (mt->compressed) {
 178             pack_y_pitch = (height + 3) / 4;
 179
 180             if (pack_x_pitch > ALIGN(width, align_w)) {
 181                pack_x_pitch = ALIGN(width, align_w);
 182                pack_x_nr <<= 1;
 183             }
 184          } else {
 185             if (pack_x_pitch > 4) {
 186                pack_x_pitch >>= 1;
 187                pack_x_nr <<= 1;
 188                assert(pack_x_pitch * pack_x_nr <= mt->pitch);
 189             }
 190
 191             if (pack_y_pitch > 2) {
 192                pack_y_pitch >>= 1;
 193                pack_y_pitch = ALIGN(pack_y_pitch, align_h);
 194             }
 195          }
 196
 197       }
 198       /* The 965's sampler lays cachelines out according to how accesses
 199        * in the texture surfaces run, so they may be "vertical" through
 200        * memory.  As a result, the docs say in Surface Padding Requirements:
 201        * Sampling Engine Surfaces that two extra rows of padding are required.
 202        * We don't know of similar requirements for pre-965, but given that
 203        * those docs are silent on padding requirements in general, let's play
 204        * it safe.
 205        */
 206       if (mt->target == GL_TEXTURE_CUBE_MAP)
 207          mt->total_height += 2;
 208       break;
 209    }
 210
 211    default:
 212       i945_miptree_layout_2d(intel, mt, tiling);
 213       break;
 214    }
 215    DBG("%s: %dx%dx%d - sz 0x%x\n", __FUNCTION__,
 216                 mt->pitch,
 217                 mt->total_height,
 218                 mt->cpp,
 219                 mt->pitch * mt->total_height * mt->cpp );
 220
 221    return GL_TRUE;
 222 }
 223