i965: Add brw_populate_default_key
[mesa.git] / src / mesa / drivers / dri / i965 / brw_wm.c
1 /*
2 * Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 * Intel funded Tungsten Graphics to
4 * develop this 3D driver.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining
7 * a copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sublicense, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial
16 * portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 */
26 #include "brw_context.h"
27 #include "brw_wm.h"
28 #include "brw_state.h"
29 #include "main/enums.h"
30 #include "main/formats.h"
31 #include "main/fbobject.h"
32 #include "main/samplerobj.h"
33 #include "main/framebuffer.h"
34 #include "program/prog_parameter.h"
35 #include "program/program.h"
36 #include "intel_mipmap_tree.h"
37 #include "intel_image.h"
38 #include "compiler/brw_nir.h"
39 #include "brw_program.h"
40
41 #include "util/ralloc.h"
42
43 static void
44 assign_fs_binding_table_offsets(const struct gen_device_info *devinfo,
45 const struct gl_program *prog,
46 const struct brw_wm_prog_key *key,
47 struct brw_wm_prog_data *prog_data)
48 {
49 /* Render targets implicitly start at surface index 0. Even if there are
50 * no color regions, we still perform an FB write to a null render target,
51 * which will be surface 0.
52 */
53 uint32_t next_binding_table_offset = MAX2(key->nr_color_regions, 1);
54
55 next_binding_table_offset =
56 brw_assign_common_binding_table_offsets(devinfo, prog, &prog_data->base,
57 next_binding_table_offset);
58
59 if (prog->nir->info.outputs_read && !key->coherent_fb_fetch) {
60 prog_data->binding_table.render_target_read_start =
61 next_binding_table_offset;
62 next_binding_table_offset += key->nr_color_regions;
63 }
64 }
65
66 static void
67 brw_wm_debug_recompile(struct brw_context *brw, struct gl_program *prog,
68 const struct brw_wm_prog_key *key)
69 {
70 perf_debug("Recompiling fragment shader for program %d\n", prog->Id);
71
72 bool found = false;
73 const struct brw_wm_prog_key *old_key =
74 brw_find_previous_compile(&brw->cache, BRW_CACHE_FS_PROG,
75 key->program_string_id);
76
77 if (!old_key) {
78 perf_debug(" Didn't find previous compile in the shader cache for debug\n");
79 return;
80 }
81
82 found |= key_debug(brw, "alphatest, computed depth, depth test, or "
83 "depth write",
84 old_key->iz_lookup, key->iz_lookup);
85 found |= key_debug(brw, "depth statistics",
86 old_key->stats_wm, key->stats_wm);
87 found |= key_debug(brw, "flat shading",
88 old_key->flat_shade, key->flat_shade);
89 found |= key_debug(brw, "number of color buffers",
90 old_key->nr_color_regions, key->nr_color_regions);
91 found |= key_debug(brw, "MRT alpha test or alpha-to-coverage",
92 old_key->replicate_alpha, key->replicate_alpha);
93 found |= key_debug(brw, "fragment color clamping",
94 old_key->clamp_fragment_color, key->clamp_fragment_color);
95 found |= key_debug(brw, "per-sample interpolation",
96 old_key->persample_interp, key->persample_interp);
97 found |= key_debug(brw, "multisampled FBO",
98 old_key->multisample_fbo, key->multisample_fbo);
99 found |= key_debug(brw, "frag coord adds sample pos",
100 old_key->frag_coord_adds_sample_pos,
101 key->frag_coord_adds_sample_pos);
102 found |= key_debug(brw, "line smoothing",
103 old_key->line_aa, key->line_aa);
104 found |= key_debug(brw, "high quality derivatives",
105 old_key->high_quality_derivatives,
106 key->high_quality_derivatives);
107 found |= key_debug(brw, "force dual color blending",
108 old_key->force_dual_color_blend,
109 key->force_dual_color_blend);
110 found |= key_debug(brw, "coherent fb fetch",
111 old_key->coherent_fb_fetch, key->coherent_fb_fetch);
112
113 found |= key_debug(brw, "input slots valid",
114 old_key->input_slots_valid, key->input_slots_valid);
115 found |= key_debug(brw, "mrt alpha test function",
116 old_key->alpha_test_func, key->alpha_test_func);
117 found |= key_debug(brw, "mrt alpha test reference value",
118 old_key->alpha_test_ref, key->alpha_test_ref);
119
120 found |= brw_debug_recompile_sampler_key(brw, &old_key->tex, &key->tex);
121
122 if (!found) {
123 perf_debug(" Something else\n");
124 }
125 }
126
127 static bool
128 brw_codegen_wm_prog(struct brw_context *brw,
129 struct brw_program *fp,
130 struct brw_wm_prog_key *key,
131 struct brw_vue_map *vue_map)
132 {
133 const struct gen_device_info *devinfo = &brw->screen->devinfo;
134 void *mem_ctx = ralloc_context(NULL);
135 struct brw_wm_prog_data prog_data;
136 const GLuint *program;
137 bool start_busy = false;
138 double start_time = 0;
139
140 memset(&prog_data, 0, sizeof(prog_data));
141
142 /* Use ALT floating point mode for ARB programs so that 0^0 == 1. */
143 if (fp->program.is_arb_asm)
144 prog_data.base.use_alt_mode = true;
145
146 assign_fs_binding_table_offsets(devinfo, &fp->program, key, &prog_data);
147
148 if (!fp->program.is_arb_asm) {
149 brw_nir_setup_glsl_uniforms(mem_ctx, fp->program.nir, &fp->program,
150 &prog_data.base, true);
151 brw_nir_analyze_ubo_ranges(brw->screen->compiler, fp->program.nir,
152 prog_data.base.ubo_ranges);
153 } else {
154 brw_nir_setup_arb_uniforms(mem_ctx, fp->program.nir, &fp->program,
155 &prog_data.base);
156
157 if (unlikely(INTEL_DEBUG & DEBUG_WM))
158 brw_dump_arb_asm("fragment", &fp->program);
159 }
160
161 if (unlikely(brw->perf_debug)) {
162 start_busy = (brw->batch.last_bo &&
163 brw_bo_busy(brw->batch.last_bo));
164 start_time = get_time();
165 }
166
167 int st_index8 = -1, st_index16 = -1, st_index32 = -1;
168 if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
169 st_index8 = brw_get_shader_time_index(brw, &fp->program, ST_FS8,
170 !fp->program.is_arb_asm);
171 st_index16 = brw_get_shader_time_index(brw, &fp->program, ST_FS16,
172 !fp->program.is_arb_asm);
173 st_index32 = brw_get_shader_time_index(brw, &fp->program, ST_FS32,
174 !fp->program.is_arb_asm);
175 }
176
177 char *error_str = NULL;
178 program = brw_compile_fs(brw->screen->compiler, brw, mem_ctx,
179 key, &prog_data, fp->program.nir,
180 &fp->program, st_index8, st_index16, st_index32,
181 true, false, vue_map,
182 &error_str);
183
184 if (program == NULL) {
185 if (!fp->program.is_arb_asm) {
186 fp->program.sh.data->LinkStatus = LINKING_FAILURE;
187 ralloc_strcat(&fp->program.sh.data->InfoLog, error_str);
188 }
189
190 _mesa_problem(NULL, "Failed to compile fragment shader: %s\n", error_str);
191
192 ralloc_free(mem_ctx);
193 return false;
194 }
195
196 if (unlikely(brw->perf_debug)) {
197 if (fp->compiled_once)
198 brw_wm_debug_recompile(brw, &fp->program, key);
199 fp->compiled_once = true;
200
201 if (start_busy && !brw_bo_busy(brw->batch.last_bo)) {
202 perf_debug("FS compile took %.03f ms and stalled the GPU\n",
203 (get_time() - start_time) * 1000);
204 }
205 }
206
207 brw_alloc_stage_scratch(brw, &brw->wm.base, prog_data.base.total_scratch);
208
209 if (unlikely((INTEL_DEBUG & DEBUG_WM) && fp->program.is_arb_asm))
210 fprintf(stderr, "\n");
211
212 /* The param and pull_param arrays will be freed by the shader cache. */
213 ralloc_steal(NULL, prog_data.base.param);
214 ralloc_steal(NULL, prog_data.base.pull_param);
215 brw_upload_cache(&brw->cache, BRW_CACHE_FS_PROG,
216 key, sizeof(struct brw_wm_prog_key),
217 program, prog_data.base.program_size,
218 &prog_data, sizeof(prog_data),
219 &brw->wm.base.prog_offset, &brw->wm.base.prog_data);
220
221 ralloc_free(mem_ctx);
222
223 return true;
224 }
225
226 bool
227 brw_debug_recompile_sampler_key(struct brw_context *brw,
228 const struct brw_sampler_prog_key_data *old_key,
229 const struct brw_sampler_prog_key_data *key)
230 {
231 bool found = false;
232
233 for (unsigned int i = 0; i < MAX_SAMPLERS; i++) {
234 found |= key_debug(brw, "EXT_texture_swizzle or DEPTH_TEXTURE_MODE",
235 old_key->swizzles[i], key->swizzles[i]);
236 }
237 found |= key_debug(brw, "GL_CLAMP enabled on any texture unit's 1st coordinate",
238 old_key->gl_clamp_mask[0], key->gl_clamp_mask[0]);
239 found |= key_debug(brw, "GL_CLAMP enabled on any texture unit's 2nd coordinate",
240 old_key->gl_clamp_mask[1], key->gl_clamp_mask[1]);
241 found |= key_debug(brw, "GL_CLAMP enabled on any texture unit's 3rd coordinate",
242 old_key->gl_clamp_mask[2], key->gl_clamp_mask[2]);
243 found |= key_debug(brw, "gather channel quirk on any texture unit",
244 old_key->gather_channel_quirk_mask, key->gather_channel_quirk_mask);
245 found |= key_debug(brw, "compressed multisample layout",
246 old_key->compressed_multisample_layout_mask,
247 key->compressed_multisample_layout_mask);
248 found |= key_debug(brw, "16x msaa",
249 old_key->msaa_16,
250 key->msaa_16);
251
252 found |= key_debug(brw, "y_uv image bound",
253 old_key->y_uv_image_mask,
254 key->y_uv_image_mask);
255 found |= key_debug(brw, "y_u_v image bound",
256 old_key->y_u_v_image_mask,
257 key->y_u_v_image_mask);
258 found |= key_debug(brw, "yx_xuxv image bound",
259 old_key->yx_xuxv_image_mask,
260 key->yx_xuxv_image_mask);
261 found |= key_debug(brw, "xy_uxvx image bound",
262 old_key->xy_uxvx_image_mask,
263 key->xy_uxvx_image_mask);
264
265
266 for (unsigned int i = 0; i < MAX_SAMPLERS; i++) {
267 found |= key_debug(brw, "textureGather workarounds",
268 old_key->gen6_gather_wa[i], key->gen6_gather_wa[i]);
269 }
270
271 return found;
272 }
273
274 static uint8_t
275 gen6_gather_workaround(GLenum internalformat)
276 {
277 switch (internalformat) {
278 case GL_R8I: return WA_SIGN | WA_8BIT;
279 case GL_R8UI: return WA_8BIT;
280 case GL_R16I: return WA_SIGN | WA_16BIT;
281 case GL_R16UI: return WA_16BIT;
282 default:
283 /* Note that even though GL_R32I and GL_R32UI have format overrides in
284 * the surface state, there is no shader w/a required.
285 */
286 return 0;
287 }
288 }
289
290 void
291 brw_populate_sampler_prog_key_data(struct gl_context *ctx,
292 const struct gl_program *prog,
293 struct brw_sampler_prog_key_data *key)
294 {
295 struct brw_context *brw = brw_context(ctx);
296 const struct gen_device_info *devinfo = &brw->screen->devinfo;
297 GLbitfield mask = prog->SamplersUsed;
298
299 while (mask) {
300 const int s = u_bit_scan(&mask);
301
302 key->swizzles[s] = SWIZZLE_NOOP;
303
304 int unit_id = prog->SamplerUnits[s];
305 const struct gl_texture_unit *unit = &ctx->Texture.Unit[unit_id];
306
307 if (unit->_Current && unit->_Current->Target != GL_TEXTURE_BUFFER) {
308 const struct gl_texture_object *t = unit->_Current;
309 const struct gl_texture_image *img = t->Image[0][t->BaseLevel];
310 struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit_id);
311
312 const bool alpha_depth = t->DepthMode == GL_ALPHA &&
313 (img->_BaseFormat == GL_DEPTH_COMPONENT ||
314 img->_BaseFormat == GL_DEPTH_STENCIL);
315
316 /* Haswell handles texture swizzling as surface format overrides
317 * (except for GL_ALPHA); all other platforms need MOVs in the shader.
318 */
319 if (alpha_depth || (devinfo->gen < 8 && !devinfo->is_haswell))
320 key->swizzles[s] = brw_get_texture_swizzle(ctx, t);
321
322 if (devinfo->gen < 8 &&
323 sampler->MinFilter != GL_NEAREST &&
324 sampler->MagFilter != GL_NEAREST) {
325 if (sampler->WrapS == GL_CLAMP)
326 key->gl_clamp_mask[0] |= 1 << s;
327 if (sampler->WrapT == GL_CLAMP)
328 key->gl_clamp_mask[1] |= 1 << s;
329 if (sampler->WrapR == GL_CLAMP)
330 key->gl_clamp_mask[2] |= 1 << s;
331 }
332
333 /* gather4 for RG32* is broken in multiple ways on Gen7. */
334 if (devinfo->gen == 7 && prog->info.uses_texture_gather) {
335 switch (img->InternalFormat) {
336 case GL_RG32I:
337 case GL_RG32UI: {
338 /* We have to override the format to R32G32_FLOAT_LD.
339 * This means that SCS_ALPHA and SCS_ONE will return 0x3f8
340 * (1.0) rather than integer 1. This needs shader hacks.
341 *
342 * On Ivybridge, we whack W (alpha) to ONE in our key's
343 * swizzle. On Haswell, we look at the original texture
344 * swizzle, and use XYZW with channels overridden to ONE,
345 * leaving normal texture swizzling to SCS.
346 */
347 unsigned src_swizzle =
348 devinfo->is_haswell ? t->_Swizzle : key->swizzles[s];
349 for (int i = 0; i < 4; i++) {
350 unsigned src_comp = GET_SWZ(src_swizzle, i);
351 if (src_comp == SWIZZLE_ONE || src_comp == SWIZZLE_W) {
352 key->swizzles[i] &= ~(0x7 << (3 * i));
353 key->swizzles[i] |= SWIZZLE_ONE << (3 * i);
354 }
355 }
356 /* fallthrough */
357 }
358 case GL_RG32F:
359 /* The channel select for green doesn't work - we have to
360 * request blue. Haswell can use SCS for this, but Ivybridge
361 * needs a shader workaround.
362 */
363 if (!devinfo->is_haswell)
364 key->gather_channel_quirk_mask |= 1 << s;
365 break;
366 }
367 }
368
369 /* Gen6's gather4 is broken for UINT/SINT; we treat them as
370 * UNORM/FLOAT instead and fix it in the shader.
371 */
372 if (devinfo->gen == 6 && prog->info.uses_texture_gather) {
373 key->gen6_gather_wa[s] = gen6_gather_workaround(img->InternalFormat);
374 }
375
376 /* If this is a multisample sampler, and uses the CMS MSAA layout,
377 * then we need to emit slightly different code to first sample the
378 * MCS surface.
379 */
380 struct intel_texture_object *intel_tex =
381 intel_texture_object((struct gl_texture_object *)t);
382
383 /* From gen9 onwards some single sampled buffers can also be
384 * compressed. These don't need ld2dms sampling along with mcs fetch.
385 */
386 if (intel_tex->mt->aux_usage == ISL_AUX_USAGE_MCS) {
387 assert(devinfo->gen >= 7);
388 assert(intel_tex->mt->surf.samples > 1);
389 assert(intel_tex->mt->aux_buf);
390 assert(intel_tex->mt->surf.msaa_layout == ISL_MSAA_LAYOUT_ARRAY);
391 key->compressed_multisample_layout_mask |= 1 << s;
392
393 if (intel_tex->mt->surf.samples >= 16) {
394 assert(devinfo->gen >= 9);
395 key->msaa_16 |= 1 << s;
396 }
397 }
398
399 if (t->Target == GL_TEXTURE_EXTERNAL_OES && intel_tex->planar_format) {
400 switch (intel_tex->planar_format->components) {
401 case __DRI_IMAGE_COMPONENTS_Y_UV:
402 key->y_uv_image_mask |= 1 << s;
403 break;
404 case __DRI_IMAGE_COMPONENTS_Y_U_V:
405 key->y_u_v_image_mask |= 1 << s;
406 break;
407 case __DRI_IMAGE_COMPONENTS_Y_XUXV:
408 key->yx_xuxv_image_mask |= 1 << s;
409 break;
410 case __DRI_IMAGE_COMPONENTS_Y_UXVX:
411 key->xy_uxvx_image_mask |= 1 << s;
412 break;
413 default:
414 break;
415 }
416 }
417
418 }
419 }
420 }
421
422 static bool
423 brw_wm_state_dirty(const struct brw_context *brw)
424 {
425 return brw_state_dirty(brw,
426 _NEW_BUFFERS |
427 _NEW_COLOR |
428 _NEW_DEPTH |
429 _NEW_FRAG_CLAMP |
430 _NEW_HINT |
431 _NEW_LIGHT |
432 _NEW_LINE |
433 _NEW_MULTISAMPLE |
434 _NEW_POLYGON |
435 _NEW_STENCIL |
436 _NEW_TEXTURE,
437 BRW_NEW_FRAGMENT_PROGRAM |
438 BRW_NEW_REDUCED_PRIMITIVE |
439 BRW_NEW_STATS_WM |
440 BRW_NEW_VUE_MAP_GEOM_OUT);
441 }
442
443 void
444 brw_wm_populate_key(struct brw_context *brw, struct brw_wm_prog_key *key)
445 {
446 const struct gen_device_info *devinfo = &brw->screen->devinfo;
447 struct gl_context *ctx = &brw->ctx;
448 /* BRW_NEW_FRAGMENT_PROGRAM */
449 const struct gl_program *prog = brw->programs[MESA_SHADER_FRAGMENT];
450 const struct brw_program *fp = brw_program_const(prog);
451 GLuint lookup = 0;
452 GLuint line_aa;
453
454 memset(key, 0, sizeof(*key));
455
456 /* Build the index for table lookup
457 */
458 if (devinfo->gen < 6) {
459 /* _NEW_COLOR */
460 if (prog->info.fs.uses_discard || ctx->Color.AlphaEnabled) {
461 lookup |= BRW_WM_IZ_PS_KILL_ALPHATEST_BIT;
462 }
463
464 if (prog->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) {
465 lookup |= BRW_WM_IZ_PS_COMPUTES_DEPTH_BIT;
466 }
467
468 /* _NEW_DEPTH */
469 if (ctx->Depth.Test)
470 lookup |= BRW_WM_IZ_DEPTH_TEST_ENABLE_BIT;
471
472 if (brw_depth_writes_enabled(brw))
473 lookup |= BRW_WM_IZ_DEPTH_WRITE_ENABLE_BIT;
474
475 /* _NEW_STENCIL | _NEW_BUFFERS */
476 if (brw->stencil_enabled) {
477 lookup |= BRW_WM_IZ_STENCIL_TEST_ENABLE_BIT;
478
479 if (ctx->Stencil.WriteMask[0] ||
480 ctx->Stencil.WriteMask[ctx->Stencil._BackFace])
481 lookup |= BRW_WM_IZ_STENCIL_WRITE_ENABLE_BIT;
482 }
483 key->iz_lookup = lookup;
484 }
485
486 line_aa = BRW_WM_AA_NEVER;
487
488 /* _NEW_LINE, _NEW_POLYGON, BRW_NEW_REDUCED_PRIMITIVE */
489 if (ctx->Line.SmoothFlag) {
490 if (brw->reduced_primitive == GL_LINES) {
491 line_aa = BRW_WM_AA_ALWAYS;
492 }
493 else if (brw->reduced_primitive == GL_TRIANGLES) {
494 if (ctx->Polygon.FrontMode == GL_LINE) {
495 line_aa = BRW_WM_AA_SOMETIMES;
496
497 if (ctx->Polygon.BackMode == GL_LINE ||
498 (ctx->Polygon.CullFlag &&
499 ctx->Polygon.CullFaceMode == GL_BACK))
500 line_aa = BRW_WM_AA_ALWAYS;
501 }
502 else if (ctx->Polygon.BackMode == GL_LINE) {
503 line_aa = BRW_WM_AA_SOMETIMES;
504
505 if ((ctx->Polygon.CullFlag &&
506 ctx->Polygon.CullFaceMode == GL_FRONT))
507 line_aa = BRW_WM_AA_ALWAYS;
508 }
509 }
510 }
511
512 key->line_aa = line_aa;
513
514 /* _NEW_HINT */
515 key->high_quality_derivatives =
516 prog->info.uses_fddx_fddy &&
517 ctx->Hint.FragmentShaderDerivative == GL_NICEST;
518
519 if (devinfo->gen < 6)
520 key->stats_wm = brw->stats_wm;
521
522 /* _NEW_LIGHT */
523 key->flat_shade =
524 (prog->info.inputs_read & (VARYING_BIT_COL0 | VARYING_BIT_COL1)) &&
525 (ctx->Light.ShadeModel == GL_FLAT);
526
527 /* _NEW_FRAG_CLAMP | _NEW_BUFFERS */
528 key->clamp_fragment_color = ctx->Color._ClampFragmentColor;
529
530 /* _NEW_TEXTURE */
531 brw_populate_sampler_prog_key_data(ctx, prog, &key->tex);
532
533 /* _NEW_BUFFERS */
534 key->nr_color_regions = ctx->DrawBuffer->_NumColorDrawBuffers;
535
536 /* _NEW_COLOR */
537 key->force_dual_color_blend = brw->dual_color_blend_by_location &&
538 (ctx->Color.BlendEnabled & 1) && ctx->Color.Blend[0]._UsesDualSrc;
539
540 /* _NEW_MULTISAMPLE, _NEW_COLOR, _NEW_BUFFERS */
541 key->replicate_alpha = ctx->DrawBuffer->_NumColorDrawBuffers > 1 &&
542 (_mesa_is_alpha_test_enabled(ctx) ||
543 _mesa_is_alpha_to_coverage_enabled(ctx));
544
545 /* _NEW_BUFFERS _NEW_MULTISAMPLE */
546 /* Ignore sample qualifier while computing this flag. */
547 if (ctx->Multisample.Enabled) {
548 key->persample_interp =
549 ctx->Multisample.SampleShading &&
550 (ctx->Multisample.MinSampleShadingValue *
551 _mesa_geometric_samples(ctx->DrawBuffer) > 1);
552
553 key->multisample_fbo = _mesa_geometric_samples(ctx->DrawBuffer) > 1;
554 }
555
556 /* BRW_NEW_VUE_MAP_GEOM_OUT */
557 if (devinfo->gen < 6 || _mesa_bitcount_64(prog->info.inputs_read &
558 BRW_FS_VARYING_INPUT_MASK) > 16) {
559 key->input_slots_valid = brw->vue_map_geom_out.slots_valid;
560 }
561
562 /* _NEW_COLOR | _NEW_BUFFERS */
563 /* Pre-gen6, the hardware alpha test always used each render
564 * target's alpha to do alpha test, as opposed to render target 0's alpha
565 * like GL requires. Fix that by building the alpha test into the
566 * shader, and we'll skip enabling the fixed function alpha test.
567 */
568 if (devinfo->gen < 6 && ctx->DrawBuffer->_NumColorDrawBuffers > 1 &&
569 ctx->Color.AlphaEnabled) {
570 key->alpha_test_func = ctx->Color.AlphaFunc;
571 key->alpha_test_ref = ctx->Color.AlphaRef;
572 }
573
574 /* The unique fragment program ID */
575 key->program_string_id = fp->id;
576
577 /* Whether reads from the framebuffer should behave coherently. */
578 key->coherent_fb_fetch = ctx->Extensions.EXT_shader_framebuffer_fetch;
579 }
580
581 void
582 brw_upload_wm_prog(struct brw_context *brw)
583 {
584 struct brw_wm_prog_key key;
585 struct brw_program *fp =
586 (struct brw_program *) brw->programs[MESA_SHADER_FRAGMENT];
587
588 if (!brw_wm_state_dirty(brw))
589 return;
590
591 brw_wm_populate_key(brw, &key);
592
593 if (brw_search_cache(&brw->cache, BRW_CACHE_FS_PROG,
594 &key, sizeof(key),
595 &brw->wm.base.prog_offset,
596 &brw->wm.base.prog_data))
597 return;
598
599 if (brw_disk_cache_upload_program(brw, MESA_SHADER_FRAGMENT))
600 return;
601
602 fp = (struct brw_program *) brw->programs[MESA_SHADER_FRAGMENT];
603 fp->id = key.program_string_id;
604
605 MAYBE_UNUSED bool success = brw_codegen_wm_prog(brw, fp, &key,
606 &brw->vue_map_geom_out);
607 assert(success);
608 }
609
610 void
611 brw_wm_populate_default_key(const struct gen_device_info *devinfo,
612 struct brw_wm_prog_key *key,
613 struct gl_program *prog)
614 {
615 memset(key, 0, sizeof(*key));
616
617 uint64_t outputs_written = prog->info.outputs_written;
618
619 if (devinfo->gen < 6) {
620 if (prog->info.fs.uses_discard)
621 key->iz_lookup |= BRW_WM_IZ_PS_KILL_ALPHATEST_BIT;
622
623 if (outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH))
624 key->iz_lookup |= BRW_WM_IZ_PS_COMPUTES_DEPTH_BIT;
625
626 /* Just assume depth testing. */
627 key->iz_lookup |= BRW_WM_IZ_DEPTH_TEST_ENABLE_BIT;
628 key->iz_lookup |= BRW_WM_IZ_DEPTH_WRITE_ENABLE_BIT;
629 }
630
631 if (devinfo->gen < 6 || _mesa_bitcount_64(prog->info.inputs_read &
632 BRW_FS_VARYING_INPUT_MASK) > 16) {
633 key->input_slots_valid = prog->info.inputs_read | VARYING_BIT_POS;
634 }
635
636 brw_setup_tex_for_precompile(devinfo, &key->tex, prog);
637
638 key->nr_color_regions = _mesa_bitcount_64(outputs_written &
639 ~(BITFIELD64_BIT(FRAG_RESULT_DEPTH) |
640 BITFIELD64_BIT(FRAG_RESULT_STENCIL) |
641 BITFIELD64_BIT(FRAG_RESULT_SAMPLE_MASK)));
642
643 key->program_string_id = brw_program(prog)->id;
644
645 /* Whether reads from the framebuffer should behave coherently. */
646 key->coherent_fb_fetch = devinfo->gen >= 9;
647 }
648
649 bool
650 brw_fs_precompile(struct gl_context *ctx, struct gl_program *prog)
651 {
652 struct brw_context *brw = brw_context(ctx);
653 const struct gen_device_info *devinfo = &brw->screen->devinfo;
654 struct brw_wm_prog_key key;
655
656 struct brw_program *bfp = brw_program(prog);
657
658 brw_wm_populate_default_key(&brw->screen->devinfo, &key, prog);
659
660 /* check brw_wm_populate_default_key coherent_fb_fetch setting */
661 assert(key.coherent_fb_fetch ==
662 ctx->Extensions.EXT_shader_framebuffer_fetch);
663
664 uint32_t old_prog_offset = brw->wm.base.prog_offset;
665 struct brw_stage_prog_data *old_prog_data = brw->wm.base.prog_data;
666
667 struct brw_vue_map vue_map;
668 if (devinfo->gen < 6) {
669 brw_compute_vue_map(&brw->screen->devinfo, &vue_map,
670 prog->info.inputs_read | VARYING_BIT_POS,
671 false);
672 }
673
674 bool success = brw_codegen_wm_prog(brw, bfp, &key, &vue_map);
675
676 brw->wm.base.prog_offset = old_prog_offset;
677 brw->wm.base.prog_data = old_prog_data;
678
679 return success;
680 }