intel: s/brw_device_info/gen_device_info/
[mesa.git] / src / mesa / drivers / dri / i965 / brw_wm.c
1 /*
2 * Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 * Intel funded Tungsten Graphics to
4 * develop this 3D driver.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining
7 * a copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sublicense, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial
16 * portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 */
26 #include "brw_context.h"
27 #include "brw_wm.h"
28 #include "brw_state.h"
29 #include "brw_shader.h"
30 #include "main/enums.h"
31 #include "main/formats.h"
32 #include "main/fbobject.h"
33 #include "main/samplerobj.h"
34 #include "main/framebuffer.h"
35 #include "program/prog_parameter.h"
36 #include "program/program.h"
37 #include "intel_mipmap_tree.h"
38 #include "intel_image.h"
39 #include "brw_nir.h"
40 #include "brw_program.h"
41
42 #include "util/ralloc.h"
43
44 static void
45 assign_fs_binding_table_offsets(const struct gen_device_info *devinfo,
46 const struct gl_shader_program *shader_prog,
47 const struct gl_program *prog,
48 const struct brw_wm_prog_key *key,
49 struct brw_wm_prog_data *prog_data)
50 {
51 uint32_t next_binding_table_offset = 0;
52
53 /* If there are no color regions, we still perform an FB write to a null
54 * renderbuffer, which we place at surface index 0.
55 */
56 prog_data->binding_table.render_target_start = next_binding_table_offset;
57 next_binding_table_offset += MAX2(key->nr_color_regions, 1);
58
59 next_binding_table_offset =
60 brw_assign_common_binding_table_offsets(MESA_SHADER_FRAGMENT, devinfo,
61 shader_prog, prog, &prog_data->base,
62 next_binding_table_offset);
63
64 if (prog->nir->info.outputs_read && !key->coherent_fb_fetch) {
65 prog_data->binding_table.render_target_read_start =
66 next_binding_table_offset;
67 next_binding_table_offset += key->nr_color_regions;
68 }
69 }
70
71 /**
72 * All Mesa program -> GPU code generation goes through this function.
73 * Depending on the instructions used (i.e. flow control instructions)
74 * we'll use one of two code generators.
75 */
76 bool
77 brw_codegen_wm_prog(struct brw_context *brw,
78 struct gl_shader_program *prog,
79 struct brw_fragment_program *fp,
80 struct brw_wm_prog_key *key)
81 {
82 struct gl_context *ctx = &brw->ctx;
83 void *mem_ctx = ralloc_context(NULL);
84 struct brw_wm_prog_data prog_data;
85 const GLuint *program;
86 struct brw_shader *fs = NULL;
87 GLuint program_size;
88 bool start_busy = false;
89 double start_time = 0;
90
91 if (prog)
92 fs = (struct brw_shader *)prog->_LinkedShaders[MESA_SHADER_FRAGMENT];
93
94 memset(&prog_data, 0, sizeof(prog_data));
95
96 /* Use ALT floating point mode for ARB programs so that 0^0 == 1. */
97 if (!prog)
98 prog_data.base.use_alt_mode = true;
99
100 assign_fs_binding_table_offsets(brw->intelScreen->devinfo, prog,
101 &fp->program.Base, key, &prog_data);
102
103 /* Allocate the references to the uniforms that will end up in the
104 * prog_data associated with the compiled program, and which will be freed
105 * by the state cache.
106 */
107 int param_count = fp->program.Base.nir->num_uniforms / 4;
108 if (fs)
109 prog_data.base.nr_image_params = fs->base.NumImages;
110 /* The backend also sometimes adds params for texture size. */
111 param_count += 2 * ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits;
112 prog_data.base.param =
113 rzalloc_array(NULL, const gl_constant_value *, param_count);
114 prog_data.base.pull_param =
115 rzalloc_array(NULL, const gl_constant_value *, param_count);
116 prog_data.base.image_param =
117 rzalloc_array(NULL, struct brw_image_param,
118 prog_data.base.nr_image_params);
119 prog_data.base.nr_params = param_count;
120
121 if (prog) {
122 brw_nir_setup_glsl_uniforms(fp->program.Base.nir, prog, &fp->program.Base,
123 &prog_data.base, true);
124 } else {
125 brw_nir_setup_arb_uniforms(fp->program.Base.nir, &fp->program.Base,
126 &prog_data.base);
127 }
128
129 if (unlikely(brw->perf_debug)) {
130 start_busy = (brw->batch.last_bo &&
131 drm_intel_bo_busy(brw->batch.last_bo));
132 start_time = get_time();
133 }
134
135 if (unlikely(INTEL_DEBUG & DEBUG_WM))
136 brw_dump_ir("fragment", prog, fs ? &fs->base : NULL, &fp->program.Base);
137
138 int st_index8 = -1, st_index16 = -1;
139 if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
140 st_index8 = brw_get_shader_time_index(brw, prog, &fp->program.Base, ST_FS8);
141 st_index16 = brw_get_shader_time_index(brw, prog, &fp->program.Base, ST_FS16);
142 }
143
144 char *error_str = NULL;
145 program = brw_compile_fs(brw->intelScreen->compiler, brw, mem_ctx,
146 key, &prog_data, fp->program.Base.nir,
147 &fp->program.Base, st_index8, st_index16,
148 true, brw->use_rep_send,
149 &program_size, &error_str);
150 if (program == NULL) {
151 if (prog) {
152 prog->LinkStatus = false;
153 ralloc_strcat(&prog->InfoLog, error_str);
154 }
155
156 _mesa_problem(NULL, "Failed to compile fragment shader: %s\n", error_str);
157
158 ralloc_free(mem_ctx);
159 return false;
160 }
161
162 if (unlikely(brw->perf_debug) && fs) {
163 if (fs->compiled_once)
164 brw_wm_debug_recompile(brw, prog, key);
165 fs->compiled_once = true;
166
167 if (start_busy && !drm_intel_bo_busy(brw->batch.last_bo)) {
168 perf_debug("FS compile took %.03f ms and stalled the GPU\n",
169 (get_time() - start_time) * 1000);
170 }
171 }
172
173 brw_alloc_stage_scratch(brw, &brw->wm.base,
174 prog_data.base.total_scratch,
175 brw->max_wm_threads);
176
177 if (unlikely(INTEL_DEBUG & DEBUG_WM))
178 fprintf(stderr, "\n");
179
180 brw_upload_cache(&brw->cache, BRW_CACHE_FS_PROG,
181 key, sizeof(struct brw_wm_prog_key),
182 program, program_size,
183 &prog_data, sizeof(prog_data),
184 &brw->wm.base.prog_offset, &brw->wm.prog_data);
185
186 ralloc_free(mem_ctx);
187
188 return true;
189 }
190
191 bool
192 brw_debug_recompile_sampler_key(struct brw_context *brw,
193 const struct brw_sampler_prog_key_data *old_key,
194 const struct brw_sampler_prog_key_data *key)
195 {
196 bool found = false;
197
198 for (unsigned int i = 0; i < MAX_SAMPLERS; i++) {
199 found |= key_debug(brw, "EXT_texture_swizzle or DEPTH_TEXTURE_MODE",
200 old_key->swizzles[i], key->swizzles[i]);
201 }
202 found |= key_debug(brw, "GL_CLAMP enabled on any texture unit's 1st coordinate",
203 old_key->gl_clamp_mask[0], key->gl_clamp_mask[0]);
204 found |= key_debug(brw, "GL_CLAMP enabled on any texture unit's 2nd coordinate",
205 old_key->gl_clamp_mask[1], key->gl_clamp_mask[1]);
206 found |= key_debug(brw, "GL_CLAMP enabled on any texture unit's 3rd coordinate",
207 old_key->gl_clamp_mask[2], key->gl_clamp_mask[2]);
208 found |= key_debug(brw, "gather channel quirk on any texture unit",
209 old_key->gather_channel_quirk_mask, key->gather_channel_quirk_mask);
210 found |= key_debug(brw, "compressed multisample layout",
211 old_key->compressed_multisample_layout_mask,
212 key->compressed_multisample_layout_mask);
213 found |= key_debug(brw, "16x msaa",
214 old_key->msaa_16,
215 key->msaa_16);
216
217 found |= key_debug(brw, "y_uv image bound",
218 old_key->y_uv_image_mask,
219 key->y_uv_image_mask);
220 found |= key_debug(brw, "y_u_v image bound",
221 old_key->y_u_v_image_mask,
222 key->y_u_v_image_mask);
223 found |= key_debug(brw, "yx_xuxv image bound",
224 old_key->yx_xuxv_image_mask,
225 key->yx_xuxv_image_mask);
226
227 for (unsigned int i = 0; i < MAX_SAMPLERS; i++) {
228 found |= key_debug(brw, "textureGather workarounds",
229 old_key->gen6_gather_wa[i], key->gen6_gather_wa[i]);
230 }
231
232 return found;
233 }
234
235 void
236 brw_wm_debug_recompile(struct brw_context *brw,
237 struct gl_shader_program *prog,
238 const struct brw_wm_prog_key *key)
239 {
240 struct brw_cache_item *c = NULL;
241 const struct brw_wm_prog_key *old_key = NULL;
242 bool found = false;
243
244 perf_debug("Recompiling fragment shader for program %d\n", prog->Name);
245
246 for (unsigned int i = 0; i < brw->cache.size; i++) {
247 for (c = brw->cache.items[i]; c; c = c->next) {
248 if (c->cache_id == BRW_CACHE_FS_PROG) {
249 old_key = c->key;
250
251 if (old_key->program_string_id == key->program_string_id)
252 break;
253 }
254 }
255 if (c)
256 break;
257 }
258
259 if (!c) {
260 perf_debug(" Didn't find previous compile in the shader cache for debug\n");
261 return;
262 }
263
264 found |= key_debug(brw, "alphatest, computed depth, depth test, or "
265 "depth write",
266 old_key->iz_lookup, key->iz_lookup);
267 found |= key_debug(brw, "depth statistics",
268 old_key->stats_wm, key->stats_wm);
269 found |= key_debug(brw, "flat shading",
270 old_key->flat_shade, key->flat_shade);
271 found |= key_debug(brw, "per-sample interpolation",
272 old_key->persample_interp, key->persample_interp);
273 found |= key_debug(brw, "number of color buffers",
274 old_key->nr_color_regions, key->nr_color_regions);
275 found |= key_debug(brw, "MRT alpha test or alpha-to-coverage",
276 old_key->replicate_alpha, key->replicate_alpha);
277 found |= key_debug(brw, "fragment color clamping",
278 old_key->clamp_fragment_color, key->clamp_fragment_color);
279 found |= key_debug(brw, "multisampled FBO",
280 old_key->multisample_fbo, key->multisample_fbo);
281 found |= key_debug(brw, "line smoothing",
282 old_key->line_aa, key->line_aa);
283 found |= key_debug(brw, "input slots valid",
284 old_key->input_slots_valid, key->input_slots_valid);
285 found |= key_debug(brw, "mrt alpha test function",
286 old_key->alpha_test_func, key->alpha_test_func);
287 found |= key_debug(brw, "mrt alpha test reference value",
288 old_key->alpha_test_ref, key->alpha_test_ref);
289
290 found |= brw_debug_recompile_sampler_key(brw, &old_key->tex, &key->tex);
291
292 if (!found) {
293 perf_debug(" Something else\n");
294 }
295 }
296
297 static uint8_t
298 gen6_gather_workaround(GLenum internalformat)
299 {
300 switch (internalformat) {
301 case GL_R8I: return WA_SIGN | WA_8BIT;
302 case GL_R8UI: return WA_8BIT;
303 case GL_R16I: return WA_SIGN | WA_16BIT;
304 case GL_R16UI: return WA_16BIT;
305 default:
306 /* Note that even though GL_R32I and GL_R32UI have format overrides in
307 * the surface state, there is no shader w/a required.
308 */
309 return 0;
310 }
311 }
312
313 void
314 brw_populate_sampler_prog_key_data(struct gl_context *ctx,
315 const struct gl_program *prog,
316 struct brw_sampler_prog_key_data *key)
317 {
318 struct brw_context *brw = brw_context(ctx);
319 GLbitfield mask = prog->SamplersUsed;
320
321 while (mask) {
322 const int s = u_bit_scan(&mask);
323
324 key->swizzles[s] = SWIZZLE_NOOP;
325
326 int unit_id = prog->SamplerUnits[s];
327 const struct gl_texture_unit *unit = &ctx->Texture.Unit[unit_id];
328
329 if (unit->_Current && unit->_Current->Target != GL_TEXTURE_BUFFER) {
330 const struct gl_texture_object *t = unit->_Current;
331 const struct gl_texture_image *img = t->Image[0][t->BaseLevel];
332 struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit_id);
333
334 const bool alpha_depth = t->DepthMode == GL_ALPHA &&
335 (img->_BaseFormat == GL_DEPTH_COMPONENT ||
336 img->_BaseFormat == GL_DEPTH_STENCIL);
337
338 /* Haswell handles texture swizzling as surface format overrides
339 * (except for GL_ALPHA); all other platforms need MOVs in the shader.
340 */
341 if (alpha_depth || (brw->gen < 8 && !brw->is_haswell))
342 key->swizzles[s] = brw_get_texture_swizzle(ctx, t);
343
344 if (brw->gen < 8 &&
345 sampler->MinFilter != GL_NEAREST &&
346 sampler->MagFilter != GL_NEAREST) {
347 if (sampler->WrapS == GL_CLAMP)
348 key->gl_clamp_mask[0] |= 1 << s;
349 if (sampler->WrapT == GL_CLAMP)
350 key->gl_clamp_mask[1] |= 1 << s;
351 if (sampler->WrapR == GL_CLAMP)
352 key->gl_clamp_mask[2] |= 1 << s;
353 }
354
355 /* gather4's channel select for green from RG32F is broken; requires
356 * a shader w/a on IVB; fixable with just SCS on HSW.
357 */
358 if (brw->gen == 7 && !brw->is_haswell && prog->UsesGather) {
359 if (img->InternalFormat == GL_RG32F)
360 key->gather_channel_quirk_mask |= 1 << s;
361 }
362
363 /* Gen6's gather4 is broken for UINT/SINT; we treat them as
364 * UNORM/FLOAT instead and fix it in the shader.
365 */
366 if (brw->gen == 6 && prog->UsesGather) {
367 key->gen6_gather_wa[s] = gen6_gather_workaround(img->InternalFormat);
368 }
369
370 /* If this is a multisample sampler, and uses the CMS MSAA layout,
371 * then we need to emit slightly different code to first sample the
372 * MCS surface.
373 */
374 struct intel_texture_object *intel_tex =
375 intel_texture_object((struct gl_texture_object *)t);
376
377 /* From gen9 onwards some single sampled buffers can also be
378 * compressed. These don't need ld2dms sampling along with mcs fetch.
379 */
380 if (brw->gen >= 7 &&
381 intel_tex->mt->msaa_layout == INTEL_MSAA_LAYOUT_CMS &&
382 intel_tex->mt->num_samples > 1) {
383 key->compressed_multisample_layout_mask |= 1 << s;
384
385 if (intel_tex->mt->num_samples >= 16) {
386 assert(brw->gen >= 9);
387 key->msaa_16 |= 1 << s;
388 }
389 }
390
391 if (t->Target == GL_TEXTURE_EXTERNAL_OES && intel_tex->planar_format) {
392 switch (intel_tex->planar_format->components) {
393 case __DRI_IMAGE_COMPONENTS_Y_UV:
394 key->y_uv_image_mask |= 1 << s;
395 break;
396 case __DRI_IMAGE_COMPONENTS_Y_U_V:
397 key->y_u_v_image_mask |= 1 << s;
398 break;
399 case __DRI_IMAGE_COMPONENTS_Y_XUXV:
400 key->yx_xuxv_image_mask |= 1 << s;
401 break;
402 default:
403 break;
404 }
405 }
406
407 }
408 }
409 }
410
411 static bool
412 brw_wm_state_dirty(const struct brw_context *brw)
413 {
414 return brw_state_dirty(brw,
415 _NEW_BUFFERS |
416 _NEW_COLOR |
417 _NEW_DEPTH |
418 _NEW_FRAG_CLAMP |
419 _NEW_HINT |
420 _NEW_LIGHT |
421 _NEW_LINE |
422 _NEW_MULTISAMPLE |
423 _NEW_POLYGON |
424 _NEW_STENCIL |
425 _NEW_TEXTURE,
426 BRW_NEW_FRAGMENT_PROGRAM |
427 BRW_NEW_REDUCED_PRIMITIVE |
428 BRW_NEW_STATS_WM |
429 BRW_NEW_VUE_MAP_GEOM_OUT);
430 }
431
432 static void
433 brw_wm_populate_key(struct brw_context *brw, struct brw_wm_prog_key *key)
434 {
435 struct gl_context *ctx = &brw->ctx;
436 /* BRW_NEW_FRAGMENT_PROGRAM */
437 const struct brw_fragment_program *fp =
438 (struct brw_fragment_program *) brw->fragment_program;
439 const struct gl_program *prog = (struct gl_program *) brw->fragment_program;
440 GLuint lookup = 0;
441 GLuint line_aa;
442
443 memset(key, 0, sizeof(*key));
444
445 /* Build the index for table lookup
446 */
447 if (brw->gen < 6) {
448 /* _NEW_COLOR */
449 if (fp->program.UsesKill || ctx->Color.AlphaEnabled)
450 lookup |= IZ_PS_KILL_ALPHATEST_BIT;
451
452 if (fp->program.Base.OutputsWritten & BITFIELD64_BIT(FRAG_RESULT_DEPTH))
453 lookup |= IZ_PS_COMPUTES_DEPTH_BIT;
454
455 /* _NEW_DEPTH */
456 if (ctx->Depth.Test)
457 lookup |= IZ_DEPTH_TEST_ENABLE_BIT;
458
459 if (ctx->Depth.Test && ctx->Depth.Mask) /* ?? */
460 lookup |= IZ_DEPTH_WRITE_ENABLE_BIT;
461
462 /* _NEW_STENCIL | _NEW_BUFFERS */
463 if (ctx->Stencil._Enabled) {
464 lookup |= IZ_STENCIL_TEST_ENABLE_BIT;
465
466 if (ctx->Stencil.WriteMask[0] ||
467 ctx->Stencil.WriteMask[ctx->Stencil._BackFace])
468 lookup |= IZ_STENCIL_WRITE_ENABLE_BIT;
469 }
470 key->iz_lookup = lookup;
471 }
472
473 line_aa = AA_NEVER;
474
475 /* _NEW_LINE, _NEW_POLYGON, BRW_NEW_REDUCED_PRIMITIVE */
476 if (ctx->Line.SmoothFlag) {
477 if (brw->reduced_primitive == GL_LINES) {
478 line_aa = AA_ALWAYS;
479 }
480 else if (brw->reduced_primitive == GL_TRIANGLES) {
481 if (ctx->Polygon.FrontMode == GL_LINE) {
482 line_aa = AA_SOMETIMES;
483
484 if (ctx->Polygon.BackMode == GL_LINE ||
485 (ctx->Polygon.CullFlag &&
486 ctx->Polygon.CullFaceMode == GL_BACK))
487 line_aa = AA_ALWAYS;
488 }
489 else if (ctx->Polygon.BackMode == GL_LINE) {
490 line_aa = AA_SOMETIMES;
491
492 if ((ctx->Polygon.CullFlag &&
493 ctx->Polygon.CullFaceMode == GL_FRONT))
494 line_aa = AA_ALWAYS;
495 }
496 }
497 }
498
499 key->line_aa = line_aa;
500
501 /* _NEW_HINT */
502 key->high_quality_derivatives =
503 ctx->Hint.FragmentShaderDerivative == GL_NICEST;
504
505 if (brw->gen < 6)
506 key->stats_wm = brw->stats_wm;
507
508 /* _NEW_LIGHT */
509 key->flat_shade = (ctx->Light.ShadeModel == GL_FLAT);
510
511 /* _NEW_FRAG_CLAMP | _NEW_BUFFERS */
512 key->clamp_fragment_color = ctx->Color._ClampFragmentColor;
513
514 /* _NEW_TEXTURE */
515 brw_populate_sampler_prog_key_data(ctx, prog, &key->tex);
516
517 /* _NEW_BUFFERS */
518 key->nr_color_regions = ctx->DrawBuffer->_NumColorDrawBuffers;
519
520 /* _NEW_COLOR */
521 key->force_dual_color_blend = brw->dual_color_blend_by_location &&
522 (ctx->Color.BlendEnabled & 1) && ctx->Color.Blend[0]._UsesDualSrc;
523
524 /* _NEW_MULTISAMPLE, _NEW_COLOR, _NEW_BUFFERS */
525 key->replicate_alpha = ctx->DrawBuffer->_NumColorDrawBuffers > 1 &&
526 (ctx->Multisample.SampleAlphaToCoverage || ctx->Color.AlphaEnabled);
527
528 /* _NEW_BUFFERS _NEW_MULTISAMPLE */
529 /* Ignore sample qualifier while computing this flag. */
530 if (ctx->Multisample.Enabled) {
531 key->persample_interp =
532 ctx->Multisample.SampleShading &&
533 (ctx->Multisample.MinSampleShadingValue *
534 _mesa_geometric_samples(ctx->DrawBuffer) > 1);
535
536 key->multisample_fbo = _mesa_geometric_samples(ctx->DrawBuffer) > 1;
537 }
538
539 /* BRW_NEW_VUE_MAP_GEOM_OUT */
540 if (brw->gen < 6 || _mesa_bitcount_64(fp->program.Base.InputsRead &
541 BRW_FS_VARYING_INPUT_MASK) > 16)
542 key->input_slots_valid = brw->vue_map_geom_out.slots_valid;
543
544
545 /* _NEW_COLOR | _NEW_BUFFERS */
546 /* Pre-gen6, the hardware alpha test always used each render
547 * target's alpha to do alpha test, as opposed to render target 0's alpha
548 * like GL requires. Fix that by building the alpha test into the
549 * shader, and we'll skip enabling the fixed function alpha test.
550 */
551 if (brw->gen < 6 && ctx->DrawBuffer->_NumColorDrawBuffers > 1 &&
552 ctx->Color.AlphaEnabled) {
553 key->alpha_test_func = ctx->Color.AlphaFunc;
554 key->alpha_test_ref = ctx->Color.AlphaRef;
555 }
556
557 /* The unique fragment program ID */
558 key->program_string_id = fp->id;
559
560 /* Whether reads from the framebuffer should behave coherently. */
561 key->coherent_fb_fetch = ctx->Extensions.MESA_shader_framebuffer_fetch;
562 }
563
564 void
565 brw_upload_wm_prog(struct brw_context *brw)
566 {
567 struct gl_context *ctx = &brw->ctx;
568 struct gl_shader_program *current = ctx->_Shader->_CurrentFragmentProgram;
569 struct brw_wm_prog_key key;
570 struct brw_fragment_program *fp = (struct brw_fragment_program *)
571 brw->fragment_program;
572
573 if (!brw_wm_state_dirty(brw))
574 return;
575
576 brw_wm_populate_key(brw, &key);
577
578 if (!brw_search_cache(&brw->cache, BRW_CACHE_FS_PROG,
579 &key, sizeof(key),
580 &brw->wm.base.prog_offset, &brw->wm.prog_data)) {
581 bool success = brw_codegen_wm_prog(brw, current, fp, &key);
582 (void) success;
583 assert(success);
584 }
585 brw->wm.base.prog_data = &brw->wm.prog_data->base;
586 }
587
588 bool
589 brw_fs_precompile(struct gl_context *ctx,
590 struct gl_shader_program *shader_prog,
591 struct gl_program *prog)
592 {
593 struct brw_context *brw = brw_context(ctx);
594 struct brw_wm_prog_key key;
595
596 struct gl_fragment_program *fp = (struct gl_fragment_program *) prog;
597 struct brw_fragment_program *bfp = brw_fragment_program(fp);
598
599 memset(&key, 0, sizeof(key));
600
601 if (brw->gen < 6) {
602 if (fp->UsesKill)
603 key.iz_lookup |= IZ_PS_KILL_ALPHATEST_BIT;
604
605 if (fp->Base.OutputsWritten & BITFIELD64_BIT(FRAG_RESULT_DEPTH))
606 key.iz_lookup |= IZ_PS_COMPUTES_DEPTH_BIT;
607
608 /* Just assume depth testing. */
609 key.iz_lookup |= IZ_DEPTH_TEST_ENABLE_BIT;
610 key.iz_lookup |= IZ_DEPTH_WRITE_ENABLE_BIT;
611 }
612
613 if (brw->gen < 6 || _mesa_bitcount_64(fp->Base.InputsRead &
614 BRW_FS_VARYING_INPUT_MASK) > 16)
615 key.input_slots_valid = fp->Base.InputsRead | VARYING_BIT_POS;
616
617 brw_setup_tex_for_precompile(brw, &key.tex, &fp->Base);
618
619 key.nr_color_regions = _mesa_bitcount_64(fp->Base.OutputsWritten &
620 ~(BITFIELD64_BIT(FRAG_RESULT_DEPTH) |
621 BITFIELD64_BIT(FRAG_RESULT_STENCIL) |
622 BITFIELD64_BIT(FRAG_RESULT_SAMPLE_MASK)));
623
624 key.program_string_id = bfp->id;
625
626 /* Whether reads from the framebuffer should behave coherently. */
627 key.coherent_fb_fetch = ctx->Extensions.MESA_shader_framebuffer_fetch;
628
629 uint32_t old_prog_offset = brw->wm.base.prog_offset;
630 struct brw_wm_prog_data *old_prog_data = brw->wm.prog_data;
631
632 bool success = brw_codegen_wm_prog(brw, shader_prog, bfp, &key);
633
634 brw->wm.base.prog_offset = old_prog_offset;
635 brw->wm.prog_data = old_prog_data;
636
637 return success;
638 }