src/mesa/drivers/dri/i965/gen6_wm_state.c

   1 /*
   2  * Copyright © 2009 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *
  26  */
  27
  28 #include "brw_context.h"
  29 #include "brw_state.h"
  30 #include "brw_defines.h"
  31 #include "brw_util.h"
  32 #include "brw_wm.h"
  33 #include "program/prog_parameter.h"
  34 #include "program/prog_statevars.h"
  35 #include "intel_batchbuffer.h"
  36
  37 static void
  38 gen6_upload_wm_push_constants(struct brw_context *brw)
  39 {
  40    struct intel_context *intel = &brw->intel;
  41    struct gl_context *ctx = &intel->ctx;
  42    /* BRW_NEW_FRAGMENT_PROGRAM */
  43    const struct brw_fragment_program *fp =
  44       brw_fragment_program_const(brw->fragment_program);
  45
  46    /* Updates the ParameterValues[i] pointers for all parameters of the
  47     * basic type of PROGRAM_STATE_VAR.
  48     */
  49    /* XXX: Should this happen somewhere before to get our state flag set? */
  50    _mesa_load_state_parameters(ctx, fp->program.Base.Parameters);
  51
  52    /* CACHE_NEW_WM_PROG */
  53    if (brw->wm.prog_data->nr_params != 0) {
  54       float *constants;
  55       unsigned int i;
  56
  57       constants = brw_state_batch(brw, AUB_TRACE_WM_CONSTANTS,
  58                                   brw->wm.prog_data->nr_params *
  59                                   sizeof(float),
  60                                   32, &brw->wm.push_const_offset);
  61
  62       for (i = 0; i < brw->wm.prog_data->nr_params; i++) {
  63          constants[i] = convert_param(brw->wm.prog_data->param_convert[i],
  64                                       brw->wm.prog_data->param[i]);
  65       }
  66
  67       if (0) {
  68          printf("WM constants:\n");
  69          for (i = 0; i < brw->wm.prog_data->nr_params; i++) {
  70             if ((i & 7) == 0)
  71                printf("g%d: ", brw->wm.prog_data->first_curbe_grf + i / 8);
  72             printf("%8f ", constants[i]);
  73             if ((i & 7) == 7)
  74                printf("\n");
  75          }
  76          if ((i & 7) != 0)
  77             printf("\n");
  78          printf("\n");
  79       }
  80    }
  81 }
  82
  83 const struct brw_tracked_state gen6_wm_push_constants = {
  84    .dirty = {
  85       .mesa  = _NEW_PROGRAM_CONSTANTS,
  86       .brw   = (BRW_NEW_BATCH |
  87                 BRW_NEW_FRAGMENT_PROGRAM),
  88       .cache = CACHE_NEW_WM_PROG,
  89    },
  90    .emit = gen6_upload_wm_push_constants,
  91 };
  92
  93 static void
  94 upload_wm_state(struct brw_context *brw)
  95 {
  96    struct intel_context *intel = &brw->intel;
  97    struct gl_context *ctx = &intel->ctx;
  98    const struct brw_fragment_program *fp =
  99       brw_fragment_program_const(brw->fragment_program);
 100    uint32_t dw2, dw4, dw5, dw6;
 101
 102    /* _NEW_LIGHT */
 103    bool flat_shade = (ctx->Light.ShadeModel == GL_FLAT);
 104
 105     /* CACHE_NEW_WM_PROG */
 106    if (brw->wm.prog_data->nr_params == 0) {
 107       /* Disable the push constant buffers. */
 108       BEGIN_BATCH(5);
 109       OUT_BATCH(_3DSTATE_CONSTANT_PS << 16 | (5 - 2));
 110       OUT_BATCH(0);
 111       OUT_BATCH(0);
 112       OUT_BATCH(0);
 113       OUT_BATCH(0);
 114       ADVANCE_BATCH();
 115    } else {
 116       BEGIN_BATCH(5);
 117       OUT_BATCH(_3DSTATE_CONSTANT_PS << 16 |
 118                 GEN6_CONSTANT_BUFFER_0_ENABLE |
 119                 (5 - 2));
 120       /* Pointer to the WM constant buffer.  Covered by the set of
 121        * state flags from gen6_upload_wm_constants
 122        */
 123       OUT_BATCH(brw->wm.push_const_offset +
 124                 ALIGN(brw->wm.prog_data->nr_params,
 125                       brw->wm.prog_data->dispatch_width) / 8 - 1);
 126       OUT_BATCH(0);
 127       OUT_BATCH(0);
 128       OUT_BATCH(0);
 129       ADVANCE_BATCH();
 130    }
 131
 132    dw2 = dw4 = dw5 = dw6 = 0;
 133    dw4 |= GEN6_WM_STATISTICS_ENABLE;
 134    dw5 |= GEN6_WM_LINE_AA_WIDTH_1_0;
 135    dw5 |= GEN6_WM_LINE_END_CAP_AA_WIDTH_0_5;
 136
 137    /* Use ALT floating point mode for ARB fragment programs, because they
 138     * require 0^0 == 1.
 139     */
 140    if (ctx->Shader.CurrentFragmentProgram == NULL)
 141       dw2 |= GEN6_WM_FLOATING_POINT_MODE_ALT;
 142
 143    /* CACHE_NEW_SAMPLER */
 144    dw2 |= (ALIGN(brw->sampler.count, 4) / 4) << GEN6_WM_SAMPLER_COUNT_SHIFT;
 145    dw4 |= (brw->wm.prog_data->first_curbe_grf <<
 146            GEN6_WM_DISPATCH_START_GRF_SHIFT_0);
 147    dw4 |= (brw->wm.prog_data->first_curbe_grf_16 <<
 148            GEN6_WM_DISPATCH_START_GRF_SHIFT_2);
 149
 150    switch (brw->hiz.op) {
 151    case BRW_HIZ_OP_NONE:
 152       break;
 153    case BRW_HIZ_OP_DEPTH_CLEAR:
 154       dw4 |= GEN6_WM_DEPTH_CLEAR;
 155       break;
 156    case BRW_HIZ_OP_DEPTH_RESOLVE:
 157       dw4 |= GEN6_WM_DEPTH_RESOLVE;
 158       break;
 159    case BRW_HIZ_OP_HIZ_RESOLVE:
 160       dw4 |= GEN6_WM_HIERARCHICAL_DEPTH_RESOLVE;
 161       break;
 162    default:
 163       assert(0);
 164       break;
 165    }
 166
 167    dw5 |= (brw->max_wm_threads - 1) << GEN6_WM_MAX_THREADS_SHIFT;
 168
 169    /* CACHE_NEW_WM_PROG */
 170    if (brw->wm.prog_data->dispatch_width == 8) {
 171       dw5 |= GEN6_WM_8_DISPATCH_ENABLE;
 172       if (brw->wm.prog_data->prog_offset_16)
 173          dw5 |= GEN6_WM_16_DISPATCH_ENABLE;
 174    } else {
 175       dw5 |= GEN6_WM_16_DISPATCH_ENABLE;
 176    }
 177
 178    /* _NEW_LINE */
 179    if (ctx->Line.StippleFlag)
 180       dw5 |= GEN6_WM_LINE_STIPPLE_ENABLE;
 181
 182    /* _NEW_POLYGON */
 183    if (ctx->Polygon.StippleFlag)
 184       dw5 |= GEN6_WM_POLYGON_STIPPLE_ENABLE;
 185
 186    /* BRW_NEW_FRAGMENT_PROGRAM */
 187    if (fp->program.Base.InputsRead & FRAG_BIT_WPOS)
 188       dw5 |= GEN6_WM_USES_SOURCE_DEPTH | GEN6_WM_USES_SOURCE_W;
 189    if (fp->program.Base.OutputsWritten & BITFIELD64_BIT(FRAG_RESULT_DEPTH))
 190       dw5 |= GEN6_WM_COMPUTED_DEPTH;
 191    dw6 |= brw_compute_barycentric_interp_modes(flat_shade, &fp->program) <<
 192       GEN6_WM_BARYCENTRIC_INTERPOLATION_MODE_SHIFT;
 193
 194    /* _NEW_COLOR */
 195    if (fp->program.UsesKill || ctx->Color.AlphaEnabled)
 196       dw5 |= GEN6_WM_KILL_ENABLE;
 197
 198    if (brw_color_buffer_write_enabled(brw) ||
 199        dw5 & (GEN6_WM_KILL_ENABLE | GEN6_WM_COMPUTED_DEPTH)) {
 200       dw5 |= GEN6_WM_DISPATCH_ENABLE;
 201    }
 202
 203    dw6 |= _mesa_bitcount_64(brw->fragment_program->Base.InputsRead) <<
 204       GEN6_WM_NUM_SF_OUTPUTS_SHIFT;
 205
 206    BEGIN_BATCH(9);
 207    OUT_BATCH(_3DSTATE_WM << 16 | (9 - 2));
 208    OUT_BATCH(brw->wm.prog_offset);
 209    OUT_BATCH(dw2);
 210    if (brw->wm.prog_data->total_scratch) {
 211       OUT_RELOC(brw->wm.scratch_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
 212                 ffs(brw->wm.prog_data->total_scratch) - 11);
 213    } else {
 214       OUT_BATCH(0);
 215    }
 216    OUT_BATCH(dw4);
 217    OUT_BATCH(dw5);
 218    OUT_BATCH(dw6);
 219    OUT_BATCH(0); /* kernel 1 pointer */
 220    /* kernel 2 pointer */
 221    OUT_BATCH(brw->wm.prog_offset + brw->wm.prog_data->prog_offset_16);
 222    ADVANCE_BATCH();
 223 }
 224
 225 const struct brw_tracked_state gen6_wm_state = {
 226    .dirty = {
 227       .mesa  = (_NEW_LINE |
 228                 _NEW_LIGHT |
 229                 _NEW_COLOR |
 230                 _NEW_BUFFERS |
 231                 _NEW_PROGRAM_CONSTANTS |
 232                 _NEW_POLYGON),
 233       .brw   = (BRW_NEW_FRAGMENT_PROGRAM |
 234                 BRW_NEW_BATCH |
 235                 BRW_NEW_HIZ),
 236       .cache = (CACHE_NEW_SAMPLER |
 237                 CACHE_NEW_WM_PROG)
 238    },
 239    .emit = upload_wm_state,
 240 };