1 /**************************************************************************
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
36 #include "swrast/swrast.h"
38 #include "intel_context.h"
39 #include "intel_ioctl.h"
40 #include "intel_batchbuffer.h"
41 #include "intel_blit.h"
42 #include "intel_regions.h"
46 static int intelWaitIdleLocked( struct intel_context
*intel
)
48 static int in_wait_idle
= 0;
52 if (INTEL_DEBUG
& DEBUG_SYNC
) {
53 fprintf(stderr
, "waiting for idle\n");
57 fence
= bmSetFence(intel
);
58 intelWaitIrq(intel
, fence
);
61 return bmTestFence(intel
, fence
);
67 int intelEmitIrqLocked( struct intel_context
*intel
)
75 assert(((*(int *)intel
->driHwLock
) & ~DRM_LOCK_CONT
) ==
76 (DRM_LOCK_HELD
|intel
->hHWContext
));
80 ret
= drmCommandWriteRead( intel
->driFd
, DRM_I830_IRQ_EMIT
,
83 fprintf( stderr
, "%s: drmI830IrqEmit: %d\n", __FUNCTION__
, ret
);
88 fprintf(stderr
, "%s --> %d\n", __FUNCTION__
, seq
);
94 void intelWaitIrq( struct intel_context
*intel
, int seq
)
98 int ret
, lastdispatch
;
101 fprintf(stderr
, "%s %d\n", __FUNCTION__
, seq
);
106 lastdispatch
= intel
->sarea
->last_dispatch
;
107 ret
= drmCommandWrite( intel
->driFd
, DRM_I830_IRQ_WAIT
, &iw
, sizeof(iw
) );
109 /* This seems quite often to return before it should!?!
111 } while (ret
== -EAGAIN
|| ret
== -EINTR
|| (ret
== -EBUSY
&& lastdispatch
!= intel
->sarea
->last_dispatch
) || (ret
== 0 && seq
> intel
->sarea
->last_dispatch
)
112 || (ret
== 0 && intel
->sarea
->last_dispatch
- seq
>= (1 << 24)));
116 fprintf( stderr
, "%s: drmI830IrqWait: %d\n", __FUNCTION__
, ret
);
124 void intel_batch_ioctl( struct intel_context
*intel
,
128 drmI830BatchBuffer batch
;
130 assert(intel
->locked
);
134 fprintf(stderr
, "%s used %d offset %x..%x\n",
138 start_offset
+ used
);
140 batch
.start
= start_offset
;
142 batch
.cliprects
= NULL
;
143 batch
.num_cliprects
= 0;
147 if (INTEL_DEBUG
& DEBUG_DMA
)
148 fprintf(stderr
, "%s: 0x%x..0x%x\n",
151 batch
.start
+ batch
.used
* 4);
154 if (drmCommandWrite (intel
->driFd
, DRM_I830_BATCHBUFFER
, &batch
,
156 fprintf(stderr
, "DRM_I830_BATCHBUFFER: %d\n", -errno
);
157 UNLOCK_HARDWARE(intel
);
161 if (INTEL_DEBUG
& DEBUG_SYNC
) {
162 intelWaitIdleLocked(intel
);
167 void intel_cmd_ioctl( struct intel_context
*intel
,
171 drmI830CmdBuffer cmd
;
173 assert(intel
->locked
);
178 cmd
.cliprects
= intel
->pClipRects
;
179 cmd
.num_cliprects
= 0;
183 if (INTEL_DEBUG
& DEBUG_DMA
)
184 fprintf(stderr
, "%s: 0x%x..0x%x\n",
190 if (drmCommandWrite (intel
->driFd
, DRM_I830_CMDBUFFER
, &cmd
,
192 fprintf(stderr
, "DRM_I830_CMDBUFFER: %d\n", -errno
);
193 UNLOCK_HARDWARE(intel
);
197 if (INTEL_DEBUG
& DEBUG_SYNC
) {
198 intelWaitIdleLocked(intel
);