[965] Remove AUB file support.
[mesa.git] / src / mesa / drivers / dri / i965 / intel_ioctl.c
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28
29 #include <stdio.h>
30 #include <unistd.h>
31 #include <errno.h>
32 #include <sched.h>
33
34 #include "mtypes.h"
35 #include "context.h"
36 #include "swrast/swrast.h"
37
38 #include "intel_context.h"
39 #include "intel_ioctl.h"
40 #include "intel_batchbuffer.h"
41 #include "intel_blit.h"
42 #include "intel_regions.h"
43 #include "drm.h"
44 #include "bufmgr.h"
45
46 static int intelWaitIdleLocked( struct intel_context *intel )
47 {
48 static int in_wait_idle = 0;
49 unsigned int fence;
50
51 if (!in_wait_idle) {
52 if (INTEL_DEBUG & DEBUG_SYNC) {
53 fprintf(stderr, "waiting for idle\n");
54 }
55
56 in_wait_idle = 1;
57 fence = bmSetFence(intel);
58 intelWaitIrq(intel, fence);
59 in_wait_idle = 0;
60
61 return bmTestFence(intel, fence);
62 } else {
63 return 1;
64 }
65 }
66
67 int intelEmitIrqLocked( struct intel_context *intel )
68 {
69 int seq = 1;
70
71 if (!intel->no_hw) {
72 drmI830IrqEmit ie;
73 int ret;
74
75 assert(((*(int *)intel->driHwLock) & ~DRM_LOCK_CONT) ==
76 (DRM_LOCK_HELD|intel->hHWContext));
77
78 ie.irq_seq = &seq;
79
80 ret = drmCommandWriteRead( intel->driFd, DRM_I830_IRQ_EMIT,
81 &ie, sizeof(ie) );
82 if ( ret ) {
83 fprintf( stderr, "%s: drmI830IrqEmit: %d\n", __FUNCTION__, ret );
84 exit(1);
85 }
86
87 if (0)
88 fprintf(stderr, "%s --> %d\n", __FUNCTION__, seq );
89 }
90
91 return seq;
92 }
93
94 void intelWaitIrq( struct intel_context *intel, int seq )
95 {
96 if (!intel->no_hw) {
97 drmI830IrqWait iw;
98 int ret, lastdispatch;
99
100 if (0)
101 fprintf(stderr, "%s %d\n", __FUNCTION__, seq );
102
103 iw.irq_seq = seq;
104
105 do {
106 lastdispatch = intel->sarea->last_dispatch;
107 ret = drmCommandWrite( intel->driFd, DRM_I830_IRQ_WAIT, &iw, sizeof(iw) );
108
109 /* This seems quite often to return before it should!?!
110 */
111 } while (ret == -EAGAIN || ret == -EINTR || (ret == -EBUSY && lastdispatch != intel->sarea->last_dispatch) || (ret == 0 && seq > intel->sarea->last_dispatch)
112 || (ret == 0 && intel->sarea->last_dispatch - seq >= (1 << 24)));
113
114
115 if ( ret ) {
116 fprintf( stderr, "%s: drmI830IrqWait: %d\n", __FUNCTION__, ret );
117
118 exit(1);
119 }
120 }
121 }
122
123
124 void intel_batch_ioctl( struct intel_context *intel,
125 GLuint start_offset,
126 GLuint used)
127 {
128 drmI830BatchBuffer batch;
129
130 assert(intel->locked);
131 assert(used);
132
133 if (0)
134 fprintf(stderr, "%s used %d offset %x..%x\n",
135 __FUNCTION__,
136 used,
137 start_offset,
138 start_offset + used);
139
140 batch.start = start_offset;
141 batch.used = used;
142 batch.cliprects = NULL;
143 batch.num_cliprects = 0;
144 batch.DR1 = 0;
145 batch.DR4 = 0;
146
147 if (INTEL_DEBUG & DEBUG_DMA)
148 fprintf(stderr, "%s: 0x%x..0x%x\n",
149 __FUNCTION__,
150 batch.start,
151 batch.start + batch.used * 4);
152
153 if (!intel->no_hw) {
154 if (drmCommandWrite (intel->driFd, DRM_I830_BATCHBUFFER, &batch,
155 sizeof(batch))) {
156 fprintf(stderr, "DRM_I830_BATCHBUFFER: %d\n", -errno);
157 UNLOCK_HARDWARE(intel);
158 exit(1);
159 }
160
161 if (INTEL_DEBUG & DEBUG_SYNC) {
162 intelWaitIdleLocked(intel);
163 }
164 }
165 }
166
167 void intel_cmd_ioctl( struct intel_context *intel,
168 char *buf,
169 GLuint used)
170 {
171 drmI830CmdBuffer cmd;
172
173 assert(intel->locked);
174 assert(used);
175
176 cmd.buf = buf;
177 cmd.sz = used;
178 cmd.cliprects = intel->pClipRects;
179 cmd.num_cliprects = 0;
180 cmd.DR1 = 0;
181 cmd.DR4 = 0;
182
183 if (INTEL_DEBUG & DEBUG_DMA)
184 fprintf(stderr, "%s: 0x%x..0x%x\n",
185 __FUNCTION__,
186 0,
187 0 + cmd.sz);
188
189 if (!intel->no_hw) {
190 if (drmCommandWrite (intel->driFd, DRM_I830_CMDBUFFER, &cmd,
191 sizeof(cmd))) {
192 fprintf(stderr, "DRM_I830_CMDBUFFER: %d\n", -errno);
193 UNLOCK_HARDWARE(intel);
194 exit(1);
195 }
196
197 if (INTEL_DEBUG & DEBUG_SYNC) {
198 intelWaitIdleLocked(intel);
199 }
200 }
201 }