src/mesa/drivers/dri/i965/test_eu_compact.c

   1 /*
   2  * Copyright © 2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include <stdlib.h>
  25 #include <stdio.h>
  26 #include <stdbool.h>
  27 #include "glsl/ralloc.h"
  28 #include "brw_context.h"
  29 #include "brw_eu.h"
  30
  31 static bool
  32 test_compact_instruction(struct brw_compile *p, struct brw_instruction src)
  33 {
  34    struct brw_context *brw = p->brw;
  35
  36    struct brw_compact_instruction dst;
  37    memset(&dst, 0xd0, sizeof(dst));
  38
  39    if (brw_try_compact_instruction(p, &dst, &src)) {
  40       struct brw_instruction uncompacted;
  41
  42       brw_uncompact_instruction(brw, &uncompacted, &dst);
  43       if (memcmp(&uncompacted, &src, sizeof(src))) {
  44          brw_debug_compact_uncompact(brw, &src, &uncompacted);
  45          return false;
  46       }
  47    } else {
  48       struct brw_compact_instruction unchanged;
  49       memset(&unchanged, 0xd0, sizeof(unchanged));
  50       /* It's not supposed to change dst unless it compacted. */
  51       if (memcmp(&unchanged, &dst, sizeof(dst))) {
  52          fprintf(stderr, "Failed to compact, but dst changed\n");
  53          fprintf(stderr, "  Instruction: ");
  54          brw_disassemble_inst(stderr, &src, brw->gen, false);
  55          return false;
  56       }
  57    }
  58
  59    return true;
  60 }
  61
  62 /**
  63  * When doing fuzz testing, pad bits won't round-trip.
  64  *
  65  * This sort of a superset of skip_bit, which is testing for changing bits that
  66  * aren't worth testing for fuzzing.  We also just want to clear bits that
  67  * become meaningless once fuzzing twiddles a related bit.
  68  */
  69 static void
  70 clear_pad_bits(const struct brw_context *brw, struct brw_instruction *inst)
  71 {
  72    if (brw_inst_opcode(brw, inst) != BRW_OPCODE_SEND &&
  73        brw_inst_opcode(brw, inst) != BRW_OPCODE_SENDC &&
  74        brw_inst_opcode(brw, inst) != BRW_OPCODE_BREAK &&
  75        brw_inst_opcode(brw, inst) != BRW_OPCODE_CONTINUE &&
  76        brw_inst_src0_reg_file(brw, inst) != BRW_IMMEDIATE_VALUE &&
  77        brw_inst_src1_reg_file(brw, inst) != BRW_IMMEDIATE_VALUE) {
  78       brw_inst_set_bits(inst, 127, 111, 0);
  79    }
  80 }
  81
  82 static bool
  83 skip_bit(const struct brw_context *brw, struct brw_instruction *src, int bit)
  84 {
  85    /* pad bit */
  86    if (bit == 7)
  87       return true;
  88
  89    /* The compact bit -- uncompacted can't have it set. */
  90    if (bit == 29)
  91       return true;
  92
  93    /* pad bit */
  94    if (bit == 47)
  95       return true;
  96
  97    /* pad bits */
  98    if (bit >= 90 && bit <= 95)
  99       return true;
 100
 101    /* sometimes these are pad bits. */
 102    if (brw_inst_opcode(brw, src) != BRW_OPCODE_SEND &&
 103        brw_inst_opcode(brw, src) != BRW_OPCODE_SENDC &&
 104        brw_inst_opcode(brw, src) != BRW_OPCODE_BREAK &&
 105        brw_inst_opcode(brw, src) != BRW_OPCODE_CONTINUE &&
 106        brw_inst_src0_reg_file(brw, src) != BRW_IMMEDIATE_VALUE &&
 107        brw_inst_src1_reg_file(brw, src) != BRW_IMMEDIATE_VALUE &&
 108        bit >= 121) {
 109       return true;
 110    }
 111
 112    return false;
 113 }
 114
 115 static bool
 116 test_fuzz_compact_instruction(struct brw_compile *p,
 117                               struct brw_instruction src)
 118 {
 119    for (int bit0 = 0; bit0 < 128; bit0++) {
 120       if (skip_bit(p->brw, &src, bit0))
 121          continue;
 122
 123       for (int bit1 = 0; bit1 < 128; bit1++) {
 124          struct brw_instruction instr = src;
 125          uint32_t *bits = (uint32_t *)&instr;
 126
 127          if (skip_bit(p->brw, &src, bit1))
 128             continue;
 129
 130          bits[bit0 / 32] ^= (1 << (bit0 & 31));
 131          bits[bit1 / 32] ^= (1 << (bit1 & 31));
 132
 133          clear_pad_bits(p->brw, &instr);
 134
 135          if (!test_compact_instruction(p, instr)) {
 136             printf("  twiddled bits for fuzzing %d, %d\n", bit0, bit1);
 137             return false;
 138          }
 139       }
 140    }
 141
 142    return true;
 143 }
 144
 145 static void
 146 gen_ADD_GRF_GRF_GRF(struct brw_compile *p)
 147 {
 148    struct brw_reg g0 = brw_vec8_grf(0, 0);
 149    struct brw_reg g2 = brw_vec8_grf(2, 0);
 150    struct brw_reg g4 = brw_vec8_grf(4, 0);
 151
 152    brw_ADD(p, g0, g2, g4);
 153 }
 154
 155 static void
 156 gen_ADD_GRF_GRF_IMM(struct brw_compile *p)
 157 {
 158    struct brw_reg g0 = brw_vec8_grf(0, 0);
 159    struct brw_reg g2 = brw_vec8_grf(2, 0);
 160
 161    brw_ADD(p, g0, g2, brw_imm_f(1.0));
 162 }
 163
 164 static void
 165 gen_ADD_GRF_GRF_IMM_d(struct brw_compile *p)
 166 {
 167    struct brw_reg g0 = retype(brw_vec8_grf(0, 0), BRW_REGISTER_TYPE_D);
 168    struct brw_reg g2 = retype(brw_vec8_grf(2, 0), BRW_REGISTER_TYPE_D);
 169
 170    brw_ADD(p, g0, g2, brw_imm_d(1));
 171 }
 172
 173 static void
 174 gen_MOV_GRF_GRF(struct brw_compile *p)
 175 {
 176    struct brw_reg g0 = brw_vec8_grf(0, 0);
 177    struct brw_reg g2 = brw_vec8_grf(2, 0);
 178
 179    brw_MOV(p, g0, g2);
 180 }
 181
 182 static void
 183 gen_ADD_MRF_GRF_GRF(struct brw_compile *p)
 184 {
 185    struct brw_reg m6 = brw_vec8_reg(BRW_MESSAGE_REGISTER_FILE, 6, 0);
 186    struct brw_reg g2 = brw_vec8_grf(2, 0);
 187    struct brw_reg g4 = brw_vec8_grf(4, 0);
 188
 189    brw_ADD(p, m6, g2, g4);
 190 }
 191
 192 static void
 193 gen_ADD_vec1_GRF_GRF_GRF(struct brw_compile *p)
 194 {
 195    struct brw_reg g0 = brw_vec1_grf(0, 0);
 196    struct brw_reg g2 = brw_vec1_grf(2, 0);
 197    struct brw_reg g4 = brw_vec1_grf(4, 0);
 198
 199    brw_ADD(p, g0, g2, g4);
 200 }
 201
 202 static void
 203 gen_PLN_MRF_GRF_GRF(struct brw_compile *p)
 204 {
 205    struct brw_reg m6 = brw_vec8_reg(BRW_MESSAGE_REGISTER_FILE, 6, 0);
 206    struct brw_reg interp = brw_vec1_grf(2, 0);
 207    struct brw_reg g4 = brw_vec8_grf(4, 0);
 208
 209    brw_PLN(p, m6, interp, g4);
 210 }
 211
 212 static void
 213 gen_f0_0_MOV_GRF_GRF(struct brw_compile *p)
 214 {
 215    struct brw_reg g0 = brw_vec8_grf(0, 0);
 216    struct brw_reg g2 = brw_vec8_grf(2, 0);
 217
 218    brw_push_insn_state(p);
 219    brw_set_default_predicate_control(p, true);
 220    brw_MOV(p, g0, g2);
 221    brw_pop_insn_state(p);
 222 }
 223
 224 /* The handling of f0.1 vs f0.0 changes between gen6 and gen7.  Explicitly test
 225  * it, so that we run the fuzzing can run over all the other bits that might
 226  * interact with it.
 227  */
 228 static void
 229 gen_f0_1_MOV_GRF_GRF(struct brw_compile *p)
 230 {
 231    struct brw_reg g0 = brw_vec8_grf(0, 0);
 232    struct brw_reg g2 = brw_vec8_grf(2, 0);
 233
 234    brw_push_insn_state(p);
 235    brw_set_default_predicate_control(p, true);
 236    struct brw_instruction *mov = brw_MOV(p, g0, g2);
 237    brw_inst_set_flag_subreg_nr(p->brw, mov, 1);
 238    brw_pop_insn_state(p);
 239 }
 240
 241 struct {
 242    void (*func)(struct brw_compile *p);
 243 } tests[] = {
 244    { gen_MOV_GRF_GRF },
 245    { gen_ADD_GRF_GRF_GRF },
 246    { gen_ADD_GRF_GRF_IMM },
 247    { gen_ADD_GRF_GRF_IMM_d },
 248    { gen_ADD_MRF_GRF_GRF },
 249    { gen_ADD_vec1_GRF_GRF_GRF },
 250    { gen_PLN_MRF_GRF_GRF },
 251    { gen_f0_0_MOV_GRF_GRF },
 252    { gen_f0_1_MOV_GRF_GRF },
 253 };
 254
 255 static bool
 256 run_tests(struct brw_context *brw)
 257 {
 258    bool fail = false;
 259
 260    for (int i = 0; i < ARRAY_SIZE(tests); i++) {
 261       for (int align_16 = 0; align_16 <= 1; align_16++) {
 262          struct brw_compile *p = rzalloc(NULL, struct brw_compile);
 263          brw_init_compile(brw, p, p);
 264
 265          brw_set_default_predicate_control(p, BRW_PREDICATE_NONE);
 266          if (align_16)
 267             brw_set_default_access_mode(p, BRW_ALIGN_16);
 268          else
 269             brw_set_default_access_mode(p, BRW_ALIGN_1);
 270
 271          tests[i].func(p);
 272          assert(p->nr_insn == 1);
 273
 274          if (!test_compact_instruction(p, p->store[0])) {
 275             fail = true;
 276             continue;
 277          }
 278
 279          if (!test_fuzz_compact_instruction(p, p->store[0])) {
 280             fail = true;
 281             continue;
 282          }
 283
 284          ralloc_free(p);
 285       }
 286    }
 287
 288    return fail;
 289 }
 290
 291 int
 292 main(int argc, char **argv)
 293 {
 294    struct brw_context *brw = calloc(1, sizeof(*brw));
 295    brw->gen = 6;
 296    bool fail = false;
 297
 298    for (brw->gen = 6; brw->gen <= 7; brw->gen++) {
 299       fail |= run_tests(brw);
 300    }
 301
 302    return fail;
 303 }