Merge remote branch 'origin/master' into gallium_draw_llvm
[mesa.git] / src / mesa / drivers / dri / intel / intel_batchbuffer.c
1 /**************************************************************************
2 *
3 * Copyright 2006 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #include "intel_context.h"
29 #include "intel_batchbuffer.h"
30 #include "intel_decode.h"
31 #include "intel_reg.h"
32 #include "intel_bufmgr.h"
33 #include "intel_buffers.h"
34
35 void
36 intel_batchbuffer_reset(struct intel_batchbuffer *batch)
37 {
38 struct intel_context *intel = batch->intel;
39
40 if (batch->buf != NULL) {
41 dri_bo_unreference(batch->buf);
42 batch->buf = NULL;
43 }
44
45 if (!batch->buffer)
46 batch->buffer = malloc (intel->maxBatchSize);
47
48 batch->buf = dri_bo_alloc(intel->bufmgr, "batchbuffer",
49 intel->maxBatchSize, 4096);
50 if (batch->buffer)
51 batch->map = batch->buffer;
52 else {
53 dri_bo_map(batch->buf, GL_TRUE);
54 batch->map = batch->buf->virtual;
55 }
56 batch->size = intel->maxBatchSize;
57 batch->ptr = batch->map;
58 batch->dirty_state = ~0;
59 }
60
61 struct intel_batchbuffer *
62 intel_batchbuffer_alloc(struct intel_context *intel)
63 {
64 struct intel_batchbuffer *batch = calloc(sizeof(*batch), 1);
65
66 batch->intel = intel;
67 intel_batchbuffer_reset(batch);
68
69 return batch;
70 }
71
72 void
73 intel_batchbuffer_free(struct intel_batchbuffer *batch)
74 {
75 if (batch->buffer)
76 free (batch->buffer);
77 else {
78 if (batch->map) {
79 dri_bo_unmap(batch->buf);
80 batch->map = NULL;
81 }
82 }
83 dri_bo_unreference(batch->buf);
84 batch->buf = NULL;
85 free(batch);
86 }
87
88
89
90 /* TODO: Push this whole function into bufmgr.
91 */
92 static void
93 do_flush_locked(struct intel_batchbuffer *batch, GLuint used)
94 {
95 struct intel_context *intel = batch->intel;
96 int ret = 0;
97 int x_off = 0, y_off = 0;
98
99 if (batch->buffer)
100 dri_bo_subdata (batch->buf, 0, used, batch->buffer);
101 else
102 dri_bo_unmap(batch->buf);
103
104 batch->map = NULL;
105 batch->ptr = NULL;
106
107 if (!intel->no_hw)
108 dri_bo_exec(batch->buf, used, NULL, 0, (x_off & 0xffff) | (y_off << 16));
109
110 if (INTEL_DEBUG & DEBUG_BATCH) {
111 dri_bo_map(batch->buf, GL_FALSE);
112 intel_decode(batch->buf->virtual, used / 4, batch->buf->offset,
113 intel->intelScreen->deviceID);
114 dri_bo_unmap(batch->buf);
115
116 if (intel->vtbl.debug_batch != NULL)
117 intel->vtbl.debug_batch(intel);
118 }
119
120 if (ret != 0) {
121 exit(1);
122 }
123 intel->vtbl.new_batch(intel);
124 }
125
126 void
127 _intel_batchbuffer_flush(struct intel_batchbuffer *batch, const char *file,
128 int line)
129 {
130 struct intel_context *intel = batch->intel;
131 GLuint used = batch->ptr - batch->map;
132
133 if (!intel->using_dri2_swapbuffers &&
134 intel->first_post_swapbuffers_batch == NULL) {
135 intel->first_post_swapbuffers_batch = intel->batch->buf;
136 drm_intel_bo_reference(intel->first_post_swapbuffers_batch);
137 }
138
139 if (used == 0)
140 return;
141
142 if (INTEL_DEBUG & DEBUG_BATCH)
143 fprintf(stderr, "%s:%d: Batchbuffer flush with %db used\n", file, line,
144 used);
145
146 batch->reserved_space = 0;
147 /* Emit a flush if the bufmgr doesn't do it for us. */
148 if (intel->always_flush_cache) {
149 intel_batchbuffer_emit_mi_flush(batch);
150 used = batch->ptr - batch->map;
151 }
152
153 /* Round batchbuffer usage to 2 DWORDs. */
154
155 if ((used & 4) == 0) {
156 *(GLuint *) (batch->ptr) = 0; /* noop */
157 batch->ptr += 4;
158 used = batch->ptr - batch->map;
159 }
160
161 /* Mark the end of the buffer. */
162 *(GLuint *) (batch->ptr) = MI_BATCH_BUFFER_END;
163 batch->ptr += 4;
164 used = batch->ptr - batch->map;
165 assert (used <= batch->buf->size);
166
167 /* Workaround for recursive batchbuffer flushing: If the window is
168 * moved, we can get into a case where we try to flush during a
169 * flush. What happens is that when we try to grab the lock for
170 * the first flush, we detect that the window moved which then
171 * causes another flush (from the intel_draw_buffer() call in
172 * intelUpdatePageFlipping()). To work around this we reset the
173 * batchbuffer tail pointer before trying to get the lock. This
174 * prevent the nested buffer flush, but a better fix would be to
175 * avoid that in the first place. */
176 batch->ptr = batch->map;
177
178 if (intel->vtbl.finish_batch)
179 intel->vtbl.finish_batch(intel);
180
181 /* Check that we didn't just wrap our batchbuffer at a bad time. */
182 assert(!intel->no_batch_wrap);
183
184 batch->reserved_space = BATCH_RESERVED;
185
186 /* TODO: Just pass the relocation list and dma buffer up to the
187 * kernel.
188 */
189 do_flush_locked(batch, used);
190
191 if (INTEL_DEBUG & DEBUG_SYNC) {
192 fprintf(stderr, "waiting for idle\n");
193 dri_bo_map(batch->buf, GL_TRUE);
194 dri_bo_unmap(batch->buf);
195 }
196
197 /* Reset the buffer:
198 */
199 intel_batchbuffer_reset(batch);
200 }
201
202
203 /* This is the only way buffers get added to the validate list.
204 */
205 GLboolean
206 intel_batchbuffer_emit_reloc(struct intel_batchbuffer *batch,
207 dri_bo *buffer,
208 uint32_t read_domains, uint32_t write_domain,
209 uint32_t delta)
210 {
211 int ret;
212
213 assert(delta < buffer->size);
214
215 if (batch->ptr - batch->map > batch->buf->size)
216 printf ("bad relocation ptr %p map %p offset %d size %lu\n",
217 batch->ptr, batch->map, batch->ptr - batch->map, batch->buf->size);
218 ret = dri_bo_emit_reloc(batch->buf, read_domains, write_domain,
219 delta, batch->ptr - batch->map, buffer);
220
221 /*
222 * Using the old buffer offset, write in what the right data would be, in case
223 * the buffer doesn't move and we can short-circuit the relocation processing
224 * in the kernel
225 */
226 intel_batchbuffer_emit_dword (batch, buffer->offset + delta);
227
228 return GL_TRUE;
229 }
230
231 GLboolean
232 intel_batchbuffer_emit_reloc_fenced(struct intel_batchbuffer *batch,
233 drm_intel_bo *buffer,
234 uint32_t read_domains, uint32_t write_domain,
235 uint32_t delta)
236 {
237 int ret;
238
239 assert(delta < buffer->size);
240
241 if (batch->ptr - batch->map > batch->buf->size)
242 printf ("bad relocation ptr %p map %p offset %d size %lu\n",
243 batch->ptr, batch->map, batch->ptr - batch->map, batch->buf->size);
244 ret = drm_intel_bo_emit_reloc_fence(batch->buf, batch->ptr - batch->map,
245 buffer, delta,
246 read_domains, write_domain);
247
248 /*
249 * Using the old buffer offset, write in what the right data would
250 * be, in case the buffer doesn't move and we can short-circuit the
251 * relocation processing in the kernel
252 */
253 intel_batchbuffer_emit_dword (batch, buffer->offset + delta);
254
255 return GL_TRUE;
256 }
257
258 void
259 intel_batchbuffer_data(struct intel_batchbuffer *batch,
260 const void *data, GLuint bytes)
261 {
262 assert((bytes & 3) == 0);
263 intel_batchbuffer_require_space(batch, bytes);
264 __memcpy(batch->ptr, data, bytes);
265 batch->ptr += bytes;
266 }
267
268 /* Emit a pipelined flush to either flush render and texture cache for
269 * reading from a FBO-drawn texture, or flush so that frontbuffer
270 * render appears on the screen in DRI1.
271 *
272 * This is also used for the always_flush_cache driconf debug option.
273 */
274 void
275 intel_batchbuffer_emit_mi_flush(struct intel_batchbuffer *batch)
276 {
277 struct intel_context *intel = batch->intel;
278
279 if (intel->gen >= 4) {
280 BEGIN_BATCH(4);
281 OUT_BATCH(_3DSTATE_PIPE_CONTROL |
282 PIPE_CONTROL_INSTRUCTION_FLUSH |
283 PIPE_CONTROL_WRITE_FLUSH |
284 PIPE_CONTROL_NO_WRITE);
285 OUT_BATCH(0); /* write address */
286 OUT_BATCH(0); /* write data */
287 OUT_BATCH(0); /* write data */
288 ADVANCE_BATCH();
289 } else {
290 BEGIN_BATCH(1);
291 OUT_BATCH(MI_FLUSH);
292 ADVANCE_BATCH();
293 }
294 }