src/mesa/drivers/dri/intel/intel_blit.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28
  29 #include "main/mtypes.h"
  30 #include "main/context.h"
  31 #include "main/enums.h"
  32 #include "main/colormac.h"
  33
  34 #include "intel_blit.h"
  35 #include "intel_buffers.h"
  36 #include "intel_context.h"
  37 #include "intel_fbo.h"
  38 #include "intel_reg.h"
  39 #include "intel_regions.h"
  40 #include "intel_batchbuffer.h"
  41
  42 #define FILE_DEBUG_FLAG DEBUG_BLIT
  43
  44 static GLuint translate_raster_op(GLenum logicop)
  45 {
  46    switch(logicop) {
  47    case GL_CLEAR: return 0x00;
  48    case GL_AND: return 0x88;
  49    case GL_AND_REVERSE: return 0x44;
  50    case GL_COPY: return 0xCC;
  51    case GL_AND_INVERTED: return 0x22;
  52    case GL_NOOP: return 0xAA;
  53    case GL_XOR: return 0x66;
  54    case GL_OR: return 0xEE;
  55    case GL_NOR: return 0x11;
  56    case GL_EQUIV: return 0x99;
  57    case GL_INVERT: return 0x55;
  58    case GL_OR_REVERSE: return 0xDD;
  59    case GL_COPY_INVERTED: return 0x33;
  60    case GL_OR_INVERTED: return 0xBB;
  61    case GL_NAND: return 0x77;
  62    case GL_SET: return 0xFF;
  63    default: return 0;
  64    }
  65 }
  66
  67
  68 /* Copy BitBlt
  69  */
  70 GLboolean
  71 intelEmitCopyBlit(struct intel_context *intel,
  72                   GLuint cpp,
  73                   GLshort src_pitch,
  74                   dri_bo *src_buffer,
  75                   GLuint src_offset,
  76                   uint32_t src_tiling,
  77                   GLshort dst_pitch,
  78                   dri_bo *dst_buffer,
  79                   GLuint dst_offset,
  80                   uint32_t dst_tiling,
  81                   GLshort src_x, GLshort src_y,
  82                   GLshort dst_x, GLshort dst_y,
  83                   GLshort w, GLshort h,
  84                   GLenum logic_op)
  85 {
  86    GLuint CMD, BR13, pass = 0;
  87    int dst_y2 = dst_y + h;
  88    int dst_x2 = dst_x + w;
  89    dri_bo *aper_array[3];
  90    BATCH_LOCALS;
  91
  92    /* Blits are in a different ringbuffer so we don't use them. */
  93    if (intel->gen >= 6)
  94       return GL_FALSE;
  95
  96    if (dst_tiling != I915_TILING_NONE) {
  97       if (dst_offset & 4095)
  98          return GL_FALSE;
  99       if (dst_tiling == I915_TILING_Y)
 100          return GL_FALSE;
 101    }
 102    if (src_tiling != I915_TILING_NONE) {
 103       if (src_offset & 4095)
 104          return GL_FALSE;
 105       if (src_tiling == I915_TILING_Y)
 106          return GL_FALSE;
 107    }
 108
 109    /* do space check before going any further */
 110    do {
 111        aper_array[0] = intel->batch->buf;
 112        aper_array[1] = dst_buffer;
 113        aper_array[2] = src_buffer;
 114
 115        if (dri_bufmgr_check_aperture_space(aper_array, 3) != 0) {
 116            intel_batchbuffer_flush(intel->batch);
 117            pass++;
 118        } else
 119            break;
 120    } while (pass < 2);
 121
 122    intel_prepare_render(intel);
 123
 124    if (pass >= 2)
 125       return GL_FALSE;
 126
 127    intel_batchbuffer_require_space(intel->batch, 8 * 4);
 128    DBG("%s src:buf(%p)/%d+%d %d,%d dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n",
 129        __FUNCTION__,
 130        src_buffer, src_pitch, src_offset, src_x, src_y,
 131        dst_buffer, dst_pitch, dst_offset, dst_x, dst_y, w, h);
 132
 133    src_pitch *= cpp;
 134    dst_pitch *= cpp;
 135
 136    BR13 = translate_raster_op(logic_op) << 16;
 137
 138    switch (cpp) {
 139    case 1:
 140       CMD = XY_SRC_COPY_BLT_CMD;
 141       break;
 142    case 2:
 143       BR13 |= BR13_565;
 144       CMD = XY_SRC_COPY_BLT_CMD;
 145       break;
 146    case 4:
 147       BR13 |= BR13_8888;
 148       CMD = XY_SRC_COPY_BLT_CMD | XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB;
 149       break;
 150    default:
 151       return GL_FALSE;
 152    }
 153
 154 #ifndef I915
 155    if (dst_tiling != I915_TILING_NONE) {
 156       CMD |= XY_DST_TILED;
 157       dst_pitch /= 4;
 158    }
 159    if (src_tiling != I915_TILING_NONE) {
 160       CMD |= XY_SRC_TILED;
 161       src_pitch /= 4;
 162    }
 163 #endif
 164
 165    if (dst_y2 <= dst_y || dst_x2 <= dst_x) {
 166       return GL_TRUE;
 167    }
 168
 169    assert(dst_x < dst_x2);
 170    assert(dst_y < dst_y2);
 171
 172    BEGIN_BATCH(8);
 173    OUT_BATCH(CMD);
 174    OUT_BATCH(BR13 | (uint16_t)dst_pitch);
 175    OUT_BATCH((dst_y << 16) | dst_x);
 176    OUT_BATCH((dst_y2 << 16) | dst_x2);
 177    OUT_RELOC_FENCED(dst_buffer,
 178                     I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
 179                     dst_offset);
 180    OUT_BATCH((src_y << 16) | src_x);
 181    OUT_BATCH((uint16_t)src_pitch);
 182    OUT_RELOC_FENCED(src_buffer,
 183                     I915_GEM_DOMAIN_RENDER, 0,
 184                     src_offset);
 185    ADVANCE_BATCH();
 186
 187    intel_batchbuffer_emit_mi_flush(intel->batch);
 188
 189    return GL_TRUE;
 190 }
 191
 192
 193 /**
 194  * Use blitting to clear the renderbuffers named by 'flags'.
 195  * Note: we can't use the ctx->DrawBuffer->_ColorDrawBufferIndexes field
 196  * since that might include software renderbuffers or renderbuffers
 197  * which we're clearing with triangles.
 198  * \param mask  bitmask of BUFFER_BIT_* values indicating buffers to clear
 199  */
 200 void
 201 intelClearWithBlit(GLcontext *ctx, GLbitfield mask)
 202 {
 203    struct intel_context *intel = intel_context(ctx);
 204    struct gl_framebuffer *fb = ctx->DrawBuffer;
 205    GLuint clear_depth;
 206    GLboolean all;
 207    GLint cx, cy, cw, ch;
 208    BATCH_LOCALS;
 209
 210    /* Blits are in a different ringbuffer so we don't use them. */
 211    assert(intel->gen < 6);
 212
 213    /*
 214     * Compute values for clearing the buffers.
 215     */
 216    clear_depth = 0;
 217    if (mask & BUFFER_BIT_DEPTH) {
 218       clear_depth = (GLuint) (fb->_DepthMax * ctx->Depth.Clear);
 219    }
 220    if (mask & BUFFER_BIT_STENCIL) {
 221       clear_depth |= (ctx->Stencil.Clear & 0xff) << 24;
 222    }
 223
 224    cx = fb->_Xmin;
 225    if (fb->Name == 0)
 226       cy = ctx->DrawBuffer->Height - fb->_Ymax;
 227    else
 228       cy = fb->_Ymin;
 229    cw = fb->_Xmax - fb->_Xmin;
 230    ch = fb->_Ymax - fb->_Ymin;
 231
 232    if (cw == 0 || ch == 0)
 233       return;
 234
 235    GLuint buf;
 236    all = (cw == fb->Width && ch == fb->Height);
 237
 238    intel_prepare_render(intel);
 239
 240    /* Loop over all renderbuffers */
 241    for (buf = 0; buf < BUFFER_COUNT && mask; buf++) {
 242       const GLbitfield bufBit = 1 << buf;
 243       struct intel_renderbuffer *irb;
 244       drm_intel_bo *write_buffer;
 245       int x1, y1, x2, y2;
 246       uint32_t clear_val;
 247       uint32_t BR13, CMD;
 248       int pitch, cpp;
 249       drm_intel_bo *aper_array[2];
 250
 251       if (!(mask & bufBit))
 252          continue;
 253
 254       /* OK, clear this renderbuffer */
 255       irb = intel_get_renderbuffer(fb, buf);
 256       write_buffer = intel_region_buffer(intel, irb->region,
 257                                          all ? INTEL_WRITE_FULL :
 258                                          INTEL_WRITE_PART);
 259       x1 = cx + irb->region->draw_x;
 260       y1 = cy + irb->region->draw_y;
 261       x2 = cx + cw + irb->region->draw_x;
 262       y2 = cy + ch + irb->region->draw_y;
 263
 264       pitch = irb->region->pitch;
 265       cpp = irb->region->cpp;
 266
 267       DBG("%s dst:buf(%p)/%d %d,%d sz:%dx%d\n",
 268           __FUNCTION__,
 269           irb->region->buffer, (pitch * cpp),
 270           x1, y1, x2 - x1, y2 - y1);
 271
 272       BR13 = 0xf0 << 16;
 273       CMD = XY_COLOR_BLT_CMD;
 274
 275       /* Setup the blit command */
 276       if (cpp == 4) {
 277          BR13 |= BR13_8888;
 278          if (buf == BUFFER_DEPTH || buf == BUFFER_STENCIL) {
 279             if (mask & BUFFER_BIT_DEPTH)
 280                CMD |= XY_BLT_WRITE_RGB;
 281             if (mask & BUFFER_BIT_STENCIL)
 282                CMD |= XY_BLT_WRITE_ALPHA;
 283          } else {
 284             /* clearing RGBA */
 285             CMD |= XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB;
 286          }
 287       } else {
 288          ASSERT(cpp == 2);
 289          BR13 |= BR13_565;
 290       }
 291
 292       assert(irb->region->tiling != I915_TILING_Y);
 293
 294 #ifndef I915
 295       if (irb->region->tiling != I915_TILING_NONE) {
 296          CMD |= XY_DST_TILED;
 297          pitch /= 4;
 298       }
 299 #endif
 300       BR13 |= (pitch * cpp);
 301
 302       if (buf == BUFFER_DEPTH || buf == BUFFER_STENCIL) {
 303          clear_val = clear_depth;
 304       } else {
 305          uint8_t clear[4];
 306          GLclampf *color = ctx->Color.ClearColor;
 307
 308          CLAMPED_FLOAT_TO_UBYTE(clear[0], color[0]);
 309          CLAMPED_FLOAT_TO_UBYTE(clear[1], color[1]);
 310          CLAMPED_FLOAT_TO_UBYTE(clear[2], color[2]);
 311          CLAMPED_FLOAT_TO_UBYTE(clear[3], color[3]);
 312
 313          switch (irb->Base.Format) {
 314          case MESA_FORMAT_ARGB8888:
 315          case MESA_FORMAT_XRGB8888:
 316             clear_val = PACK_COLOR_8888(clear[3], clear[0],
 317                                         clear[1], clear[2]);
 318             break;
 319          case MESA_FORMAT_RGB565:
 320             clear_val = PACK_COLOR_565(clear[0], clear[1], clear[2]);
 321             break;
 322          case MESA_FORMAT_ARGB4444:
 323             clear_val = PACK_COLOR_4444(clear[3], clear[0],
 324                                         clear[1], clear[2]);
 325             break;
 326          case MESA_FORMAT_ARGB1555:
 327             clear_val = PACK_COLOR_1555(clear[3], clear[0],
 328                                         clear[1], clear[2]);
 329             break;
 330          default:
 331             _mesa_problem(ctx, "Unexpected renderbuffer format: %d\n",
 332                           irb->Base.Format);
 333             clear_val = 0;
 334          }
 335       }
 336
 337       assert(x1 < x2);
 338       assert(y1 < y2);
 339
 340       /* do space check before going any further */
 341       aper_array[0] = intel->batch->buf;
 342       aper_array[1] = write_buffer;
 343
 344       if (drm_intel_bufmgr_check_aperture_space(aper_array,
 345                                                 ARRAY_SIZE(aper_array)) != 0) {
 346          intel_batchbuffer_flush(intel->batch);
 347       }
 348
 349       BEGIN_BATCH(6);
 350       OUT_BATCH(CMD);
 351       OUT_BATCH(BR13);
 352       OUT_BATCH((y1 << 16) | x1);
 353       OUT_BATCH((y2 << 16) | x2);
 354       OUT_RELOC_FENCED(write_buffer,
 355                        I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
 356                        0);
 357       OUT_BATCH(clear_val);
 358       ADVANCE_BATCH();
 359
 360       if (buf == BUFFER_DEPTH || buf == BUFFER_STENCIL)
 361          mask &= ~(BUFFER_BIT_DEPTH | BUFFER_BIT_STENCIL);
 362       else
 363          mask &= ~bufBit;    /* turn off bit, for faster loop exit */
 364    }
 365 }
 366
 367 GLboolean
 368 intelEmitImmediateColorExpandBlit(struct intel_context *intel,
 369                                   GLuint cpp,
 370                                   GLubyte *src_bits, GLuint src_size,
 371                                   GLuint fg_color,
 372                                   GLshort dst_pitch,
 373                                   dri_bo *dst_buffer,
 374                                   GLuint dst_offset,
 375                                   uint32_t dst_tiling,
 376                                   GLshort x, GLshort y,
 377                                   GLshort w, GLshort h,
 378                                   GLenum logic_op)
 379 {
 380    int dwords = ALIGN(src_size, 8) / 4;
 381    uint32_t opcode, br13, blit_cmd;
 382
 383    /* Blits are in a different ringbuffer so we don't use them. */
 384    if (intel->gen >= 6)
 385       return GL_FALSE;
 386
 387    if (dst_tiling != I915_TILING_NONE) {
 388       if (dst_offset & 4095)
 389          return GL_FALSE;
 390       if (dst_tiling == I915_TILING_Y)
 391          return GL_FALSE;
 392    }
 393
 394    assert( logic_op - GL_CLEAR >= 0 );
 395    assert( logic_op - GL_CLEAR < 0x10 );
 396    assert(dst_pitch > 0);
 397
 398    if (w < 0 || h < 0)
 399       return GL_TRUE;
 400
 401    dst_pitch *= cpp;
 402
 403    DBG("%s dst:buf(%p)/%d+%d %d,%d sz:%dx%d, %d bytes %d dwords\n",
 404        __FUNCTION__,
 405        dst_buffer, dst_pitch, dst_offset, x, y, w, h, src_size, dwords);
 406
 407    intel_batchbuffer_require_space( intel->batch,
 408                                     (8 * 4) +
 409                                     (3 * 4) +
 410                                     dwords * 4 );
 411
 412    opcode = XY_SETUP_BLT_CMD;
 413    if (cpp == 4)
 414       opcode |= XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB;
 415 #ifndef I915
 416    if (dst_tiling != I915_TILING_NONE) {
 417       opcode |= XY_DST_TILED;
 418       dst_pitch /= 4;
 419    }
 420 #endif
 421
 422    br13 = dst_pitch | (translate_raster_op(logic_op) << 16) | (1 << 29);
 423    if (cpp == 2)
 424       br13 |= BR13_565;
 425    else
 426       br13 |= BR13_8888;
 427
 428    blit_cmd = XY_TEXT_IMMEDIATE_BLIT_CMD | XY_TEXT_BYTE_PACKED; /* packing? */
 429    if (dst_tiling != I915_TILING_NONE)
 430       blit_cmd |= XY_DST_TILED;
 431
 432    BEGIN_BATCH(8 + 3);
 433    OUT_BATCH(opcode);
 434    OUT_BATCH(br13);
 435    OUT_BATCH((0 << 16) | 0); /* clip x1, y1 */
 436    OUT_BATCH((100 << 16) | 100); /* clip x2, y2 */
 437    OUT_RELOC_FENCED(dst_buffer,
 438                     I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
 439                     dst_offset);
 440    OUT_BATCH(0); /* bg */
 441    OUT_BATCH(fg_color); /* fg */
 442    OUT_BATCH(0); /* pattern base addr */
 443
 444    OUT_BATCH(blit_cmd | ((3 - 2) + dwords));
 445    OUT_BATCH((y << 16) | x);
 446    OUT_BATCH(((y + h) << 16) | (x + w));
 447    ADVANCE_BATCH();
 448
 449    intel_batchbuffer_data( intel->batch,
 450                            src_bits,
 451                            dwords * 4 );
 452
 453    intel_batchbuffer_emit_mi_flush(intel->batch);
 454
 455    return GL_TRUE;
 456 }
 457
 458 /* We don't have a memmove-type blit like some other hardware, so we'll do a
 459  * rectangular blit covering a large space, then emit 1-scanline blit at the
 460  * end to cover the last if we need.
 461  */
 462 void
 463 intel_emit_linear_blit(struct intel_context *intel,
 464                        drm_intel_bo *dst_bo,
 465                        unsigned int dst_offset,
 466                        drm_intel_bo *src_bo,
 467                        unsigned int src_offset,
 468                        unsigned int size)
 469 {
 470    GLuint pitch, height;
 471    GLboolean ok;
 472
 473    /* Blits are in a different ringbuffer so we don't use them. */
 474    assert(intel->gen < 6);
 475
 476    /* The pitch is a signed value. */
 477    pitch = MIN2(size, (1 << 15) - 1);
 478    height = size / pitch;
 479    ok = intelEmitCopyBlit(intel, 1,
 480                           pitch, src_bo, src_offset, I915_TILING_NONE,
 481                           pitch, dst_bo, dst_offset, I915_TILING_NONE,
 482                           0, 0, /* src x/y */
 483                           0, 0, /* dst x/y */
 484                           pitch, height, /* w, h */
 485                           GL_COPY);
 486    assert(ok);
 487
 488    src_offset += pitch * height;
 489    dst_offset += pitch * height;
 490    size -= pitch * height;
 491    assert (size < (1 << 15));
 492    if (size != 0) {
 493       ok = intelEmitCopyBlit(intel, 1,
 494                              size, src_bo, src_offset, I915_TILING_NONE,
 495                              size, dst_bo, dst_offset, I915_TILING_NONE,
 496                              0, 0, /* src x/y */
 497                              0, 0, /* dst x/y */
 498                              size, 1, /* w, h */
 499                              GL_COPY);
 500       assert(ok);
 501    }
 502 }