src/mesa/drivers/dri/intel/intel_blit.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28
  29 #include "main/mtypes.h"
  30 #include "main/context.h"
  31 #include "main/enums.h"
  32 #include "main/colormac.h"
  33
  34 #include "intel_blit.h"
  35 #include "intel_buffers.h"
  36 #include "intel_context.h"
  37 #include "intel_fbo.h"
  38 #include "intel_reg.h"
  39 #include "intel_regions.h"
  40 #include "intel_batchbuffer.h"
  41
  42 #define FILE_DEBUG_FLAG DEBUG_BLIT
  43
  44 static GLuint translate_raster_op(GLenum logicop)
  45 {
  46    switch(logicop) {
  47    case GL_CLEAR: return 0x00;
  48    case GL_AND: return 0x88;
  49    case GL_AND_REVERSE: return 0x44;
  50    case GL_COPY: return 0xCC;
  51    case GL_AND_INVERTED: return 0x22;
  52    case GL_NOOP: return 0xAA;
  53    case GL_XOR: return 0x66;
  54    case GL_OR: return 0xEE;
  55    case GL_NOR: return 0x11;
  56    case GL_EQUIV: return 0x99;
  57    case GL_INVERT: return 0x55;
  58    case GL_OR_REVERSE: return 0xDD;
  59    case GL_COPY_INVERTED: return 0x33;
  60    case GL_OR_INVERTED: return 0xBB;
  61    case GL_NAND: return 0x77;
  62    case GL_SET: return 0xFF;
  63    default: return 0;
  64    }
  65 }
  66
  67
  68 /* Copy BitBlt
  69  */
  70 GLboolean
  71 intelEmitCopyBlit(struct intel_context *intel,
  72                   GLuint cpp,
  73                   GLshort src_pitch,
  74                   dri_bo *src_buffer,
  75                   GLuint src_offset,
  76                   uint32_t src_tiling,
  77                   GLshort dst_pitch,
  78                   dri_bo *dst_buffer,
  79                   GLuint dst_offset,
  80                   uint32_t dst_tiling,
  81                   GLshort src_x, GLshort src_y,
  82                   GLshort dst_x, GLshort dst_y,
  83                   GLshort w, GLshort h,
  84                   GLenum logic_op)
  85 {
  86    GLuint CMD, BR13, pass = 0;
  87    int dst_y2 = dst_y + h;
  88    int dst_x2 = dst_x + w;
  89    dri_bo *aper_array[3];
  90    BATCH_LOCALS;
  91
  92    /* Blits are in a different ringbuffer so we don't use them. */
  93    if (intel->gen >= 6)
  94       return GL_FALSE;
  95
  96    if (dst_tiling != I915_TILING_NONE) {
  97       if (dst_offset & 4095)
  98          return GL_FALSE;
  99       if (dst_tiling == I915_TILING_Y)
 100          return GL_FALSE;
 101    }
 102    if (src_tiling != I915_TILING_NONE) {
 103       if (src_offset & 4095)
 104          return GL_FALSE;
 105       if (src_tiling == I915_TILING_Y)
 106          return GL_FALSE;
 107    }
 108
 109    /* do space check before going any further */
 110    do {
 111        aper_array[0] = intel->batch->buf;
 112        aper_array[1] = dst_buffer;
 113        aper_array[2] = src_buffer;
 114
 115        if (dri_bufmgr_check_aperture_space(aper_array, 3) != 0) {
 116            intel_batchbuffer_flush(intel->batch);
 117            pass++;
 118        } else
 119            break;
 120    } while (pass < 2);
 121
 122    if (pass >= 2)
 123       return GL_FALSE;
 124
 125    intel_batchbuffer_require_space(intel->batch, 8 * 4);
 126    DBG("%s src:buf(%p)/%d+%d %d,%d dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n",
 127        __FUNCTION__,
 128        src_buffer, src_pitch, src_offset, src_x, src_y,
 129        dst_buffer, dst_pitch, dst_offset, dst_x, dst_y, w, h);
 130
 131    src_pitch *= cpp;
 132    dst_pitch *= cpp;
 133
 134    BR13 = translate_raster_op(logic_op) << 16;
 135
 136    switch (cpp) {
 137    case 1:
 138       CMD = XY_SRC_COPY_BLT_CMD;
 139       break;
 140    case 2:
 141       BR13 |= BR13_565;
 142       CMD = XY_SRC_COPY_BLT_CMD;
 143       break;
 144    case 4:
 145       BR13 |= BR13_8888;
 146       CMD = XY_SRC_COPY_BLT_CMD | XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB;
 147       break;
 148    default:
 149       return GL_FALSE;
 150    }
 151
 152 #ifndef I915
 153    if (dst_tiling != I915_TILING_NONE) {
 154       CMD |= XY_DST_TILED;
 155       dst_pitch /= 4;
 156    }
 157    if (src_tiling != I915_TILING_NONE) {
 158       CMD |= XY_SRC_TILED;
 159       src_pitch /= 4;
 160    }
 161 #endif
 162
 163    if (dst_y2 <= dst_y || dst_x2 <= dst_x) {
 164       return GL_TRUE;
 165    }
 166
 167    assert(dst_x < dst_x2);
 168    assert(dst_y < dst_y2);
 169
 170    BEGIN_BATCH(8);
 171    OUT_BATCH(CMD);
 172    OUT_BATCH(BR13 | (uint16_t)dst_pitch);
 173    OUT_BATCH((dst_y << 16) | dst_x);
 174    OUT_BATCH((dst_y2 << 16) | dst_x2);
 175    OUT_RELOC_FENCED(dst_buffer,
 176                     I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
 177                     dst_offset);
 178    OUT_BATCH((src_y << 16) | src_x);
 179    OUT_BATCH((uint16_t)src_pitch);
 180    OUT_RELOC_FENCED(src_buffer,
 181                     I915_GEM_DOMAIN_RENDER, 0,
 182                     src_offset);
 183    ADVANCE_BATCH();
 184
 185    intel_batchbuffer_emit_mi_flush(intel->batch);
 186
 187    return GL_TRUE;
 188 }
 189
 190
 191 /**
 192  * Use blitting to clear the renderbuffers named by 'flags'.
 193  * Note: we can't use the ctx->DrawBuffer->_ColorDrawBufferIndexes field
 194  * since that might include software renderbuffers or renderbuffers
 195  * which we're clearing with triangles.
 196  * \param mask  bitmask of BUFFER_BIT_* values indicating buffers to clear
 197  */
 198 void
 199 intelClearWithBlit(GLcontext *ctx, GLbitfield mask)
 200 {
 201    struct intel_context *intel = intel_context(ctx);
 202    struct gl_framebuffer *fb = ctx->DrawBuffer;
 203    GLuint clear_depth;
 204    GLboolean all;
 205    GLint cx, cy, cw, ch;
 206    BATCH_LOCALS;
 207
 208    /* Blits are in a different ringbuffer so we don't use them. */
 209    assert(intel->gen < 6);
 210
 211    /*
 212     * Compute values for clearing the buffers.
 213     */
 214    clear_depth = 0;
 215    if (mask & BUFFER_BIT_DEPTH) {
 216       clear_depth = (GLuint) (fb->_DepthMax * ctx->Depth.Clear);
 217    }
 218    if (mask & BUFFER_BIT_STENCIL) {
 219       clear_depth |= (ctx->Stencil.Clear & 0xff) << 24;
 220    }
 221
 222    cx = fb->_Xmin;
 223    if (fb->Name == 0)
 224       cy = ctx->DrawBuffer->Height - fb->_Ymax;
 225    else
 226       cy = fb->_Ymin;
 227    cw = fb->_Xmax - fb->_Xmin;
 228    ch = fb->_Ymax - fb->_Ymin;
 229
 230    if (cw == 0 || ch == 0)
 231       return;
 232
 233    GLuint buf;
 234    all = (cw == fb->Width && ch == fb->Height);
 235
 236    /* Loop over all renderbuffers */
 237    for (buf = 0; buf < BUFFER_COUNT && mask; buf++) {
 238       const GLbitfield bufBit = 1 << buf;
 239       struct intel_renderbuffer *irb;
 240       drm_intel_bo *write_buffer;
 241       int x1, y1, x2, y2;
 242       uint32_t clear_val;
 243       uint32_t BR13, CMD;
 244       int pitch, cpp;
 245       drm_intel_bo *aper_array[2];
 246
 247       if (!(mask & bufBit))
 248          continue;
 249
 250       /* OK, clear this renderbuffer */
 251       irb = intel_get_renderbuffer(fb, buf);
 252       write_buffer = intel_region_buffer(intel, irb->region,
 253                                          all ? INTEL_WRITE_FULL :
 254                                          INTEL_WRITE_PART);
 255       x1 = cx + irb->region->draw_x;
 256       y1 = cy + irb->region->draw_y;
 257       x2 = cx + cw + irb->region->draw_x;
 258       y2 = cy + ch + irb->region->draw_y;
 259
 260       pitch = irb->region->pitch;
 261       cpp = irb->region->cpp;
 262
 263       DBG("%s dst:buf(%p)/%d %d,%d sz:%dx%d\n",
 264           __FUNCTION__,
 265           irb->region->buffer, (pitch * cpp),
 266           x1, y1, x2 - x1, y2 - y1);
 267
 268       BR13 = 0xf0 << 16;
 269       CMD = XY_COLOR_BLT_CMD;
 270
 271       /* Setup the blit command */
 272       if (cpp == 4) {
 273          BR13 |= BR13_8888;
 274          if (buf == BUFFER_DEPTH || buf == BUFFER_STENCIL) {
 275             if (mask & BUFFER_BIT_DEPTH)
 276                CMD |= XY_BLT_WRITE_RGB;
 277             if (mask & BUFFER_BIT_STENCIL)
 278                CMD |= XY_BLT_WRITE_ALPHA;
 279          } else {
 280             /* clearing RGBA */
 281             CMD |= XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB;
 282          }
 283       } else {
 284          ASSERT(cpp == 2);
 285          BR13 |= BR13_565;
 286       }
 287
 288       assert(irb->region->tiling != I915_TILING_Y);
 289
 290 #ifndef I915
 291       if (irb->region->tiling != I915_TILING_NONE) {
 292          CMD |= XY_DST_TILED;
 293          pitch /= 4;
 294       }
 295 #endif
 296       BR13 |= (pitch * cpp);
 297
 298       if (buf == BUFFER_DEPTH || buf == BUFFER_STENCIL) {
 299          clear_val = clear_depth;
 300       } else {
 301          uint8_t clear[4];
 302          GLclampf *color = ctx->Color.ClearColor;
 303
 304          CLAMPED_FLOAT_TO_UBYTE(clear[0], color[0]);
 305          CLAMPED_FLOAT_TO_UBYTE(clear[1], color[1]);
 306          CLAMPED_FLOAT_TO_UBYTE(clear[2], color[2]);
 307          CLAMPED_FLOAT_TO_UBYTE(clear[3], color[3]);
 308
 309          switch (irb->Base.Format) {
 310          case MESA_FORMAT_ARGB8888:
 311          case MESA_FORMAT_XRGB8888:
 312             clear_val = PACK_COLOR_8888(clear[3], clear[0],
 313                                         clear[1], clear[2]);
 314             break;
 315          case MESA_FORMAT_RGB565:
 316             clear_val = PACK_COLOR_565(clear[0], clear[1], clear[2]);
 317             break;
 318          case MESA_FORMAT_ARGB4444:
 319             clear_val = PACK_COLOR_4444(clear[3], clear[0],
 320                                         clear[1], clear[2]);
 321             break;
 322          case MESA_FORMAT_ARGB1555:
 323             clear_val = PACK_COLOR_1555(clear[3], clear[0],
 324                                         clear[1], clear[2]);
 325             break;
 326          default:
 327             _mesa_problem(ctx, "Unexpected renderbuffer format: %d\n",
 328                           irb->Base.Format);
 329             clear_val = 0;
 330          }
 331       }
 332
 333       assert(x1 < x2);
 334       assert(y1 < y2);
 335
 336       /* do space check before going any further */
 337       aper_array[0] = intel->batch->buf;
 338       aper_array[1] = write_buffer;
 339
 340       if (drm_intel_bufmgr_check_aperture_space(aper_array,
 341                                                 ARRAY_SIZE(aper_array)) != 0) {
 342          intel_batchbuffer_flush(intel->batch);
 343       }
 344
 345       BEGIN_BATCH(6);
 346       OUT_BATCH(CMD);
 347       OUT_BATCH(BR13);
 348       OUT_BATCH((y1 << 16) | x1);
 349       OUT_BATCH((y2 << 16) | x2);
 350       OUT_RELOC_FENCED(write_buffer,
 351                        I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
 352                        0);
 353       OUT_BATCH(clear_val);
 354       ADVANCE_BATCH();
 355
 356       if (buf == BUFFER_DEPTH || buf == BUFFER_STENCIL)
 357          mask &= ~(BUFFER_BIT_DEPTH | BUFFER_BIT_STENCIL);
 358       else
 359          mask &= ~bufBit;    /* turn off bit, for faster loop exit */
 360    }
 361 }
 362
 363 GLboolean
 364 intelEmitImmediateColorExpandBlit(struct intel_context *intel,
 365                                   GLuint cpp,
 366                                   GLubyte *src_bits, GLuint src_size,
 367                                   GLuint fg_color,
 368                                   GLshort dst_pitch,
 369                                   dri_bo *dst_buffer,
 370                                   GLuint dst_offset,
 371                                   uint32_t dst_tiling,
 372                                   GLshort x, GLshort y,
 373                                   GLshort w, GLshort h,
 374                                   GLenum logic_op)
 375 {
 376    int dwords = ALIGN(src_size, 8) / 4;
 377    uint32_t opcode, br13, blit_cmd;
 378
 379    /* Blits are in a different ringbuffer so we don't use them. */
 380    if (intel->gen >= 6)
 381       return GL_FALSE;
 382
 383    if (dst_tiling != I915_TILING_NONE) {
 384       if (dst_offset & 4095)
 385          return GL_FALSE;
 386       if (dst_tiling == I915_TILING_Y)
 387          return GL_FALSE;
 388    }
 389
 390    assert( logic_op - GL_CLEAR >= 0 );
 391    assert( logic_op - GL_CLEAR < 0x10 );
 392    assert(dst_pitch > 0);
 393
 394    if (w < 0 || h < 0)
 395       return GL_TRUE;
 396
 397    dst_pitch *= cpp;
 398
 399    DBG("%s dst:buf(%p)/%d+%d %d,%d sz:%dx%d, %d bytes %d dwords\n",
 400        __FUNCTION__,
 401        dst_buffer, dst_pitch, dst_offset, x, y, w, h, src_size, dwords);
 402
 403    intel_batchbuffer_require_space( intel->batch,
 404                                     (8 * 4) +
 405                                     (3 * 4) +
 406                                     dwords * 4 );
 407
 408    opcode = XY_SETUP_BLT_CMD;
 409    if (cpp == 4)
 410       opcode |= XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB;
 411 #ifndef I915
 412    if (dst_tiling != I915_TILING_NONE) {
 413       opcode |= XY_DST_TILED;
 414       dst_pitch /= 4;
 415    }
 416 #endif
 417
 418    br13 = dst_pitch | (translate_raster_op(logic_op) << 16) | (1 << 29);
 419    if (cpp == 2)
 420       br13 |= BR13_565;
 421    else
 422       br13 |= BR13_8888;
 423
 424    blit_cmd = XY_TEXT_IMMEDIATE_BLIT_CMD | XY_TEXT_BYTE_PACKED; /* packing? */
 425    if (dst_tiling != I915_TILING_NONE)
 426       blit_cmd |= XY_DST_TILED;
 427
 428    BEGIN_BATCH(8 + 3);
 429    OUT_BATCH(opcode);
 430    OUT_BATCH(br13);
 431    OUT_BATCH((0 << 16) | 0); /* clip x1, y1 */
 432    OUT_BATCH((100 << 16) | 100); /* clip x2, y2 */
 433    OUT_RELOC_FENCED(dst_buffer,
 434                     I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
 435                     dst_offset);
 436    OUT_BATCH(0); /* bg */
 437    OUT_BATCH(fg_color); /* fg */
 438    OUT_BATCH(0); /* pattern base addr */
 439
 440    OUT_BATCH(blit_cmd | ((3 - 2) + dwords));
 441    OUT_BATCH((y << 16) | x);
 442    OUT_BATCH(((y + h) << 16) | (x + w));
 443    ADVANCE_BATCH();
 444
 445    intel_batchbuffer_data( intel->batch,
 446                            src_bits,
 447                            dwords * 4 );
 448
 449    intel_batchbuffer_emit_mi_flush(intel->batch);
 450
 451    return GL_TRUE;
 452 }
 453
 454 /* We don't have a memmove-type blit like some other hardware, so we'll do a
 455  * rectangular blit covering a large space, then emit 1-scanline blit at the
 456  * end to cover the last if we need.
 457  */
 458 void
 459 intel_emit_linear_blit(struct intel_context *intel,
 460                        drm_intel_bo *dst_bo,
 461                        unsigned int dst_offset,
 462                        drm_intel_bo *src_bo,
 463                        unsigned int src_offset,
 464                        unsigned int size)
 465 {
 466    GLuint pitch, height;
 467    GLboolean ok;
 468
 469    /* Blits are in a different ringbuffer so we don't use them. */
 470    assert(intel->gen < 6);
 471
 472    /* The pitch is a signed value. */
 473    pitch = MIN2(size, (1 << 15) - 1);
 474    height = size / pitch;
 475    ok = intelEmitCopyBlit(intel, 1,
 476                           pitch, src_bo, src_offset, I915_TILING_NONE,
 477                           pitch, dst_bo, dst_offset, I915_TILING_NONE,
 478                           0, 0, /* src x/y */
 479                           0, 0, /* dst x/y */
 480                           pitch, height, /* w, h */
 481                           GL_COPY);
 482    assert(ok);
 483
 484    src_offset += pitch * height;
 485    dst_offset += pitch * height;
 486    size -= pitch * height;
 487    assert (size < (1 << 15));
 488    if (size != 0) {
 489       ok = intelEmitCopyBlit(intel, 1,
 490                              size, src_bo, src_offset, I915_TILING_NONE,
 491                              size, dst_bo, dst_offset, I915_TILING_NONE,
 492                              0, 0, /* src x/y */
 493                              0, 0, /* dst x/y */
 494                              size, 1, /* w, h */
 495                              GL_COPY);
 496       assert(ok);
 497    }
 498 }