Merge branch 'mesa_7_7_branch'
[mesa.git] / src / mesa / drivers / dri / intel / intel_context.h
1 /**************************************************************************
2 *
3 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #ifndef INTELCONTEXT_INC
29 #define INTELCONTEXT_INC
30
31
32
33 #include "main/mtypes.h"
34 #include "main/mm.h"
35 #include "texmem.h"
36 #include "dri_metaops.h"
37 #include "drm.h"
38 #include "intel_bufmgr.h"
39
40 #include "intel_screen.h"
41 #include "intel_tex_obj.h"
42 #include "i915_drm.h"
43 #include "tnl/t_vertex.h"
44
45 #define TAG(x) intel##x
46 #include "tnl_dd/t_dd_vertex.h"
47 #undef TAG
48
49 #define DV_PF_555 (1<<8)
50 #define DV_PF_565 (2<<8)
51 #define DV_PF_8888 (3<<8)
52 #define DV_PF_4444 (8<<8)
53 #define DV_PF_1555 (9<<8)
54
55 struct intel_region;
56 struct intel_context;
57
58 typedef void (*intel_tri_func) (struct intel_context *, intelVertex *,
59 intelVertex *, intelVertex *);
60 typedef void (*intel_line_func) (struct intel_context *, intelVertex *,
61 intelVertex *);
62 typedef void (*intel_point_func) (struct intel_context *, intelVertex *);
63
64 /**
65 * Bits for intel->Fallback field
66 */
67 /*@{*/
68 #define INTEL_FALLBACK_DRAW_BUFFER 0x1
69 #define INTEL_FALLBACK_READ_BUFFER 0x2
70 #define INTEL_FALLBACK_DEPTH_BUFFER 0x4
71 #define INTEL_FALLBACK_STENCIL_BUFFER 0x8
72 #define INTEL_FALLBACK_USER 0x10
73 #define INTEL_FALLBACK_RENDERMODE 0x20
74 #define INTEL_FALLBACK_TEXTURE 0x40
75 #define INTEL_FALLBACK_DRIVER 0x1000 /**< first for drivers */
76 /*@}*/
77
78 extern void intelFallback(struct intel_context *intel, GLbitfield bit,
79 GLboolean mode);
80 #define FALLBACK( intel, bit, mode ) intelFallback( intel, bit, mode )
81
82
83 #define INTEL_WRITE_PART 0x1
84 #define INTEL_WRITE_FULL 0x2
85 #define INTEL_READ 0x4
86
87 #define INTEL_MAX_FIXUP 64
88
89 struct intel_sync_object {
90 struct gl_sync_object Base;
91
92 /** Batch associated with this sync object */
93 drm_intel_bo *bo;
94 };
95
96 /**
97 * intel_context is derived from Mesa's context class: GLcontext.
98 */
99 struct intel_context
100 {
101 GLcontext ctx; /**< base class, must be first field */
102
103 struct
104 {
105 void (*destroy) (struct intel_context * intel);
106 void (*emit_state) (struct intel_context * intel);
107 void (*finish_batch) (struct intel_context * intel);
108 void (*new_batch) (struct intel_context * intel);
109 void (*emit_invarient_state) (struct intel_context * intel);
110 void (*update_texture_state) (struct intel_context * intel);
111
112 void (*render_start) (struct intel_context * intel);
113 void (*render_prevalidate) (struct intel_context * intel);
114 void (*set_draw_region) (struct intel_context * intel,
115 struct intel_region * draw_regions[],
116 struct intel_region * depth_region,
117 GLuint num_regions);
118
119 void (*reduced_primitive_state) (struct intel_context * intel,
120 GLenum rprim);
121
122 GLboolean (*check_vertex_size) (struct intel_context * intel,
123 GLuint expected);
124 void (*invalidate_state) (struct intel_context *intel,
125 GLuint new_state);
126
127
128 /* Metaops:
129 */
130 void (*install_meta_state) (struct intel_context * intel);
131 void (*leave_meta_state) (struct intel_context * intel);
132
133 void (*meta_draw_region) (struct intel_context * intel,
134 struct intel_region * draw_region,
135 struct intel_region * depth_region);
136
137 void (*meta_color_mask) (struct intel_context * intel, GLboolean);
138
139 void (*meta_stencil_replace) (struct intel_context * intel,
140 GLuint mask, GLuint clear);
141
142 void (*meta_depth_replace) (struct intel_context * intel);
143
144 void (*meta_texture_blend_replace) (struct intel_context * intel);
145
146 void (*meta_no_stencil_write) (struct intel_context * intel);
147 void (*meta_no_depth_write) (struct intel_context * intel);
148 void (*meta_no_texture) (struct intel_context * intel);
149
150 void (*meta_import_pixel_state) (struct intel_context * intel);
151 void (*meta_frame_buffer_texture) (struct intel_context *intel,
152 GLint xoff, GLint yoff);
153
154 GLboolean(*meta_tex_rect_source) (struct intel_context * intel,
155 dri_bo * buffer,
156 GLuint offset,
157 GLuint pitch,
158 GLuint height,
159 GLenum format, GLenum type);
160
161 void (*assert_not_dirty) (struct intel_context *intel);
162
163 void (*debug_batch)(struct intel_context *intel);
164 } vtbl;
165
166 struct dri_metaops meta;
167
168 GLbitfield Fallback; /**< mask of INTEL_FALLBACK_x bits */
169 GLuint NewGLState;
170
171 dri_bufmgr *bufmgr;
172 unsigned int maxBatchSize;
173
174 /**
175 * Generation number of the hardware: 2 is 8xx, 3 is 9xx pre-965, 4 is 965.
176 */
177 int gen;
178 GLboolean needs_ff_sync;
179 GLboolean is_ironlake;
180 GLboolean is_g4x;
181 GLboolean is_945;
182 GLboolean has_luminance_srgb;
183
184 int urb_size;
185
186 struct intel_batchbuffer *batch;
187 drm_intel_bo *first_post_swapbuffers_batch;
188 GLboolean no_batch_wrap;
189
190 struct
191 {
192 GLuint id;
193 uint32_t primitive; /**< Current hardware primitive type */
194 void (*flush) (struct intel_context *);
195 GLubyte *start_ptr; /**< for i8xx */
196 dri_bo *vb_bo;
197 uint8_t *vb;
198 unsigned int start_offset; /**< Byte offset of primitive sequence */
199 unsigned int current_offset; /**< Byte offset of next vertex */
200 unsigned int count; /**< Number of vertices in current primitive */
201 } prim;
202
203 GLuint stats_wm;
204 GLboolean locked;
205 char *prevLockFile;
206 int prevLockLine;
207
208 /* Offsets of fields within the current vertex:
209 */
210 GLuint coloroffset;
211 GLuint specoffset;
212 GLuint wpos_offset;
213 GLuint wpos_size;
214
215 struct tnl_attr_map vertex_attrs[VERT_ATTRIB_MAX];
216 GLuint vertex_attr_count;
217
218 GLfloat polygon_offset_scale; /* dependent on depth_scale, bpp */
219
220 GLboolean hw_stencil;
221 GLboolean hw_stipple;
222 GLboolean depth_buffer_is_float;
223 GLboolean no_rast;
224 GLboolean no_hw;
225 GLboolean always_flush_batch;
226 GLboolean always_flush_cache;
227
228 /* 0 - nonconformant, best performance;
229 * 1 - fallback to sw for known conformance bugs
230 * 2 - always fallback to sw
231 */
232 GLuint conformance_mode;
233
234 /* State for intelvb.c and inteltris.c.
235 */
236 GLuint RenderIndex;
237 GLmatrix ViewportMatrix;
238 GLenum render_primitive;
239 GLenum reduced_primitive;
240 GLuint vertex_size;
241 GLubyte *verts; /* points to tnl->clipspace.vertex_buf */
242
243 /* Fallback rasterization functions
244 */
245 intel_point_func draw_point;
246 intel_line_func draw_line;
247 intel_tri_func draw_tri;
248
249 /**
250 * Set if rendering has occured to the drawable's front buffer.
251 *
252 * This is used in the DRI2 case to detect that glFlush should also copy
253 * the contents of the fake front buffer to the real front buffer.
254 */
255 GLboolean front_buffer_dirty;
256
257 /**
258 * Track whether front-buffer rendering is currently enabled
259 *
260 * A separate flag is used to track this in order to support MRT more
261 * easily.
262 */
263 GLboolean is_front_buffer_rendering;
264 /**
265 * Track whether front-buffer is the current read target.
266 *
267 * This is closely associated with is_front_buffer_rendering, but may
268 * be set separately. The DRI2 fake front buffer must be referenced
269 * either way.
270 */
271 GLboolean is_front_buffer_reading;
272
273 GLboolean use_texture_tiling;
274 GLboolean use_early_z;
275 drm_clip_rect_t fboRect; /**< cliprect for FBO rendering */
276
277 drm_clip_rect_t draw_rect;
278 drm_clip_rect_t scissor_rect;
279
280 int driFd;
281
282 __DRIcontext *driContext;
283 __DRIdrawable *driDrawable;
284 __DRIdrawable *driReadDrawable;
285 __DRIscreen *driScreen;
286 intelScreenPrivate *intelScreen;
287
288 /**
289 * Configuration cache
290 */
291 driOptionCache optionCache;
292 };
293
294 extern char *__progname;
295
296
297 #define SUBPIXEL_X 0.125
298 #define SUBPIXEL_Y 0.125
299
300 #define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0]))
301 #define ALIGN(value, alignment) ((value + alignment - 1) & ~(alignment - 1))
302 #define IS_POWER_OF_TWO(val) (((val) & (val - 1)) == 0)
303
304 static INLINE uint32_t
305 U_FIXED(float value, uint32_t frac_bits)
306 {
307 value *= (1 << frac_bits);
308 return value < 0 ? 0 : value;
309 }
310
311 static INLINE uint32_t
312 S_FIXED(float value, uint32_t frac_bits)
313 {
314 return value * (1 << frac_bits);
315 }
316
317 #define INTEL_FIREVERTICES(intel) \
318 do { \
319 if ((intel)->prim.flush) \
320 (intel)->prim.flush(intel); \
321 } while (0)
322
323 /* ================================================================
324 * From linux kernel i386 header files, copes with odd sizes better
325 * than COPY_DWORDS would:
326 * XXX Put this in src/mesa/main/imports.h ???
327 */
328 #if defined(i386) || defined(__i386__)
329 static INLINE void * __memcpy(void * to, const void * from, size_t n)
330 {
331 int d0, d1, d2;
332 __asm__ __volatile__(
333 "rep ; movsl\n\t"
334 "testb $2,%b4\n\t"
335 "je 1f\n\t"
336 "movsw\n"
337 "1:\ttestb $1,%b4\n\t"
338 "je 2f\n\t"
339 "movsb\n"
340 "2:"
341 : "=&c" (d0), "=&D" (d1), "=&S" (d2)
342 :"0" (n/4), "q" (n),"1" ((long) to),"2" ((long) from)
343 : "memory");
344 return (to);
345 }
346 #else
347 #define __memcpy(a,b,c) memcpy(a,b,c)
348 #endif
349
350
351 /* ================================================================
352 * Debugging:
353 */
354 extern int INTEL_DEBUG;
355
356 #define DEBUG_TEXTURE 0x1
357 #define DEBUG_STATE 0x2
358 #define DEBUG_IOCTL 0x4
359 #define DEBUG_BLIT 0x8
360 #define DEBUG_MIPTREE 0x10
361 #define DEBUG_FALLBACKS 0x20
362 #define DEBUG_VERBOSE 0x40
363 #define DEBUG_BATCH 0x80
364 #define DEBUG_PIXEL 0x100
365 #define DEBUG_BUFMGR 0x200
366 #define DEBUG_REGION 0x400
367 #define DEBUG_FBO 0x800
368 #define DEBUG_LOCK 0x1000
369 #define DEBUG_SYNC 0x2000
370 #define DEBUG_PRIMS 0x4000
371 #define DEBUG_VERTS 0x8000
372 #define DEBUG_DRI 0x10000
373 #define DEBUG_DMA 0x20000
374 #define DEBUG_SANITY 0x40000
375 #define DEBUG_SLEEP 0x80000
376 #define DEBUG_STATS 0x100000
377 #define DEBUG_TILE 0x200000
378 #define DEBUG_SINGLE_THREAD 0x400000
379 #define DEBUG_WM 0x800000
380 #define DEBUG_URB 0x1000000
381 #define DEBUG_VS 0x2000000
382
383 #define DBG(...) do { \
384 if (INTEL_DEBUG & FILE_DEBUG_FLAG) \
385 _mesa_printf(__VA_ARGS__); \
386 } while(0)
387
388 #define PCI_CHIP_845_G 0x2562
389 #define PCI_CHIP_I830_M 0x3577
390 #define PCI_CHIP_I855_GM 0x3582
391 #define PCI_CHIP_I865_G 0x2572
392 #define PCI_CHIP_I915_G 0x2582
393 #define PCI_CHIP_I915_GM 0x2592
394 #define PCI_CHIP_I945_G 0x2772
395 #define PCI_CHIP_I945_GM 0x27A2
396 #define PCI_CHIP_I945_GME 0x27AE
397 #define PCI_CHIP_G33_G 0x29C2
398 #define PCI_CHIP_Q35_G 0x29B2
399 #define PCI_CHIP_Q33_G 0x29D2
400
401
402 /* ================================================================
403 * intel_context.c:
404 */
405
406 extern GLboolean intelInitContext(struct intel_context *intel,
407 const __GLcontextModes * mesaVis,
408 __DRIcontext * driContextPriv,
409 void *sharedContextPrivate,
410 struct dd_function_table *functions);
411
412 extern void intelFinish(GLcontext * ctx);
413 extern void intelFlush(GLcontext * ctx);
414 extern void intel_flush(GLcontext * ctx, GLboolean needs_mi_flush);
415
416 extern void intelInitDriverFunctions(struct dd_function_table *functions);
417
418 void intel_init_syncobj_functions(struct dd_function_table *functions);
419
420
421 /* ================================================================
422 * intel_state.c:
423 */
424 extern void intelInitStateFuncs(struct dd_function_table *functions);
425
426 #define COMPAREFUNC_ALWAYS 0
427 #define COMPAREFUNC_NEVER 0x1
428 #define COMPAREFUNC_LESS 0x2
429 #define COMPAREFUNC_EQUAL 0x3
430 #define COMPAREFUNC_LEQUAL 0x4
431 #define COMPAREFUNC_GREATER 0x5
432 #define COMPAREFUNC_NOTEQUAL 0x6
433 #define COMPAREFUNC_GEQUAL 0x7
434
435 #define STENCILOP_KEEP 0
436 #define STENCILOP_ZERO 0x1
437 #define STENCILOP_REPLACE 0x2
438 #define STENCILOP_INCRSAT 0x3
439 #define STENCILOP_DECRSAT 0x4
440 #define STENCILOP_INCR 0x5
441 #define STENCILOP_DECR 0x6
442 #define STENCILOP_INVERT 0x7
443
444 #define LOGICOP_CLEAR 0
445 #define LOGICOP_NOR 0x1
446 #define LOGICOP_AND_INV 0x2
447 #define LOGICOP_COPY_INV 0x3
448 #define LOGICOP_AND_RVRSE 0x4
449 #define LOGICOP_INV 0x5
450 #define LOGICOP_XOR 0x6
451 #define LOGICOP_NAND 0x7
452 #define LOGICOP_AND 0x8
453 #define LOGICOP_EQUIV 0x9
454 #define LOGICOP_NOOP 0xa
455 #define LOGICOP_OR_INV 0xb
456 #define LOGICOP_COPY 0xc
457 #define LOGICOP_OR_RVRSE 0xd
458 #define LOGICOP_OR 0xe
459 #define LOGICOP_SET 0xf
460
461 #define BLENDFACT_ZERO 0x01
462 #define BLENDFACT_ONE 0x02
463 #define BLENDFACT_SRC_COLR 0x03
464 #define BLENDFACT_INV_SRC_COLR 0x04
465 #define BLENDFACT_SRC_ALPHA 0x05
466 #define BLENDFACT_INV_SRC_ALPHA 0x06
467 #define BLENDFACT_DST_ALPHA 0x07
468 #define BLENDFACT_INV_DST_ALPHA 0x08
469 #define BLENDFACT_DST_COLR 0x09
470 #define BLENDFACT_INV_DST_COLR 0x0a
471 #define BLENDFACT_SRC_ALPHA_SATURATE 0x0b
472 #define BLENDFACT_CONST_COLOR 0x0c
473 #define BLENDFACT_INV_CONST_COLOR 0x0d
474 #define BLENDFACT_CONST_ALPHA 0x0e
475 #define BLENDFACT_INV_CONST_ALPHA 0x0f
476 #define BLENDFACT_MASK 0x0f
477
478 enum {
479 DRI_CONF_BO_REUSE_DISABLED,
480 DRI_CONF_BO_REUSE_ALL
481 };
482
483 extern int intel_translate_shadow_compare_func(GLenum func);
484 extern int intel_translate_compare_func(GLenum func);
485 extern int intel_translate_stencil_op(GLenum op);
486 extern int intel_translate_blend_factor(GLenum factor);
487 extern int intel_translate_logic_op(GLenum opcode);
488
489 void intel_viewport(GLcontext * ctx, GLint x, GLint y,
490 GLsizei width, GLsizei height);
491
492 void intel_update_renderbuffers(__DRIcontext *context,
493 __DRIdrawable *drawable);
494
495 void i915_set_buf_info_for_region(uint32_t *state, struct intel_region *region,
496 uint32_t buffer_id);
497
498 /*======================================================================
499 * Inline conversion functions.
500 * These are better-typed than the macros used previously:
501 */
502 static INLINE struct intel_context *
503 intel_context(GLcontext * ctx)
504 {
505 return (struct intel_context *) ctx;
506 }
507
508 static INLINE GLboolean
509 is_power_of_two(uint32_t value)
510 {
511 return (value & (value - 1)) == 0;
512 }
513
514 static INLINE void
515 intel_bo_map_gtt_preferred(struct intel_context *intel,
516 drm_intel_bo *bo,
517 GLboolean write)
518 {
519 if (intel->intelScreen->kernel_exec_fencing)
520 drm_intel_gem_bo_map_gtt(bo);
521 else
522 drm_intel_bo_map(bo, write);
523 }
524
525 static INLINE void
526 intel_bo_unmap_gtt_preferred(struct intel_context *intel,
527 drm_intel_bo *bo)
528 {
529 if (intel->intelScreen->kernel_exec_fencing)
530 drm_intel_gem_bo_unmap_gtt(bo);
531 else
532 drm_intel_bo_unmap(bo);
533 }
534
535 #endif