src/mesa/drivers/dri/nouveau/nv20_context.c

   1 /*
   2  * Copyright (C) 2009-2010 Francisco Jerez.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining
   6  * a copy of this software and associated documentation files (the
   7  * "Software"), to deal in the Software without restriction, including
   8  * without limitation the rights to use, copy, modify, merge, publish,
   9  * distribute, sublicense, and/or sell copies of the Software, and to
  10  * permit persons to whom the Software is furnished to do so, subject to
  11  * the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the
  14  * next paragraph) shall be included in all copies or substantial
  15  * portions of the Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  18  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  20  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  21  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  22  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  23  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24  *
  25  */
  26
  27 #include "nouveau_driver.h"
  28 #include "nouveau_context.h"
  29 #include "nouveau_class.h"
  30 #include "nv04_driver.h"
  31 #include "nv10_driver.h"
  32 #include "nv20_driver.h"
  33
  34 static const struct dri_extension nv20_extensions[] = {
  35         { "GL_ARB_texture_env_crossbar", NULL },
  36         { "GL_EXT_texture_rectangle",   NULL },
  37         { "GL_ARB_texture_env_combine", NULL },
  38         { "GL_ARB_texture_env_dot3",    NULL },
  39         { NULL,                         NULL }
  40 };
  41
  42 static void
  43 nv20_hwctx_init(GLcontext *ctx)
  44 {
  45         struct nouveau_channel *chan = context_chan(ctx);
  46         struct nouveau_grobj *kelvin = context_eng3d(ctx);
  47         struct nouveau_hw_state *hw = &to_nouveau_context(ctx)->hw;
  48         int i;
  49
  50         BEGIN_RING(chan, kelvin, NV20TCL_DMA_NOTIFY, 1);
  51         OUT_RING  (chan, hw->ntfy->handle);
  52         BEGIN_RING(chan, kelvin, NV20TCL_DMA_TEXTURE0, 2);
  53         OUT_RING  (chan, chan->vram->handle);
  54         OUT_RING  (chan, chan->gart->handle);
  55         BEGIN_RING(chan, kelvin, NV20TCL_DMA_COLOR, 2);
  56         OUT_RING  (chan, chan->vram->handle);
  57         OUT_RING  (chan, chan->vram->handle);
  58         BEGIN_RING(chan, kelvin, NV20TCL_DMA_VTXBUF0, 2);
  59         OUT_RING(chan, chan->vram->handle);
  60         OUT_RING(chan, chan->gart->handle);
  61
  62         BEGIN_RING(chan, kelvin, NV20TCL_DMA_QUERY, 1);
  63         OUT_RING  (chan, 0);
  64
  65         BEGIN_RING(chan, kelvin, NV20TCL_RT_HORIZ, 2);
  66         OUT_RING  (chan, 0);
  67         OUT_RING  (chan, 0);
  68
  69         BEGIN_RING(chan, kelvin, NV20TCL_VIEWPORT_CLIP_HORIZ(0), 1);
  70         OUT_RING  (chan, 0xfff << 16 | 0x0);
  71         BEGIN_RING(chan, kelvin, NV20TCL_VIEWPORT_CLIP_VERT(0), 1);
  72         OUT_RING  (chan, 0xfff << 16 | 0x0);
  73
  74         for (i = 1; i < NV20TCL_VIEWPORT_CLIP_HORIZ__SIZE; i++) {
  75                 BEGIN_RING(chan, kelvin, NV20TCL_VIEWPORT_CLIP_HORIZ(i), 1);
  76                 OUT_RING  (chan, 0);
  77                 BEGIN_RING(chan, kelvin, NV20TCL_VIEWPORT_CLIP_VERT(i), 1);
  78                 OUT_RING  (chan, 0);
  79         }
  80
  81         BEGIN_RING(chan, kelvin, NV20TCL_VIEWPORT_CLIP_MODE, 1);
  82         OUT_RING  (chan, 0);
  83
  84         BEGIN_RING(chan, kelvin, 0x17e0, 3);
  85         OUT_RINGf (chan, 0.0);
  86         OUT_RINGf (chan, 0.0);
  87         OUT_RINGf (chan, 1.0);
  88
  89         if (context_chipset(ctx) >= 0x25) {
  90                 BEGIN_RING(chan, kelvin, NV20TCL_TX_RCOMP, 1);
  91                 OUT_RING  (chan, NV20TCL_TX_RCOMP_LEQUAL | 0xdb0);
  92         } else {
  93                 BEGIN_RING(chan, kelvin, 0x1e68, 1);
  94                 OUT_RING  (chan, 0x4b800000); /* 16777216.000000 */
  95                 BEGIN_RING(chan, kelvin, NV20TCL_TX_RCOMP, 1);
  96                 OUT_RING  (chan, NV20TCL_TX_RCOMP_LEQUAL);
  97         }
  98
  99         BEGIN_RING(chan, kelvin, 0x290, 1);
 100         OUT_RING  (chan, 0x10 << 16 | 1);
 101         BEGIN_RING(chan, kelvin, 0x9fc, 1);
 102         OUT_RING  (chan, 0);
 103         BEGIN_RING(chan, kelvin, 0x1d80, 1);
 104         OUT_RING  (chan, 1);
 105         BEGIN_RING(chan, kelvin, 0x9f8, 1);
 106         OUT_RING  (chan, 4);
 107         BEGIN_RING(chan, kelvin, 0x17ec, 3);
 108         OUT_RINGf (chan, 0.0);
 109         OUT_RINGf (chan, 1.0);
 110         OUT_RINGf (chan, 0.0);
 111
 112         if (context_chipset(ctx) >= 0x25) {
 113                 BEGIN_RING(chan, kelvin, 0x1d88, 1);
 114                 OUT_RING  (chan, 3);
 115
 116                 BEGIN_RING(chan, kelvin, NV25TCL_DMA_IN_MEMORY9, 1);
 117                 OUT_RING  (chan, chan->vram->handle);
 118                 BEGIN_RING(chan, kelvin, NV25TCL_DMA_IN_MEMORY8, 1);
 119                 OUT_RING  (chan, chan->vram->handle);
 120         }
 121
 122         BEGIN_RING(chan, kelvin, NV20TCL_DMA_FENCE, 1);
 123         OUT_RING  (chan, 0);
 124
 125         BEGIN_RING(chan, kelvin, 0x1e98, 1);
 126         OUT_RING  (chan, 0);
 127
 128         BEGIN_RING(chan, kelvin, NV20TCL_NOTIFY, 1);
 129         OUT_RING  (chan, 0);
 130
 131         BEGIN_RING(chan, kelvin, 0x120, 3);
 132         OUT_RING  (chan, 0);
 133         OUT_RING  (chan, 1);
 134         OUT_RING  (chan, 2);
 135
 136         if (context_chipset(ctx) >= 0x25) {
 137                 BEGIN_RING(chan, kelvin, 0x022c, 2);
 138                 OUT_RING  (chan, 0x280);
 139                 OUT_RING  (chan, 0x07d28000);
 140
 141                 BEGIN_RING(chan, kelvin, 0x1da4, 1);
 142                 OUT_RING  (chan, 0);
 143         }
 144
 145         BEGIN_RING(chan, kelvin, NV20TCL_RT_HORIZ, 2);
 146         OUT_RING  (chan, 0 << 16 | 0);
 147         OUT_RING  (chan, 0 << 16 | 0);
 148
 149         BEGIN_RING(chan, kelvin, NV20TCL_ALPHA_FUNC_ENABLE, 1);
 150         OUT_RING  (chan, 0);
 151         BEGIN_RING(chan, kelvin, NV20TCL_ALPHA_FUNC_FUNC, 2);
 152         OUT_RING  (chan, NV20TCL_ALPHA_FUNC_FUNC_ALWAYS);
 153         OUT_RING  (chan, 0);
 154
 155         for (i = 0; i < NV20TCL_TX_ENABLE__SIZE; i++) {
 156                 BEGIN_RING(chan, kelvin, NV20TCL_TX_ENABLE(i), 1);
 157                 OUT_RING  (chan, 0);
 158         }
 159
 160         BEGIN_RING(chan, kelvin, NV20TCL_TX_SHADER_OP, 1);
 161         OUT_RING  (chan, 0);
 162         BEGIN_RING(chan, kelvin, NV20TCL_TX_SHADER_CULL_MODE, 1);
 163         OUT_RING  (chan, 0);
 164
 165         BEGIN_RING(chan, kelvin, NV20TCL_RC_IN_ALPHA(0), 4);
 166         OUT_RING  (chan, 0x30d410d0);
 167         OUT_RING  (chan, 0);
 168         OUT_RING  (chan, 0);
 169         OUT_RING  (chan, 0);
 170         BEGIN_RING(chan, kelvin, NV20TCL_RC_OUT_RGB(0), 4);
 171         OUT_RING  (chan, 0x00000c00);
 172         OUT_RING  (chan, 0);
 173         OUT_RING  (chan, 0);
 174         OUT_RING  (chan, 0);
 175         BEGIN_RING(chan, kelvin, NV20TCL_RC_ENABLE, 1);
 176         OUT_RING  (chan, 0x00011101);
 177         BEGIN_RING(chan, kelvin, NV20TCL_RC_FINAL0, 2);
 178         OUT_RING  (chan, 0x130e0300);
 179         OUT_RING  (chan, 0x0c091c80);
 180         BEGIN_RING(chan, kelvin, NV20TCL_RC_OUT_ALPHA(0), 4);
 181         OUT_RING  (chan, 0x00000c00);
 182         OUT_RING  (chan, 0);
 183         OUT_RING  (chan, 0);
 184         OUT_RING  (chan, 0);
 185         BEGIN_RING(chan, kelvin, NV20TCL_RC_IN_RGB(0), 4);
 186         OUT_RING  (chan, 0x20c400c0);
 187         OUT_RING  (chan, 0);
 188         OUT_RING  (chan, 0);
 189         OUT_RING  (chan, 0);
 190         BEGIN_RING(chan, kelvin, NV20TCL_RC_COLOR0, 2);
 191         OUT_RING  (chan, 0);
 192         OUT_RING  (chan, 0);
 193         BEGIN_RING(chan, kelvin, NV20TCL_RC_CONSTANT_COLOR0(0), 4);
 194         OUT_RING  (chan, 0x035125a0);
 195         OUT_RING  (chan, 0);
 196         OUT_RING  (chan, 0x40002000);
 197         OUT_RING  (chan, 0);
 198
 199         BEGIN_RING(chan, kelvin, NV20TCL_MULTISAMPLE_CONTROL, 1);
 200         OUT_RING  (chan, 0xffff0000);
 201         BEGIN_RING(chan, kelvin, NV20TCL_BLEND_FUNC_ENABLE, 1);
 202         OUT_RING  (chan, 0);
 203         BEGIN_RING(chan, kelvin, NV20TCL_DITHER_ENABLE, 1);
 204         OUT_RING  (chan, 0);
 205         BEGIN_RING(chan, kelvin, NV20TCL_STENCIL_ENABLE, 1);
 206         OUT_RING  (chan, 0);
 207         BEGIN_RING(chan, kelvin, NV20TCL_BLEND_FUNC_SRC, 4);
 208         OUT_RING  (chan, NV20TCL_BLEND_FUNC_SRC_ONE);
 209         OUT_RING  (chan, NV20TCL_BLEND_FUNC_DST_ZERO);
 210         OUT_RING  (chan, 0);
 211         OUT_RING  (chan, NV20TCL_BLEND_EQUATION_FUNC_ADD);
 212         BEGIN_RING(chan, kelvin, NV20TCL_STENCIL_MASK, 7);
 213         OUT_RING  (chan, 0xff);
 214         OUT_RING  (chan, NV20TCL_STENCIL_FUNC_FUNC_ALWAYS);
 215         OUT_RING  (chan, 0);
 216         OUT_RING  (chan, 0xff);
 217         OUT_RING  (chan, NV20TCL_STENCIL_OP_FAIL_KEEP);
 218         OUT_RING  (chan, NV20TCL_STENCIL_OP_ZFAIL_KEEP);
 219         OUT_RING  (chan, NV20TCL_STENCIL_OP_ZPASS_KEEP);
 220
 221         BEGIN_RING(chan, kelvin, NV20TCL_COLOR_LOGIC_OP_ENABLE, 2);
 222         OUT_RING  (chan, 0);
 223         OUT_RING  (chan, NV20TCL_COLOR_LOGIC_OP_OP_COPY);
 224         BEGIN_RING(chan, kelvin, 0x17cc, 1);
 225         OUT_RING  (chan, 0);
 226         if (context_chipset(ctx) >= 0x25) {
 227                 BEGIN_RING(chan, kelvin, 0x1d84, 1);
 228                 OUT_RING  (chan, 1);
 229         }
 230         BEGIN_RING(chan, kelvin, NV20TCL_LIGHTING_ENABLE, 1);
 231         OUT_RING  (chan, 0);
 232         BEGIN_RING(chan, kelvin, NV20TCL_LIGHT_MODEL, 1);
 233         OUT_RING  (chan, NV20TCL_LIGHT_MODEL_VIEWER_NONLOCAL);
 234         BEGIN_RING(chan, kelvin, NV20TCL_SEPARATE_SPECULAR_ENABLE, 1);
 235         OUT_RING  (chan, 0);
 236         BEGIN_RING(chan, kelvin, NV20TCL_LIGHT_MODEL_TWO_SIDE_ENABLE, 1);
 237         OUT_RING  (chan, 0);
 238         BEGIN_RING(chan, kelvin, NV20TCL_ENABLED_LIGHTS, 1);
 239         OUT_RING  (chan, 0);
 240         BEGIN_RING(chan, kelvin, NV20TCL_NORMALIZE_ENABLE, 1);
 241         OUT_RING  (chan, 0);
 242         BEGIN_RING(chan, kelvin, NV20TCL_POLYGON_STIPPLE_PATTERN(0),
 243                    NV20TCL_POLYGON_STIPPLE_PATTERN__SIZE);
 244         for (i = 0; i < NV20TCL_POLYGON_STIPPLE_PATTERN__SIZE; i++) {
 245                 OUT_RING(chan, 0xffffffff);
 246         }
 247
 248         BEGIN_RING(chan, kelvin, NV20TCL_POLYGON_OFFSET_POINT_ENABLE, 3);
 249         OUT_RING  (chan, 0);
 250         OUT_RING  (chan, 0);
 251         OUT_RING  (chan, 0);
 252         BEGIN_RING(chan, kelvin, NV20TCL_DEPTH_FUNC, 1);
 253         OUT_RING  (chan, NV20TCL_DEPTH_FUNC_LESS);
 254         BEGIN_RING(chan, kelvin, NV20TCL_DEPTH_WRITE_ENABLE, 1);
 255         OUT_RING  (chan, 0);
 256         BEGIN_RING(chan, kelvin, NV20TCL_DEPTH_TEST_ENABLE, 1);
 257         OUT_RING  (chan, 0);
 258         BEGIN_RING(chan, kelvin, NV20TCL_POLYGON_OFFSET_FACTOR, 2);
 259         OUT_RINGf (chan, 0.0);
 260         OUT_RINGf (chan, 0.0);
 261         BEGIN_RING(chan, kelvin, NV20TCL_DEPTH_UNK17D8, 1);
 262         OUT_RING  (chan, 1);
 263         if (context_chipset(ctx) < 0x25) {
 264                 BEGIN_RING(chan, kelvin, 0x1d84, 1);
 265                 OUT_RING  (chan, 3);
 266         }
 267         BEGIN_RING(chan, kelvin, NV20TCL_POINT_SIZE, 1);
 268         if (context_chipset(ctx) >= 0x25)
 269                 OUT_RINGf (chan, 1.0);
 270         else
 271                 OUT_RING  (chan, 8);
 272
 273         if (context_chipset(ctx) >= 0x25) {
 274                 BEGIN_RING(chan, kelvin, NV20TCL_POINT_PARAMETERS_ENABLE, 1);
 275                 OUT_RING  (chan, 0);
 276                 BEGIN_RING(chan, kelvin, 0x0a1c, 1);
 277                 OUT_RING  (chan, 0x800);
 278         } else {
 279                 BEGIN_RING(chan, kelvin, NV20TCL_POINT_PARAMETERS_ENABLE, 2);
 280                 OUT_RING  (chan, 0);
 281                 OUT_RING  (chan, 0);
 282         }
 283
 284         BEGIN_RING(chan, kelvin, NV20TCL_LINE_WIDTH, 1);
 285         OUT_RING  (chan, 8);
 286         BEGIN_RING(chan, kelvin, NV20TCL_LINE_SMOOTH_ENABLE, 1);
 287         OUT_RING  (chan, 0);
 288         BEGIN_RING(chan, kelvin, NV20TCL_POLYGON_MODE_FRONT, 2);
 289         OUT_RING  (chan, NV20TCL_POLYGON_MODE_FRONT_FILL);
 290         OUT_RING  (chan, NV20TCL_POLYGON_MODE_BACK_FILL);
 291         BEGIN_RING(chan, kelvin, NV20TCL_CULL_FACE, 2);
 292         OUT_RING  (chan, NV20TCL_CULL_FACE_BACK);
 293         OUT_RING  (chan, NV20TCL_FRONT_FACE_CCW);
 294         BEGIN_RING(chan, kelvin, NV20TCL_POLYGON_SMOOTH_ENABLE, 1);
 295         OUT_RING  (chan, 0);
 296         BEGIN_RING(chan, kelvin, NV20TCL_CULL_FACE_ENABLE, 1);
 297         OUT_RING  (chan, 0);
 298         BEGIN_RING(chan, kelvin, NV20TCL_SHADE_MODEL, 1);
 299         OUT_RING  (chan, NV20TCL_SHADE_MODEL_SMOOTH);
 300         BEGIN_RING(chan, kelvin, NV20TCL_POLYGON_STIPPLE_ENABLE, 1);
 301         OUT_RING  (chan, 0);
 302
 303         BEGIN_RING(chan, kelvin, NV20TCL_TX_GEN_MODE_S(0),
 304                    4 * NV20TCL_TX_GEN_MODE_S__SIZE);
 305         for (i=0; i < 4 * NV20TCL_TX_GEN_MODE_S__SIZE; i++)
 306                 OUT_RING(chan, 0);
 307
 308         BEGIN_RING(chan, kelvin, NV20TCL_FOG_EQUATION_CONSTANT, 3);
 309         OUT_RINGf (chan, 1.5);
 310         OUT_RINGf (chan, -0.090168);
 311         OUT_RINGf (chan, 0.0);
 312         BEGIN_RING(chan, kelvin, NV20TCL_FOG_MODE, 2);
 313         OUT_RING  (chan, NV20TCL_FOG_MODE_EXP_SIGNED);
 314         OUT_RING  (chan, NV20TCL_FOG_COORD_FOG);
 315         BEGIN_RING(chan, kelvin, NV20TCL_FOG_ENABLE, 2);
 316         OUT_RING  (chan, 0);
 317         OUT_RING  (chan, 0);
 318
 319         BEGIN_RING(chan, kelvin, NV20TCL_ENGINE, 1);
 320         OUT_RING  (chan, NV20TCL_ENGINE_FIXED);
 321
 322         for (i = 0; i < NV20TCL_TX_MATRIX_ENABLE__SIZE; i++) {
 323                 BEGIN_RING(chan, kelvin, NV20TCL_TX_MATRIX_ENABLE(i), 1);
 324                 OUT_RING  (chan, 0);
 325         }
 326
 327         BEGIN_RING(chan, kelvin, NV20TCL_VTX_ATTR_4F_X(1), 4 * 15);
 328         OUT_RINGf(chan, 1.0);
 329         OUT_RINGf(chan, 0.0);
 330         OUT_RINGf(chan, 0.0);
 331         OUT_RINGf(chan, 1.0);
 332         OUT_RINGf(chan, 0.0);
 333         OUT_RINGf(chan, 0.0);
 334         OUT_RINGf(chan, 1.0);
 335         OUT_RINGf(chan, 1.0);
 336         OUT_RINGf(chan, 1.0);
 337         OUT_RINGf(chan, 1.0);
 338         OUT_RINGf(chan, 1.0);
 339         OUT_RINGf(chan, 1.0);
 340         for (i = 0; i < 12; i++) {
 341                 OUT_RINGf(chan, 0.0);
 342                 OUT_RINGf(chan, 0.0);
 343                 OUT_RINGf(chan, 0.0);
 344                 OUT_RINGf(chan, 1.0);
 345         }
 346
 347         BEGIN_RING(chan, kelvin, NV20TCL_EDGEFLAG_ENABLE, 1);
 348         OUT_RING  (chan, 1);
 349         BEGIN_RING(chan, kelvin, NV20TCL_COLOR_MASK, 1);
 350         OUT_RING (chan, 0x00010101);
 351         BEGIN_RING(chan, kelvin, NV20TCL_CLEAR_VALUE, 1);
 352         OUT_RING (chan, 0);
 353
 354         BEGIN_RING(chan, kelvin, NV20TCL_DEPTH_RANGE_NEAR, 2);
 355         OUT_RINGf (chan, 0.0);
 356         OUT_RINGf (chan, 16777216.0);
 357
 358         BEGIN_RING(chan, kelvin, NV20TCL_VIEWPORT_TRANSLATE_X, 4);
 359         OUT_RINGf (chan, 0.0);
 360         OUT_RINGf (chan, 0.0);
 361         OUT_RINGf (chan, 0.0);
 362         OUT_RINGf (chan, 16777215.0);
 363
 364         BEGIN_RING(chan, kelvin, NV20TCL_VIEWPORT_SCALE_X, 4);
 365         OUT_RINGf (chan, 0.0);
 366         OUT_RINGf (chan, 0.0);
 367         OUT_RINGf (chan, 16777215.0 * 0.5);
 368         OUT_RINGf (chan, 65535.0);
 369
 370         FIRE_RING(chan);
 371 }
 372
 373 static void
 374 nv20_context_destroy(GLcontext *ctx)
 375 {
 376         struct nouveau_context *nctx = to_nouveau_context(ctx);
 377
 378         nv04_surface_takedown(ctx);
 379         nv20_render_destroy(ctx);
 380
 381         nouveau_grobj_free(&nctx->hw.eng3d);
 382
 383         nouveau_context_deinit(ctx);
 384         FREE(ctx);
 385 }
 386
 387 static GLcontext *
 388 nv20_context_create(struct nouveau_screen *screen, const GLvisual *visual,
 389                     GLcontext *share_ctx)
 390 {
 391         struct nouveau_context *nctx;
 392         GLcontext *ctx;
 393         unsigned kelvin_class;
 394         int ret;
 395
 396         nctx = CALLOC_STRUCT(nouveau_context);
 397         if (!nctx)
 398                 return NULL;
 399
 400         ctx = &nctx->base;
 401
 402         if (!nouveau_context_init(ctx, screen, visual, share_ctx))
 403                 goto fail;
 404
 405         driInitExtensions(ctx, nv20_extensions, GL_FALSE);
 406
 407         /* GL constants. */
 408         ctx->Const.MaxTextureCoordUnits = NV20_TEXTURE_UNITS;
 409         ctx->Const.MaxTextureImageUnits = NV20_TEXTURE_UNITS;
 410         ctx->Const.MaxTextureUnits = NV20_TEXTURE_UNITS;
 411         ctx->Const.MaxTextureMaxAnisotropy = 8;
 412         ctx->Const.MaxTextureLodBias = 15;
 413
 414         /* 2D engine. */
 415         ret = nv04_surface_init(ctx);
 416         if (!ret)
 417                 goto fail;
 418
 419         /* 3D engine. */
 420         if (context_chipset(ctx) >= 0x25)
 421                 kelvin_class = NV25TCL;
 422         else
 423                 kelvin_class = NV20TCL;
 424
 425         ret = nouveau_grobj_alloc(context_chan(ctx), 0xbeef0001, kelvin_class,
 426                                   &nctx->hw.eng3d);
 427         if (ret)
 428                 goto fail;
 429
 430         nv20_hwctx_init(ctx);
 431         nv20_render_init(ctx);
 432
 433         return ctx;
 434
 435 fail:
 436         nv20_context_destroy(ctx);
 437         return NULL;
 438 }
 439
 440 const struct nouveau_driver nv20_driver = {
 441         .context_create = nv20_context_create,
 442         .context_destroy = nv20_context_destroy,
 443         .surface_copy = nv04_surface_copy,
 444         .surface_fill = nv04_surface_fill,
 445         .emit = (nouveau_state_func[]) {
 446                 nv10_emit_alpha_func,
 447                 nv10_emit_blend_color,
 448                 nv10_emit_blend_equation,
 449                 nv10_emit_blend_func,
 450                 nv20_emit_clip_plane,
 451                 nv20_emit_clip_plane,
 452                 nv20_emit_clip_plane,
 453                 nv20_emit_clip_plane,
 454                 nv20_emit_clip_plane,
 455                 nv20_emit_clip_plane,
 456                 nv10_emit_color_mask,
 457                 nv20_emit_color_material,
 458                 nv10_emit_cull_face,
 459                 nv10_emit_front_face,
 460                 nv10_emit_depth,
 461                 nv10_emit_dither,
 462                 nv20_emit_frag,
 463                 nv20_emit_framebuffer,
 464                 nv20_emit_fog,
 465                 nv10_emit_light_enable,
 466                 nv20_emit_light_model,
 467                 nv20_emit_light_source,
 468                 nv20_emit_light_source,
 469                 nv20_emit_light_source,
 470                 nv20_emit_light_source,
 471                 nv20_emit_light_source,
 472                 nv20_emit_light_source,
 473                 nv20_emit_light_source,
 474                 nv20_emit_light_source,
 475                 nv10_emit_line_stipple,
 476                 nv10_emit_line_mode,
 477                 nv20_emit_logic_opcode,
 478                 nv20_emit_material_ambient,
 479                 nv20_emit_material_ambient,
 480                 nv20_emit_material_diffuse,
 481                 nv20_emit_material_diffuse,
 482                 nv20_emit_material_specular,
 483                 nv20_emit_material_specular,
 484                 nv20_emit_material_shininess,
 485                 nv20_emit_material_shininess,
 486                 nv20_emit_modelview,
 487                 nv20_emit_point_mode,
 488                 nv10_emit_point_parameter,
 489                 nv10_emit_polygon_mode,
 490                 nv10_emit_polygon_offset,
 491                 nv10_emit_polygon_stipple,
 492                 nv20_emit_projection,
 493                 nv10_emit_render_mode,
 494                 nv10_emit_scissor,
 495                 nv10_emit_shade_model,
 496                 nv10_emit_stencil_func,
 497                 nv10_emit_stencil_mask,
 498                 nv10_emit_stencil_op,
 499                 nv20_emit_tex_env,
 500                 nv20_emit_tex_env,
 501                 nv20_emit_tex_env,
 502                 nv20_emit_tex_env,
 503                 nv20_emit_tex_gen,
 504                 nv20_emit_tex_gen,
 505                 nv20_emit_tex_gen,
 506                 nv20_emit_tex_gen,
 507                 nv20_emit_tex_mat,
 508                 nv20_emit_tex_mat,
 509                 nv20_emit_tex_mat,
 510                 nv20_emit_tex_mat,
 511                 nv20_emit_tex_obj,
 512                 nv20_emit_tex_obj,
 513                 nv20_emit_tex_obj,
 514                 nv20_emit_tex_obj,
 515                 nv20_emit_viewport,
 516                 nv20_emit_tex_shader
 517         },
 518         .num_emit = NUM_NV20_STATE,
 519 };