Merge branch 'mesa_7_5_branch' into mesa_7_6_branch
[mesa.git] / src / mesa / drivers / dri / r200 / r200_context.c
1 /*
2 Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
3
4 The Weather Channel (TM) funded Tungsten Graphics to develop the
5 initial release of the Radeon 8500 driver under the XFree86 license.
6 This notice must be preserved.
7
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
15
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
19
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27
28 **************************************************************************/
29
30 /*
31 * Authors:
32 * Keith Whitwell <keith@tungstengraphics.com>
33 */
34
35 #include "main/glheader.h"
36 #include "main/api_arrayelt.h"
37 #include "main/context.h"
38 #include "main/simple_list.h"
39 #include "main/imports.h"
40 #include "main/matrix.h"
41 #include "main/extensions.h"
42 #include "main/framebuffer.h"
43 #include "main/state.h"
44
45 #include "swrast/swrast.h"
46 #include "swrast_setup/swrast_setup.h"
47 #include "vbo/vbo.h"
48
49 #include "tnl/tnl.h"
50 #include "tnl/t_pipeline.h"
51
52 #include "drivers/common/driverfuncs.h"
53
54 #include "r200_context.h"
55 #include "r200_ioctl.h"
56 #include "r200_state.h"
57 #include "r200_pixel.h"
58 #include "r200_tex.h"
59 #include "r200_swtcl.h"
60 #include "r200_tcl.h"
61 #include "r200_maos.h"
62 #include "r200_vertprog.h"
63 #include "radeon_queryobj.h"
64
65 #include "radeon_span.h"
66
67 #define need_GL_ARB_occlusion_query
68 #define need_GL_ARB_vertex_program
69 #define need_GL_ATI_fragment_shader
70 #define need_GL_EXT_blend_minmax
71 #define need_GL_EXT_fog_coord
72 #define need_GL_EXT_secondary_color
73 #define need_GL_EXT_blend_equation_separate
74 #define need_GL_EXT_blend_func_separate
75 #define need_GL_NV_vertex_program
76 #define need_GL_ARB_point_parameters
77 #define need_GL_EXT_framebuffer_object
78 #include "extension_helper.h"
79
80 #define DRIVER_DATE "20060602"
81
82 #include "vblank.h"
83 #include "utils.h"
84 #include "xmlpool.h" /* for symbolic values of enum-type options */
85
86 /* Return various strings for glGetString().
87 */
88 static const GLubyte *r200GetString( GLcontext *ctx, GLenum name )
89 {
90 r200ContextPtr rmesa = R200_CONTEXT(ctx);
91 static char buffer[128];
92 unsigned offset;
93 GLuint agp_mode = (rmesa->radeon.radeonScreen->card_type == RADEON_CARD_PCI)? 0 :
94 rmesa->radeon.radeonScreen->AGPMode;
95
96 switch ( name ) {
97 case GL_VENDOR:
98 return (GLubyte *)"Tungsten Graphics, Inc.";
99
100 case GL_RENDERER:
101 offset = driGetRendererString( buffer, "R200", DRIVER_DATE,
102 agp_mode );
103
104 sprintf( & buffer[ offset ], " %sTCL",
105 !(rmesa->radeon.TclFallback & R200_TCL_FALLBACK_TCL_DISABLE)
106 ? "" : "NO-" );
107
108 return (GLubyte *)buffer;
109
110 default:
111 return NULL;
112 }
113 }
114
115
116 /* Extension strings exported by the R200 driver.
117 */
118 const struct dri_extension card_extensions[] =
119 {
120 { "GL_ARB_multitexture", NULL },
121 { "GL_ARB_occlusion_query", GL_ARB_occlusion_query_functions},
122 { "GL_ARB_texture_border_clamp", NULL },
123 { "GL_ARB_texture_env_add", NULL },
124 { "GL_ARB_texture_env_combine", NULL },
125 { "GL_ARB_texture_env_dot3", NULL },
126 { "GL_ARB_texture_env_crossbar", NULL },
127 { "GL_ARB_texture_mirrored_repeat", NULL },
128 { "GL_EXT_blend_minmax", GL_EXT_blend_minmax_functions },
129 { "GL_EXT_blend_subtract", NULL },
130 { "GL_EXT_fog_coord", GL_EXT_fog_coord_functions },
131 { "GL_EXT_packed_depth_stencil", NULL},
132 { "GL_EXT_secondary_color", GL_EXT_secondary_color_functions },
133 { "GL_EXT_stencil_wrap", NULL },
134 { "GL_EXT_texture_edge_clamp", NULL },
135 { "GL_EXT_texture_env_combine", NULL },
136 { "GL_EXT_texture_env_dot3", NULL },
137 { "GL_EXT_texture_filter_anisotropic", NULL },
138 { "GL_EXT_texture_lod_bias", NULL },
139 { "GL_EXT_texture_mirror_clamp", NULL },
140 { "GL_EXT_texture_rectangle", NULL },
141 { "GL_ATI_texture_env_combine3", NULL },
142 { "GL_ATI_texture_mirror_once", NULL },
143 { "GL_MESA_pack_invert", NULL },
144 { "GL_NV_blend_square", NULL },
145 { "GL_SGIS_generate_mipmap", NULL },
146 { NULL, NULL }
147 };
148
149 const struct dri_extension blend_extensions[] = {
150 { "GL_EXT_blend_equation_separate", GL_EXT_blend_equation_separate_functions },
151 { "GL_EXT_blend_func_separate", GL_EXT_blend_func_separate_functions },
152 { NULL, NULL }
153 };
154
155 const struct dri_extension ARB_vp_extension[] = {
156 { "GL_ARB_vertex_program", GL_ARB_vertex_program_functions }
157 };
158
159 const struct dri_extension NV_vp_extension[] = {
160 { "GL_NV_vertex_program", GL_NV_vertex_program_functions }
161 };
162
163 const struct dri_extension ATI_fs_extension[] = {
164 { "GL_ATI_fragment_shader", GL_ATI_fragment_shader_functions }
165 };
166
167 const struct dri_extension point_extensions[] = {
168 { "GL_ARB_point_sprite", NULL },
169 { "GL_ARB_point_parameters", GL_ARB_point_parameters_functions },
170 { NULL, NULL }
171 };
172
173 const struct dri_extension mm_extensions[] = {
174 { "GL_EXT_framebuffer_object", GL_EXT_framebuffer_object_functions },
175 { NULL, NULL }
176 };
177
178 extern const struct tnl_pipeline_stage _r200_render_stage;
179 extern const struct tnl_pipeline_stage _r200_tcl_stage;
180
181 static const struct tnl_pipeline_stage *r200_pipeline[] = {
182
183 /* Try and go straight to t&l
184 */
185 &_r200_tcl_stage,
186
187 /* Catch any t&l fallbacks
188 */
189 &_tnl_vertex_transform_stage,
190 &_tnl_normal_transform_stage,
191 &_tnl_lighting_stage,
192 &_tnl_fog_coordinate_stage,
193 &_tnl_texgen_stage,
194 &_tnl_texture_transform_stage,
195 &_tnl_point_attenuation_stage,
196 &_tnl_vertex_program_stage,
197 /* Try again to go to tcl?
198 * - no good for asymmetric-twoside (do with multipass)
199 * - no good for asymmetric-unfilled (do with multipass)
200 * - good for material
201 * - good for texgen
202 * - need to manipulate a bit of state
203 *
204 * - worth it/not worth it?
205 */
206
207 /* Else do them here.
208 */
209 /* &_r200_render_stage, */ /* FIXME: bugs with ut2003 */
210 &_tnl_render_stage, /* FALLBACK: */
211 NULL,
212 };
213
214
215
216 /* Initialize the driver's misc functions.
217 */
218 static void r200InitDriverFuncs( struct dd_function_table *functions )
219 {
220 functions->GetBufferSize = NULL; /* OBSOLETE */
221 functions->GetString = r200GetString;
222 }
223
224
225 static void r200_get_lock(radeonContextPtr radeon)
226 {
227 r200ContextPtr rmesa = (r200ContextPtr)radeon;
228 drm_radeon_sarea_t *sarea = radeon->sarea;
229
230 R200_STATECHANGE( rmesa, ctx );
231 if (rmesa->radeon.sarea->tiling_enabled) {
232 rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] |= R200_COLOR_TILE_ENABLE;
233 }
234 else rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] &= ~R200_COLOR_TILE_ENABLE;
235
236 if ( sarea->ctx_owner != rmesa->radeon.dri.hwContext ) {
237 sarea->ctx_owner = rmesa->radeon.dri.hwContext;
238 if (!radeon->radeonScreen->kernel_mm)
239 radeon_bo_legacy_texture_age(radeon->radeonScreen->bom);
240 }
241
242 }
243
244 static void r200_vtbl_emit_cs_header(struct radeon_cs *cs, radeonContextPtr rmesa)
245 {
246 }
247
248 static void r200_emit_query_finish(radeonContextPtr radeon)
249 {
250 BATCH_LOCALS(radeon);
251 struct radeon_query_object *query = radeon->query.current;
252
253 BEGIN_BATCH_NO_AUTOSTATE(4);
254 OUT_BATCH(CP_PACKET0(RADEON_RB3D_ZPASS_ADDR, 0));
255 OUT_BATCH_RELOC(0, query->bo, query->curr_offset, 0, RADEON_GEM_DOMAIN_GTT, 0);
256 END_BATCH();
257 query->curr_offset += sizeof(uint32_t);
258 assert(query->curr_offset < RADEON_QUERY_PAGE_SIZE);
259 query->emitted_begin = GL_FALSE;
260 }
261
262 static void r200_init_vtbl(radeonContextPtr radeon)
263 {
264 radeon->vtbl.get_lock = r200_get_lock;
265 radeon->vtbl.update_viewport_offset = r200UpdateViewportOffset;
266 radeon->vtbl.emit_cs_header = r200_vtbl_emit_cs_header;
267 radeon->vtbl.swtcl_flush = r200_swtcl_flush;
268 radeon->vtbl.fallback = r200Fallback;
269 radeon->vtbl.update_scissor = r200_vtbl_update_scissor;
270 radeon->vtbl.emit_query_finish = r200_emit_query_finish;
271 }
272
273
274 /* Create the device specific rendering context.
275 */
276 GLboolean r200CreateContext( const __GLcontextModes *glVisual,
277 __DRIcontextPrivate *driContextPriv,
278 void *sharedContextPrivate)
279 {
280 __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
281 radeonScreenPtr screen = (radeonScreenPtr)(sPriv->private);
282 struct dd_function_table functions;
283 r200ContextPtr rmesa;
284 GLcontext *ctx;
285 int i;
286 int tcl_mode;
287
288 assert(glVisual);
289 assert(driContextPriv);
290 assert(screen);
291
292 /* Allocate the R200 context */
293 rmesa = (r200ContextPtr) CALLOC( sizeof(*rmesa) );
294 if ( !rmesa )
295 return GL_FALSE;
296
297 r200_init_vtbl(&rmesa->radeon);
298 /* init exp fog table data */
299 r200InitStaticFogData();
300
301 /* Parse configuration files.
302 * Do this here so that initialMaxAnisotropy is set before we create
303 * the default textures.
304 */
305 driParseConfigFiles (&rmesa->radeon.optionCache, &screen->optionCache,
306 screen->driScreen->myNum, "r200");
307 rmesa->radeon.initialMaxAnisotropy = driQueryOptionf(&rmesa->radeon.optionCache,
308 "def_max_anisotropy");
309
310 if ( sPriv->drm_version.major == 1
311 && driQueryOptionb( &rmesa->radeon.optionCache, "hyperz" ) ) {
312 if ( sPriv->drm_version.minor < 13 )
313 fprintf( stderr, "DRM version 1.%d too old to support HyperZ, "
314 "disabling.\n", sPriv->drm_version.minor );
315 else
316 rmesa->using_hyperz = GL_TRUE;
317 }
318
319 if ( sPriv->drm_version.minor >= 15 )
320 rmesa->texmicrotile = GL_TRUE;
321
322 /* Init default driver functions then plug in our R200-specific functions
323 * (the texture functions are especially important)
324 */
325 _mesa_init_driver_functions(&functions);
326 r200InitDriverFuncs(&functions);
327 r200InitIoctlFuncs(&functions);
328 r200InitStateFuncs(&functions, screen->kernel_mm);
329 r200InitTextureFuncs(&functions);
330 r200InitShaderFuncs(&functions);
331 radeonInitQueryObjFunctions(&functions);
332
333 if (!radeonInitContext(&rmesa->radeon, &functions,
334 glVisual, driContextPriv,
335 sharedContextPrivate)) {
336 FREE(rmesa);
337 return GL_FALSE;
338 }
339
340 rmesa->radeon.swtcl.RenderIndex = ~0;
341 rmesa->radeon.hw.all_dirty = 1;
342
343 /* Set the maximum texture size small enough that we can guarentee that
344 * all texture units can bind a maximal texture and have all of them in
345 * texturable memory at once. Depending on the allow_large_textures driconf
346 * setting allow larger textures.
347 */
348
349 ctx = rmesa->radeon.glCtx;
350 ctx->Const.MaxTextureUnits = driQueryOptioni (&rmesa->radeon.optionCache,
351 "texture_units");
352 ctx->Const.MaxTextureImageUnits = ctx->Const.MaxTextureUnits;
353 ctx->Const.MaxTextureCoordUnits = ctx->Const.MaxTextureUnits;
354
355 i = driQueryOptioni( &rmesa->radeon.optionCache, "allow_large_textures");
356
357 /* FIXME: When no memory manager is available we should set this
358 * to some reasonable value based on texture memory pool size */
359 ctx->Const.MaxTextureLevels = 12;
360 ctx->Const.Max3DTextureLevels = 9;
361 ctx->Const.MaxCubeTextureLevels = 12;
362 ctx->Const.MaxTextureRectSize = 2048;
363
364 ctx->Const.MaxTextureMaxAnisotropy = 16.0;
365
366 /* No wide AA points.
367 */
368 ctx->Const.MinPointSize = 1.0;
369 ctx->Const.MinPointSizeAA = 1.0;
370 ctx->Const.MaxPointSizeAA = 1.0;
371 ctx->Const.PointSizeGranularity = 0.0625;
372 if (rmesa->radeon.radeonScreen->drmSupportsPointSprites)
373 ctx->Const.MaxPointSize = 2047.0;
374 else
375 ctx->Const.MaxPointSize = 1.0;
376
377 /* mesa initialization problem - _mesa_init_point was already called */
378 ctx->Point.MaxSize = ctx->Const.MaxPointSize;
379
380 ctx->Const.MinLineWidth = 1.0;
381 ctx->Const.MinLineWidthAA = 1.0;
382 ctx->Const.MaxLineWidth = 10.0;
383 ctx->Const.MaxLineWidthAA = 10.0;
384 ctx->Const.LineWidthGranularity = 0.0625;
385
386 ctx->Const.VertexProgram.MaxNativeInstructions = R200_VSF_MAX_INST;
387 ctx->Const.VertexProgram.MaxNativeAttribs = 12;
388 ctx->Const.VertexProgram.MaxNativeTemps = R200_VSF_MAX_TEMPS;
389 ctx->Const.VertexProgram.MaxNativeParameters = R200_VSF_MAX_PARAM;
390 ctx->Const.VertexProgram.MaxNativeAddressRegs = 1;
391
392 ctx->Const.MaxDrawBuffers = 1;
393
394 _mesa_set_mvp_with_dp4( ctx, GL_TRUE );
395
396 /* Initialize the software rasterizer and helper modules.
397 */
398 _swrast_CreateContext( ctx );
399 _vbo_CreateContext( ctx );
400 _tnl_CreateContext( ctx );
401 _swsetup_CreateContext( ctx );
402 _ae_create_context( ctx );
403
404 /* Install the customized pipeline:
405 */
406 _tnl_destroy_pipeline( ctx );
407 _tnl_install_pipeline( ctx, r200_pipeline );
408
409 /* Try and keep materials and vertices separate:
410 */
411 /* _tnl_isolate_materials( ctx, GL_TRUE ); */
412
413
414 /* Configure swrast and TNL to match hardware characteristics:
415 */
416 _swrast_allow_pixel_fog( ctx, GL_FALSE );
417 _swrast_allow_vertex_fog( ctx, GL_TRUE );
418 _tnl_allow_pixel_fog( ctx, GL_FALSE );
419 _tnl_allow_vertex_fog( ctx, GL_TRUE );
420
421
422 for ( i = 0 ; i < R200_MAX_TEXTURE_UNITS ; i++ ) {
423 _math_matrix_ctr( &rmesa->TexGenMatrix[i] );
424 _math_matrix_set_identity( &rmesa->TexGenMatrix[i] );
425 }
426 _math_matrix_ctr( &rmesa->tmpmat );
427 _math_matrix_set_identity( &rmesa->tmpmat );
428
429 driInitExtensions( ctx, card_extensions, GL_TRUE );
430
431 if (rmesa->radeon.radeonScreen->kernel_mm)
432 driInitExtensions(ctx, mm_extensions, GL_FALSE);
433 if (!(rmesa->radeon.radeonScreen->chip_flags & R200_CHIPSET_YCBCR_BROKEN)) {
434 /* yuv textures don't work with some chips - R200 / rv280 okay so far
435 others get the bit ordering right but don't actually do YUV-RGB conversion */
436 _mesa_enable_extension( ctx, "GL_MESA_ycbcr_texture" );
437 }
438 if (rmesa->radeon.glCtx->Mesa_DXTn) {
439 _mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" );
440 _mesa_enable_extension( ctx, "GL_S3_s3tc" );
441 }
442 else if (driQueryOptionb (&rmesa->radeon.optionCache, "force_s3tc_enable")) {
443 _mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" );
444 }
445
446 if (rmesa->radeon.radeonScreen->drmSupportsCubeMapsR200)
447 _mesa_enable_extension( ctx, "GL_ARB_texture_cube_map" );
448 if (rmesa->radeon.radeonScreen->drmSupportsBlendColor) {
449 driInitExtensions( ctx, blend_extensions, GL_FALSE );
450 }
451 if(rmesa->radeon.radeonScreen->drmSupportsVertexProgram)
452 driInitSingleExtension( ctx, ARB_vp_extension );
453 if(driQueryOptionb(&rmesa->radeon.optionCache, "nv_vertex_program"))
454 driInitSingleExtension( ctx, NV_vp_extension );
455
456 if ((ctx->Const.MaxTextureUnits == 6) && rmesa->radeon.radeonScreen->drmSupportsFragShader)
457 driInitSingleExtension( ctx, ATI_fs_extension );
458 if (rmesa->radeon.radeonScreen->drmSupportsPointSprites)
459 driInitExtensions( ctx, point_extensions, GL_FALSE );
460
461 if (!rmesa->radeon.radeonScreen->kernel_mm)
462 _mesa_disable_extension(ctx, "GL_ARB_occlusion_query");
463 #if 0
464 r200InitDriverFuncs( ctx );
465 r200InitIoctlFuncs( ctx );
466 r200InitStateFuncs( ctx );
467 r200InitTextureFuncs( ctx );
468 #endif
469 /* plug in a few more device driver functions */
470 /* XXX these should really go right after _mesa_init_driver_functions() */
471 radeon_fbo_init(&rmesa->radeon);
472 radeonInitSpanFuncs( ctx );
473 r200InitPixelFuncs( ctx );
474 r200InitTnlFuncs( ctx );
475 r200InitState( rmesa );
476 r200InitSwtcl( ctx );
477
478 rmesa->prefer_gart_client_texturing =
479 (getenv("R200_GART_CLIENT_TEXTURES") != 0);
480
481 tcl_mode = driQueryOptioni(&rmesa->radeon.optionCache, "tcl_mode");
482 if (driQueryOptionb(&rmesa->radeon.optionCache, "no_rast")) {
483 fprintf(stderr, "disabling 3D acceleration\n");
484 FALLBACK(rmesa, R200_FALLBACK_DISABLE, 1);
485 }
486 else if (tcl_mode == DRI_CONF_TCL_SW || getenv("R200_NO_TCL") ||
487 !(rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL)) {
488 if (rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL) {
489 rmesa->radeon.radeonScreen->chip_flags &= ~RADEON_CHIPSET_TCL;
490 fprintf(stderr, "Disabling HW TCL support\n");
491 }
492 TCL_FALLBACK(rmesa->radeon.glCtx, R200_TCL_FALLBACK_TCL_DISABLE, 1);
493 }
494
495 return GL_TRUE;
496 }
497
498
499 void r200DestroyContext( __DRIcontextPrivate *driContextPriv )
500 {
501 int i;
502 r200ContextPtr rmesa = (r200ContextPtr)driContextPriv->driverPrivate;
503 if (rmesa)
504 {
505 for ( i = 0 ; i < R200_MAX_TEXTURE_UNITS ; i++ ) {
506 _math_matrix_dtr( &rmesa->TexGenMatrix[i] );
507 }
508 }
509 radeonDestroyContext(driContextPriv);
510 }