Merge remote branch 'origin/lp-binning'
[mesa.git] / src / mesa / drivers / dri / r200 / r200_context.c
1 /*
2 Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
3
4 The Weather Channel (TM) funded Tungsten Graphics to develop the
5 initial release of the Radeon 8500 driver under the XFree86 license.
6 This notice must be preserved.
7
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
15
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
19
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27
28 **************************************************************************/
29
30 /*
31 * Authors:
32 * Keith Whitwell <keith@tungstengraphics.com>
33 */
34
35 #include "main/glheader.h"
36 #include "main/api_arrayelt.h"
37 #include "main/context.h"
38 #include "main/simple_list.h"
39 #include "main/imports.h"
40 #include "main/extensions.h"
41
42 #include "swrast/swrast.h"
43 #include "swrast_setup/swrast_setup.h"
44 #include "vbo/vbo.h"
45
46 #include "tnl/tnl.h"
47 #include "tnl/t_pipeline.h"
48
49 #include "drivers/common/driverfuncs.h"
50
51 #include "r200_context.h"
52 #include "r200_ioctl.h"
53 #include "r200_state.h"
54 #include "r200_pixel.h"
55 #include "r200_tex.h"
56 #include "r200_swtcl.h"
57 #include "r200_tcl.h"
58 #include "r200_vertprog.h"
59 #include "radeon_queryobj.h"
60 #include "r200_blit.h"
61
62 #include "radeon_span.h"
63
64 #define need_GL_ARB_occlusion_query
65 #define need_GL_ARB_vertex_program
66 #define need_GL_ATI_fragment_shader
67 #define need_GL_EXT_blend_minmax
68 #define need_GL_EXT_fog_coord
69 #define need_GL_EXT_secondary_color
70 #define need_GL_EXT_blend_equation_separate
71 #define need_GL_EXT_blend_func_separate
72 #define need_GL_NV_vertex_program
73 #define need_GL_ARB_point_parameters
74 #define need_GL_EXT_framebuffer_object
75 #include "main/remap_helper.h"
76
77 #define DRIVER_DATE "20060602"
78
79 #include "utils.h"
80 #include "xmlpool.h" /* for symbolic values of enum-type options */
81
82 /* Return various strings for glGetString().
83 */
84 static const GLubyte *r200GetString( GLcontext *ctx, GLenum name )
85 {
86 r200ContextPtr rmesa = R200_CONTEXT(ctx);
87 static char buffer[128];
88 unsigned offset;
89 GLuint agp_mode = (rmesa->radeon.radeonScreen->card_type == RADEON_CARD_PCI)? 0 :
90 rmesa->radeon.radeonScreen->AGPMode;
91
92 switch ( name ) {
93 case GL_VENDOR:
94 return (GLubyte *)"Tungsten Graphics, Inc.";
95
96 case GL_RENDERER:
97 offset = driGetRendererString( buffer, "R200", DRIVER_DATE,
98 agp_mode );
99
100 sprintf( & buffer[ offset ], " %sTCL",
101 !(rmesa->radeon.TclFallback & R200_TCL_FALLBACK_TCL_DISABLE)
102 ? "" : "NO-" );
103
104 return (GLubyte *)buffer;
105
106 default:
107 return NULL;
108 }
109 }
110
111
112 /* Extension strings exported by the R200 driver.
113 */
114 static const struct dri_extension card_extensions[] =
115 {
116 { "GL_ARB_multitexture", NULL },
117 { "GL_ARB_occlusion_query", GL_ARB_occlusion_query_functions},
118 { "GL_ARB_texture_border_clamp", NULL },
119 { "GL_ARB_texture_env_add", NULL },
120 { "GL_ARB_texture_env_combine", NULL },
121 { "GL_ARB_texture_env_dot3", NULL },
122 { "GL_ARB_texture_env_crossbar", NULL },
123 { "GL_ARB_texture_mirrored_repeat", NULL },
124 { "GL_EXT_blend_minmax", GL_EXT_blend_minmax_functions },
125 { "GL_EXT_blend_subtract", NULL },
126 { "GL_EXT_fog_coord", GL_EXT_fog_coord_functions },
127 { "GL_EXT_packed_depth_stencil", NULL},
128 { "GL_EXT_secondary_color", GL_EXT_secondary_color_functions },
129 { "GL_EXT_stencil_wrap", NULL },
130 { "GL_EXT_texture_edge_clamp", NULL },
131 { "GL_EXT_texture_env_combine", NULL },
132 { "GL_EXT_texture_env_dot3", NULL },
133 { "GL_EXT_texture_filter_anisotropic", NULL },
134 { "GL_EXT_texture_lod_bias", NULL },
135 { "GL_EXT_texture_mirror_clamp", NULL },
136 { "GL_EXT_texture_rectangle", NULL },
137 { "GL_ATI_texture_env_combine3", NULL },
138 { "GL_ATI_texture_mirror_once", NULL },
139 { "GL_MESA_pack_invert", NULL },
140 { "GL_NV_blend_square", NULL },
141 { "GL_SGIS_generate_mipmap", NULL },
142 { NULL, NULL }
143 };
144
145 static const struct dri_extension blend_extensions[] = {
146 { "GL_EXT_blend_equation_separate", GL_EXT_blend_equation_separate_functions },
147 { "GL_EXT_blend_func_separate", GL_EXT_blend_func_separate_functions },
148 { NULL, NULL }
149 };
150
151 static const struct dri_extension ARB_vp_extension[] = {
152 { "GL_ARB_vertex_program", GL_ARB_vertex_program_functions }
153 };
154
155 static const struct dri_extension NV_vp_extension[] = {
156 { "GL_NV_vertex_program", GL_NV_vertex_program_functions }
157 };
158
159 static const struct dri_extension ATI_fs_extension[] = {
160 { "GL_ATI_fragment_shader", GL_ATI_fragment_shader_functions }
161 };
162
163 static const struct dri_extension point_extensions[] = {
164 { "GL_ARB_point_sprite", NULL },
165 { "GL_ARB_point_parameters", GL_ARB_point_parameters_functions },
166 { NULL, NULL }
167 };
168
169 static const struct dri_extension mm_extensions[] = {
170 { "GL_EXT_framebuffer_object", GL_EXT_framebuffer_object_functions },
171 { NULL, NULL }
172 };
173
174 extern const struct tnl_pipeline_stage _r200_render_stage;
175 extern const struct tnl_pipeline_stage _r200_tcl_stage;
176
177 static const struct tnl_pipeline_stage *r200_pipeline[] = {
178
179 /* Try and go straight to t&l
180 */
181 &_r200_tcl_stage,
182
183 /* Catch any t&l fallbacks
184 */
185 &_tnl_vertex_transform_stage,
186 &_tnl_normal_transform_stage,
187 &_tnl_lighting_stage,
188 &_tnl_fog_coordinate_stage,
189 &_tnl_texgen_stage,
190 &_tnl_texture_transform_stage,
191 &_tnl_point_attenuation_stage,
192 &_tnl_vertex_program_stage,
193 /* Try again to go to tcl?
194 * - no good for asymmetric-twoside (do with multipass)
195 * - no good for asymmetric-unfilled (do with multipass)
196 * - good for material
197 * - good for texgen
198 * - need to manipulate a bit of state
199 *
200 * - worth it/not worth it?
201 */
202
203 /* Else do them here.
204 */
205 /* &_r200_render_stage, */ /* FIXME: bugs with ut2003 */
206 &_tnl_render_stage, /* FALLBACK: */
207 NULL,
208 };
209
210
211
212 /* Initialize the driver's misc functions.
213 */
214 static void r200InitDriverFuncs( struct dd_function_table *functions )
215 {
216 functions->GetBufferSize = NULL; /* OBSOLETE */
217 functions->GetString = r200GetString;
218 }
219
220
221 static void r200_get_lock(radeonContextPtr radeon)
222 {
223 r200ContextPtr rmesa = (r200ContextPtr)radeon;
224 drm_radeon_sarea_t *sarea = radeon->sarea;
225
226 R200_STATECHANGE( rmesa, ctx );
227 if (rmesa->radeon.sarea->tiling_enabled) {
228 rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] |= R200_COLOR_TILE_ENABLE;
229 }
230 else rmesa->hw.ctx.cmd[CTX_RB3D_COLORPITCH] &= ~R200_COLOR_TILE_ENABLE;
231
232 if ( sarea->ctx_owner != rmesa->radeon.dri.hwContext ) {
233 sarea->ctx_owner = rmesa->radeon.dri.hwContext;
234 if (!radeon->radeonScreen->kernel_mm)
235 radeon_bo_legacy_texture_age(radeon->radeonScreen->bom);
236 }
237
238 }
239
240 static void r200_vtbl_emit_cs_header(struct radeon_cs *cs, radeonContextPtr rmesa)
241 {
242 }
243
244 static void r200_emit_query_finish(radeonContextPtr radeon)
245 {
246 BATCH_LOCALS(radeon);
247 struct radeon_query_object *query = radeon->query.current;
248
249 BEGIN_BATCH_NO_AUTOSTATE(4);
250 OUT_BATCH(CP_PACKET0(RADEON_RB3D_ZPASS_ADDR, 0));
251 OUT_BATCH_RELOC(0, query->bo, query->curr_offset, 0, RADEON_GEM_DOMAIN_GTT, 0);
252 END_BATCH();
253 query->curr_offset += sizeof(uint32_t);
254 assert(query->curr_offset < RADEON_QUERY_PAGE_SIZE);
255 query->emitted_begin = GL_FALSE;
256 }
257
258 static void r200_init_vtbl(radeonContextPtr radeon)
259 {
260 radeon->vtbl.get_lock = r200_get_lock;
261 radeon->vtbl.update_viewport_offset = r200UpdateViewportOffset;
262 radeon->vtbl.emit_cs_header = r200_vtbl_emit_cs_header;
263 radeon->vtbl.swtcl_flush = r200_swtcl_flush;
264 radeon->vtbl.fallback = r200Fallback;
265 radeon->vtbl.update_scissor = r200_vtbl_update_scissor;
266 radeon->vtbl.emit_query_finish = r200_emit_query_finish;
267 radeon->vtbl.blit = r200_blit;
268 }
269
270
271 /* Create the device specific rendering context.
272 */
273 GLboolean r200CreateContext( const __GLcontextModes *glVisual,
274 __DRIcontext *driContextPriv,
275 void *sharedContextPrivate)
276 {
277 __DRIscreen *sPriv = driContextPriv->driScreenPriv;
278 radeonScreenPtr screen = (radeonScreenPtr)(sPriv->private);
279 struct dd_function_table functions;
280 r200ContextPtr rmesa;
281 GLcontext *ctx;
282 int i;
283 int tcl_mode;
284
285 assert(glVisual);
286 assert(driContextPriv);
287 assert(screen);
288
289 /* Allocate the R200 context */
290 rmesa = (r200ContextPtr) CALLOC( sizeof(*rmesa) );
291 if ( !rmesa )
292 return GL_FALSE;
293
294 rmesa->radeon.radeonScreen = screen;
295 r200_init_vtbl(&rmesa->radeon);
296 /* init exp fog table data */
297 r200InitStaticFogData();
298
299 /* Parse configuration files.
300 * Do this here so that initialMaxAnisotropy is set before we create
301 * the default textures.
302 */
303 driParseConfigFiles (&rmesa->radeon.optionCache, &screen->optionCache,
304 screen->driScreen->myNum, "r200");
305 rmesa->radeon.initialMaxAnisotropy = driQueryOptionf(&rmesa->radeon.optionCache,
306 "def_max_anisotropy");
307
308 if ( sPriv->drm_version.major == 1
309 && driQueryOptionb( &rmesa->radeon.optionCache, "hyperz" ) ) {
310 if ( sPriv->drm_version.minor < 13 )
311 fprintf( stderr, "DRM version 1.%d too old to support HyperZ, "
312 "disabling.\n", sPriv->drm_version.minor );
313 else
314 rmesa->using_hyperz = GL_TRUE;
315 }
316
317 if ( sPriv->drm_version.minor >= 15 )
318 rmesa->texmicrotile = GL_TRUE;
319
320 /* Init default driver functions then plug in our R200-specific functions
321 * (the texture functions are especially important)
322 */
323 _mesa_init_driver_functions(&functions);
324 r200InitDriverFuncs(&functions);
325 r200InitIoctlFuncs(&functions);
326 r200InitStateFuncs(&functions);
327 r200InitTextureFuncs(&rmesa->radeon, &functions);
328 r200InitShaderFuncs(&functions);
329 radeonInitQueryObjFunctions(&functions);
330
331 if (!radeonInitContext(&rmesa->radeon, &functions,
332 glVisual, driContextPriv,
333 sharedContextPrivate)) {
334 FREE(rmesa);
335 return GL_FALSE;
336 }
337
338 rmesa->radeon.swtcl.RenderIndex = ~0;
339 rmesa->radeon.hw.all_dirty = 1;
340
341 /* Set the maximum texture size small enough that we can guarentee that
342 * all texture units can bind a maximal texture and have all of them in
343 * texturable memory at once. Depending on the allow_large_textures driconf
344 * setting allow larger textures.
345 */
346
347 ctx = rmesa->radeon.glCtx;
348 ctx->Const.MaxTextureUnits = driQueryOptioni (&rmesa->radeon.optionCache,
349 "texture_units");
350 ctx->Const.MaxTextureImageUnits = ctx->Const.MaxTextureUnits;
351 ctx->Const.MaxTextureCoordUnits = ctx->Const.MaxTextureUnits;
352
353 i = driQueryOptioni( &rmesa->radeon.optionCache, "allow_large_textures");
354
355 /* FIXME: When no memory manager is available we should set this
356 * to some reasonable value based on texture memory pool size */
357 ctx->Const.MaxTextureLevels = 12;
358 ctx->Const.Max3DTextureLevels = 9;
359 ctx->Const.MaxCubeTextureLevels = 12;
360 ctx->Const.MaxTextureRectSize = 2048;
361
362 ctx->Const.MaxTextureMaxAnisotropy = 16.0;
363
364 /* No wide AA points.
365 */
366 ctx->Const.MinPointSize = 1.0;
367 ctx->Const.MinPointSizeAA = 1.0;
368 ctx->Const.MaxPointSizeAA = 1.0;
369 ctx->Const.PointSizeGranularity = 0.0625;
370 if (rmesa->radeon.radeonScreen->drmSupportsPointSprites)
371 ctx->Const.MaxPointSize = 2047.0;
372 else
373 ctx->Const.MaxPointSize = 1.0;
374
375 /* mesa initialization problem - _mesa_init_point was already called */
376 ctx->Point.MaxSize = ctx->Const.MaxPointSize;
377
378 ctx->Const.MinLineWidth = 1.0;
379 ctx->Const.MinLineWidthAA = 1.0;
380 ctx->Const.MaxLineWidth = 10.0;
381 ctx->Const.MaxLineWidthAA = 10.0;
382 ctx->Const.LineWidthGranularity = 0.0625;
383
384 ctx->Const.VertexProgram.MaxNativeInstructions = R200_VSF_MAX_INST;
385 ctx->Const.VertexProgram.MaxNativeAttribs = 12;
386 ctx->Const.VertexProgram.MaxNativeTemps = R200_VSF_MAX_TEMPS;
387 ctx->Const.VertexProgram.MaxNativeParameters = R200_VSF_MAX_PARAM;
388 ctx->Const.VertexProgram.MaxNativeAddressRegs = 1;
389
390 ctx->Const.MaxDrawBuffers = 1;
391
392 _mesa_set_mvp_with_dp4( ctx, GL_TRUE );
393
394 /* Initialize the software rasterizer and helper modules.
395 */
396 _swrast_CreateContext( ctx );
397 _vbo_CreateContext( ctx );
398 _tnl_CreateContext( ctx );
399 _swsetup_CreateContext( ctx );
400 _ae_create_context( ctx );
401
402 /* Install the customized pipeline:
403 */
404 _tnl_destroy_pipeline( ctx );
405 _tnl_install_pipeline( ctx, r200_pipeline );
406
407 /* Try and keep materials and vertices separate:
408 */
409 /* _tnl_isolate_materials( ctx, GL_TRUE ); */
410
411
412 /* Configure swrast and TNL to match hardware characteristics:
413 */
414 _swrast_allow_pixel_fog( ctx, GL_FALSE );
415 _swrast_allow_vertex_fog( ctx, GL_TRUE );
416 _tnl_allow_pixel_fog( ctx, GL_FALSE );
417 _tnl_allow_vertex_fog( ctx, GL_TRUE );
418
419
420 for ( i = 0 ; i < R200_MAX_TEXTURE_UNITS ; i++ ) {
421 _math_matrix_ctr( &rmesa->TexGenMatrix[i] );
422 _math_matrix_set_identity( &rmesa->TexGenMatrix[i] );
423 }
424 _math_matrix_ctr( &rmesa->tmpmat );
425 _math_matrix_set_identity( &rmesa->tmpmat );
426
427 driInitExtensions( ctx, card_extensions, GL_TRUE );
428
429 if (rmesa->radeon.radeonScreen->kernel_mm)
430 driInitExtensions(ctx, mm_extensions, GL_FALSE);
431 if (!(rmesa->radeon.radeonScreen->chip_flags & R200_CHIPSET_YCBCR_BROKEN)) {
432 /* yuv textures don't work with some chips - R200 / rv280 okay so far
433 others get the bit ordering right but don't actually do YUV-RGB conversion */
434 _mesa_enable_extension( ctx, "GL_MESA_ycbcr_texture" );
435 }
436 if (rmesa->radeon.glCtx->Mesa_DXTn) {
437 _mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" );
438 _mesa_enable_extension( ctx, "GL_S3_s3tc" );
439 }
440 else if (driQueryOptionb (&rmesa->radeon.optionCache, "force_s3tc_enable")) {
441 _mesa_enable_extension( ctx, "GL_EXT_texture_compression_s3tc" );
442 }
443
444 if (rmesa->radeon.radeonScreen->drmSupportsCubeMapsR200)
445 _mesa_enable_extension( ctx, "GL_ARB_texture_cube_map" );
446 if (rmesa->radeon.radeonScreen->drmSupportsBlendColor) {
447 driInitExtensions( ctx, blend_extensions, GL_FALSE );
448 }
449 if(rmesa->radeon.radeonScreen->drmSupportsVertexProgram)
450 driInitSingleExtension( ctx, ARB_vp_extension );
451 if(driQueryOptionb(&rmesa->radeon.optionCache, "nv_vertex_program"))
452 driInitSingleExtension( ctx, NV_vp_extension );
453
454 if ((ctx->Const.MaxTextureUnits == 6) && rmesa->radeon.radeonScreen->drmSupportsFragShader)
455 driInitSingleExtension( ctx, ATI_fs_extension );
456 if (rmesa->radeon.radeonScreen->drmSupportsPointSprites)
457 driInitExtensions( ctx, point_extensions, GL_FALSE );
458
459 if (!rmesa->radeon.radeonScreen->kernel_mm)
460 _mesa_disable_extension(ctx, "GL_ARB_occlusion_query");
461 #if 0
462 r200InitDriverFuncs( ctx );
463 r200InitIoctlFuncs( ctx );
464 r200InitStateFuncs( ctx );
465 r200InitTextureFuncs( ctx );
466 #endif
467 /* plug in a few more device driver functions */
468 /* XXX these should really go right after _mesa_init_driver_functions() */
469 radeon_fbo_init(&rmesa->radeon);
470 radeonInitSpanFuncs( ctx );
471 r200InitPixelFuncs( ctx );
472 r200InitTnlFuncs( ctx );
473 r200InitState( rmesa );
474 r200InitSwtcl( ctx );
475
476 rmesa->prefer_gart_client_texturing =
477 (getenv("R200_GART_CLIENT_TEXTURES") != 0);
478
479 tcl_mode = driQueryOptioni(&rmesa->radeon.optionCache, "tcl_mode");
480 if (driQueryOptionb(&rmesa->radeon.optionCache, "no_rast")) {
481 fprintf(stderr, "disabling 3D acceleration\n");
482 FALLBACK(rmesa, R200_FALLBACK_DISABLE, 1);
483 }
484 else if (tcl_mode == DRI_CONF_TCL_SW || getenv("R200_NO_TCL") ||
485 !(rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL)) {
486 if (rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL) {
487 rmesa->radeon.radeonScreen->chip_flags &= ~RADEON_CHIPSET_TCL;
488 fprintf(stderr, "Disabling HW TCL support\n");
489 }
490 TCL_FALLBACK(rmesa->radeon.glCtx, R200_TCL_FALLBACK_TCL_DISABLE, 1);
491 }
492
493 return GL_TRUE;
494 }
495
496
497 void r200DestroyContext( __DRIcontext *driContextPriv )
498 {
499 int i;
500 r200ContextPtr rmesa = (r200ContextPtr)driContextPriv->driverPrivate;
501 if (rmesa)
502 {
503 for ( i = 0 ; i < R200_MAX_TEXTURE_UNITS ; i++ ) {
504 _math_matrix_dtr( &rmesa->TexGenMatrix[i] );
505 }
506 }
507 radeonDestroyContext(driContextPriv);
508 }