2 Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
4 The Weather Channel (TM) funded Tungsten Graphics to develop the
5 initial release of the Radeon 8500 driver under the XFree86 license.
6 This notice must be preserved.
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
31 * Keith Whitwell <keith@tungstengraphics.com>
34 #include "main/glheader.h"
35 #include "main/imports.h"
36 #include "main/colormac.h"
37 #include "main/context.h"
38 #include "main/enums.h"
39 #include "main/image.h"
40 #include "main/simple_list.h"
41 #include "main/texstore.h"
42 #include "main/teximage.h"
43 #include "main/texobj.h"
45 #include "radeon_mipmap_tree.h"
46 #include "r200_context.h"
47 #include "r200_ioctl.h"
55 * Set the texture wrap modes.
57 * \param t Texture object whose wrap modes are to be set
58 * \param swrap Wrap mode for the \a s texture coordinate
59 * \param twrap Wrap mode for the \a t texture coordinate
62 static void r200SetTexWrap( radeonTexObjPtr t
, GLenum swrap
, GLenum twrap
, GLenum rwrap
)
64 GLboolean is_clamp
= GL_FALSE
;
65 GLboolean is_clamp_to_border
= GL_FALSE
;
66 struct gl_texture_object
*tObj
= &t
->base
;
68 radeon_print(RADEON_TEXTURE
, RADEON_TRACE
,
69 "%s(tex %p) sw %s, tw %s, rw %s\n",
71 _mesa_lookup_enum_by_nr(swrap
),
72 _mesa_lookup_enum_by_nr(twrap
),
73 _mesa_lookup_enum_by_nr(rwrap
));
75 t
->pp_txfilter
&= ~(R200_CLAMP_S_MASK
| R200_CLAMP_T_MASK
| R200_BORDER_MODE_D3D
);
79 t
->pp_txfilter
|= R200_CLAMP_S_WRAP
;
82 t
->pp_txfilter
|= R200_CLAMP_S_CLAMP_GL
;
85 case GL_CLAMP_TO_EDGE
:
86 t
->pp_txfilter
|= R200_CLAMP_S_CLAMP_LAST
;
88 case GL_CLAMP_TO_BORDER
:
89 t
->pp_txfilter
|= R200_CLAMP_S_CLAMP_GL
;
90 is_clamp_to_border
= GL_TRUE
;
92 case GL_MIRRORED_REPEAT
:
93 t
->pp_txfilter
|= R200_CLAMP_S_MIRROR
;
95 case GL_MIRROR_CLAMP_EXT
:
96 t
->pp_txfilter
|= R200_CLAMP_S_MIRROR_CLAMP_GL
;
99 case GL_MIRROR_CLAMP_TO_EDGE_EXT
:
100 t
->pp_txfilter
|= R200_CLAMP_S_MIRROR_CLAMP_LAST
;
102 case GL_MIRROR_CLAMP_TO_BORDER_EXT
:
103 t
->pp_txfilter
|= R200_CLAMP_S_MIRROR_CLAMP_GL
;
104 is_clamp_to_border
= GL_TRUE
;
107 _mesa_problem(NULL
, "bad S wrap mode in %s", __FUNCTION__
);
110 if (tObj
->Target
!= GL_TEXTURE_1D
) {
113 t
->pp_txfilter
|= R200_CLAMP_T_WRAP
;
116 t
->pp_txfilter
|= R200_CLAMP_T_CLAMP_GL
;
119 case GL_CLAMP_TO_EDGE
:
120 t
->pp_txfilter
|= R200_CLAMP_T_CLAMP_LAST
;
122 case GL_CLAMP_TO_BORDER
:
123 t
->pp_txfilter
|= R200_CLAMP_T_CLAMP_GL
;
124 is_clamp_to_border
= GL_TRUE
;
126 case GL_MIRRORED_REPEAT
:
127 t
->pp_txfilter
|= R200_CLAMP_T_MIRROR
;
129 case GL_MIRROR_CLAMP_EXT
:
130 t
->pp_txfilter
|= R200_CLAMP_T_MIRROR_CLAMP_GL
;
133 case GL_MIRROR_CLAMP_TO_EDGE_EXT
:
134 t
->pp_txfilter
|= R200_CLAMP_T_MIRROR_CLAMP_LAST
;
136 case GL_MIRROR_CLAMP_TO_BORDER_EXT
:
137 t
->pp_txfilter
|= R200_CLAMP_T_MIRROR_CLAMP_GL
;
138 is_clamp_to_border
= GL_TRUE
;
141 _mesa_problem(NULL
, "bad T wrap mode in %s", __FUNCTION__
);
145 t
->pp_txformat_x
&= ~R200_CLAMP_Q_MASK
;
149 t
->pp_txformat_x
|= R200_CLAMP_Q_WRAP
;
152 t
->pp_txformat_x
|= R200_CLAMP_Q_CLAMP_GL
;
155 case GL_CLAMP_TO_EDGE
:
156 t
->pp_txformat_x
|= R200_CLAMP_Q_CLAMP_LAST
;
158 case GL_CLAMP_TO_BORDER
:
159 t
->pp_txformat_x
|= R200_CLAMP_Q_CLAMP_GL
;
160 is_clamp_to_border
= GL_TRUE
;
162 case GL_MIRRORED_REPEAT
:
163 t
->pp_txformat_x
|= R200_CLAMP_Q_MIRROR
;
165 case GL_MIRROR_CLAMP_EXT
:
166 t
->pp_txformat_x
|= R200_CLAMP_Q_MIRROR_CLAMP_GL
;
169 case GL_MIRROR_CLAMP_TO_EDGE_EXT
:
170 t
->pp_txformat_x
|= R200_CLAMP_Q_MIRROR_CLAMP_LAST
;
172 case GL_MIRROR_CLAMP_TO_BORDER_EXT
:
173 t
->pp_txformat_x
|= R200_CLAMP_Q_MIRROR_CLAMP_GL
;
174 is_clamp_to_border
= GL_TRUE
;
177 _mesa_problem(NULL
, "bad R wrap mode in %s", __FUNCTION__
);
180 if ( is_clamp_to_border
) {
181 t
->pp_txfilter
|= R200_BORDER_MODE_D3D
;
184 t
->border_fallback
= (is_clamp
&& is_clamp_to_border
);
187 static void r200SetTexMaxAnisotropy( radeonTexObjPtr t
, GLfloat max
)
189 t
->pp_txfilter
&= ~R200_MAX_ANISO_MASK
;
190 radeon_print(RADEON_TEXTURE
, RADEON_TRACE
,
191 "%s(tex %p) max %f.\n",
195 t
->pp_txfilter
|= R200_MAX_ANISO_1_TO_1
;
196 } else if ( max
<= 2.0 ) {
197 t
->pp_txfilter
|= R200_MAX_ANISO_2_TO_1
;
198 } else if ( max
<= 4.0 ) {
199 t
->pp_txfilter
|= R200_MAX_ANISO_4_TO_1
;
200 } else if ( max
<= 8.0 ) {
201 t
->pp_txfilter
|= R200_MAX_ANISO_8_TO_1
;
203 t
->pp_txfilter
|= R200_MAX_ANISO_16_TO_1
;
208 * Set the texture magnification and minification modes.
210 * \param t Texture whose filter modes are to be set
211 * \param minf Texture minification mode
212 * \param magf Texture magnification mode
215 static void r200SetTexFilter( radeonTexObjPtr t
, GLenum minf
, GLenum magf
)
217 GLuint anisotropy
= (t
->pp_txfilter
& R200_MAX_ANISO_MASK
);
219 /* Force revalidation to account for switches from/to mipmapping. */
220 t
->validated
= GL_FALSE
;
222 t
->pp_txfilter
&= ~(R200_MIN_FILTER_MASK
| R200_MAG_FILTER_MASK
);
223 t
->pp_txformat_x
&= ~R200_VOLUME_FILTER_MASK
;
225 radeon_print(RADEON_TEXTURE
, RADEON_TRACE
,
226 "%s(tex %p) minf %s, maxf %s, anisotropy %d.\n",
228 _mesa_lookup_enum_by_nr(minf
),
229 _mesa_lookup_enum_by_nr(magf
),
232 if ( anisotropy
== R200_MAX_ANISO_1_TO_1
) {
235 t
->pp_txfilter
|= R200_MIN_FILTER_NEAREST
;
238 t
->pp_txfilter
|= R200_MIN_FILTER_LINEAR
;
240 case GL_NEAREST_MIPMAP_NEAREST
:
241 t
->pp_txfilter
|= R200_MIN_FILTER_NEAREST_MIP_NEAREST
;
243 case GL_NEAREST_MIPMAP_LINEAR
:
244 t
->pp_txfilter
|= R200_MIN_FILTER_LINEAR_MIP_NEAREST
;
246 case GL_LINEAR_MIPMAP_NEAREST
:
247 t
->pp_txfilter
|= R200_MIN_FILTER_NEAREST_MIP_LINEAR
;
249 case GL_LINEAR_MIPMAP_LINEAR
:
250 t
->pp_txfilter
|= R200_MIN_FILTER_LINEAR_MIP_LINEAR
;
256 t
->pp_txfilter
|= R200_MIN_FILTER_ANISO_NEAREST
;
259 t
->pp_txfilter
|= R200_MIN_FILTER_ANISO_LINEAR
;
261 case GL_NEAREST_MIPMAP_NEAREST
:
262 case GL_LINEAR_MIPMAP_NEAREST
:
263 t
->pp_txfilter
|= R200_MIN_FILTER_ANISO_NEAREST_MIP_NEAREST
;
265 case GL_NEAREST_MIPMAP_LINEAR
:
266 case GL_LINEAR_MIPMAP_LINEAR
:
267 t
->pp_txfilter
|= R200_MIN_FILTER_ANISO_NEAREST_MIP_LINEAR
;
272 /* Note we don't have 3D mipmaps so only use the mag filter setting
273 * to set the 3D texture filter mode.
277 t
->pp_txfilter
|= R200_MAG_FILTER_NEAREST
;
278 t
->pp_txformat_x
|= R200_VOLUME_FILTER_NEAREST
;
281 t
->pp_txfilter
|= R200_MAG_FILTER_LINEAR
;
282 t
->pp_txformat_x
|= R200_VOLUME_FILTER_LINEAR
;
287 static void r200SetTexBorderColor( radeonTexObjPtr t
, const GLfloat color
[4] )
290 CLAMPED_FLOAT_TO_UBYTE(c
[0], color
[0]);
291 CLAMPED_FLOAT_TO_UBYTE(c
[1], color
[1]);
292 CLAMPED_FLOAT_TO_UBYTE(c
[2], color
[2]);
293 CLAMPED_FLOAT_TO_UBYTE(c
[3], color
[3]);
294 t
->pp_border_color
= radeonPackColor( 4, c
[0], c
[1], c
[2], c
[3] );
297 static void r200TexEnv( struct gl_context
*ctx
, GLenum target
,
298 GLenum pname
, const GLfloat
*param
)
300 r200ContextPtr rmesa
= R200_CONTEXT(ctx
);
301 GLuint unit
= ctx
->Texture
.CurrentUnit
;
302 struct gl_texture_unit
*texUnit
= &ctx
->Texture
.Unit
[unit
];
304 radeon_print(RADEON_TEXTURE
| RADEON_STATE
, RADEON_VERBOSE
, "%s( %s )\n",
305 __FUNCTION__
, _mesa_lookup_enum_by_nr( pname
) );
307 /* This is incorrect: Need to maintain this data for each of
308 * GL_TEXTURE_{123}D, GL_TEXTURE_RECTANGLE_NV, etc, and switch
309 * between them according to _ReallyEnabled.
312 case GL_TEXTURE_ENV_COLOR
: {
315 UNCLAMPED_FLOAT_TO_RGBA_CHAN( c
, texUnit
->EnvColor
);
316 envColor
= radeonPackColor( 4, c
[0], c
[1], c
[2], c
[3] );
317 if ( rmesa
->hw
.tf
.cmd
[TF_TFACTOR_0
+ unit
] != envColor
) {
318 R200_STATECHANGE( rmesa
, tf
);
319 rmesa
->hw
.tf
.cmd
[TF_TFACTOR_0
+ unit
] = envColor
;
324 case GL_TEXTURE_LOD_BIAS_EXT
: {
327 const int fixed_one
= R200_LOD_BIAS_FIXED_ONE
;
329 /* The R200's LOD bias is a signed 2's complement value with a
330 * range of -16.0 <= bias < 16.0.
332 * NOTE: Add a small bias to the bias for conform mipsel.c test.
335 min
= driQueryOptionb (&rmesa
->radeon
.optionCache
, "no_neg_lod_bias") ?
337 bias
= CLAMP( bias
, min
, 16.0 );
338 b
= ((int)(bias
* fixed_one
)
339 + R200_LOD_BIAS_CORRECTION
) & R200_LOD_BIAS_MASK
;
341 if ( (rmesa
->hw
.tex
[unit
].cmd
[TEX_PP_TXFORMAT_X
] & R200_LOD_BIAS_MASK
) != b
) {
342 R200_STATECHANGE( rmesa
, tex
[unit
] );
343 rmesa
->hw
.tex
[unit
].cmd
[TEX_PP_TXFORMAT_X
] &= ~R200_LOD_BIAS_MASK
;
344 rmesa
->hw
.tex
[unit
].cmd
[TEX_PP_TXFORMAT_X
] |= b
;
348 case GL_COORD_REPLACE_ARB
:
349 if (ctx
->Point
.PointSprite
) {
350 R200_STATECHANGE( rmesa
, spr
);
351 if ((GLenum
)param
[0]) {
352 rmesa
->hw
.spr
.cmd
[SPR_POINT_SPRITE_CNTL
] |= R200_PS_GEN_TEX_0
<< unit
;
354 rmesa
->hw
.spr
.cmd
[SPR_POINT_SPRITE_CNTL
] &= ~(R200_PS_GEN_TEX_0
<< unit
);
365 * Changes variables and flags for a state update, which will happen at the
366 * next UpdateTextureState
369 static void r200TexParameter( struct gl_context
*ctx
, GLenum target
,
370 struct gl_texture_object
*texObj
,
371 GLenum pname
, const GLfloat
*params
)
373 radeonTexObj
* t
= radeon_tex_obj(texObj
);
375 radeon_print(RADEON_TEXTURE
| RADEON_STATE
, RADEON_VERBOSE
,
376 "%s(%p, tex %p) target %s, pname %s\n",
377 __FUNCTION__
, ctx
, texObj
,
378 _mesa_lookup_enum_by_nr( target
),
379 _mesa_lookup_enum_by_nr( pname
) );
382 case GL_TEXTURE_MIN_FILTER
:
383 case GL_TEXTURE_MAG_FILTER
:
384 case GL_TEXTURE_MAX_ANISOTROPY_EXT
:
385 r200SetTexMaxAnisotropy( t
, texObj
->MaxAnisotropy
);
386 r200SetTexFilter( t
, texObj
->MinFilter
, texObj
->MagFilter
);
389 case GL_TEXTURE_WRAP_S
:
390 case GL_TEXTURE_WRAP_T
:
391 case GL_TEXTURE_WRAP_R
:
392 r200SetTexWrap( t
, texObj
->WrapS
, texObj
->WrapT
, texObj
->WrapR
);
395 case GL_TEXTURE_BORDER_COLOR
:
396 r200SetTexBorderColor( t
, texObj
->BorderColor
.f
);
399 case GL_TEXTURE_BASE_LEVEL
:
400 case GL_TEXTURE_MAX_LEVEL
:
401 case GL_TEXTURE_MIN_LOD
:
402 case GL_TEXTURE_MAX_LOD
:
403 t
->validated
= GL_FALSE
;
412 static void r200DeleteTexture(struct gl_context
* ctx
, struct gl_texture_object
*texObj
)
414 r200ContextPtr rmesa
= R200_CONTEXT(ctx
);
415 radeonTexObj
* t
= radeon_tex_obj(texObj
);
417 radeon_print(RADEON_TEXTURE
| RADEON_STATE
, RADEON_NORMAL
,
418 "%s( %p (target = %s) )\n", __FUNCTION__
,
420 _mesa_lookup_enum_by_nr(texObj
->Target
));
424 radeon_firevertices(&rmesa
->radeon
);
425 for ( i
= 0 ; i
< rmesa
->radeon
.glCtx
->Const
.MaxTextureUnits
; i
++ ) {
426 if ( t
== rmesa
->state
.texture
.unit
[i
].texobj
) {
427 rmesa
->state
.texture
.unit
[i
].texobj
= NULL
;
428 rmesa
->hw
.tex
[i
].dirty
= GL_FALSE
;
429 rmesa
->hw
.cube
[i
].dirty
= GL_FALSE
;
434 radeon_miptree_unreference(&t
->mt
);
436 _mesa_delete_texture_object(ctx
, texObj
);
440 * - Same GEN_MODE for all active bits
441 * - Same EyePlane/ObjPlane for all active bits when using Eye/Obj
442 * - STRQ presumably all supported (matrix means incoming R values
443 * can end up in STQ, this has implications for vertex support,
444 * presumably ok if maos is used, though?)
446 * Basically impossible to do this on the fly - just collect some
447 * basic info & do the checks from ValidateState().
449 static void r200TexGen( struct gl_context
*ctx
,
452 const GLfloat
*params
)
454 r200ContextPtr rmesa
= R200_CONTEXT(ctx
);
455 GLuint unit
= ctx
->Texture
.CurrentUnit
;
456 rmesa
->recheck_texgen
[unit
] = GL_TRUE
;
461 * Allocate a new texture object.
462 * Called via ctx->Driver.NewTextureObject.
463 * Note: this function will be called during context creation to
464 * allocate the default texture objects.
465 * Fixup MaxAnisotropy according to user preference.
467 static struct gl_texture_object
*r200NewTextureObject(struct gl_context
* ctx
,
471 r200ContextPtr rmesa
= R200_CONTEXT(ctx
);
472 radeonTexObj
* t
= CALLOC_STRUCT(radeon_tex_obj
);
475 radeon_print(RADEON_STATE
| RADEON_TEXTURE
, RADEON_NORMAL
,
476 "%s(%p) target %s, new texture %p.\n",
478 _mesa_lookup_enum_by_nr(target
), t
);
480 _mesa_initialize_texture_object(&t
->base
, name
, target
);
481 t
->base
.MaxAnisotropy
= rmesa
->radeon
.initialMaxAnisotropy
;
483 /* Initialize hardware state */
484 r200SetTexWrap( t
, t
->base
.WrapS
, t
->base
.WrapT
, t
->base
.WrapR
);
485 r200SetTexMaxAnisotropy( t
, t
->base
.MaxAnisotropy
);
486 r200SetTexFilter(t
, t
->base
.MinFilter
, t
->base
.MagFilter
);
487 r200SetTexBorderColor(t
, t
->base
.BorderColor
.f
);
494 void r200InitTextureFuncs( radeonContextPtr radeon
, struct dd_function_table
*functions
)
496 /* Note: we only plug in the functions we implement in the driver
497 * since _mesa_init_driver_functions() was already called.
499 functions
->ChooseTextureFormat
= radeonChooseTextureFormat_mesa
;
500 functions
->TexImage1D
= radeonTexImage1D
;
501 functions
->TexImage2D
= radeonTexImage2D
;
502 #if ENABLE_HW_3D_TEXTURE
503 functions
->TexImage3D
= radeonTexImage3D
;
505 functions
->TexImage3D
= _mesa_store_teximage3d
;
507 functions
->TexSubImage1D
= radeonTexSubImage1D
;
508 functions
->TexSubImage2D
= radeonTexSubImage2D
;
509 #if ENABLE_HW_3D_TEXTURE
510 functions
->TexSubImage3D
= radeonTexSubImage3D
;
512 functions
->TexSubImage3D
= _mesa_store_texsubimage3d
;
514 functions
->GetTexImage
= radeonGetTexImage
;
515 functions
->GetCompressedTexImage
= radeonGetCompressedTexImage
;
516 functions
->NewTextureObject
= r200NewTextureObject
;
517 // functions->BindTexture = r200BindTexture;
518 functions
->DeleteTexture
= r200DeleteTexture
;
519 functions
->IsTextureResident
= driIsTextureResident
;
521 functions
->TexEnv
= r200TexEnv
;
522 functions
->TexParameter
= r200TexParameter
;
523 functions
->TexGen
= r200TexGen
;
525 functions
->CompressedTexImage2D
= radeonCompressedTexImage2D
;
526 functions
->CompressedTexSubImage2D
= radeonCompressedTexSubImage2D
;
528 if (radeon
->radeonScreen
->kernel_mm
) {
529 functions
->CopyTexImage2D
= radeonCopyTexImage2D
;
530 functions
->CopyTexSubImage2D
= radeonCopyTexSubImage2D
;
533 functions
->GenerateMipmap
= radeonGenerateMipmap
;
535 functions
->NewTextureImage
= radeonNewTextureImage
;
536 functions
->FreeTexImageData
= radeonFreeTexImageData
;
537 functions
->MapTexture
= radeonMapTexture
;
538 functions
->UnmapTexture
= radeonUnmapTexture
;
540 driInitTextureFormats();