src/mesa/drivers/dri/r300/compiler/radeon_optimize.c

   1 /*
   2  * Copyright (C) 2009 Nicolai Haehnle.
   3  *
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining
   7  * a copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sublicense, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial
  16  * portions of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  */
  27
  28 #include "radeon_dataflow.h"
  29
  30 #include "radeon_compiler.h"
  31 #include "radeon_swizzle.h"
  32
  33 struct peephole_state {
  34         struct rc_instruction * Inst;
  35         /** Stores a bitmask of the components that are still "alive" (i.e.
  36          * they have not been written to since Inst was executed.)
  37          */
  38         unsigned int WriteMask;
  39 };
  40
  41 typedef void (*rc_presub_replace_fn)(struct peephole_state *,
  42                                                 struct rc_instruction *,
  43                                                 unsigned int);
  44
  45 static struct rc_src_register chain_srcregs(struct rc_src_register outer, struct rc_src_register inner)
  46 {
  47         struct rc_src_register combine;
  48         combine.File = inner.File;
  49         combine.Index = inner.Index;
  50         combine.RelAddr = inner.RelAddr;
  51         if (outer.Abs) {
  52                 combine.Abs = 1;
  53                 combine.Negate = outer.Negate;
  54         } else {
  55                 combine.Abs = inner.Abs;
  56                 combine.Negate = 0;
  57                 for(unsigned int chan = 0; chan < 4; ++chan) {
  58                         unsigned int swz = GET_SWZ(outer.Swizzle, chan);
  59                         if (swz < 4)
  60                                 combine.Negate |= GET_BIT(inner.Negate, swz) << chan;
  61                 }
  62                 combine.Negate ^= outer.Negate;
  63         }
  64         combine.Swizzle = combine_swizzles(inner.Swizzle, outer.Swizzle);
  65         return combine;
  66 }
  67
  68 struct copy_propagate_state {
  69         struct radeon_compiler * C;
  70         struct rc_instruction * Mov;
  71         unsigned int Conflict:1;
  72
  73         /** Whether Mov's source has been clobbered */
  74         unsigned int SourceClobbered:1;
  75
  76         /** Which components of Mov's destination register are still from that Mov? */
  77         unsigned int MovMask:4;
  78
  79         /** Which components of Mov's destination register are clearly *not* from that Mov */
  80         unsigned int DefinedMask:4;
  81
  82         /** Which components of Mov's source register are sourced */
  83         unsigned int SourcedMask:4;
  84
  85         /** Branch depth beyond Mov; negative value indicates we left the Mov's block */
  86         int BranchDepth;
  87 };
  88
  89 /**
  90  * This is a callback function that is meant to be passed to
  91  * rc_for_all_reads_mask.  This function will be called once for each source
  92  * register in inst.
  93  * @param inst The instruction that the source register belongs to.
  94  * @param file The register file of the source register.
  95  * @param index The index of the source register.
  96  * @param mask The components of the source register that are being read from.
  97  */
  98 static void copy_propagate_scan_read(void * data, struct rc_instruction * inst,
  99                 rc_register_file file, unsigned int index, unsigned int mask)
 100 {
 101         struct copy_propagate_state * s = data;
 102
 103         /* XXX This could probably be handled better. */
 104         if (file == RC_FILE_ADDRESS) {
 105                 s->Conflict = 1;
 106                 return;
 107         }
 108
 109         if (file != RC_FILE_TEMPORARY || index != s->Mov->U.I.DstReg.Index)
 110                 return;
 111
 112         /* These instructions cannot read from the constants file.
 113          * see radeonTransformTEX()
 114          */
 115         if(s->Mov->U.I.SrcReg[0].File != RC_FILE_TEMPORARY &&
 116                         s->Mov->U.I.SrcReg[0].File != RC_FILE_INPUT &&
 117                                 (inst->U.I.Opcode == RC_OPCODE_TEX ||
 118                                 inst->U.I.Opcode == RC_OPCODE_TXB ||
 119                                 inst->U.I.Opcode == RC_OPCODE_TXP ||
 120                                 inst->U.I.Opcode == RC_OPCODE_KIL)){
 121                 s->Conflict = 1;
 122                 return;
 123         }
 124         if ((mask & s->MovMask) == mask) {
 125                 if (s->SourceClobbered) {
 126                         s->Conflict = 1;
 127                 }
 128         } else if ((mask & s->DefinedMask) == mask) {
 129                 /* read from something entirely written by other instruction: this is okay */
 130         } else {
 131                 /* read from component combination that is not well-defined without
 132                  * the MOV: cannot remove it */
 133                 s->Conflict = 1;
 134         }
 135 }
 136
 137 static void copy_propagate_scan_write(void * data, struct rc_instruction * inst,
 138                 rc_register_file file, unsigned int index, unsigned int mask)
 139 {
 140         struct copy_propagate_state * s = data;
 141
 142         if (s->BranchDepth < 0)
 143                 return;
 144
 145         if (file == s->Mov->U.I.DstReg.File && index == s->Mov->U.I.DstReg.Index) {
 146                 s->MovMask &= ~mask;
 147                 if (s->BranchDepth == 0)
 148                         s->DefinedMask |= mask;
 149                 else
 150                         s->DefinedMask &= ~mask;
 151         }
 152         if (file == s->Mov->U.I.SrcReg[0].File && index == s->Mov->U.I.SrcReg[0].Index) {
 153                 if (mask & s->SourcedMask)
 154                         s->SourceClobbered = 1;
 155         } else if (s->Mov->U.I.SrcReg[0].RelAddr && file == RC_FILE_ADDRESS) {
 156                 s->SourceClobbered = 1;
 157         }
 158 }
 159
 160 static void copy_propagate(struct radeon_compiler * c, struct rc_instruction * inst_mov)
 161 {
 162         struct copy_propagate_state s;
 163
 164         if (inst_mov->U.I.DstReg.File != RC_FILE_TEMPORARY ||
 165             inst_mov->U.I.DstReg.RelAddr ||
 166             inst_mov->U.I.WriteALUResult ||
 167             inst_mov->U.I.SaturateMode)
 168                 return;
 169
 170         memset(&s, 0, sizeof(s));
 171         s.C = c;
 172         s.Mov = inst_mov;
 173         s.MovMask = inst_mov->U.I.DstReg.WriteMask;
 174         s.DefinedMask = RC_MASK_XYZW & ~s.MovMask;
 175
 176         for(unsigned int chan = 0; chan < 4; ++chan) {
 177                 unsigned int swz = GET_SWZ(inst_mov->U.I.SrcReg[0].Swizzle, chan);
 178                 s.SourcedMask |= (1 << swz) & RC_MASK_XYZW;
 179         }
 180
 181         /* 1st pass: Check whether all subsequent readers can be changed */
 182         for(struct rc_instruction * inst = inst_mov->Next;
 183             inst != &c->Program.Instructions;
 184             inst = inst->Next) {
 185                 const struct rc_opcode_info * info = rc_get_opcode_info(inst->U.I.Opcode);
 186                 /* XXX In the future we might be able to make the optimizer
 187                  * smart enough to handle loops. */
 188                 if(inst->U.I.Opcode == RC_OPCODE_BGNLOOP
 189                                 || inst->U.I.Opcode == RC_OPCODE_ENDLOOP){
 190                         return;
 191                 }
 192
 193                 /* It is possible to do copy propigation in this situation,
 194                  * just not right now, see peephole_add_presub_inv() */
 195                 if (inst_mov->U.I.PreSub.Opcode != RC_PRESUB_NONE &&
 196                                 (info->NumSrcRegs > 2 || info->HasTexture)) {
 197                         return;
 198                 }
 199
 200                 rc_for_all_reads_mask(inst, copy_propagate_scan_read, &s);
 201                 rc_for_all_writes_mask(inst, copy_propagate_scan_write, &s);
 202                 if (s.Conflict)
 203                         return;
 204
 205                 if (s.BranchDepth >= 0) {
 206                         if (inst->U.I.Opcode == RC_OPCODE_IF) {
 207                                 s.BranchDepth++;
 208                         } else if (inst->U.I.Opcode == RC_OPCODE_ENDIF
 209                                 || inst->U.I.Opcode == RC_OPCODE_ELSE) {
 210                                 s.BranchDepth--;
 211                                 if (s.BranchDepth < 0) {
 212                                         s.DefinedMask &= ~s.MovMask;
 213                                         s.MovMask = 0;
 214                                 }
 215                         }
 216                 }
 217         }
 218
 219         if (s.Conflict)
 220                 return;
 221
 222         /* 2nd pass: We can satisfy all readers, so switch them over all at once */
 223         s.MovMask = inst_mov->U.I.DstReg.WriteMask;
 224         s.BranchDepth = 0;
 225
 226         for(struct rc_instruction * inst = inst_mov->Next;
 227             inst != &c->Program.Instructions;
 228             inst = inst->Next) {
 229                 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode);
 230                 for(unsigned int src = 0; src < opcode->NumSrcRegs; ++src) {
 231                         if (inst->U.I.SrcReg[src].File == RC_FILE_TEMPORARY &&
 232                             inst->U.I.SrcReg[src].Index == s.Mov->U.I.DstReg.Index) {
 233                                 unsigned int refmask = 0;
 234
 235                                 for(unsigned int chan = 0; chan < 4; ++chan) {
 236                                         unsigned int swz = GET_SWZ(inst->U.I.SrcReg[src].Swizzle, chan);
 237                                         refmask |= (1 << swz) & RC_MASK_XYZW;
 238                                 }
 239
 240                                 if ((refmask & s.MovMask) == refmask) {
 241                                         inst->U.I.SrcReg[src] = chain_srcregs(inst->U.I.SrcReg[src], s.Mov->U.I.SrcReg[0]);
 242                                         if (s.Mov->U.I.SrcReg[0].File == RC_FILE_PRESUB)
 243                                                 inst->U.I.PreSub = s.Mov->U.I.PreSub;
 244                                 }
 245                         }
 246                 }
 247
 248                 if (opcode->HasDstReg) {
 249                         if (inst->U.I.DstReg.File == RC_FILE_TEMPORARY &&
 250                             inst->U.I.DstReg.Index == s.Mov->U.I.DstReg.Index) {
 251                                 s.MovMask &= ~inst->U.I.DstReg.WriteMask;
 252                         }
 253                 }
 254
 255                 if (s.BranchDepth >= 0) {
 256                         if (inst->U.I.Opcode == RC_OPCODE_IF) {
 257                                 s.BranchDepth++;
 258                         } else if (inst->U.I.Opcode == RC_OPCODE_ENDIF
 259                                 || inst->U.I.Opcode == RC_OPCODE_ELSE) {
 260                                 s.BranchDepth--;
 261                                 if (s.BranchDepth < 0)
 262                                         break; /* no more readers after this point */
 263                         }
 264                 }
 265         }
 266
 267         /* Finally, remove the original MOV instruction */
 268         rc_remove_instruction(inst_mov);
 269 }
 270
 271 /**
 272  * Check if a source register is actually always the same
 273  * swizzle constant.
 274  */
 275 static int is_src_uniform_constant(struct rc_src_register src,
 276                 rc_swizzle * pswz, unsigned int * pnegate)
 277 {
 278         int have_used = 0;
 279
 280         if (src.File != RC_FILE_NONE) {
 281                 *pswz = 0;
 282                 return 0;
 283         }
 284
 285         for(unsigned int chan = 0; chan < 4; ++chan) {
 286                 unsigned int swz = GET_SWZ(src.Swizzle, chan);
 287                 if (swz < 4) {
 288                         *pswz = 0;
 289                         return 0;
 290                 }
 291                 if (swz == RC_SWIZZLE_UNUSED)
 292                         continue;
 293
 294                 if (!have_used) {
 295                         *pswz = swz;
 296                         *pnegate = GET_BIT(src.Negate, chan);
 297                         have_used = 1;
 298                 } else {
 299                         if (swz != *pswz || *pnegate != GET_BIT(src.Negate, chan)) {
 300                                 *pswz = 0;
 301                                 return 0;
 302                         }
 303                 }
 304         }
 305
 306         return 1;
 307 }
 308
 309 static void constant_folding_mad(struct rc_instruction * inst)
 310 {
 311         rc_swizzle swz;
 312         unsigned int negate;
 313
 314         if (is_src_uniform_constant(inst->U.I.SrcReg[2], &swz, &negate)) {
 315                 if (swz == RC_SWIZZLE_ZERO) {
 316                         inst->U.I.Opcode = RC_OPCODE_MUL;
 317                         return;
 318                 }
 319         }
 320
 321         if (is_src_uniform_constant(inst->U.I.SrcReg[1], &swz, &negate)) {
 322                 if (swz == RC_SWIZZLE_ONE) {
 323                         inst->U.I.Opcode = RC_OPCODE_ADD;
 324                         if (negate)
 325                                 inst->U.I.SrcReg[0].Negate ^= RC_MASK_XYZW;
 326                         inst->U.I.SrcReg[1] = inst->U.I.SrcReg[2];
 327                         return;
 328                 } else if (swz == RC_SWIZZLE_ZERO) {
 329                         inst->U.I.Opcode = RC_OPCODE_MOV;
 330                         inst->U.I.SrcReg[0] = inst->U.I.SrcReg[2];
 331                         return;
 332                 }
 333         }
 334
 335         if (is_src_uniform_constant(inst->U.I.SrcReg[0], &swz, &negate)) {
 336                 if (swz == RC_SWIZZLE_ONE) {
 337                         inst->U.I.Opcode = RC_OPCODE_ADD;
 338                         if (negate)
 339                                 inst->U.I.SrcReg[1].Negate ^= RC_MASK_XYZW;
 340                         inst->U.I.SrcReg[0] = inst->U.I.SrcReg[2];
 341                         return;
 342                 } else if (swz == RC_SWIZZLE_ZERO) {
 343                         inst->U.I.Opcode = RC_OPCODE_MOV;
 344                         inst->U.I.SrcReg[0] = inst->U.I.SrcReg[2];
 345                         return;
 346                 }
 347         }
 348 }
 349
 350 static void constant_folding_mul(struct rc_instruction * inst)
 351 {
 352         rc_swizzle swz;
 353         unsigned int negate;
 354
 355         if (is_src_uniform_constant(inst->U.I.SrcReg[0], &swz, &negate)) {
 356                 if (swz == RC_SWIZZLE_ONE) {
 357                         inst->U.I.Opcode = RC_OPCODE_MOV;
 358                         inst->U.I.SrcReg[0] = inst->U.I.SrcReg[1];
 359                         if (negate)
 360                                 inst->U.I.SrcReg[0].Negate ^= RC_MASK_XYZW;
 361                         return;
 362                 } else if (swz == RC_SWIZZLE_ZERO) {
 363                         inst->U.I.Opcode = RC_OPCODE_MOV;
 364                         inst->U.I.SrcReg[0].Swizzle = RC_SWIZZLE_0000;
 365                         return;
 366                 }
 367         }
 368
 369         if (is_src_uniform_constant(inst->U.I.SrcReg[1], &swz, &negate)) {
 370                 if (swz == RC_SWIZZLE_ONE) {
 371                         inst->U.I.Opcode = RC_OPCODE_MOV;
 372                         if (negate)
 373                                 inst->U.I.SrcReg[0].Negate ^= RC_MASK_XYZW;
 374                         return;
 375                 } else if (swz == RC_SWIZZLE_ZERO) {
 376                         inst->U.I.Opcode = RC_OPCODE_MOV;
 377                         inst->U.I.SrcReg[0].Swizzle = RC_SWIZZLE_0000;
 378                         return;
 379                 }
 380         }
 381 }
 382
 383 static void constant_folding_add(struct rc_instruction * inst)
 384 {
 385         rc_swizzle swz;
 386         unsigned int negate;
 387
 388         if (is_src_uniform_constant(inst->U.I.SrcReg[0], &swz, &negate)) {
 389                 if (swz == RC_SWIZZLE_ZERO) {
 390                         inst->U.I.Opcode = RC_OPCODE_MOV;
 391                         inst->U.I.SrcReg[0] = inst->U.I.SrcReg[1];
 392                         return;
 393                 }
 394         }
 395
 396         if (is_src_uniform_constant(inst->U.I.SrcReg[1], &swz, &negate)) {
 397                 if (swz == RC_SWIZZLE_ZERO) {
 398                         inst->U.I.Opcode = RC_OPCODE_MOV;
 399                         return;
 400                 }
 401         }
 402 }
 403
 404 /**
 405  * Replace 0.0, 1.0 and 0.5 immediate constants by their
 406  * respective swizzles. Simplify instructions like ADD dst, src, 0;
 407  */
 408 static void constant_folding(struct radeon_compiler * c, struct rc_instruction * inst)
 409 {
 410         const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode);
 411
 412         /* Replace 0.0, 1.0 and 0.5 immediates by their explicit swizzles */
 413         for(unsigned int src = 0; src < opcode->NumSrcRegs; ++src) {
 414                 if (inst->U.I.SrcReg[src].File != RC_FILE_CONSTANT ||
 415                     inst->U.I.SrcReg[src].RelAddr ||
 416                     inst->U.I.SrcReg[src].Index >= c->Program.Constants.Count)
 417                         continue;
 418
 419                 struct rc_constant * constant =
 420                         &c->Program.Constants.Constants[inst->U.I.SrcReg[src].Index];
 421
 422                 if (constant->Type != RC_CONSTANT_IMMEDIATE)
 423                         continue;
 424
 425                 struct rc_src_register newsrc = inst->U.I.SrcReg[src];
 426                 int have_real_reference = 0;
 427                 for(unsigned int chan = 0; chan < 4; ++chan) {
 428                         unsigned int swz = GET_SWZ(newsrc.Swizzle, chan);
 429                         if (swz >= 4)
 430                                 continue;
 431
 432                         unsigned int newswz;
 433                         float imm = constant->u.Immediate[swz];
 434                         float baseimm = imm;
 435                         if (imm < 0.0)
 436                                 baseimm = -baseimm;
 437
 438                         if (baseimm == 0.0) {
 439                                 newswz = RC_SWIZZLE_ZERO;
 440                         } else if (baseimm == 1.0) {
 441                                 newswz = RC_SWIZZLE_ONE;
 442                         } else if (baseimm == 0.5 && c->has_half_swizzles) {
 443                                 newswz = RC_SWIZZLE_HALF;
 444                         } else {
 445                                 have_real_reference = 1;
 446                                 continue;
 447                         }
 448
 449                         SET_SWZ(newsrc.Swizzle, chan, newswz);
 450                         if (imm < 0.0 && !newsrc.Abs)
 451                                 newsrc.Negate ^= 1 << chan;
 452                 }
 453
 454                 if (!have_real_reference) {
 455                         newsrc.File = RC_FILE_NONE;
 456                         newsrc.Index = 0;
 457                 }
 458
 459                 /* don't make the swizzle worse */
 460                 if (!c->SwizzleCaps->IsNative(inst->U.I.Opcode, newsrc) &&
 461                     c->SwizzleCaps->IsNative(inst->U.I.Opcode, inst->U.I.SrcReg[src]))
 462                         continue;
 463
 464                 inst->U.I.SrcReg[src] = newsrc;
 465         }
 466
 467         /* Simplify instructions based on constants */
 468         if (inst->U.I.Opcode == RC_OPCODE_MAD)
 469                 constant_folding_mad(inst);
 470
 471         /* note: MAD can simplify to MUL or ADD */
 472         if (inst->U.I.Opcode == RC_OPCODE_MUL)
 473                 constant_folding_mul(inst);
 474         else if (inst->U.I.Opcode == RC_OPCODE_ADD)
 475                 constant_folding_add(inst);
 476 }
 477
 478 /**
 479  * If src and dst use the same register, this function returns a writemask that
 480  * indicates wich components are read by src.  Otherwise zero is returned.
 481  */
 482 static unsigned int src_reads_dst_mask(struct rc_src_register src,
 483                                                 struct rc_dst_register dst)
 484 {
 485         unsigned int mask = 0;
 486         unsigned int i;
 487         if (dst.File != src.File || dst.Index != src.Index) {
 488                 return 0;
 489         }
 490
 491         for(i = 0; i < 4; i++) {
 492                 mask |= 1 << GET_SWZ(src.Swizzle, i);
 493         }
 494         mask &= RC_MASK_XYZW;
 495
 496         return mask;
 497 }
 498
 499 /* Return 1 if the source registers has a constant swizzle (e.g. 0, 0.5, 1.0)
 500  * in any of its channels.  Return 0 otherwise. */
 501 static int src_has_const_swz(struct rc_src_register src) {
 502         int chan;
 503         for(chan = 0; chan < 4; chan++) {
 504                 unsigned int swz = GET_SWZ(src.Swizzle, chan);
 505                 if (swz == RC_SWIZZLE_ZERO || swz == RC_SWIZZLE_HALF
 506                                                 || swz == RC_SWIZZLE_ONE) {
 507                         return 1;
 508                 }
 509         }
 510         return 0;
 511 }
 512
 513 static void peephole_scan_write(void * data, struct rc_instruction * inst,
 514                 rc_register_file file, unsigned int index, unsigned int mask)
 515 {
 516         struct peephole_state * s = data;
 517         if(s->Inst->U.I.DstReg.File == file
 518            && s->Inst->U.I.DstReg.Index == index) {
 519                 unsigned int common_mask = s->WriteMask & mask;
 520                 s->WriteMask &= ~common_mask;
 521         }
 522 }
 523
 524 static int presub_helper(
 525         struct radeon_compiler * c,
 526         struct peephole_state * s,
 527         rc_presubtract_op presub_opcode,
 528         rc_presub_replace_fn presub_replace)
 529 {
 530         struct rc_instruction * inst;
 531         unsigned int can_remove = 0;
 532         unsigned int cant_sub = 0;
 533
 534         for(inst = s->Inst->Next; inst != &c->Program.Instructions;
 535                                                         inst = inst->Next) {
 536                 unsigned int i;
 537                 unsigned char can_use_presub = 1;
 538                 const struct rc_opcode_info * info =
 539                                         rc_get_opcode_info(inst->U.I.Opcode);
 540                 /* XXX: There are some situations where instructions
 541                  * with more than 2 src registers can use the
 542                  * presubtract select, but to keep things simple we
 543                  * will disable presubtract on these instructions for
 544                  * now. */
 545                 if (info->NumSrcRegs > 2 || info->HasTexture) {
 546                         can_use_presub = 0;
 547                 }
 548
 549                 /* We can't use more than one presubtract value in an
 550                  * instruction, unless the two prsubtract operations
 551                  * are the same and read from the same registers. */
 552                 if (inst->U.I.PreSub.Opcode != RC_PRESUB_NONE) {
 553                         if (inst->U.I.PreSub.Opcode != presub_opcode
 554                                 || inst->U.I.PreSub.SrcReg[0].File !=
 555                                         s->Inst->U.I.SrcReg[1].File
 556                                 || inst->U.I.PreSub.SrcReg[0].Index !=
 557                                         s->Inst->U.I.SrcReg[1].Index) {
 558                                 can_use_presub = 0;
 559                         }
 560                 }
 561
 562                 /* Even if the instruction can't use a presubtract operation
 563                  * we still need to check if the instruction reads from
 564                  * s->Inst->U.I.DstReg, because if it does we must not
 565                  * remove s->Inst. */
 566                 for(i = 0; i < info->NumSrcRegs; i++) {
 567                         unsigned int mask = src_reads_dst_mask(
 568                                 inst->U.I.SrcReg[i], s->Inst->U.I.DstReg);
 569                         /* XXX We could be more aggressive here using
 570                          * presubtract.  It is okay if SrcReg[i] only reads
 571                          * from some of the mask components. */
 572                         if(s->Inst->U.I.DstReg.WriteMask != mask) {
 573                                 if (s->Inst->U.I.DstReg.WriteMask & mask) {
 574                                         can_remove = 0;
 575                                         break;
 576                                 } else {
 577                                         continue;
 578                                 }
 579                         }
 580                         if (cant_sub || !can_use_presub) {
 581                                 can_remove = 0;
 582                                 break;
 583                         }
 584                         presub_replace(s, inst, i);
 585                         can_remove = 1;
 586                 }
 587                 if(!can_remove)
 588                         break;
 589                 rc_for_all_writes_mask(inst, peephole_scan_write, s);
 590                 /* If all components of inst_add's destination register have
 591                  * been written to by subsequent instructions, the original
 592                  * value of the destination register is no longer valid and
 593                  * we can't keep doing substitutions. */
 594                 if (!s->WriteMask){
 595                         break;
 596                 }
 597                 /* Make this instruction doesn't write to the presubtract source. */
 598                 if (inst->U.I.DstReg.WriteMask &
 599                                 src_reads_dst_mask(s->Inst->U.I.SrcReg[1],
 600                                                         inst->U.I.DstReg)
 601                                 || src_reads_dst_mask(s->Inst->U.I.SrcReg[0],
 602                                                         inst->U.I.DstReg)
 603                                 || info->IsFlowControl) {
 604                         cant_sub = 1;
 605                 }
 606         }
 607         return can_remove;
 608 }
 609
 610 /* This function assumes that s->Inst->U.I.SrcReg[0] and
 611  * s->Inst->U.I.SrcReg[1] aren't both negative. */
 612 static void presub_replace_add(struct peephole_state *s,
 613                                                 struct rc_instruction * inst,
 614                                                 unsigned int src_index)
 615 {
 616         rc_presubtract_op presub_opcode;
 617         if (s->Inst->U.I.SrcReg[1].Negate || s->Inst->U.I.SrcReg[0].Negate)
 618                 presub_opcode = RC_PRESUB_SUB;
 619         else
 620                 presub_opcode = RC_PRESUB_ADD;
 621
 622         if (s->Inst->U.I.SrcReg[1].Negate) {
 623                 inst->U.I.PreSub.SrcReg[0] = s->Inst->U.I.SrcReg[1];
 624                 inst->U.I.PreSub.SrcReg[1] = s->Inst->U.I.SrcReg[0];
 625         } else {
 626                 inst->U.I.PreSub.SrcReg[0] = s->Inst->U.I.SrcReg[0];
 627                 inst->U.I.PreSub.SrcReg[1] = s->Inst->U.I.SrcReg[1];
 628         }
 629         inst->U.I.PreSub.SrcReg[0].Negate = 0;
 630         inst->U.I.PreSub.SrcReg[1].Negate = 0;
 631         inst->U.I.PreSub.Opcode = presub_opcode;
 632         inst->U.I.SrcReg[src_index] = chain_srcregs(inst->U.I.SrcReg[src_index],
 633                                                 inst->U.I.PreSub.SrcReg[0]);
 634         inst->U.I.SrcReg[src_index].File = RC_FILE_PRESUB;
 635         inst->U.I.SrcReg[src_index].Index = presub_opcode;
 636 }
 637
 638 static int is_presub_candidate(struct rc_instruction * inst)
 639 {
 640         const struct rc_opcode_info * info = rc_get_opcode_info(inst->U.I.Opcode);
 641         unsigned int i;
 642
 643         if (inst->U.I.PreSub.Opcode != RC_PRESUB_NONE || inst->U.I.SaturateMode)
 644                 return 0;
 645
 646         for(i = 0; i < info->NumSrcRegs; i++) {
 647                 if (src_reads_dst_mask(inst->U.I.SrcReg[i], inst->U.I.DstReg))
 648                         return 0;
 649         }
 650         return 1;
 651 }
 652
 653 static int peephole_add_presub_add(
 654         struct radeon_compiler * c,
 655         struct rc_instruction * inst_add)
 656 {
 657         struct rc_src_register * src0 = NULL;
 658         struct rc_src_register * src1 = NULL;
 659         unsigned int i;
 660         struct peephole_state s;
 661
 662         if (!is_presub_candidate(inst_add))
 663                 return 0;
 664
 665         if (inst_add->U.I.SrcReg[0].Swizzle != inst_add->U.I.SrcReg[1].Swizzle)
 666                 return 0;
 667
 668         /* src0 and src1 can't have absolute values only one can be negative and they must be all negative or all positive. */
 669         for (i = 0; i < 2; i++) {
 670                 if (inst_add->U.I.SrcReg[i].Abs)
 671                         return 0;
 672                 if ((inst_add->U.I.SrcReg[i].Negate
 673                                         & inst_add->U.I.DstReg.WriteMask) ==
 674                                                 inst_add->U.I.DstReg.WriteMask) {
 675                         src0 = &inst_add->U.I.SrcReg[i];
 676                 } else if (!src1) {
 677                         src1 = &inst_add->U.I.SrcReg[i];
 678                 } else {
 679                         src0 = &inst_add->U.I.SrcReg[i];
 680                 }
 681         }
 682
 683         if (!src1)
 684                 return 0;
 685
 686         s.Inst = inst_add;
 687         s.WriteMask = inst_add->U.I.DstReg.WriteMask;
 688         if (presub_helper(c, &s, RC_PRESUB_ADD, presub_replace_add)) {
 689                 rc_remove_instruction(inst_add);
 690                 return 1;
 691         }
 692         return 0;
 693 }
 694
 695 static void presub_replace_inv(struct peephole_state * s,
 696                                                 struct rc_instruction * inst,
 697                                                 unsigned int src_index)
 698 {
 699         /* We must be careful not to modify s->Inst, since it
 700          * is possible it will remain part of the program.
 701          * XXX Maybe pass a struct instead of a pointer for s->Inst.*/
 702         inst->U.I.PreSub.SrcReg[0] = s->Inst->U.I.SrcReg[1];
 703         inst->U.I.PreSub.SrcReg[0].Negate = 0;
 704         inst->U.I.PreSub.Opcode = RC_PRESUB_INV;
 705         inst->U.I.SrcReg[src_index] = chain_srcregs(inst->U.I.SrcReg[src_index],
 706                                                 inst->U.I.PreSub.SrcReg[0]);
 707
 708         inst->U.I.SrcReg[src_index].File = RC_FILE_PRESUB;
 709         inst->U.I.SrcReg[src_index].Index = RC_PRESUB_INV;
 710 }
 711
 712 /**
 713  * PRESUB_INV: ADD TEMP[0], none.1, -TEMP[1]
 714  * Use the presubtract 1 - src0 for all readers of TEMP[0].  The first source
 715  * of the add instruction must have the constatnt 1 swizzle.  This function
 716  * does not check const registers to see if their value is 1.0, so it should
 717  * be called after the constant_folding optimization.
 718  * @return
 719  *      0 if the ADD instruction is still part of the program.
 720  *      1 if the ADD instruction is no longer part of the program.
 721  */
 722 static int peephole_add_presub_inv(
 723         struct radeon_compiler * c,
 724         struct rc_instruction * inst_add)
 725 {
 726         unsigned int i, swz, mask;
 727         struct peephole_state s;
 728
 729         if (!is_presub_candidate(inst_add))
 730                 return 0;
 731
 732         mask = inst_add->U.I.DstReg.WriteMask;
 733
 734         /* Check if src0 is 1. */
 735         /* XXX It would be nice to use is_src_uniform_constant here, but that
 736          * function only works if the register's file is RC_FILE_NONE */
 737         for(i = 0; i < 4; i++ ) {
 738                 swz = GET_SWZ(inst_add->U.I.SrcReg[0].Swizzle, i);
 739                 if(((1 << i) & inst_add->U.I.DstReg.WriteMask)
 740                                                 && swz != RC_SWIZZLE_ONE) {
 741                         return 0;
 742                 }
 743         }
 744
 745         /* Check src1. */
 746         if ((inst_add->U.I.SrcReg[1].Negate & inst_add->U.I.DstReg.WriteMask) !=
 747                                                 inst_add->U.I.DstReg.WriteMask
 748                 || inst_add->U.I.SrcReg[1].Abs
 749                 || (inst_add->U.I.SrcReg[1].File != RC_FILE_TEMPORARY
 750                         && inst_add->U.I.SrcReg[1].File != RC_FILE_CONSTANT)
 751                 || src_has_const_swz(inst_add->U.I.SrcReg[1])) {
 752
 753                 return 0;
 754         }
 755
 756         /* Setup the peephole_state information. */
 757         s.Inst = inst_add;
 758         s.WriteMask = inst_add->U.I.DstReg.WriteMask;
 759
 760         if (presub_helper(c, &s, RC_PRESUB_INV, presub_replace_inv)) {
 761                 rc_remove_instruction(inst_add);
 762                 return 1;
 763         }
 764         return 0;
 765 }
 766
 767 /**
 768  * @return
 769  *      0 if inst is still part of the program.
 770  *      1 if inst is no longer part of the program.
 771  */
 772 static int peephole(struct radeon_compiler * c, struct rc_instruction * inst)
 773 {
 774         switch(inst->U.I.Opcode){
 775         case RC_OPCODE_ADD:
 776                 if (c->has_presub) {
 777                         if(peephole_add_presub_inv(c, inst))
 778                                 return 1;
 779                         if(peephole_add_presub_add(c, inst))
 780                                 return 1;
 781                 }
 782                 break;
 783         default:
 784                 break;
 785         }
 786         return 0;
 787 }
 788
 789 void rc_optimize(struct radeon_compiler * c, void *user)
 790 {
 791         struct rc_instruction * inst = c->Program.Instructions.Next;
 792         while(inst != &c->Program.Instructions) {
 793                 struct rc_instruction * cur = inst;
 794                 inst = inst->Next;
 795
 796                 constant_folding(c, cur);
 797
 798                 if(peephole(c, cur))
 799                         continue;
 800
 801                 if (cur->U.I.Opcode == RC_OPCODE_MOV) {
 802                         copy_propagate(c, cur);
 803                         /* cur may no longer be part of the program */
 804                 }
 805         }
 806 }