src/mesa/drivers/dri/r600/evergreen_render.c

   1 /*
   2  * Copyright (C) 2008-2010  Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included
  12  * in all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  15  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
  18  * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  19  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  20  */
  21
  22 /*
  23  * Authors:
  24  *   Richard Li <RichardZ.Li@amd.com>, <richardradeon@gmail.com>
  25  */
  26
  27 #include "main/glheader.h"
  28 #include "main/state.h"
  29 #include "main/imports.h"
  30 #include "main/enums.h"
  31 #include "main/macros.h"
  32 #include "main/context.h"
  33 #include "main/dd.h"
  34 #include "main/simple_list.h"
  35 #include "main/api_arrayelt.h"
  36 #include "swrast/swrast.h"
  37 #include "swrast_setup/swrast_setup.h"
  38 #include "vbo/vbo.h"
  39
  40 #include "tnl/tnl.h"
  41 #include "tnl/t_vp_build.h"
  42 #include "tnl/t_context.h"
  43 #include "tnl/t_vertex.h"
  44 #include "vbo/vbo_context.h"
  45
  46 #include "r600_context.h"
  47 #include "r600_cmdbuf.h"
  48
  49 #include "evergreen_fragprog.h"
  50 #include "evergreen_vertprog.h"
  51
  52 #include "evergreen_state.h"
  53 #include "evergreen_tex.h"
  54
  55 #include "radeon_buffer_objects.h"
  56 #include "radeon_common_context.h"
  57
  58 static unsigned int evergreenPrimitiveType(int prim) //same
  59 {
  60     switch (prim & PRIM_MODE_MASK)
  61     {
  62     case GL_POINTS:
  63         return DI_PT_POINTLIST;
  64         break;
  65     case GL_LINES:
  66         return DI_PT_LINELIST;
  67         break;
  68     case GL_LINE_STRIP:
  69         return DI_PT_LINESTRIP;
  70         break;
  71     case GL_LINE_LOOP:
  72         return DI_PT_LINELOOP;
  73         break;
  74     case GL_TRIANGLES:
  75         return DI_PT_TRILIST;
  76         break;
  77     case GL_TRIANGLE_STRIP:
  78         return DI_PT_TRISTRIP;
  79         break;
  80     case GL_TRIANGLE_FAN:
  81         return DI_PT_TRIFAN;
  82         break;
  83     case GL_QUADS:
  84         return DI_PT_QUADLIST;
  85         break;
  86     case GL_QUAD_STRIP:
  87         return DI_PT_QUADSTRIP;
  88         break;
  89     case GL_POLYGON:
  90         return DI_PT_POLYGON;
  91         break;
  92     default:
  93         assert(0);
  94         return -1;
  95         break;
  96     }
  97 }
  98
  99 static int evergreenNumVerts(int num_verts, int prim) //same
 100 {
 101         int verts_off = 0;
 102
 103         switch (prim & PRIM_MODE_MASK) {
 104         case GL_POINTS:
 105                 verts_off = 0;
 106                 break;
 107         case GL_LINES:
 108                 verts_off = num_verts % 2;
 109                 break;
 110         case GL_LINE_STRIP:
 111                 if (num_verts < 2)
 112                         verts_off = num_verts;
 113                 break;
 114         case GL_LINE_LOOP:
 115                 if (num_verts < 2)
 116                         verts_off = num_verts;
 117                 break;
 118         case GL_TRIANGLES:
 119                 verts_off = num_verts % 3;
 120                 break;
 121         case GL_TRIANGLE_STRIP:
 122                 if (num_verts < 3)
 123                         verts_off = num_verts;
 124                 break;
 125         case GL_TRIANGLE_FAN:
 126                 if (num_verts < 3)
 127                         verts_off = num_verts;
 128                 break;
 129         case GL_QUADS:
 130                 verts_off = num_verts % 4;
 131                 break;
 132         case GL_QUAD_STRIP:
 133                 if (num_verts < 4)
 134                         verts_off = num_verts;
 135                 else
 136                         verts_off = num_verts % 2;
 137                 break;
 138         case GL_POLYGON:
 139                 if (num_verts < 3)
 140                         verts_off = num_verts;
 141                 break;
 142         default:
 143                 assert(0);
 144                 return -1;
 145                 break;
 146         }
 147
 148         return num_verts - verts_off;
 149 }
 150
 151 static void evergreenRunRenderPrimitive(struct gl_context * ctx, int start, int end, int prim,
 152                                         GLint basevertex) //same
 153 {
 154     context_t *context = EVERGREEN_CONTEXT(ctx);
 155     BATCH_LOCALS(&context->radeon);
 156     int type, total_emit;
 157     int num_indices;
 158     uint32_t vgt_draw_initiator = 0;
 159     uint32_t vgt_index_type     = 0;
 160     uint32_t vgt_primitive_type = 0;
 161     uint32_t vgt_num_indices    = 0;
 162
 163     type = evergreenPrimitiveType(prim);
 164     num_indices = evergreenNumVerts(end - start, prim);
 165
 166     radeon_print(RADEON_RENDER, RADEON_TRACE,
 167                  "%s type %x num_indices %d\n",
 168                  __func__, type, num_indices);
 169
 170     if (type < 0 || num_indices <= 0)
 171             return;
 172
 173     SETfield(vgt_primitive_type, type,
 174              VGT_PRIMITIVE_TYPE__PRIM_TYPE_shift, VGT_PRIMITIVE_TYPE__PRIM_TYPE_mask);
 175
 176     SETfield(vgt_index_type, DI_INDEX_SIZE_32_BIT, INDEX_TYPE_shift, INDEX_TYPE_mask);
 177
 178     if(GL_TRUE != context->ind_buf.is_32bit)
 179     {
 180             SETfield(vgt_index_type, DI_INDEX_SIZE_16_BIT, INDEX_TYPE_shift, INDEX_TYPE_mask);
 181     }
 182
 183     vgt_num_indices = num_indices;
 184     SETfield(vgt_draw_initiator, DI_SRC_SEL_DMA, SOURCE_SELECT_shift, SOURCE_SELECT_mask);
 185     SETfield(vgt_draw_initiator, DI_MAJOR_MODE_0, MAJOR_MODE_shift, MAJOR_MODE_mask);
 186
 187     total_emit =   3  /* VGT_PRIMITIVE_TYPE */
 188                  + 2  /* VGT_INDEX_TYPE */
 189                  + 2  /* NUM_INSTANCES */
 190                  + 4  /* VTX_BASE_VTX_LOC + VTX_START_INST_LOC */
 191                  + 5 + 2; /* DRAW_INDEX */
 192
 193     BEGIN_BATCH_NO_AUTOSTATE(total_emit);
 194     // prim
 195     R600_OUT_BATCH_REGSEQ(VGT_PRIMITIVE_TYPE, 1);
 196     R600_OUT_BATCH(vgt_primitive_type);
 197     // index type
 198     R600_OUT_BATCH(CP_PACKET3(R600_IT_INDEX_TYPE, 0));
 199     R600_OUT_BATCH(vgt_index_type);
 200     // num instances
 201     R600_OUT_BATCH(CP_PACKET3(R600_IT_NUM_INSTANCES, 0));
 202     R600_OUT_BATCH(1);
 203     /* offset */
 204     R600_OUT_BATCH(CP_PACKET3(R600_IT_SET_CTL_CONST, 2));
 205     R600_OUT_BATCH(mmSQ_VTX_BASE_VTX_LOC - ASIC_CTL_CONST_BASE_INDEX);
 206     R600_OUT_BATCH(basevertex); //VTX_BASE_VTX_LOC
 207     R600_OUT_BATCH(0); //VTX_START_INST_LOC
 208     // draw packet
 209     R600_OUT_BATCH(CP_PACKET3(R600_IT_DRAW_INDEX, 3));
 210     R600_OUT_BATCH(context->ind_buf.bo_offset);
 211     R600_OUT_BATCH(0);
 212     R600_OUT_BATCH(vgt_num_indices);
 213     R600_OUT_BATCH(vgt_draw_initiator);
 214     R600_OUT_BATCH_RELOC(context->ind_buf.bo_offset,
 215                          context->ind_buf.bo,
 216                          context->ind_buf.bo_offset,
 217                          RADEON_GEM_DOMAIN_GTT, 0, 0);
 218     END_BATCH();
 219     COMMIT_BATCH();
 220 }
 221
 222 static void evergreenRunRenderPrimitiveImmediate(struct gl_context * ctx, int start, int end, int prim) //same
 223 {
 224     context_t *context = EVERGREEN_CONTEXT(ctx);
 225     BATCH_LOCALS(&context->radeon);
 226     int type, i;
 227     uint32_t num_indices, total_emit = 0;
 228     uint32_t vgt_draw_initiator = 0;
 229     uint32_t vgt_index_type     = 0;
 230     uint32_t vgt_primitive_type = 0;
 231     uint32_t vgt_num_indices    = 0;
 232
 233     type = evergreenPrimitiveType(prim);
 234     num_indices = evergreenNumVerts(end - start, prim);
 235
 236     radeon_print(RADEON_RENDER, RADEON_TRACE,
 237                  "%s type %x num_indices %d\n",
 238                  __func__, type, num_indices);
 239
 240     if (type < 0 || num_indices <= 0)
 241             return;
 242
 243     SETfield(vgt_primitive_type, type,
 244              VGT_PRIMITIVE_TYPE__PRIM_TYPE_shift, VGT_PRIMITIVE_TYPE__PRIM_TYPE_mask);
 245
 246     if (num_indices > 0xffff)
 247     {
 248             SETfield(vgt_index_type, DI_INDEX_SIZE_32_BIT, INDEX_TYPE_shift, INDEX_TYPE_mask);
 249     }
 250     else
 251     {
 252             SETfield(vgt_index_type, DI_INDEX_SIZE_16_BIT, INDEX_TYPE_shift, INDEX_TYPE_mask);
 253     }
 254
 255     vgt_num_indices = num_indices;
 256     SETfield(vgt_draw_initiator, DI_MAJOR_MODE_0, MAJOR_MODE_shift, MAJOR_MODE_mask);
 257
 258     if (start == 0)
 259     {
 260         SETfield(vgt_draw_initiator, DI_SRC_SEL_AUTO_INDEX, SOURCE_SELECT_shift, SOURCE_SELECT_mask);
 261     }
 262     else
 263     {
 264         if (num_indices > 0xffff)
 265         {
 266                 total_emit += num_indices;
 267         }
 268         else
 269         {
 270                 total_emit += (num_indices + 1) / 2;
 271         }
 272         SETfield(vgt_draw_initiator, DI_SRC_SEL_IMMEDIATE, SOURCE_SELECT_shift, SOURCE_SELECT_mask);
 273     }
 274
 275     total_emit +=   3 /* VGT_PRIMITIVE_TYPE */
 276                   + 2 /* VGT_INDEX_TYPE */
 277                   + 2 /* NUM_INSTANCES */
 278                   + 4 /* VTX_BASE_VTX_LOC + VTX_START_INST_LOC */
 279                   + 3; /* DRAW */
 280
 281     BEGIN_BATCH_NO_AUTOSTATE(total_emit);
 282     // prim
 283     R600_OUT_BATCH_REGSEQ(VGT_PRIMITIVE_TYPE, 1);
 284     R600_OUT_BATCH(vgt_primitive_type);
 285     // index type
 286     R600_OUT_BATCH(CP_PACKET3(R600_IT_INDEX_TYPE, 0));
 287     R600_OUT_BATCH(vgt_index_type);
 288     // num instances
 289     R600_OUT_BATCH(CP_PACKET3(R600_IT_NUM_INSTANCES, 0));
 290     R600_OUT_BATCH(1);
 291     /* offset */
 292     R600_OUT_BATCH(CP_PACKET3(R600_IT_SET_CTL_CONST, 2));
 293     R600_OUT_BATCH(mmSQ_VTX_BASE_VTX_LOC - ASIC_CTL_CONST_BASE_INDEX);
 294     R600_OUT_BATCH(0); //VTX_BASE_VTX_LOC
 295     R600_OUT_BATCH(0); //VTX_START_INST_LOC
 296     // draw packet
 297     if(start == 0)
 298     {
 299         R600_OUT_BATCH(CP_PACKET3(R600_IT_DRAW_INDEX_AUTO, 1));
 300         R600_OUT_BATCH(vgt_num_indices);
 301         R600_OUT_BATCH(vgt_draw_initiator);
 302     }
 303     else
 304     {
 305         if (num_indices > 0xffff)
 306         {
 307             R600_OUT_BATCH(CP_PACKET3(R600_IT_DRAW_INDEX_IMMD, (num_indices + 1)));
 308             R600_OUT_BATCH(vgt_num_indices);
 309             R600_OUT_BATCH(vgt_draw_initiator);
 310             for (i = start; i < (start + num_indices); i++)
 311             {
 312                 R600_OUT_BATCH(i);
 313             }
 314         }
 315         else
 316         {
 317             R600_OUT_BATCH(CP_PACKET3(R600_IT_DRAW_INDEX_IMMD, (((num_indices + 1) / 2) + 1)));
 318             R600_OUT_BATCH(vgt_num_indices);
 319             R600_OUT_BATCH(vgt_draw_initiator);
 320             for (i = start; i < (start + num_indices); i += 2)
 321             {
 322                 if ((i + 1) == (start + num_indices))
 323                 {
 324                     R600_OUT_BATCH(i);
 325                 }
 326                 else
 327                 {
 328                     R600_OUT_BATCH(((i + 1) << 16) | (i));
 329                 }
 330             }
 331         }
 332     }
 333
 334     END_BATCH();
 335     COMMIT_BATCH();
 336 }
 337
 338 #define CONVERT( TYPE, MACRO ) do {             \
 339         GLuint i, j, sz;                                \
 340         sz = input->Size;                               \
 341         if (input->Normalized) {                        \
 342                 for (i = 0; i < count; i++) {           \
 343                         const TYPE *in = (TYPE *)src_ptr;               \
 344                         for (j = 0; j < sz; j++) {              \
 345                                 *dst_ptr++ = MACRO(*in);                \
 346                                 in++;                           \
 347                         }                                       \
 348                         src_ptr += stride;                      \
 349                 }                                               \
 350         } else {                                        \
 351                 for (i = 0; i < count; i++) {           \
 352                         const TYPE *in = (TYPE *)src_ptr;               \
 353                         for (j = 0; j < sz; j++) {              \
 354                                 *dst_ptr++ = (GLfloat)(*in);            \
 355                                 in++;                           \
 356                         }                                       \
 357                         src_ptr += stride;                      \
 358                 }                                               \
 359         }                                               \
 360 } while (0)
 361
 362 /**
 363  * Convert attribute data type to float
 364  * If the attribute uses named buffer object replace the bo with newly allocated bo
 365  */
 366 static void evergreenConvertAttrib(struct gl_context *ctx, int count,
 367                               const struct gl_client_array *input,
 368                               struct StreamDesc *attr)
 369 {
 370     context_t *context = R700_CONTEXT(ctx);
 371     const GLvoid *src_ptr;
 372     GLboolean mapped_named_bo = GL_FALSE;
 373     GLfloat *dst_ptr;
 374     GLuint stride;
 375
 376     stride = (input->StrideB == 0) ? evergreen_getTypeSize(input->Type) * input->Size : input->StrideB;
 377
 378     /* Convert value for first element only */
 379     if (input->StrideB == 0)
 380     {
 381         count = 1;
 382     }
 383
 384     if (input->BufferObj->Name)
 385     {
 386         if (!input->BufferObj->Pointer)
 387         {
 388             ctx->Driver.MapBuffer(ctx, GL_ARRAY_BUFFER, GL_READ_ONLY_ARB, input->BufferObj);
 389             mapped_named_bo = GL_TRUE;
 390         }
 391
 392         src_ptr = ADD_POINTERS(input->BufferObj->Pointer, input->Ptr);
 393     }
 394     else
 395     {
 396         src_ptr = input->Ptr;
 397     }
 398
 399     radeonAllocDmaRegion(&context->radeon, &attr->bo, &attr->bo_offset,
 400                          sizeof(GLfloat) * input->Size * count, 32);
 401
 402     radeon_bo_map(attr->bo, 1);
 403
 404     dst_ptr = (GLfloat *)ADD_POINTERS(attr->bo->ptr, attr->bo_offset);
 405
 406     assert(src_ptr != NULL);
 407
 408     switch (input->Type)
 409     {
 410         case GL_DOUBLE:
 411             CONVERT(GLdouble, (GLfloat));
 412             break;
 413         case GL_UNSIGNED_INT:
 414             CONVERT(GLuint, UINT_TO_FLOAT);
 415             break;
 416         case GL_INT:
 417             CONVERT(GLint, INT_TO_FLOAT);
 418             break;
 419         case GL_UNSIGNED_SHORT:
 420             CONVERT(GLushort, USHORT_TO_FLOAT);
 421             break;
 422         case GL_SHORT:
 423             CONVERT(GLshort, SHORT_TO_FLOAT);
 424             break;
 425         case GL_UNSIGNED_BYTE:
 426             assert(input->Format != GL_BGRA);
 427             CONVERT(GLubyte, UBYTE_TO_FLOAT);
 428             break;
 429         case GL_BYTE:
 430             CONVERT(GLbyte, BYTE_TO_FLOAT);
 431             break;
 432         default:
 433             assert(0);
 434             break;
 435     }
 436
 437     radeon_bo_unmap(attr->bo);
 438
 439     if (mapped_named_bo)
 440     {
 441         ctx->Driver.UnmapBuffer(ctx, GL_ARRAY_BUFFER, input->BufferObj);
 442     }
 443 }
 444
 445 static void evergreenFixupIndexBuffer(struct gl_context *ctx, const struct _mesa_index_buffer *mesa_ind_buf)
 446 {
 447     context_t *context = EVERGREEN_CONTEXT(ctx);
 448     GLvoid *src_ptr;
 449     GLuint *out;
 450     int i;
 451     GLboolean mapped_named_bo = GL_FALSE;
 452
 453     if (mesa_ind_buf->obj->Name && !mesa_ind_buf->obj->Pointer)
 454     {
 455         ctx->Driver.MapBuffer(ctx, GL_ELEMENT_ARRAY_BUFFER, GL_READ_ONLY_ARB, mesa_ind_buf->obj);
 456         mapped_named_bo = GL_TRUE;
 457         assert(mesa_ind_buf->obj->Pointer != NULL);
 458     }
 459     src_ptr = ADD_POINTERS(mesa_ind_buf->obj->Pointer, mesa_ind_buf->ptr);
 460
 461     if (mesa_ind_buf->type == GL_UNSIGNED_BYTE)
 462     {
 463         GLuint size = sizeof(GLushort) * ((mesa_ind_buf->count + 1) & ~1);
 464         GLubyte *in = (GLubyte *)src_ptr;
 465
 466         radeonAllocDmaRegion(&context->radeon, &context->ind_buf.bo,
 467                              &context->ind_buf.bo_offset, size, 4);
 468
 469         radeon_bo_map(context->ind_buf.bo, 1);
 470         assert(context->ind_buf.bo->ptr != NULL);
 471         out = (GLuint *)ADD_POINTERS(context->ind_buf.bo->ptr, context->ind_buf.bo_offset);
 472
 473         for (i = 0; i + 1 < mesa_ind_buf->count; i += 2)
 474         {
 475             *out++ = in[i] | in[i + 1] << 16;
 476         }
 477
 478         if (i < mesa_ind_buf->count)
 479         {
 480             *out++ = in[i];
 481         }
 482
 483         radeon_bo_unmap(context->ind_buf.bo);
 484 #if MESA_BIG_ENDIAN
 485     }
 486     else
 487     { /* if (mesa_ind_buf->type == GL_UNSIGNED_SHORT) */
 488         GLushort *in = (GLushort *)src_ptr;
 489         GLuint size = sizeof(GLushort) * ((mesa_ind_buf->count + 1) & ~1);
 490
 491         radeonAllocDmaRegion(&context->radeon, &context->ind_buf.bo,
 492                              &context->ind_buf.bo_offset, size, 4);
 493
 494         radeon_bo_map(context->ind_buf.bo, 1);
 495         assert(context->ind_buf.bo->ptr != NULL);
 496         out = (GLuint *)ADD_POINTERS(context->ind_buf.bo->ptr, context->ind_buf.bo_offset);
 497
 498         for (i = 0; i + 1 < mesa_ind_buf->count; i += 2)
 499         {
 500             *out++ = in[i] | in[i + 1] << 16;
 501         }
 502
 503         if (i < mesa_ind_buf->count)
 504         {
 505             *out++ = in[i];
 506         }
 507         radeon_bo_unmap(context->ind_buf.bo);
 508 #endif
 509     }
 510
 511     context->ind_buf.is_32bit = GL_FALSE;
 512     context->ind_buf.count = mesa_ind_buf->count;
 513
 514     if (mapped_named_bo)
 515     {
 516         ctx->Driver.UnmapBuffer(ctx, GL_ELEMENT_ARRAY_BUFFER, mesa_ind_buf->obj);
 517     }
 518 }
 519
 520 static GLboolean evergreen_check_fallbacks(struct gl_context *ctx) //same
 521 {
 522         if (ctx->RenderMode != GL_RENDER)
 523                 return GL_TRUE;
 524
 525         return GL_FALSE;
 526 }
 527
 528 /* start 3d, idle, cb/db flush */
 529 #define PRE_EMIT_STATE_BUFSZ 5 + 5 + 14
 530
 531 static GLuint evergreenPredictRenderSize(struct gl_context* ctx,
 532                                     const struct _mesa_prim *prim,
 533                                     const struct _mesa_index_buffer *ib,
 534                                     GLuint nr_prims)
 535 {
 536     context_t *context = EVERGREEN_CONTEXT(ctx);
 537     GLboolean flushed;
 538     GLuint dwords, i;
 539     GLuint state_size;
 540
 541     dwords = PRE_EMIT_STATE_BUFSZ;
 542     if (ib)
 543             dwords += nr_prims * 18;
 544     else {
 545             for (i = 0; i < nr_prims; ++i)
 546             {
 547                     if (prim[i].start == 0)
 548                             dwords += 14;
 549                     else if (prim[i].count > 0xffff)
 550                             dwords += prim[i].count + 14;
 551                     else
 552                             dwords += ((prim[i].count + 1) / 2) + 14;
 553             }
 554     }
 555
 556     state_size = radeonCountStateEmitSize(&context->radeon);
 557     flushed = rcommonEnsureCmdBufSpace(&context->radeon,
 558                                        dwords + state_size,
 559                                        __FUNCTION__);
 560     if (flushed)
 561             dwords += radeonCountStateEmitSize(&context->radeon);
 562     else
 563             dwords += state_size;
 564
 565     radeon_print(RADEON_RENDER, RADEON_VERBOSE, "%s: total prediction size is %d.\n", __FUNCTION__, dwords);
 566     return dwords;
 567
 568 }
 569
 570 static void evergreenSetupIndexBuffer(struct gl_context *ctx, const struct _mesa_index_buffer *mesa_ind_buf)
 571 {
 572     context_t *context = EVERGREEN_CONTEXT(ctx);
 573
 574     if (!mesa_ind_buf) {
 575         context->ind_buf.bo = NULL;
 576         return;
 577     }
 578
 579 #if MESA_BIG_ENDIAN
 580     if (mesa_ind_buf->type == GL_UNSIGNED_INT)
 581 #else
 582     if (mesa_ind_buf->type != GL_UNSIGNED_BYTE)
 583 #endif
 584     {
 585         const GLvoid *src_ptr;
 586         GLvoid *dst_ptr;
 587         GLboolean mapped_named_bo = GL_FALSE;
 588
 589         if (mesa_ind_buf->obj->Name && !mesa_ind_buf->obj->Pointer)
 590         {
 591                 ctx->Driver.MapBuffer(ctx, GL_ELEMENT_ARRAY_BUFFER, GL_READ_ONLY_ARB, mesa_ind_buf->obj);
 592                 assert(mesa_ind_buf->obj->Pointer != NULL);
 593                 mapped_named_bo = GL_TRUE;
 594         }
 595
 596         src_ptr = ADD_POINTERS(mesa_ind_buf->obj->Pointer, mesa_ind_buf->ptr);
 597
 598         const GLuint size = mesa_ind_buf->count * getTypeSize(mesa_ind_buf->type);
 599
 600         radeonAllocDmaRegion(&context->radeon, &context->ind_buf.bo,
 601                              &context->ind_buf.bo_offset, size, 4);
 602         radeon_bo_map(context->ind_buf.bo, 1);
 603         assert(context->ind_buf.bo->ptr != NULL);
 604         dst_ptr = ADD_POINTERS(context->ind_buf.bo->ptr, context->ind_buf.bo_offset);
 605
 606         memcpy(dst_ptr, src_ptr, size);
 607
 608         radeon_bo_unmap(context->ind_buf.bo);
 609         context->ind_buf.is_32bit = (mesa_ind_buf->type == GL_UNSIGNED_INT);
 610         context->ind_buf.count = mesa_ind_buf->count;
 611
 612         if (mapped_named_bo)
 613         {
 614                 ctx->Driver.UnmapBuffer(ctx, GL_ELEMENT_ARRAY_BUFFER, mesa_ind_buf->obj);
 615         }
 616     }
 617     else
 618     {
 619             evergreenFixupIndexBuffer(ctx, mesa_ind_buf);
 620     }
 621 }
 622
 623 static void evergreenAlignDataToDword(struct gl_context *ctx,
 624                                  const struct gl_client_array *input,
 625                                  int count,
 626                                  struct StreamDesc *attr)
 627 {
 628     context_t *context = EVERGREEN_CONTEXT(ctx);
 629     const int dst_stride = (input->StrideB + 3) & ~3;
 630     const int size = getTypeSize(input->Type) * input->Size * count;
 631     GLboolean mapped_named_bo = GL_FALSE;
 632
 633     radeonAllocDmaRegion(&context->radeon, &attr->bo, &attr->bo_offset, size, 32);
 634
 635     radeon_bo_map(attr->bo, 1);
 636
 637     if (!input->BufferObj->Pointer)
 638     {
 639         ctx->Driver.MapBuffer(ctx, GL_ARRAY_BUFFER, GL_READ_ONLY_ARB, input->BufferObj);
 640         mapped_named_bo = GL_TRUE;
 641     }
 642
 643     {
 644         GLvoid *src_ptr = ADD_POINTERS(input->BufferObj->Pointer, input->Ptr);
 645         GLvoid *dst_ptr = ADD_POINTERS(attr->bo->ptr, attr->bo_offset);
 646         int i;
 647
 648         for (i = 0; i < count; ++i)
 649         {
 650             memcpy(dst_ptr, src_ptr, input->StrideB);
 651             src_ptr += input->StrideB;
 652             dst_ptr += dst_stride;
 653         }
 654     }
 655
 656     radeon_bo_unmap(attr->bo);
 657     if (mapped_named_bo)
 658     {
 659         ctx->Driver.UnmapBuffer(ctx, GL_ARRAY_BUFFER, input->BufferObj);
 660     }
 661
 662     attr->stride = dst_stride;
 663 }
 664
 665 static void evergreenSetupStreams(struct gl_context *ctx, const struct gl_client_array *input[], int count)
 666 {
 667         context_t *context = EVERGREEN_CONTEXT(ctx);
 668     GLuint stride;
 669     int ret;
 670     int i, index;
 671
 672     EVERGREEN_STATECHANGE(context, vtx);
 673
 674     for(index = 0; index < context->nNumActiveAos; index++)
 675     {
 676         struct radeon_aos *aos = &context->radeon.tcl.aos[index];
 677         i = context->stream_desc[index].element;
 678
 679         stride = (input[i]->StrideB == 0) ? getTypeSize(input[i]->Type) * input[i]->Size : input[i]->StrideB;
 680
 681         if (input[i]->Type == GL_DOUBLE || input[i]->Type == GL_UNSIGNED_INT || input[i]->Type == GL_INT
 682 #if MESA_BIG_ENDIAN
 683             || getTypeSize(input[i]->Type) != 4
 684 #endif
 685            )
 686         {
 687             evergreenConvertAttrib(ctx, count, input[i], &context->stream_desc[index]);
 688         }
 689         else
 690         {
 691             if (input[i]->BufferObj->Name)
 692             {
 693                     context->stream_desc[index].stride = input[i]->StrideB;
 694                     context->stream_desc[index].bo_offset = (intptr_t) input[i]->Ptr;
 695                     context->stream_desc[index].bo = get_radeon_buffer_object(input[i]->BufferObj)->bo;
 696                     context->stream_desc[index].is_named_bo = GL_TRUE;
 697             }
 698             else
 699             {
 700                 int size;
 701                 int local_count = count;
 702                 uint32_t *dst;
 703
 704                 if (input[i]->StrideB == 0)
 705                 {
 706                     size = getTypeSize(input[i]->Type) * input[i]->Size;
 707                     local_count = 1;
 708                 }
 709                 else
 710                 {
 711                     size = getTypeSize(input[i]->Type) * input[i]->Size * local_count;
 712                 }
 713
 714                 radeonAllocDmaRegion(&context->radeon, &context->stream_desc[index].bo,
 715                                      &context->stream_desc[index].bo_offset, size, 32);
 716
 717                 radeon_bo_map(context->stream_desc[index].bo, 1);
 718                 assert(context->stream_desc[index].bo->ptr != NULL);
 719
 720
 721                 dst = (uint32_t *)ADD_POINTERS(context->stream_desc[index].bo->ptr,
 722                                                context->stream_desc[index].bo_offset);
 723
 724                 switch (context->stream_desc[index].dwords)
 725                 {
 726                 case 1:
 727                     radeonEmitVec4(dst, input[i]->Ptr, input[i]->StrideB, local_count);
 728                     break;
 729                 case 2:
 730                     radeonEmitVec8(dst, input[i]->Ptr, input[i]->StrideB, local_count);
 731                     break;
 732                 case 3:
 733                     radeonEmitVec12(dst, input[i]->Ptr, input[i]->StrideB, local_count);
 734                     break;
 735                 case 4:
 736                     radeonEmitVec16(dst, input[i]->Ptr, input[i]->StrideB, local_count);
 737                     break;
 738                 default:
 739                     assert(0);
 740                     break;
 741                 }
 742
 743                 radeon_bo_unmap(context->stream_desc[index].bo);
 744             }
 745         }
 746
 747         aos->count = context->stream_desc[index].stride == 0 ? 1 : count;
 748         aos->stride = context->stream_desc[index].stride / sizeof(float);
 749         aos->components = context->stream_desc[index].dwords;
 750         aos->bo = context->stream_desc[index].bo;
 751         aos->offset = context->stream_desc[index].bo_offset;
 752
 753         if(context->stream_desc[index].is_named_bo)
 754         {
 755             radeon_cs_space_add_persistent_bo(context->radeon.cmdbuf.cs,
 756                                               context->stream_desc[index].bo,
 757                                               RADEON_GEM_DOMAIN_GTT, 0);
 758         }
 759     }
 760
 761     ret = radeon_cs_space_check_with_bo(context->radeon.cmdbuf.cs,
 762                                         first_elem(&context->radeon.dma.reserved)->bo,
 763                                         RADEON_GEM_DOMAIN_GTT, 0);
 764 }
 765
 766 static void evergreenFreeData(struct gl_context *ctx)
 767 {
 768     /* Need to zero tcl.aos[n].bo and tcl.elt_dma_bo
 769      * to prevent double unref in radeonReleaseArrays
 770      * called during context destroy
 771      */
 772     context_t *context = EVERGREEN_CONTEXT(ctx);
 773
 774     int i;
 775
 776     for (i = 0; i < context->nNumActiveAos; i++)
 777     {
 778         if (!context->stream_desc[i].is_named_bo)
 779         {
 780                 radeon_bo_unref(context->stream_desc[i].bo);
 781         }
 782         context->radeon.tcl.aos[i].bo = NULL;
 783     }
 784
 785     if(context->vp_Constbo != NULL)
 786     {
 787         radeon_bo_unref(context->vp_Constbo);
 788         context->vp_Constbo = NULL;
 789     }
 790     if(context->fp_Constbo != NULL)
 791     {
 792         radeon_bo_unref(context->fp_Constbo);
 793         context->fp_Constbo = NULL;
 794     }
 795
 796     if (context->ind_buf.bo != NULL)
 797     {
 798             radeon_bo_unref(context->ind_buf.bo);
 799     }
 800 }
 801
 802 static GLboolean evergreenTryDrawPrims(struct gl_context *ctx,
 803                                   const struct gl_client_array *arrays[],
 804                                   const struct _mesa_prim *prim,
 805                                   GLuint nr_prims,
 806                                   const struct _mesa_index_buffer *ib,
 807                                   GLuint min_index,
 808                                   GLuint max_index )
 809 {
 810     context_t *context = EVERGREEN_CONTEXT(ctx);
 811     radeonContextPtr radeon = &context->radeon;
 812     GLuint i, id = 0;
 813     struct radeon_renderbuffer *rrb;
 814
 815     if (ctx->NewState)
 816         _mesa_update_state( ctx );
 817
 818     if (evergreen_check_fallbacks(ctx))
 819             return GL_FALSE;
 820
 821     _tnl_UpdateFixedFunctionProgram(ctx);
 822     evergreenSetVertexFormat(ctx, arrays, max_index + 1);
 823
 824
 825     /* shaders need to be updated before buffers are validated */
 826     evergreenUpdateShaders(ctx);
 827     if (!evergreenValidateBuffers(ctx))
 828             return GL_FALSE;
 829
 830     /* always emit CB base to prevent
 831      * lock ups on some chips.
 832      */
 833     EVERGREEN_STATECHANGE(context, cb);
 834     /* mark vtx as dirty since it changes per-draw */
 835     EVERGREEN_STATECHANGE(context, vtx);
 836
 837     evergreenSetScissor(context);
 838
 839     evergreenSetupVertexProgram(ctx);
 840     evergreenSetupFragmentProgram(ctx);
 841     evergreenUpdateShaderStates(ctx);
 842
 843     GLuint emit_end = evergreenPredictRenderSize(ctx, prim, ib, nr_prims)
 844                     + context->radeon.cmdbuf.cs->cdw;
 845
 846     /* evergreenPredictRenderSize will call radeonReleaseDmaRegions, so update VP/FP const buf after it. */
 847     evergreenSetupVPconstants(ctx);
 848     evergreenSetupFPconstants(ctx);
 849
 850     evergreenSetupIndexBuffer(ctx, ib);
 851
 852     evergreenSetupStreams(ctx, arrays, max_index + 1);
 853
 854     radeonEmitState(radeon);
 855
 856     radeon_debug_add_indent();
 857
 858     for (i = 0; i < nr_prims; ++i)
 859     {
 860             if (context->ind_buf.bo)
 861                     evergreenRunRenderPrimitive(ctx,
 862                                            prim[i].start,
 863                                            prim[i].start + prim[i].count,
 864                                            prim[i].mode,
 865                                            prim[i].basevertex);
 866             else
 867                     evergreenRunRenderPrimitiveImmediate(ctx,
 868                                                     prim[i].start,
 869                                                     prim[i].start + prim[i].count,
 870                                                     prim[i].mode);
 871     }
 872
 873     radeon_debug_remove_indent();
 874
 875     /* Flush render op cached for last several quads. */
 876     /* XXX drm should handle this in fence submit */
 877
 878     //evergreeWaitForIdleClean(context);
 879
 880     rrb = radeon_get_colorbuffer(&context->radeon);
 881     if (rrb && rrb->bo)
 882             r700SyncSurf(context, rrb->bo, 0, RADEON_GEM_DOMAIN_VRAM,
 883                          CB_ACTION_ENA_bit | (1 << (id + 6)));
 884
 885     rrb = radeon_get_depthbuffer(&context->radeon);
 886     if (rrb && rrb->bo)
 887             r700SyncSurf(context, rrb->bo, 0, RADEON_GEM_DOMAIN_VRAM,
 888                          DB_ACTION_ENA_bit | DB_DEST_BASE_ENA_bit);
 889
 890     evergreenFreeData(ctx);
 891
 892     if (emit_end < context->radeon.cmdbuf.cs->cdw)
 893     {
 894         WARN_ONCE("Rendering was %d commands larger than predicted size."
 895             " We might overflow  command buffer.\n", context->radeon.cmdbuf.cs->cdw - emit_end);
 896     }
 897
 898     return GL_TRUE;
 899 }
 900
 901 static void evergreenDrawPrims(struct gl_context *ctx,
 902                           const struct gl_client_array *arrays[],
 903                           const struct _mesa_prim *prim,
 904                           GLuint nr_prims,
 905                           const struct _mesa_index_buffer *ib,
 906                           GLboolean index_bounds_valid,
 907                           GLuint min_index,
 908                           GLuint max_index)
 909 {
 910         GLboolean retval = GL_FALSE;
 911
 912         context_t *context = EVERGREEN_CONTEXT(ctx);
 913         radeonContextPtr radeon = &context->radeon;
 914         radeon_prepare_render(radeon);
 915
 916         /* This check should get folded into just the places that
 917          * min/max index are really needed.
 918          */
 919         if (!vbo_all_varyings_in_vbos(arrays)) {
 920                 if (!index_bounds_valid)
 921                         vbo_get_minmax_index(ctx, prim, ib, &min_index, &max_index);
 922                 /* do we want to rebase, minimizes the
 923                  * amount of data to upload? */
 924                 if (min_index) {
 925                         vbo_rebase_prims( ctx, arrays, prim, nr_prims, ib, min_index, max_index, evergreenDrawPrims );
 926                         return;
 927                 }
 928         }
 929         /* Make an attempt at drawing */
 930         retval = evergreenTryDrawPrims(ctx, arrays, prim, nr_prims, ib, min_index, max_index);
 931
 932         /* If failed run tnl pipeline - it should take care of fallbacks */
 933         if (!retval) {
 934                 _swsetup_Wakeup(ctx);
 935                 _tnl_draw_prims(ctx, arrays, prim, nr_prims, ib, min_index, max_index);
 936         }
 937 }
 938
 939 void evergreenInitDraw(struct gl_context *ctx)
 940 {
 941         struct vbo_context *vbo = vbo_context(ctx);
 942
 943         /* to be enabled */
 944         vbo->draw_prims = evergreenDrawPrims;
 945 }
 946
 947