src/mesa/drivers/dri/r600/r600_context.c

   1 /*
   2 Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
   3
   4 The Weather Channel (TM) funded Tungsten Graphics to develop the
   5 initial release of the Radeon 8500 driver under the XFree86 license.
   6 This notice must be preserved.
   7
   8 Permission is hereby granted, free of charge, to any person obtaining
   9 a copy of this software and associated documentation files (the
  10 "Software"), to deal in the Software without restriction, including
  11 without limitation the rights to use, copy, modify, merge, publish,
  12 distribute, sublicense, and/or sell copies of the Software, and to
  13 permit persons to whom the Software is furnished to do so, subject to
  14 the following conditions:
  15
  16 The above copyright notice and this permission notice (including the
  17 next paragraph) shall be included in all copies or substantial
  18 portions of the Software.
  19
  20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  27
  28 **************************************************************************/
  29
  30 /**
  31  * \file
  32  *
  33  * \author Keith Whitwell <keith@tungstengraphics.com>
  34  *
  35  * \author Nicolai Haehnle <prefect_@gmx.net>
  36  */
  37
  38 #include "main/glheader.h"
  39 #include "main/api_arrayelt.h"
  40 #include "main/context.h"
  41 #include "main/simple_list.h"
  42 #include "main/imports.h"
  43 #include "main/extensions.h"
  44 #include "main/bufferobj.h"
  45 #include "main/texobj.h"
  46 #include "main/points.h"
  47
  48 #include "swrast/swrast.h"
  49 #include "swrast_setup/swrast_setup.h"
  50 #include "vbo/vbo.h"
  51
  52 #include "tnl/tnl.h"
  53 #include "tnl/t_pipeline.h"
  54
  55 #include "drivers/common/driverfuncs.h"
  56
  57 #include "radeon_debug.h"
  58 #include "r600_context.h"
  59 #include "radeon_common_context.h"
  60 #include "radeon_buffer_objects.h"
  61 #include "radeon_span.h"
  62 #include "r600_cmdbuf.h"
  63 #include "radeon_bocs_wrapper.h"
  64 #include "radeon_queryobj.h"
  65 #include "r600_blit.h"
  66
  67 #include "r700_state.h"
  68 #include "r700_ioctl.h"
  69
  70 #include "evergreen_context.h"
  71 #include "evergreen_state.h"
  72 #include "evergreen_tex.h"
  73 #include "evergreen_ioctl.h"
  74 #include "evergreen_oglprog.h"
  75
  76 #include "utils.h"
  77
  78 #define R600_ENABLE_GLSL_TEST 1
  79
  80 #define need_GL_VERSION_2_0
  81 #define need_GL_VERSION_2_1
  82 #define need_GL_ARB_draw_elements_base_vertex
  83 #define need_GL_ARB_occlusion_query
  84 #define need_GL_ARB_point_parameters
  85 #define need_GL_ARB_vertex_program
  86 #define need_GL_EXT_blend_equation_separate
  87 #define need_GL_EXT_blend_func_separate
  88 #define need_GL_EXT_blend_minmax
  89 #define need_GL_EXT_framebuffer_object
  90 #define need_GL_EXT_fog_coord
  91 #define need_GL_EXT_gpu_program_parameters
  92 #define need_GL_EXT_provoking_vertex
  93 #define need_GL_EXT_secondary_color
  94 #define need_GL_EXT_stencil_two_side
  95 #define need_GL_ATI_separate_stencil
  96 #define need_GL_NV_vertex_program
  97
  98 #include "main/remap_helper.h"
  99
 100 static const struct dri_extension card_extensions[] = {
 101   /* *INDENT-OFF* */
 102   {"GL_ARB_depth_clamp",                NULL},
 103   {"GL_ARB_depth_texture",              NULL},
 104   {"GL_ARB_fragment_program",           NULL},
 105   {"GL_ARB_fragment_program_shadow",    NULL},
 106   {"GL_ARB_occlusion_query",            GL_ARB_occlusion_query_functions},
 107   {"GL_ARB_multitexture",               NULL},
 108   {"GL_ARB_point_parameters",           GL_ARB_point_parameters_functions},
 109   {"GL_ARB_shadow",                     NULL},
 110   {"GL_ARB_shadow_ambient",             NULL},
 111   {"GL_ARB_texture_border_clamp",       NULL},
 112   {"GL_ARB_texture_cube_map",           NULL},
 113   {"GL_ARB_texture_env_add",            NULL},
 114   {"GL_ARB_texture_env_combine",        NULL},
 115   {"GL_ARB_texture_env_crossbar",       NULL},
 116   {"GL_ARB_texture_env_dot3",           NULL},
 117   {"GL_ARB_texture_mirrored_repeat",    NULL},
 118   {"GL_ARB_texture_non_power_of_two",   NULL},
 119   {"GL_ARB_vertex_program",             GL_ARB_vertex_program_functions},
 120   {"GL_EXT_blend_equation_separate",    GL_EXT_blend_equation_separate_functions},
 121   {"GL_EXT_blend_func_separate",        GL_EXT_blend_func_separate_functions},
 122   {"GL_EXT_blend_minmax",               GL_EXT_blend_minmax_functions},
 123   {"GL_EXT_blend_subtract",             NULL},
 124   {"GL_EXT_packed_depth_stencil",       NULL},
 125   {"GL_EXT_fog_coord",                  GL_EXT_fog_coord_functions },
 126   {"GL_EXT_gpu_program_parameters",     GL_EXT_gpu_program_parameters_functions},
 127   {"GL_EXT_provoking_vertex",           GL_EXT_provoking_vertex_functions },
 128   {"GL_EXT_secondary_color",            GL_EXT_secondary_color_functions},
 129   {"GL_EXT_shadow_funcs",               NULL},
 130   {"GL_EXT_stencil_two_side",           GL_EXT_stencil_two_side_functions},
 131   {"GL_EXT_stencil_wrap",               NULL},
 132   {"GL_EXT_texture_edge_clamp",         NULL},
 133   {"GL_EXT_texture_env_combine",        NULL},
 134   {"GL_EXT_texture_env_dot3",           NULL},
 135   {"GL_EXT_texture_filter_anisotropic", NULL},
 136   {"GL_EXT_texture_lod_bias",           NULL},
 137   {"GL_EXT_texture_mirror_clamp",       NULL},
 138   {"GL_EXT_texture_rectangle",          NULL},
 139   {"GL_EXT_vertex_array_bgra",          NULL},
 140   {"GL_EXT_texture_sRGB",               NULL},
 141   {"GL_ATI_separate_stencil",           GL_ATI_separate_stencil_functions},
 142   {"GL_ATI_texture_env_combine3",       NULL},
 143   {"GL_ATI_texture_mirror_once",        NULL},
 144   {"GL_MESA_pack_invert",               NULL},
 145   {"GL_MESA_ycbcr_texture",             NULL},
 146   {"GL_MESAX_texture_float",            NULL},
 147   {"GL_NV_blend_square",                NULL},
 148   {"GL_NV_vertex_program",              GL_NV_vertex_program_functions},
 149   {"GL_SGIS_generate_mipmap",           NULL},
 150   {"GL_ARB_pixel_buffer_object",        NULL},
 151   {"GL_ARB_draw_elements_base_vertex",  GL_ARB_draw_elements_base_vertex_functions },
 152   {NULL,                                NULL}
 153   /* *INDENT-ON* */
 154 };
 155
 156
 157 static const struct dri_extension mm_extensions[] = {
 158   { "GL_EXT_framebuffer_object", GL_EXT_framebuffer_object_functions },
 159   { NULL, NULL }
 160 };
 161
 162 /**
 163  * The GL 2.0 functions are needed to make display lists work with
 164  * functions added by GL_ATI_separate_stencil.
 165  */
 166 static const struct dri_extension gl_20_extension[] = {
 167 #ifdef R600_ENABLE_GLSL_TEST
 168     {"GL_ARB_shading_language_100",                     GL_VERSION_2_0_functions },
 169 #else
 170   {"GL_VERSION_2_0",                    GL_VERSION_2_0_functions },
 171 #endif /* R600_ENABLE_GLSL_TEST */
 172   {NULL, NULL}
 173 };
 174
 175 static const struct tnl_pipeline_stage *r600_pipeline[] = {
 176         /* Catch any t&l fallbacks
 177          */
 178         &_tnl_vertex_transform_stage,
 179         &_tnl_normal_transform_stage,
 180         &_tnl_lighting_stage,
 181         &_tnl_fog_coordinate_stage,
 182         &_tnl_texgen_stage,
 183         &_tnl_texture_transform_stage,
 184         &_tnl_point_attenuation_stage,
 185         &_tnl_vertex_program_stage,
 186         &_tnl_render_stage,
 187         0,
 188 };
 189
 190 static void r600_get_lock(radeonContextPtr rmesa)
 191 {
 192         drm_radeon_sarea_t *sarea = rmesa->sarea;
 193
 194         if (sarea->ctx_owner != rmesa->dri.hwContext) {
 195                 sarea->ctx_owner = rmesa->dri.hwContext;
 196                 if (!rmesa->radeonScreen->kernel_mm)
 197                         radeon_bo_legacy_texture_age(rmesa->radeonScreen->bom);
 198         }
 199 }
 200
 201 static void r600_vtbl_emit_cs_header(struct radeon_cs *cs, radeonContextPtr rmesa)
 202 {
 203     /* please flush pipe do all pending work */
 204     /* to be enabled */
 205 }
 206
 207 static void r600_vtbl_pre_emit_atoms(radeonContextPtr radeon)
 208 {
 209         r700Start3D((context_t *)radeon);
 210 }
 211
 212 static void r600_fallback(GLcontext *ctx, GLuint bit, GLboolean mode)
 213 {
 214         context_t *context = R700_CONTEXT(ctx);
 215         if (mode)
 216                 context->radeon.Fallback |= bit;
 217         else
 218                 context->radeon.Fallback &= ~bit;
 219 }
 220
 221 static void r600_emit_query_finish(radeonContextPtr radeon)
 222 {
 223         context_t *context = (context_t*) radeon;
 224         BATCH_LOCALS(&context->radeon);
 225
 226         struct radeon_query_object *query = radeon->query.current;
 227
 228         BEGIN_BATCH_NO_AUTOSTATE(4 + 2);
 229         R600_OUT_BATCH(CP_PACKET3(R600_IT_EVENT_WRITE, 2));
 230         R600_OUT_BATCH(R600_EVENT_TYPE(ZPASS_DONE) | R600_EVENT_INDEX(1));
 231         R600_OUT_BATCH(query->curr_offset + 8); /* hw writes qwords */
 232         R600_OUT_BATCH(0x00000000);
 233         R600_OUT_BATCH_RELOC(VGT_EVENT_INITIATOR, query->bo, 0, 0, RADEON_GEM_DOMAIN_GTT, 0);
 234         END_BATCH();
 235         assert(query->curr_offset < RADEON_QUERY_PAGE_SIZE);
 236         query->emitted_begin = GL_FALSE;
 237 }
 238
 239 static void r600_init_vtbl(radeonContextPtr radeon)
 240 {
 241         radeon->vtbl.get_lock = r600_get_lock;
 242         radeon->vtbl.update_viewport_offset = r700UpdateViewportOffset;
 243         radeon->vtbl.emit_cs_header = r600_vtbl_emit_cs_header;
 244         radeon->vtbl.swtcl_flush = NULL;
 245         radeon->vtbl.pre_emit_atoms = r600_vtbl_pre_emit_atoms;
 246         radeon->vtbl.fallback = r600_fallback;
 247         radeon->vtbl.emit_query_finish = r600_emit_query_finish;
 248         radeon->vtbl.check_blit = r600_check_blit;
 249         radeon->vtbl.blit = r600_blit;
 250         radeon->vtbl.is_format_renderable = r600IsFormatRenderable;
 251 }
 252
 253 static void r600InitConstValues(GLcontext *ctx, radeonScreenPtr screen)
 254 {
 255     context_t         *context = R700_CONTEXT(ctx);
 256     R700_CHIP_CONTEXT *r700    = (R700_CHIP_CONTEXT*)(&context->hw);
 257
 258     if(  (context->radeon.radeonScreen->chip_family >= CHIP_FAMILY_CEDAR)
 259        &&(context->radeon.radeonScreen->chip_family <= CHIP_FAMILY_HEMLOCK) )
 260     {
 261         r700->bShaderUseMemConstant = GL_TRUE;
 262     }
 263     else
 264     {
 265         r700->bShaderUseMemConstant = GL_FALSE;
 266     }
 267
 268         ctx->Const.GLSLVersion = 120;
 269
 270         ctx->Const.MaxTextureImageUnits = 16;
 271         /* 8 per clause on r6xx, 16 on r7xx
 272          * but I think mesa only supports 8 at the moment
 273          */
 274         ctx->Const.MaxTextureCoordUnits = 8;
 275         ctx->Const.MaxTextureUnits =
 276             MIN2(ctx->Const.MaxTextureImageUnits,
 277                  ctx->Const.MaxTextureCoordUnits);
 278         ctx->Const.MaxCombinedTextureImageUnits =
 279                 ctx->Const.MaxVertexTextureImageUnits +
 280                 ctx->Const.MaxTextureImageUnits;
 281
 282         ctx->Const.MaxTextureMaxAnisotropy = 16.0;
 283         ctx->Const.MaxTextureLodBias = 16.0;
 284
 285         ctx->Const.MaxTextureLevels = 13; /* hw support 14 */
 286         ctx->Const.MaxTextureRectSize = 4096; /* hw support 8192 */
 287
 288         ctx->Const.MinPointSize   = 0x0001 / 8.0;
 289         ctx->Const.MinPointSizeAA = 0x0001 / 8.0;
 290         ctx->Const.MaxPointSize   = 0xffff / 8.0;
 291         ctx->Const.MaxPointSizeAA = 0xffff / 8.0;
 292
 293         ctx->Const.MinLineWidth   = 0x0001 / 8.0;
 294         ctx->Const.MinLineWidthAA = 0x0001 / 8.0;
 295         ctx->Const.MaxLineWidth   = 0xffff / 8.0;
 296         ctx->Const.MaxLineWidthAA = 0xffff / 8.0;
 297
 298         ctx->Const.MaxDrawBuffers = 1; /* hw supports 8 */
 299         ctx->Const.MaxColorAttachments = 1;
 300         ctx->Const.MaxRenderbufferSize = 4096;
 301
 302         /* 256 for reg-based consts, inline consts also supported */
 303         ctx->Const.VertexProgram.MaxInstructions = 8192; /* in theory no limit */
 304         ctx->Const.VertexProgram.MaxNativeInstructions = 8192;
 305         ctx->Const.VertexProgram.MaxNativeAttribs = 160;
 306         ctx->Const.VertexProgram.MaxTemps = 128;
 307         ctx->Const.VertexProgram.MaxNativeTemps = 128;
 308         ctx->Const.VertexProgram.MaxNativeParameters = 256;
 309         ctx->Const.VertexProgram.MaxNativeAddressRegs = 1; /* ??? */
 310
 311         ctx->Const.FragmentProgram.MaxNativeTemps = 128;
 312         ctx->Const.FragmentProgram.MaxNativeAttribs = 32;
 313         ctx->Const.FragmentProgram.MaxNativeParameters = 256;
 314         ctx->Const.FragmentProgram.MaxNativeAluInstructions = 8192;
 315         /* 8 per clause on r6xx, 16 on r7xx */
 316         if (screen->chip_family >= CHIP_FAMILY_RV770)
 317                 ctx->Const.FragmentProgram.MaxNativeTexInstructions = 16;
 318         else
 319                 ctx->Const.FragmentProgram.MaxNativeTexInstructions = 8;
 320         ctx->Const.FragmentProgram.MaxNativeInstructions = 8192;
 321         ctx->Const.FragmentProgram.MaxNativeTexIndirections = 8; /* ??? */
 322         ctx->Const.FragmentProgram.MaxNativeAddressRegs = 0;    /* and these are?? */
 323 }
 324
 325 static void r600ParseOptions(context_t *r600, radeonScreenPtr screen)
 326 {
 327         /* Parse configuration files.
 328          * Do this here so that initialMaxAnisotropy is set before we create
 329          * the default textures.
 330          */
 331         driParseConfigFiles(&r600->radeon.optionCache, &screen->optionCache,
 332                             screen->driScreen->myNum, "r600");
 333
 334         r600->radeon.initialMaxAnisotropy = driQueryOptionf(&r600->radeon.optionCache,
 335                                                             "def_max_anisotropy");
 336
 337 }
 338
 339 static void r600InitGLExtensions(GLcontext *ctx)
 340 {
 341         context_t *r600 = R700_CONTEXT(ctx);
 342 #ifdef R600_ENABLE_GLSL_TEST
 343         unsigned i;
 344 #endif
 345
 346         driInitExtensions(ctx, card_extensions, GL_TRUE);
 347         if (r600->radeon.radeonScreen->kernel_mm)
 348           driInitExtensions(ctx, mm_extensions, GL_FALSE);
 349
 350 #ifdef R600_ENABLE_GLSL_TEST
 351     driInitExtensions(ctx, gl_20_extension, GL_TRUE);
 352     _mesa_enable_2_0_extensions(ctx);
 353
 354         /* glsl compiler has problem if this is not GL_TRUE */
 355         for (i = 0; i <= MESA_SHADER_FRAGMENT; i++)
 356                 ctx->ShaderCompilerOptions[i].EmitCondCodes = GL_TRUE;
 357 #endif /* R600_ENABLE_GLSL_TEST */
 358
 359         if (driQueryOptionb
 360             (&r600->radeon.optionCache, "disable_stencil_two_side"))
 361                 _mesa_disable_extension(ctx, "GL_EXT_stencil_two_side");
 362
 363         if (r600->radeon.glCtx->Mesa_DXTn
 364             && !driQueryOptionb(&r600->radeon.optionCache, "disable_s3tc")) {
 365                 _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
 366                 _mesa_enable_extension(ctx, "GL_S3_s3tc");
 367         } else
 368             if (driQueryOptionb(&r600->radeon.optionCache, "force_s3tc_enable"))
 369         {
 370                 _mesa_enable_extension(ctx, "GL_EXT_texture_compression_s3tc");
 371         }
 372
 373         /* RV740 had a broken pipe config prior to drm 1.32 */
 374         if (!r600->radeon.radeonScreen->kernel_mm) {
 375                 if ((r600->radeon.dri.drmMinor < 32) &&
 376                     (r600->radeon.radeonScreen->chip_family == CHIP_FAMILY_RV740))
 377                         _mesa_disable_extension(ctx, "GL_ARB_occlusion_query");
 378         }
 379 }
 380
 381 /* Create the device specific rendering context.
 382  */
 383 GLboolean r600CreateContext(gl_api api,
 384                             const __GLcontextModes * glVisual,
 385                             __DRIcontext * driContextPriv,
 386                             void *sharedContextPrivate)
 387 {
 388         __DRIscreen *sPriv = driContextPriv->driScreenPriv;
 389         radeonScreenPtr screen = (radeonScreenPtr) (sPriv->private);
 390         struct dd_function_table functions;
 391         context_t *r600;
 392         GLcontext *ctx;
 393
 394         assert(glVisual);
 395         assert(driContextPriv);
 396         assert(screen);
 397
 398         /* Allocate the R600 context */
 399         r600 = (context_t*) CALLOC(sizeof(*r600));
 400         if (!r600) {
 401                 radeon_error("Failed to allocate memory for context.\n");
 402                 return GL_FALSE;
 403         }
 404
 405         r600ParseOptions(r600, screen);
 406
 407         r600->radeon.radeonScreen = screen;
 408
 409     if(screen->chip_family >= CHIP_FAMILY_CEDAR)
 410     {
 411             evergreen_init_vtbl(&r600->radeon);
 412     }
 413     else
 414     {
 415         r600_init_vtbl(&r600->radeon);
 416     }
 417
 418         /* Init default driver functions then plug in our R600-specific functions
 419          * (the texture functions are especially important)
 420          */
 421         _mesa_init_driver_functions(&functions);
 422
 423     if(screen->chip_family >= CHIP_FAMILY_CEDAR)
 424     {
 425         evergreenCreateChip(r600);
 426         evergreenInitStateFuncs(&r600->radeon, &functions);
 427             evergreenInitTextureFuncs(&r600->radeon, &functions);
 428             evergreenInitShaderFuncs(&functions);
 429     }
 430     else
 431     {
 432             r700InitStateFuncs(&r600->radeon, &functions);
 433             r600InitTextureFuncs(&r600->radeon, &functions);
 434             r700InitShaderFuncs(&functions);
 435     }
 436
 437         radeonInitQueryObjFunctions(&functions);
 438
 439     if(screen->chip_family >= CHIP_FAMILY_CEDAR)
 440     {
 441         evergreenInitIoctlFuncs(&functions);
 442     }
 443     else
 444     {
 445             r700InitIoctlFuncs(&functions);
 446     }
 447         radeonInitBufferObjectFuncs(&functions);
 448
 449         if (!radeonInitContext(&r600->radeon, &functions,
 450                                glVisual, driContextPriv,
 451                                sharedContextPrivate)) {
 452                 radeon_error("Initializing context failed.\n");
 453                 FREE(r600);
 454                 return GL_FALSE;
 455         }
 456
 457         ctx = r600->radeon.glCtx;
 458
 459         ctx->VertexProgram._MaintainTnlProgram = GL_TRUE;
 460         ctx->FragmentProgram._MaintainTexEnvProgram = GL_TRUE;
 461
 462         r600InitConstValues(ctx, screen);
 463
 464         /* reinit, it depends on consts above */
 465         _mesa_init_point(ctx);
 466
 467         _mesa_set_mvp_with_dp4( ctx, GL_TRUE );
 468
 469         /* Initialize the software rasterizer and helper modules.
 470          */
 471         _swrast_CreateContext(ctx);
 472         _vbo_CreateContext(ctx);
 473         _tnl_CreateContext(ctx);
 474         _swsetup_CreateContext(ctx);
 475         _swsetup_Wakeup(ctx);
 476
 477         /* Install the customized pipeline:
 478          */
 479         _tnl_destroy_pipeline(ctx);
 480         _tnl_install_pipeline(ctx, r600_pipeline);
 481         TNL_CONTEXT(ctx)->Driver.RunPipeline = _tnl_run_pipeline;
 482
 483         /* Configure swrast and TNL to match hardware characteristics:
 484          */
 485         _swrast_allow_pixel_fog(ctx, GL_FALSE);
 486         _swrast_allow_vertex_fog(ctx, GL_TRUE);
 487         _tnl_allow_pixel_fog(ctx, GL_FALSE);
 488         _tnl_allow_vertex_fog(ctx, GL_TRUE);
 489
 490         radeon_init_debug();
 491
 492     if(screen->chip_family >= CHIP_FAMILY_CEDAR)
 493     {
 494         evergreenInitDraw(ctx);
 495     }
 496     else
 497     {
 498             r700InitDraw(ctx);
 499     }
 500
 501         radeon_fbo_init(&r600->radeon);
 502         radeonInitSpanFuncs( ctx );
 503         r600InitCmdBuf(r600);
 504
 505     if(screen->chip_family >= CHIP_FAMILY_CEDAR)
 506     {
 507         evergreenInitState(r600->radeon.glCtx);
 508     }
 509     else
 510     {
 511             r700InitState(r600->radeon.glCtx);
 512     }
 513
 514         r600InitGLExtensions(ctx);
 515
 516         return GL_TRUE;
 517 }
 518
 519 void r600DestroyContext(__DRIcontext *driContextPriv )
 520 {
 521     void      *pChip;
 522     context_t *context = (context_t *) driContextPriv->driverPrivate;
 523
 524     assert(context);
 525
 526     pChip = context->pChip;
 527
 528     /* destroy context first, free pChip, in case there are things flush to asic. */
 529     radeonDestroyContext(driContextPriv);
 530
 531     FREE(pChip);
 532 }
 533
 534