src/mesa/drivers/dri/r600/r700_fragprog.c

   1 /*
   2  * Copyright (C) 2008-2009  Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included
  12  * in all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  15  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
  18  * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  19  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  20  */
  21
  22 /*
  23  * Authors:
  24  *   Richard Li <RichardZ.Li@amd.com>, <richardradeon@gmail.com>
  25  *   CooperYuan <cooper.yuan@amd.com>, <cooperyuan@gmail.com>
  26  */
  27
  28 #include <stdio.h>
  29 #include <stdarg.h>
  30 #include <stdlib.h>
  31 #include <string.h>
  32 #include <math.h>
  33
  34 #include "main/imports.h"
  35 #include "program/prog_parameter.h"
  36 #include "program/prog_statevars.h"
  37 #include "program/program.h"
  38
  39 #include "r600_context.h"
  40 #include "r600_cmdbuf.h"
  41 #include "r600_emit.h"
  42
  43 #include "r700_fragprog.h"
  44
  45 #include "r700_debug.h"
  46
  47 void insert_wpos_code(struct gl_context *ctx, struct gl_fragment_program *fprog)
  48 {
  49     static const gl_state_index winstate[STATE_LENGTH]
  50          = { STATE_INTERNAL, STATE_FB_SIZE, 0, 0, 0};
  51     struct prog_instruction *newInst, *inst;
  52     GLint  win_size;  /* state reference */
  53     GLuint wpos_temp; /* temp register */
  54     int i, j;
  55
  56     /* PARAM win_size = STATE_FB_SIZE */
  57     win_size = _mesa_add_state_reference(fprog->Base.Parameters, winstate);
  58
  59     wpos_temp = fprog->Base.NumTemporaries++;
  60
  61     /* scan program where WPOS is used and replace with wpos_temp */
  62     inst = fprog->Base.Instructions;
  63     for (i = 0; i < fprog->Base.NumInstructions; i++) {
  64         for (j=0; j < 3; j++) {
  65             if(inst->SrcReg[j].File == PROGRAM_INPUT &&
  66                inst->SrcReg[j].Index == FRAG_ATTRIB_WPOS) {
  67                 inst->SrcReg[j].File = PROGRAM_TEMPORARY;
  68                 inst->SrcReg[j].Index = wpos_temp;
  69             }
  70         }
  71         inst++;
  72     }
  73
  74     _mesa_insert_instructions(&(fprog->Base), 0, 1);
  75
  76     newInst = fprog->Base.Instructions;
  77     /* invert wpos.y
  78      * wpos_temp.xyzw = wpos.x-yzw + winsize.0y00 */
  79     newInst[0].Opcode = OPCODE_ADD;
  80     newInst[0].DstReg.File = PROGRAM_TEMPORARY;
  81     newInst[0].DstReg.Index = wpos_temp;
  82     newInst[0].DstReg.WriteMask = WRITEMASK_XYZW;
  83
  84     newInst[0].SrcReg[0].File = PROGRAM_INPUT;
  85     newInst[0].SrcReg[0].Index = FRAG_ATTRIB_WPOS;
  86     newInst[0].SrcReg[0].Swizzle = SWIZZLE_XYZW;
  87     newInst[0].SrcReg[0].Negate = NEGATE_Y;
  88
  89     newInst[0].SrcReg[1].File = PROGRAM_STATE_VAR;
  90     newInst[0].SrcReg[1].Index = win_size;
  91     newInst[0].SrcReg[1].Swizzle = MAKE_SWIZZLE4(SWIZZLE_ZERO, SWIZZLE_Y, SWIZZLE_ZERO, SWIZZLE_ZERO);
  92
  93 }
  94
  95 //TODO : Validate FP input with VP output.
  96 void Map_Fragment_Program(r700_AssemblerBase         *pAsm,
  97                                                   struct gl_fragment_program *mesa_fp,
  98                           struct gl_context *ctx)
  99 {
 100         unsigned int unBit;
 101     unsigned int i;
 102
 103     /* match fp inputs with vp exports. */
 104     struct r700_vertex_program_cont *vpc =
 105                        (struct r700_vertex_program_cont *)ctx->VertexProgram._Current;
 106     GLbitfield OutputsWritten = vpc->mesa_program.Base.OutputsWritten;
 107
 108         pAsm->number_used_registers = 0;
 109
 110 //Input mapping : mesa_fp->Base.InputsRead set the flag, set in
 111         //The flags parsed in parse_attrib_binding. FRAG_ATTRIB_COLx, FRAG_ATTRIB_TEXx, ...
 112         //MUST match order in Map_Vertex_Output
 113         unBit = 1 << FRAG_ATTRIB_WPOS;
 114         if(mesa_fp->Base.InputsRead & unBit)
 115         {
 116                 pAsm->uiFP_AttributeMap[FRAG_ATTRIB_WPOS] = pAsm->number_used_registers++;
 117         }
 118
 119     unBit = 1 << VERT_RESULT_COL0;
 120         if(OutputsWritten & unBit)
 121         {
 122                 pAsm->uiFP_AttributeMap[FRAG_ATTRIB_COL0] = pAsm->number_used_registers++;
 123         }
 124
 125         unBit = 1 << VERT_RESULT_COL1;
 126         if(OutputsWritten & unBit)
 127         {
 128                 pAsm->uiFP_AttributeMap[FRAG_ATTRIB_COL1] = pAsm->number_used_registers++;
 129         }
 130
 131     unBit = 1 << VERT_RESULT_FOGC;
 132     if(OutputsWritten & unBit)
 133     {
 134         pAsm->uiFP_AttributeMap[FRAG_ATTRIB_FOGC] = pAsm->number_used_registers++;
 135     }
 136
 137         for(i=0; i<8; i++)
 138         {
 139                 unBit = 1 << (VERT_RESULT_TEX0 + i);
 140                 if(OutputsWritten & unBit)
 141                 {
 142                         pAsm->uiFP_AttributeMap[FRAG_ATTRIB_TEX0 + i] = pAsm->number_used_registers++;
 143                 }
 144         }
 145
 146 /* order has been taken care of */
 147 #if 1
 148     for(i=VERT_RESULT_VAR0; i<VERT_RESULT_MAX; i++)
 149         {
 150         unBit = 1 << i;
 151         if(OutputsWritten & unBit)
 152                 {
 153             pAsm->uiFP_AttributeMap[i-VERT_RESULT_VAR0+FRAG_ATTRIB_VAR0] = pAsm->number_used_registers++;
 154         }
 155     }
 156 #else
 157     if( (mesa_fp->Base.InputsRead >> FRAG_ATTRIB_VAR0) > 0 )
 158     {
 159             struct r700_vertex_program_cont *vpc =
 160                        (struct r700_vertex_program_cont *)ctx->VertexProgram._Current;
 161         struct gl_program_parameter_list * VsVarying = vpc->mesa_program.Base.Varying;
 162         struct gl_program_parameter_list * PsVarying = mesa_fp->Base.Varying;
 163         struct gl_program_parameter      * pVsParam;
 164         struct gl_program_parameter      * pPsParam;
 165         GLuint j, k;
 166         GLuint unMaxVarying = 0;
 167
 168         for(i=0; i<VsVarying->NumParameters; i++)
 169         {
 170             pAsm->uiFP_AttributeMap[i + FRAG_ATTRIB_VAR0] = 0;
 171         }
 172
 173         for(i=FRAG_ATTRIB_VAR0; i<FRAG_ATTRIB_MAX; i++)
 174             {
 175             unBit = 1 << i;
 176             if(mesa_fp->Base.InputsRead & unBit)
 177                     {
 178                 j = i - FRAG_ATTRIB_VAR0;
 179                 pPsParam = PsVarying->Parameters + j;
 180
 181                 for(k=0; k<VsVarying->NumParameters; k++)
 182                 {
 183                     pVsParam = VsVarying->Parameters + k;
 184
 185                                 if( strcmp(pPsParam->Name, pVsParam->Name) == 0)
 186                     {
 187                         pAsm->uiFP_AttributeMap[i] = pAsm->number_used_registers + k;
 188                         if(k > unMaxVarying)
 189                         {
 190                             unMaxVarying = k;
 191                         }
 192                         break;
 193                     }
 194                 }
 195                     }
 196         }
 197
 198         pAsm->number_used_registers += unMaxVarying + 1;
 199     }
 200 #endif
 201     unBit = 1 << FRAG_ATTRIB_FACE;
 202     if(mesa_fp->Base.InputsRead & unBit)
 203     {
 204         pAsm->uiFP_AttributeMap[FRAG_ATTRIB_FACE] = pAsm->number_used_registers++;
 205     }
 206
 207     unBit = 1 << FRAG_ATTRIB_PNTC;
 208     if(mesa_fp->Base.InputsRead & unBit)
 209     {
 210         pAsm->uiFP_AttributeMap[FRAG_ATTRIB_PNTC] = pAsm->number_used_registers++;
 211     }
 212
 213 /* Map temporary registers (GPRs) */
 214     pAsm->starting_temp_register_number = pAsm->number_used_registers;
 215
 216     if(mesa_fp->Base.NumNativeTemporaries >= mesa_fp->Base.NumTemporaries)
 217     {
 218             pAsm->number_used_registers += mesa_fp->Base.NumNativeTemporaries;
 219     }
 220     else
 221     {
 222         pAsm->number_used_registers += mesa_fp->Base.NumTemporaries;
 223     }
 224
 225 /* Output mapping */
 226         pAsm->number_of_exports = 0;
 227         pAsm->number_of_colorandz_exports = 0; /* don't include stencil and mask out. */
 228         pAsm->starting_export_register_number = pAsm->number_used_registers;
 229
 230     for (i = 0; i < FRAG_RESULT_MAX; ++i)
 231     {
 232         unBit = 1 << i;
 233         if (mesa_fp->Base.OutputsWritten & unBit)
 234         {
 235             if (i == FRAG_RESULT_DEPTH)
 236             {
 237                 pAsm->depth_export_register_number = pAsm->number_used_registers;
 238                 pAsm->pR700Shader->depthIsExported = 1;
 239             }
 240
 241             pAsm->uiFP_OutputMap[i] = pAsm->number_used_registers++;
 242             ++pAsm->number_of_exports;
 243             ++pAsm->number_of_colorandz_exports;
 244         }
 245     }
 246
 247     pAsm->flag_reg_index = pAsm->number_used_registers++;
 248
 249     pAsm->uFirstHelpReg = pAsm->number_used_registers;
 250 }
 251
 252 GLboolean Find_Instruction_Dependencies_fp(struct r700_fragment_program *fp,
 253                                                                 struct gl_fragment_program   *mesa_fp)
 254 {
 255     GLuint i, j;
 256     GLint * puiTEMPwrites;
 257     GLint * puiTEMPreads;
 258     struct prog_instruction * pILInst;
 259     InstDeps         *pInstDeps;
 260     struct prog_instruction * texcoord_DepInst;
 261     GLint              nDepInstID;
 262
 263     puiTEMPwrites = (GLint*) MALLOC(sizeof(GLuint)*mesa_fp->Base.NumTemporaries);
 264     puiTEMPreads = (GLint*) MALLOC(sizeof(GLuint)*mesa_fp->Base.NumTemporaries);
 265
 266     for(i=0; i<mesa_fp->Base.NumTemporaries; i++)
 267     {
 268         puiTEMPwrites[i] = -1;
 269         puiTEMPreads[i] = -1;
 270     }
 271
 272     pInstDeps = (InstDeps*)MALLOC(sizeof(InstDeps)*mesa_fp->Base.NumInstructions);
 273
 274     for(i=0; i<mesa_fp->Base.NumInstructions; i++)
 275     {
 276         pInstDeps[i].nDstDep = -1;
 277         pILInst = &(mesa_fp->Base.Instructions[i]);
 278
 279         //Dst
 280         if(pILInst->DstReg.File == PROGRAM_TEMPORARY)
 281         {
 282             //Set lastwrite for the temp
 283             puiTEMPwrites[pILInst->DstReg.Index] = i;
 284         }
 285
 286         //Src
 287         for(j=0; j<3; j++)
 288         {
 289             if(pILInst->SrcReg[j].File == PROGRAM_TEMPORARY)
 290             {
 291                 //Set dep.
 292                 pInstDeps[i].nSrcDeps[j] = puiTEMPwrites[pILInst->SrcReg[j].Index];
 293                 //Set first read
 294                 if(puiTEMPreads[pILInst->SrcReg[j].Index] < 0 )
 295                 {
 296                     puiTEMPreads[pILInst->SrcReg[j].Index] = i;
 297                 }
 298             }
 299             else
 300             {
 301                 pInstDeps[i].nSrcDeps[j] = -1;
 302             }
 303         }
 304     }
 305
 306     fp->r700AsmCode.pInstDeps = pInstDeps;
 307
 308     //Find dep for tex inst
 309     for(i=0; i<mesa_fp->Base.NumInstructions; i++)
 310     {
 311         pILInst = &(mesa_fp->Base.Instructions[i]);
 312
 313         if(GL_TRUE == IsTex(pILInst->Opcode))
 314         {   //src0 is the tex coord register, src1 is texunit, src2 is textype
 315             nDepInstID = pInstDeps[i].nSrcDeps[0];
 316             if(nDepInstID >= 0)
 317             {
 318                 texcoord_DepInst = &(mesa_fp->Base.Instructions[nDepInstID]);
 319                 if(GL_TRUE == IsAlu(texcoord_DepInst->Opcode) )
 320                 {
 321                     pInstDeps[nDepInstID].nDstDep = i;
 322                     pInstDeps[i].nDstDep = i;
 323                 }
 324                 else if(GL_TRUE == IsTex(texcoord_DepInst->Opcode) )
 325                 {
 326                     pInstDeps[i].nDstDep = i;
 327                 }
 328                 else
 329                 {   //... other deps?
 330                 }
 331             }
 332             // make sure that we dont overwrite src used earlier
 333             nDepInstID = puiTEMPreads[pILInst->DstReg.Index];
 334             if(nDepInstID < i)
 335             {
 336                 pInstDeps[i].nDstDep = puiTEMPreads[pILInst->DstReg.Index];
 337                 texcoord_DepInst = &(mesa_fp->Base.Instructions[nDepInstID]);
 338                 if(GL_TRUE == IsAlu(texcoord_DepInst->Opcode) )
 339                 {
 340                     pInstDeps[nDepInstID].nDstDep = i;
 341                 }
 342
 343             }
 344
 345         }
 346         }
 347
 348     FREE(puiTEMPwrites);
 349     FREE(puiTEMPreads);
 350
 351     return GL_TRUE;
 352 }
 353
 354 GLboolean r700TranslateFragmentShader(struct r700_fragment_program *fp,
 355                                                              struct gl_fragment_program   *mesa_fp,
 356                                  struct gl_context *ctx)
 357 {
 358     context_t *context = R700_CONTEXT(ctx);
 359     R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw);
 360
 361         GLuint    number_of_colors_exported;
 362         GLboolean z_enabled = GL_FALSE;
 363         GLuint    unBit, shadow_unit;
 364         int i;
 365         struct prog_instruction *inst;
 366         gl_state_index shadow_ambient[STATE_LENGTH]
 367             = { STATE_INTERNAL, STATE_SHADOW_AMBIENT, 0, 0, 0};
 368
 369     //Init_Program
 370         Init_r700_AssemblerBase( SPT_FP, &(fp->r700AsmCode), &(fp->r700Shader) );
 371
 372     if(GL_TRUE == r700->bShaderUseMemConstant)
 373     {
 374         fp->r700AsmCode.bUseMemConstant = GL_TRUE;
 375     }
 376     else
 377     {
 378         fp->r700AsmCode.bUseMemConstant = GL_FALSE;
 379     }
 380
 381     fp->r700AsmCode.unAsic = 7;
 382
 383     if(mesa_fp->Base.InputsRead & FRAG_BIT_WPOS)
 384     {
 385         insert_wpos_code(ctx, mesa_fp);
 386     }
 387
 388     /* add/map  consts for ARB_shadow_ambient */
 389     if(mesa_fp->Base.ShadowSamplers)
 390     {
 391         inst = mesa_fp->Base.Instructions;
 392         for (i = 0; i < mesa_fp->Base.NumInstructions; i++)
 393         {
 394             if(inst->TexShadow == 1)
 395             {
 396                 shadow_unit = inst->TexSrcUnit;
 397                 shadow_ambient[2] = shadow_unit;
 398                 fp->r700AsmCode.shadow_regs[shadow_unit] =
 399                     _mesa_add_state_reference(mesa_fp->Base.Parameters, shadow_ambient);
 400             }
 401             inst++;
 402         }
 403     }
 404
 405     Map_Fragment_Program(&(fp->r700AsmCode), mesa_fp, ctx);
 406
 407     if( GL_FALSE == Find_Instruction_Dependencies_fp(fp, mesa_fp) )
 408         {
 409                 return GL_FALSE;
 410     }
 411
 412     InitShaderProgram(&(fp->r700AsmCode));
 413
 414     for(i=0; i < MAX_SAMPLERS; i++)
 415     {
 416          fp->r700AsmCode.SamplerUnits[i] = fp->mesa_program.Base.SamplerUnits[i];
 417     }
 418
 419     fp->r700AsmCode.unCurNumILInsts = mesa_fp->Base.NumInstructions;
 420
 421         if( GL_FALSE == AssembleInstr(0,
 422                                   0,
 423                                   mesa_fp->Base.NumInstructions,
 424                                   &(mesa_fp->Base.Instructions[0]),
 425                                   &(fp->r700AsmCode)) )
 426         {
 427                 return GL_FALSE;
 428         }
 429
 430     if(GL_FALSE == Process_Fragment_Exports(&(fp->r700AsmCode), mesa_fp->Base.OutputsWritten) )
 431     {
 432         return GL_FALSE;
 433     }
 434
 435     if( GL_FALSE == RelocProgram(&(fp->r700AsmCode), &(mesa_fp->Base)) )
 436     {
 437         return GL_FALSE;
 438     }
 439
 440     fp->r700Shader.nRegs = (fp->r700AsmCode.number_used_registers == 0) ? 0
 441                          : (fp->r700AsmCode.number_used_registers - 1);
 442
 443         fp->r700Shader.nParamExports = fp->r700AsmCode.number_of_exports;
 444
 445         number_of_colors_exported = fp->r700AsmCode.number_of_colorandz_exports;
 446
 447         unBit = 1 << FRAG_RESULT_DEPTH;
 448         if(mesa_fp->Base.OutputsWritten & unBit)
 449         {
 450                 z_enabled = GL_TRUE;
 451                 number_of_colors_exported--;
 452         }
 453
 454         /* illegal to set this to 0 */
 455         if(number_of_colors_exported || z_enabled)
 456         {
 457             fp->r700Shader.exportMode = number_of_colors_exported << 1 | z_enabled;
 458         }
 459         else
 460         {
 461             fp->r700Shader.exportMode = (1 << 1);
 462         }
 463
 464     fp->translated = GL_TRUE;
 465
 466         return GL_TRUE;
 467 }
 468
 469 void r700SelectFragmentShader(struct gl_context *ctx)
 470 {
 471     context_t *context = R700_CONTEXT(ctx);
 472     struct r700_fragment_program *fp = (struct r700_fragment_program *)
 473             (ctx->FragmentProgram._Current);
 474     if (context->radeon.radeonScreen->chip_family < CHIP_FAMILY_RV770)
 475     {
 476             fp->r700AsmCode.bR6xx = 1;
 477     }
 478
 479     if (GL_FALSE == fp->translated)
 480             r700TranslateFragmentShader(fp, &(fp->mesa_program), ctx);
 481 }
 482
 483 void * r700GetActiveFpShaderBo(struct gl_context * ctx)
 484 {
 485     struct r700_fragment_program *fp = (struct r700_fragment_program *)
 486                                            (ctx->FragmentProgram._Current);
 487
 488     return fp->shaderbo;
 489 }
 490
 491 void * r700GetActiveFpShaderConstBo(struct gl_context * ctx)
 492 {
 493     struct r700_fragment_program *fp = (struct r700_fragment_program *)
 494                                            (ctx->FragmentProgram._Current);
 495
 496     return fp->constbo0;
 497 }
 498
 499 GLboolean r700SetupFragmentProgram(struct gl_context * ctx)
 500 {
 501     context_t *context = R700_CONTEXT(ctx);
 502     R700_CHIP_CONTEXT *r700 = (R700_CHIP_CONTEXT*)(&context->hw);
 503     struct r700_fragment_program *fp = (struct r700_fragment_program *)
 504                                            (ctx->FragmentProgram._Current);
 505     r700_AssemblerBase         *pAsm = &(fp->r700AsmCode);
 506     struct gl_fragment_program *mesa_fp = &(fp->mesa_program);
 507     struct gl_program_parameter_list *paramList;
 508     unsigned int unNumParamData;
 509     unsigned int ui, i;
 510     unsigned int unNumOfReg;
 511     unsigned int unBit;
 512     GLuint exportCount;
 513     GLboolean point_sprite = GL_FALSE;
 514
 515     if(GL_FALSE == fp->loaded)
 516     {
 517             if(fp->r700Shader.bNeedsAssembly == GL_TRUE)
 518             {
 519                     Assemble( &(fp->r700Shader) );
 520             }
 521
 522         /* Load fp to gpu */
 523         r600EmitShader(ctx,
 524                        &(fp->shaderbo),
 525                        (GLvoid *)(fp->r700Shader.pProgram),
 526                        fp->r700Shader.uShaderBinaryDWORDSize,
 527                        "FS");
 528
 529         fp->loaded = GL_TRUE;
 530     }
 531
 532     DumpHwBinary(DUMP_PIXEL_SHADER, (GLvoid *)(fp->r700Shader.pProgram),
 533                  fp->r700Shader.uShaderBinaryDWORDSize);
 534
 535     /* TODO : enable this after MemUse fixed *=
 536     (context->chipobj.MemUse)(context, fp->shadercode.buf->id);
 537     */
 538
 539     R600_STATECHANGE(context, ps);
 540
 541     r700->ps.SQ_PGM_RESOURCES_PS.u32All = 0;
 542     SETbit(r700->ps.SQ_PGM_RESOURCES_PS.u32All, PGM_RESOURCES__PRIME_CACHE_ON_DRAW_bit);
 543
 544     r700->ps.SQ_PGM_START_PS.u32All = 0; /* set from buffer obj */
 545
 546     R600_STATECHANGE(context, spi);
 547
 548     unNumOfReg = fp->r700Shader.nRegs + 1;
 549
 550     ui = (r700->SPI_PS_IN_CONTROL_0.u32All & NUM_INTERP_mask) / (1 << NUM_INTERP_shift);
 551
 552     /* PS uses fragment.position */
 553     if (mesa_fp->Base.InputsRead & (1 << FRAG_ATTRIB_WPOS))
 554     {
 555         ui += 1;
 556         SETfield(r700->SPI_PS_IN_CONTROL_0.u32All, ui, NUM_INTERP_shift, NUM_INTERP_mask);
 557         SETfield(r700->SPI_PS_IN_CONTROL_0.u32All, CENTERS_ONLY, BARYC_SAMPLE_CNTL_shift, BARYC_SAMPLE_CNTL_mask);
 558         SETbit(r700->SPI_PS_IN_CONTROL_0.u32All, POSITION_ENA_bit);
 559         SETbit(r700->SPI_INPUT_Z.u32All, PROVIDE_Z_TO_SPI_bit);
 560     }
 561     else
 562     {
 563         CLEARbit(r700->SPI_PS_IN_CONTROL_0.u32All, POSITION_ENA_bit);
 564         CLEARbit(r700->SPI_INPUT_Z.u32All, PROVIDE_Z_TO_SPI_bit);
 565     }
 566
 567     if (mesa_fp->Base.InputsRead & (1 << FRAG_ATTRIB_FACE))
 568     {
 569         ui += 1;
 570         SETfield(r700->SPI_PS_IN_CONTROL_0.u32All, ui, NUM_INTERP_shift, NUM_INTERP_mask);
 571         SETbit(r700->SPI_PS_IN_CONTROL_1.u32All, FRONT_FACE_ENA_bit);
 572         SETbit(r700->SPI_PS_IN_CONTROL_1.u32All, FRONT_FACE_ALL_BITS_bit);
 573         SETfield(r700->SPI_PS_IN_CONTROL_1.u32All, pAsm->uiFP_AttributeMap[FRAG_ATTRIB_FACE], FRONT_FACE_ADDR_shift, FRONT_FACE_ADDR_mask);
 574     }
 575     else
 576     {
 577         CLEARbit(r700->SPI_PS_IN_CONTROL_1.u32All, FRONT_FACE_ENA_bit);
 578     }
 579
 580     /* see if we need any point_sprite replacements, also increase num_interp
 581      * as there's no vp output for them */
 582     if (ctx->Point.PointSprite)
 583     {
 584         for (i = FRAG_ATTRIB_TEX0; i<= FRAG_ATTRIB_TEX7; i++)
 585         {
 586             if (ctx->Point.CoordReplace[i - FRAG_ATTRIB_TEX0] == GL_TRUE)
 587             {
 588                 ui++;
 589                 point_sprite = GL_TRUE;
 590             }
 591         }
 592     }
 593
 594     if( mesa_fp->Base.InputsRead & (1 << FRAG_ATTRIB_PNTC))
 595         ui++;
 596
 597     if ((mesa_fp->Base.InputsRead & (1 << FRAG_ATTRIB_PNTC)) || point_sprite)
 598     {
 599         SETfield(r700->SPI_PS_IN_CONTROL_0.u32All, ui, NUM_INTERP_shift, NUM_INTERP_mask);
 600         SETbit(r700->SPI_INTERP_CONTROL_0.u32All, PNT_SPRITE_ENA_bit);
 601         SETfield(r700->SPI_INTERP_CONTROL_0.u32All, SPI_PNT_SPRITE_SEL_S, PNT_SPRITE_OVRD_X_shift, PNT_SPRITE_OVRD_X_mask);
 602         SETfield(r700->SPI_INTERP_CONTROL_0.u32All, SPI_PNT_SPRITE_SEL_T, PNT_SPRITE_OVRD_Y_shift, PNT_SPRITE_OVRD_Y_mask);
 603         SETfield(r700->SPI_INTERP_CONTROL_0.u32All, SPI_PNT_SPRITE_SEL_0, PNT_SPRITE_OVRD_Z_shift, PNT_SPRITE_OVRD_Z_mask);
 604         SETfield(r700->SPI_INTERP_CONTROL_0.u32All, SPI_PNT_SPRITE_SEL_1, PNT_SPRITE_OVRD_W_shift, PNT_SPRITE_OVRD_W_mask);
 605         /* Like e.g. viewport and winding, point sprite coordinates are
 606          * inverted when rendering to FBO. */
 607         if ((ctx->Point.SpriteOrigin == GL_LOWER_LEFT) == !ctx->DrawBuffer->Name)
 608             SETbit(r700->SPI_INTERP_CONTROL_0.u32All, PNT_SPRITE_TOP_1_bit);
 609         else
 610             CLEARbit(r700->SPI_INTERP_CONTROL_0.u32All, PNT_SPRITE_TOP_1_bit);
 611     }
 612     else
 613     {
 614         CLEARbit(r700->SPI_INTERP_CONTROL_0.u32All, PNT_SPRITE_ENA_bit);
 615     }
 616
 617
 618     ui = (unNumOfReg < ui) ? ui : unNumOfReg;
 619
 620     SETfield(r700->ps.SQ_PGM_RESOURCES_PS.u32All, ui, NUM_GPRS_shift, NUM_GPRS_mask);
 621
 622     CLEARbit(r700->ps.SQ_PGM_RESOURCES_PS.u32All, UNCACHED_FIRST_INST_bit);
 623
 624     if(fp->r700Shader.uStackSize) /* we don't use branch for now, it should be zero. */
 625         {
 626         SETfield(r700->ps.SQ_PGM_RESOURCES_PS.u32All, fp->r700Shader.uStackSize,
 627                  STACK_SIZE_shift, STACK_SIZE_mask);
 628     }
 629
 630     SETfield(r700->ps.SQ_PGM_EXPORTS_PS.u32All, fp->r700Shader.exportMode,
 631              EXPORT_MODE_shift, EXPORT_MODE_mask);
 632
 633     // emit ps input map
 634     struct r700_vertex_program_cont *vpc =
 635                        (struct r700_vertex_program_cont *)ctx->VertexProgram._Current;
 636     GLbitfield OutputsWritten = vpc->mesa_program.Base.OutputsWritten;
 637
 638     for(ui = 0; ui < R700_MAX_SHADER_EXPORTS; ui++)
 639         r700->SPI_PS_INPUT_CNTL[ui].u32All = 0;
 640
 641     unBit = 1 << FRAG_ATTRIB_WPOS;
 642     if(mesa_fp->Base.InputsRead & unBit)
 643     {
 644             ui = pAsm->uiFP_AttributeMap[FRAG_ATTRIB_WPOS];
 645             SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
 646             SETfield(r700->SPI_PS_INPUT_CNTL[ui].u32All, ui,
 647                      SEMANTIC_shift, SEMANTIC_mask);
 648             if (r700->SPI_INTERP_CONTROL_0.u32All & FLAT_SHADE_ENA_bit)
 649                     SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 650             else
 651                     CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 652     }
 653
 654     unBit = 1 << VERT_RESULT_COL0;
 655     if(OutputsWritten & unBit)
 656     {
 657             ui = pAsm->uiFP_AttributeMap[FRAG_ATTRIB_COL0];
 658             SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
 659             SETfield(r700->SPI_PS_INPUT_CNTL[ui].u32All, ui,
 660                      SEMANTIC_shift, SEMANTIC_mask);
 661             if (r700->SPI_INTERP_CONTROL_0.u32All & FLAT_SHADE_ENA_bit)
 662                     SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 663             else
 664                     CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 665     }
 666
 667     unBit = 1 << VERT_RESULT_COL1;
 668     if(OutputsWritten & unBit)
 669     {
 670             ui = pAsm->uiFP_AttributeMap[FRAG_ATTRIB_COL1];
 671             SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
 672             SETfield(r700->SPI_PS_INPUT_CNTL[ui].u32All, ui,
 673                      SEMANTIC_shift, SEMANTIC_mask);
 674             if (r700->SPI_INTERP_CONTROL_0.u32All & FLAT_SHADE_ENA_bit)
 675                     SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 676             else
 677                     CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 678     }
 679
 680     unBit = 1 << VERT_RESULT_FOGC;
 681     if(OutputsWritten & unBit)
 682     {
 683             ui = pAsm->uiFP_AttributeMap[FRAG_ATTRIB_FOGC];
 684             SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
 685             SETfield(r700->SPI_PS_INPUT_CNTL[ui].u32All, ui,
 686                      SEMANTIC_shift, SEMANTIC_mask);
 687             if (r700->SPI_INTERP_CONTROL_0.u32All & FLAT_SHADE_ENA_bit)
 688                     SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 689             else
 690                     CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 691     }
 692
 693     for(i=0; i<8; i++)
 694     {
 695             GLboolean coord_replace = ctx->Point.PointSprite && ctx->Point.CoordReplace[i];
 696             unBit = 1 << (VERT_RESULT_TEX0 + i);
 697             if ((OutputsWritten & unBit) || coord_replace)
 698             {
 699                     ui = pAsm->uiFP_AttributeMap[FRAG_ATTRIB_TEX0 + i];
 700                     SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
 701                     SETfield(r700->SPI_PS_INPUT_CNTL[ui].u32All, ui,
 702                              SEMANTIC_shift, SEMANTIC_mask);
 703                     CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 704                     /* ARB_point_sprite */
 705                     if (coord_replace)
 706                     {
 707                              SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, PT_SPRITE_TEX_bit);
 708                     }
 709             }
 710     }
 711
 712     unBit = 1 << FRAG_ATTRIB_FACE;
 713     if(mesa_fp->Base.InputsRead & unBit)
 714     {
 715             ui = pAsm->uiFP_AttributeMap[FRAG_ATTRIB_FACE];
 716             SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
 717             SETfield(r700->SPI_PS_INPUT_CNTL[ui].u32All, ui,
 718                      SEMANTIC_shift, SEMANTIC_mask);
 719             if (r700->SPI_INTERP_CONTROL_0.u32All & FLAT_SHADE_ENA_bit)
 720                     SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 721             else
 722                     CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 723     }
 724     unBit = 1 << FRAG_ATTRIB_PNTC;
 725     if(mesa_fp->Base.InputsRead & unBit)
 726     {
 727             ui = pAsm->uiFP_AttributeMap[FRAG_ATTRIB_PNTC];
 728             SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
 729             SETfield(r700->SPI_PS_INPUT_CNTL[ui].u32All, ui,
 730                      SEMANTIC_shift, SEMANTIC_mask);
 731             if (r700->SPI_INTERP_CONTROL_0.u32All & FLAT_SHADE_ENA_bit)
 732                     SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 733             else
 734                     CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 735             SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, PT_SPRITE_TEX_bit);
 736     }
 737
 738
 739
 740
 741     for(i=VERT_RESULT_VAR0; i<VERT_RESULT_MAX; i++)
 742         {
 743         unBit = 1 << i;
 744         if(OutputsWritten & unBit)
 745                 {
 746             ui = pAsm->uiFP_AttributeMap[i-VERT_RESULT_VAR0+FRAG_ATTRIB_VAR0];
 747             SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit);
 748             SETfield(r700->SPI_PS_INPUT_CNTL[ui].u32All, ui,
 749                              SEMANTIC_shift, SEMANTIC_mask);
 750             if (r700->SPI_INTERP_CONTROL_0.u32All & FLAT_SHADE_ENA_bit)
 751                         SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 752             else
 753                         CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit);
 754         }
 755     }
 756
 757     exportCount = (r700->ps.SQ_PGM_EXPORTS_PS.u32All & EXPORT_MODE_mask) / (1 << EXPORT_MODE_shift);
 758     if (r700->CB_SHADER_CONTROL.u32All != ((1 << exportCount) - 1))
 759     {
 760             R600_STATECHANGE(context, cb);
 761             r700->CB_SHADER_CONTROL.u32All = (1 << exportCount) - 1;
 762     }
 763
 764     /* sent out shader constants. */
 765     paramList = fp->mesa_program.Base.Parameters;
 766
 767     if(NULL != paramList)
 768     {
 769             _mesa_load_state_parameters(ctx, paramList);
 770
 771             if (paramList->NumParameters > R700_MAX_DX9_CONSTS)
 772                     return GL_FALSE;
 773
 774             R600_STATECHANGE(context, ps_consts);
 775
 776             r700->ps.num_consts = paramList->NumParameters;
 777
 778             unNumParamData = paramList->NumParameters;
 779
 780             for(ui=0; ui<unNumParamData; ui++) {
 781                         r700->ps.consts[ui][0].f32All = paramList->ParameterValues[ui][0];
 782                         r700->ps.consts[ui][1].f32All = paramList->ParameterValues[ui][1];
 783                         r700->ps.consts[ui][2].f32All = paramList->ParameterValues[ui][2];
 784                         r700->ps.consts[ui][3].f32All = paramList->ParameterValues[ui][3];
 785             }
 786
 787         /* Load fp constants to gpu */
 788         if( (GL_TRUE == r700->bShaderUseMemConstant) && (unNumParamData > 0) )
 789         {
 790             r600EmitShader(ctx,
 791                            &(fp->constbo0),
 792                            (GLvoid *)&(paramList->ParameterValues[0][0]),
 793                            unNumParamData * 4,
 794                            "FS Const");
 795         }
 796
 797     } else
 798             r700->ps.num_consts = 0;
 799
 800     COMPILED_SUB * pCompiledSub;
 801     GLuint uj;
 802     GLuint unConstOffset = r700->ps.num_consts;
 803     for(ui=0; ui<pAsm->unNumPresub; ui++)
 804     {
 805         pCompiledSub = pAsm->presubs[ui].pCompiledSub;
 806
 807         r700->ps.num_consts += pCompiledSub->NumParameters;
 808
 809         for(uj=0; uj<pCompiledSub->NumParameters; uj++)
 810         {
 811             r700->ps.consts[uj + unConstOffset][0].f32All = pCompiledSub->ParameterValues[uj][0];
 812                     r700->ps.consts[uj + unConstOffset][1].f32All = pCompiledSub->ParameterValues[uj][1];
 813                     r700->ps.consts[uj + unConstOffset][2].f32All = pCompiledSub->ParameterValues[uj][2];
 814                     r700->ps.consts[uj + unConstOffset][3].f32All = pCompiledSub->ParameterValues[uj][3];
 815         }
 816         unConstOffset += pCompiledSub->NumParameters;
 817     }
 818
 819     return GL_TRUE;
 820 }
 821