ceaefdad91c3cffc9846793dd5bf7ed969541750
[mesa.git] / src / mesa / drivers / dri / radeon / radeon_common_context.c
1 /**************************************************************************
2
3 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
4 VA Linux Systems Inc., Fremont, California.
5 Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
6
7 The Weather Channel (TM) funded Tungsten Graphics to develop the
8 initial release of the Radeon 8500 driver under the XFree86 license.
9 This notice must be preserved.
10
11 All Rights Reserved.
12
13 Permission is hereby granted, free of charge, to any person obtaining
14 a copy of this software and associated documentation files (the
15 "Software"), to deal in the Software without restriction, including
16 without limitation the rights to use, copy, modify, merge, publish,
17 distribute, sublicense, and/or sell copies of the Software, and to
18 permit persons to whom the Software is furnished to do so, subject to
19 the following conditions:
20
21 The above copyright notice and this permission notice (including the
22 next paragraph) shall be included in all copies or substantial
23 portions of the Software.
24
25 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
28 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
29 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
30 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
31 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
32
33 **************************************************************************/
34
35 #include "radeon_common.h"
36 #include "xmlpool.h" /* for symbolic values of enum-type options */
37 #include "utils.h"
38 #include "drivers/common/meta.h"
39 #include "main/context.h"
40 #include "main/framebuffer.h"
41 #include "main/fbobject.h"
42 #include "main/renderbuffer.h"
43 #include "main/state.h"
44 #include "main/simple_list.h"
45 #include "swrast/swrast.h"
46 #include "swrast_setup/swrast_setup.h"
47 #include "tnl/tnl.h"
48
49 #ifndef RADEON_DEBUG
50 int RADEON_DEBUG = (0);
51 #endif
52
53
54 static const char* get_chip_family_name(int chip_family)
55 {
56 switch(chip_family) {
57 #if defined(RADEON_R100)
58 case CHIP_FAMILY_R100: return "R100";
59 case CHIP_FAMILY_RV100: return "RV100";
60 case CHIP_FAMILY_RS100: return "RS100";
61 case CHIP_FAMILY_RV200: return "RV200";
62 case CHIP_FAMILY_RS200: return "RS200";
63 #elif defined(RADEON_R200)
64 case CHIP_FAMILY_R200: return "R200";
65 case CHIP_FAMILY_RV250: return "RV250";
66 case CHIP_FAMILY_RS300: return "RS300";
67 case CHIP_FAMILY_RV280: return "RV280";
68 #endif
69 default: return "unknown";
70 }
71 }
72
73
74 /* Return various strings for glGetString().
75 */
76 static const GLubyte *radeonGetString(struct gl_context * ctx, GLenum name)
77 {
78 radeonContextPtr radeon = RADEON_CONTEXT(ctx);
79 static char buffer[128];
80
81 switch (name) {
82 case GL_VENDOR:
83 return (GLubyte *) "Tungsten Graphics, Inc.";
84
85 case GL_RENDERER:
86 {
87 unsigned offset;
88 GLuint agp_mode = (radeon->radeonScreen->card_type==RADEON_CARD_PCI) ? 0 :
89 radeon->radeonScreen->AGPMode;
90 char hardwarename[32];
91
92 sprintf(hardwarename, "%s (%s %04X)",
93 #if defined(RADEON_R100)
94 "R100",
95 #elif defined(RADEON_R200)
96 "R200",
97 #endif
98 get_chip_family_name(radeon->radeonScreen->chip_family),
99 radeon->radeonScreen->device_id);
100
101 offset = driGetRendererString(buffer, hardwarename, agp_mode);
102
103 sprintf(&buffer[offset], " %sTCL",
104 !(radeon->TclFallback & RADEON_TCL_FALLBACK_TCL_DISABLE)
105 ? "" : "NO-");
106
107 strcat(buffer, " DRI2");
108
109 return (GLubyte *) buffer;
110 }
111
112 default:
113 return NULL;
114 }
115 }
116
117 /* Initialize the driver's misc functions.
118 */
119 static void radeonInitDriverFuncs(struct dd_function_table *functions)
120 {
121 functions->GetString = radeonGetString;
122 }
123
124 /**
125 * Create and initialize all common fields of the context,
126 * including the Mesa context itself.
127 */
128 GLboolean radeonInitContext(radeonContextPtr radeon,
129 struct dd_function_table* functions,
130 const struct gl_config * glVisual,
131 __DRIcontext * driContextPriv,
132 void *sharedContextPrivate)
133 {
134 __DRIscreen *sPriv = driContextPriv->driScreenPriv;
135 radeonScreenPtr screen = (radeonScreenPtr) (sPriv->driverPrivate);
136 struct gl_context* ctx;
137 struct gl_context* shareCtx;
138 int fthrottle_mode;
139
140 /* Fill in additional standard functions. */
141 radeonInitDriverFuncs(functions);
142
143 radeon->radeonScreen = screen;
144 /* Allocate and initialize the Mesa context */
145 if (sharedContextPrivate)
146 shareCtx = ((radeonContextPtr)sharedContextPrivate)->glCtx;
147 else
148 shareCtx = NULL;
149 radeon->glCtx = _mesa_create_context(API_OPENGL, glVisual, shareCtx,
150 functions, (void *)radeon);
151 if (!radeon->glCtx)
152 return GL_FALSE;
153
154 ctx = radeon->glCtx;
155 driContextPriv->driverPrivate = radeon;
156
157 _mesa_meta_init(ctx);
158
159 /* DRI fields */
160 radeon->dri.context = driContextPriv;
161 radeon->dri.screen = sPriv;
162 radeon->dri.fd = sPriv->fd;
163 radeon->dri.drmMinor = sPriv->drm_version.minor;
164
165 /* Setup IRQs */
166 fthrottle_mode = driQueryOptioni(&radeon->optionCache, "fthrottle_mode");
167 radeon->iw.irq_seq = -1;
168 radeon->irqsEmitted = 0;
169 radeon->do_irqs = (fthrottle_mode == DRI_CONF_FTHROTTLE_IRQS &&
170 radeon->radeonScreen->irq);
171
172 radeon->do_usleeps = (fthrottle_mode == DRI_CONF_FTHROTTLE_USLEEPS);
173
174 if (!radeon->do_irqs)
175 fprintf(stderr,
176 "IRQ's not enabled, falling back to %s: %d %d\n",
177 radeon->do_usleeps ? "usleeps" : "busy waits",
178 fthrottle_mode, radeon->radeonScreen->irq);
179
180 radeon->texture_depth = driQueryOptioni (&radeon->optionCache,
181 "texture_depth");
182 if (radeon->texture_depth == DRI_CONF_TEXTURE_DEPTH_FB)
183 radeon->texture_depth = ( glVisual->rgbBits > 16 ) ?
184 DRI_CONF_TEXTURE_DEPTH_32 : DRI_CONF_TEXTURE_DEPTH_16;
185
186 radeon->texture_row_align = 32;
187 radeon->texture_rect_row_align = 64;
188 radeon->texture_compressed_row_align = 32;
189
190 radeon_init_dma(radeon);
191
192 return GL_TRUE;
193 }
194
195
196
197 /**
198 * Destroy the command buffer and state atoms.
199 */
200 static void radeon_destroy_atom_list(radeonContextPtr radeon)
201 {
202 struct radeon_state_atom *atom;
203
204 foreach(atom, &radeon->hw.atomlist) {
205 FREE(atom->cmd);
206 if (atom->lastcmd)
207 FREE(atom->lastcmd);
208 }
209
210 }
211
212 /**
213 * Cleanup common context fields.
214 * Called by r200DestroyContext
215 */
216 void radeonDestroyContext(__DRIcontext *driContextPriv )
217 {
218 #ifdef RADEON_BO_TRACK
219 FILE *track;
220 #endif
221 GET_CURRENT_CONTEXT(ctx);
222 radeonContextPtr radeon = (radeonContextPtr) driContextPriv->driverPrivate;
223 radeonContextPtr current = ctx ? RADEON_CONTEXT(ctx) : NULL;
224
225 assert(radeon);
226
227 _mesa_meta_free(radeon->glCtx);
228
229 if (radeon == current) {
230 _mesa_make_current(NULL, NULL, NULL);
231 }
232
233 radeon_firevertices(radeon);
234 if (!is_empty_list(&radeon->dma.reserved)) {
235 rcommonFlushCmdBuf( radeon, __FUNCTION__ );
236 }
237
238 radeonFreeDmaRegions(radeon);
239 radeonReleaseArrays(radeon->glCtx, ~0);
240 if (radeon->vtbl.free_context)
241 radeon->vtbl.free_context(radeon->glCtx);
242 _swsetup_DestroyContext( radeon->glCtx );
243 _tnl_DestroyContext( radeon->glCtx );
244 _vbo_DestroyContext( radeon->glCtx );
245 _swrast_DestroyContext( radeon->glCtx );
246
247 /* free atom list */
248 /* free the Mesa context */
249 _mesa_destroy_context(radeon->glCtx);
250
251 /* _mesa_destroy_context() might result in calls to functions that
252 * depend on the DriverCtx, so don't set it to NULL before.
253 *
254 * radeon->glCtx->DriverCtx = NULL;
255 */
256 /* free the option cache */
257 driDestroyOptionCache(&radeon->optionCache);
258
259 rcommonDestroyCmdBuf(radeon);
260
261 radeon_destroy_atom_list(radeon);
262
263 if (radeon->state.scissor.pClipRects) {
264 FREE(radeon->state.scissor.pClipRects);
265 radeon->state.scissor.pClipRects = 0;
266 }
267 #ifdef RADEON_BO_TRACK
268 track = fopen("/tmp/tracklog", "w");
269 if (track) {
270 radeon_tracker_print(&radeon->radeonScreen->bom->tracker, track);
271 fclose(track);
272 }
273 #endif
274 FREE(radeon);
275 }
276
277 /* Force the context `c' to be unbound from its buffer.
278 */
279 GLboolean radeonUnbindContext(__DRIcontext * driContextPriv)
280 {
281 radeonContextPtr radeon = (radeonContextPtr) driContextPriv->driverPrivate;
282
283 if (RADEON_DEBUG & RADEON_DRI)
284 fprintf(stderr, "%s ctx %p\n", __FUNCTION__,
285 radeon->glCtx);
286
287 /* Unset current context and dispath table */
288 _mesa_make_current(NULL, NULL, NULL);
289
290 return GL_TRUE;
291 }
292
293
294 static unsigned
295 radeon_bits_per_pixel(const struct radeon_renderbuffer *rb)
296 {
297 return _mesa_get_format_bytes(rb->base.Format) * 8;
298 }
299
300 /*
301 * Check if drawable has been invalidated by dri2InvalidateDrawable().
302 * Update renderbuffers if so. This prevents a client from accessing
303 * a backbuffer that has a swap pending but not yet completed.
304 *
305 * See intel_prepare_render for equivalent code in intel driver.
306 *
307 */
308 void radeon_prepare_render(radeonContextPtr radeon)
309 {
310 __DRIcontext *driContext = radeon->dri.context;
311 __DRIdrawable *drawable;
312 __DRIscreen *screen;
313
314 screen = driContext->driScreenPriv;
315 if (!screen->dri2.loader)
316 return;
317
318 drawable = driContext->driDrawablePriv;
319 if (drawable->dri2.stamp != driContext->dri2.draw_stamp) {
320 if (drawable->lastStamp != drawable->dri2.stamp)
321 radeon_update_renderbuffers(driContext, drawable, GL_FALSE);
322
323 /* Intel driver does the equivalent of this, no clue if it is needed:*/
324 radeon_draw_buffer(radeon->glCtx, radeon->glCtx->DrawBuffer);
325
326 driContext->dri2.draw_stamp = drawable->dri2.stamp;
327 }
328
329 drawable = driContext->driReadablePriv;
330 if (drawable->dri2.stamp != driContext->dri2.read_stamp) {
331 if (drawable->lastStamp != drawable->dri2.stamp)
332 radeon_update_renderbuffers(driContext, drawable, GL_FALSE);
333 driContext->dri2.read_stamp = drawable->dri2.stamp;
334 }
335
336 /* If we're currently rendering to the front buffer, the rendering
337 * that will happen next will probably dirty the front buffer. So
338 * mark it as dirty here.
339 */
340 if (radeon->is_front_buffer_rendering)
341 radeon->front_buffer_dirty = GL_TRUE;
342 }
343
344 void
345 radeon_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable,
346 GLboolean front_only)
347 {
348 unsigned int attachments[10];
349 __DRIbuffer *buffers = NULL;
350 __DRIscreen *screen;
351 struct radeon_renderbuffer *rb;
352 int i, count;
353 struct radeon_framebuffer *draw;
354 radeonContextPtr radeon;
355 char *regname;
356 struct radeon_bo *depth_bo = NULL, *bo;
357
358 if (RADEON_DEBUG & RADEON_DRI)
359 fprintf(stderr, "enter %s, drawable %p\n", __func__, drawable);
360
361 draw = drawable->driverPrivate;
362 screen = context->driScreenPriv;
363 radeon = (radeonContextPtr) context->driverPrivate;
364
365 /* Set this up front, so that in case our buffers get invalidated
366 * while we're getting new buffers, we don't clobber the stamp and
367 * thus ignore the invalidate. */
368 drawable->lastStamp = drawable->dri2.stamp;
369
370 if (screen->dri2.loader
371 && (screen->dri2.loader->base.version > 2)
372 && (screen->dri2.loader->getBuffersWithFormat != NULL)) {
373 struct radeon_renderbuffer *depth_rb;
374 struct radeon_renderbuffer *stencil_rb;
375
376 i = 0;
377 if ((front_only || radeon->is_front_buffer_rendering ||
378 radeon->is_front_buffer_reading ||
379 !draw->color_rb[1])
380 && draw->color_rb[0]) {
381 attachments[i++] = __DRI_BUFFER_FRONT_LEFT;
382 attachments[i++] = radeon_bits_per_pixel(draw->color_rb[0]);
383 }
384
385 if (!front_only) {
386 if (draw->color_rb[1]) {
387 attachments[i++] = __DRI_BUFFER_BACK_LEFT;
388 attachments[i++] = radeon_bits_per_pixel(draw->color_rb[1]);
389 }
390
391 depth_rb = radeon_get_renderbuffer(&draw->base, BUFFER_DEPTH);
392 stencil_rb = radeon_get_renderbuffer(&draw->base, BUFFER_STENCIL);
393
394 if ((depth_rb != NULL) && (stencil_rb != NULL)) {
395 attachments[i++] = __DRI_BUFFER_DEPTH_STENCIL;
396 attachments[i++] = radeon_bits_per_pixel(depth_rb);
397 } else if (depth_rb != NULL) {
398 attachments[i++] = __DRI_BUFFER_DEPTH;
399 attachments[i++] = radeon_bits_per_pixel(depth_rb);
400 } else if (stencil_rb != NULL) {
401 attachments[i++] = __DRI_BUFFER_STENCIL;
402 attachments[i++] = radeon_bits_per_pixel(stencil_rb);
403 }
404 }
405
406 buffers = (*screen->dri2.loader->getBuffersWithFormat)(drawable,
407 &drawable->w,
408 &drawable->h,
409 attachments, i / 2,
410 &count,
411 drawable->loaderPrivate);
412 } else if (screen->dri2.loader) {
413 i = 0;
414 if (draw->color_rb[0])
415 attachments[i++] = __DRI_BUFFER_FRONT_LEFT;
416 if (!front_only) {
417 if (draw->color_rb[1])
418 attachments[i++] = __DRI_BUFFER_BACK_LEFT;
419 if (radeon_get_renderbuffer(&draw->base, BUFFER_DEPTH))
420 attachments[i++] = __DRI_BUFFER_DEPTH;
421 if (radeon_get_renderbuffer(&draw->base, BUFFER_STENCIL))
422 attachments[i++] = __DRI_BUFFER_STENCIL;
423 }
424
425 buffers = (*screen->dri2.loader->getBuffers)(drawable,
426 &drawable->w,
427 &drawable->h,
428 attachments, i,
429 &count,
430 drawable->loaderPrivate);
431 }
432
433 if (buffers == NULL)
434 return;
435
436 for (i = 0; i < count; i++) {
437 switch (buffers[i].attachment) {
438 case __DRI_BUFFER_FRONT_LEFT:
439 rb = draw->color_rb[0];
440 regname = "dri2 front buffer";
441 break;
442 case __DRI_BUFFER_FAKE_FRONT_LEFT:
443 rb = draw->color_rb[0];
444 regname = "dri2 fake front buffer";
445 break;
446 case __DRI_BUFFER_BACK_LEFT:
447 rb = draw->color_rb[1];
448 regname = "dri2 back buffer";
449 break;
450 case __DRI_BUFFER_DEPTH:
451 rb = radeon_get_renderbuffer(&draw->base, BUFFER_DEPTH);
452 regname = "dri2 depth buffer";
453 break;
454 case __DRI_BUFFER_DEPTH_STENCIL:
455 rb = radeon_get_renderbuffer(&draw->base, BUFFER_DEPTH);
456 regname = "dri2 depth / stencil buffer";
457 break;
458 case __DRI_BUFFER_STENCIL:
459 rb = radeon_get_renderbuffer(&draw->base, BUFFER_STENCIL);
460 regname = "dri2 stencil buffer";
461 break;
462 case __DRI_BUFFER_ACCUM:
463 default:
464 fprintf(stderr,
465 "unhandled buffer attach event, attacment type %d\n",
466 buffers[i].attachment);
467 return;
468 }
469
470 if (rb == NULL)
471 continue;
472
473 if (rb->bo) {
474 uint32_t name = radeon_gem_name_bo(rb->bo);
475 if (name == buffers[i].name)
476 continue;
477 }
478
479 if (RADEON_DEBUG & RADEON_DRI)
480 fprintf(stderr,
481 "attaching buffer %s, %d, at %d, cpp %d, pitch %d\n",
482 regname, buffers[i].name, buffers[i].attachment,
483 buffers[i].cpp, buffers[i].pitch);
484
485 rb->cpp = buffers[i].cpp;
486 rb->pitch = buffers[i].pitch;
487 rb->base.Width = drawable->w;
488 rb->base.Height = drawable->h;
489 rb->has_surface = 0;
490
491 if (buffers[i].attachment == __DRI_BUFFER_STENCIL && depth_bo) {
492 if (RADEON_DEBUG & RADEON_DRI)
493 fprintf(stderr, "(reusing depth buffer as stencil)\n");
494 bo = depth_bo;
495 radeon_bo_ref(bo);
496 } else {
497 uint32_t tiling_flags = 0, pitch = 0;
498 int ret;
499
500 bo = radeon_bo_open(radeon->radeonScreen->bom,
501 buffers[i].name,
502 0,
503 0,
504 RADEON_GEM_DOMAIN_VRAM,
505 buffers[i].flags);
506
507 if (bo == NULL) {
508 fprintf(stderr, "failed to attach %s %d\n",
509 regname, buffers[i].name);
510 continue;
511 }
512
513 ret = radeon_bo_get_tiling(bo, &tiling_flags, &pitch);
514 if (ret) {
515 fprintf(stderr,
516 "failed to get tiling for %s %d\n",
517 regname, buffers[i].name);
518 radeon_bo_unref(bo);
519 bo = NULL;
520 continue;
521 } else {
522 if (tiling_flags & RADEON_TILING_MACRO)
523 bo->flags |= RADEON_BO_FLAGS_MACRO_TILE;
524 if (tiling_flags & RADEON_TILING_MICRO)
525 bo->flags |= RADEON_BO_FLAGS_MICRO_TILE;
526 }
527 }
528
529 if (buffers[i].attachment == __DRI_BUFFER_DEPTH) {
530 if (draw->base.Visual.depthBits == 16)
531 rb->cpp = 2;
532 depth_bo = bo;
533 }
534
535 radeon_renderbuffer_set_bo(rb, bo);
536 radeon_bo_unref(bo);
537
538 if (buffers[i].attachment == __DRI_BUFFER_DEPTH_STENCIL) {
539 rb = radeon_get_renderbuffer(&draw->base, BUFFER_STENCIL);
540 if (rb != NULL) {
541 struct radeon_bo *stencil_bo = NULL;
542
543 if (rb->bo) {
544 uint32_t name = radeon_gem_name_bo(rb->bo);
545 if (name == buffers[i].name)
546 continue;
547 }
548
549 stencil_bo = bo;
550 radeon_bo_ref(stencil_bo);
551 radeon_renderbuffer_set_bo(rb, stencil_bo);
552 radeon_bo_unref(stencil_bo);
553 }
554 }
555 }
556
557 driUpdateFramebufferSize(radeon->glCtx, drawable);
558 }
559
560 /* Force the context `c' to be the current context and associate with it
561 * buffer `b'.
562 */
563 GLboolean radeonMakeCurrent(__DRIcontext * driContextPriv,
564 __DRIdrawable * driDrawPriv,
565 __DRIdrawable * driReadPriv)
566 {
567 radeonContextPtr radeon;
568 GET_CURRENT_CONTEXT(curCtx);
569 struct gl_framebuffer *drfb, *readfb;
570
571 if (driContextPriv)
572 radeon = (radeonContextPtr)driContextPriv->driverPrivate;
573 else
574 radeon = NULL;
575 /* According to the glXMakeCurrent() man page: "Pending commands to
576 * the previous context, if any, are flushed before it is released."
577 * But only flush if we're actually changing contexts.
578 */
579
580 if ((radeonContextPtr)curCtx && (radeonContextPtr)curCtx != radeon) {
581 _mesa_flush(curCtx);
582 }
583
584 if (!driContextPriv) {
585 if (RADEON_DEBUG & RADEON_DRI)
586 fprintf(stderr, "%s ctx is null\n", __FUNCTION__);
587 _mesa_make_current(NULL, NULL, NULL);
588 return GL_TRUE;
589 }
590
591 if(driDrawPriv == NULL && driReadPriv == NULL) {
592 drfb = _mesa_create_framebuffer(&radeon->glCtx->Visual);
593 readfb = drfb;
594 }
595 else {
596 drfb = driDrawPriv->driverPrivate;
597 readfb = driReadPriv->driverPrivate;
598 }
599
600 if(driDrawPriv)
601 radeon_update_renderbuffers(driContextPriv, driDrawPriv, GL_FALSE);
602 if (driDrawPriv != driReadPriv)
603 radeon_update_renderbuffers(driContextPriv, driReadPriv, GL_FALSE);
604 _mesa_reference_renderbuffer(&radeon->state.color.rb,
605 &(radeon_get_renderbuffer(drfb, BUFFER_BACK_LEFT)->base));
606 _mesa_reference_renderbuffer(&radeon->state.depth.rb,
607 &(radeon_get_renderbuffer(drfb, BUFFER_DEPTH)->base));
608
609 if (RADEON_DEBUG & RADEON_DRI)
610 fprintf(stderr, "%s ctx %p dfb %p rfb %p\n", __FUNCTION__, radeon->glCtx, drfb, readfb);
611
612 if(driDrawPriv)
613 driUpdateFramebufferSize(radeon->glCtx, driDrawPriv);
614 if (driReadPriv != driDrawPriv)
615 driUpdateFramebufferSize(radeon->glCtx, driReadPriv);
616
617 _mesa_make_current(radeon->glCtx, drfb, readfb);
618 if (driDrawPriv == NULL && driReadPriv == NULL)
619 _mesa_reference_framebuffer(&drfb, NULL);
620
621 _mesa_update_state(radeon->glCtx);
622
623 if (radeon->glCtx->DrawBuffer == drfb) {
624 if(driDrawPriv != NULL) {
625 radeon_window_moved(radeon);
626 }
627
628 radeon_draw_buffer(radeon->glCtx, drfb);
629 }
630
631
632 if (RADEON_DEBUG & RADEON_DRI)
633 fprintf(stderr, "End %s\n", __FUNCTION__);
634
635 return GL_TRUE;
636 }
637