Merge branch 'mesa_7_5_branch' into mesa_7_6_branch
[mesa.git] / src / mesa / drivers / dri / radeon / radeon_maos_arrays.c
1 /**************************************************************************
2
3 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
4 Tungsten Graphics Inc., Cedar Park, Texas.
5
6 All Rights Reserved.
7
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
15
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
19
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27
28 **************************************************************************/
29
30 /*
31 * Authors:
32 * Keith Whitwell <keith@tungstengraphics.com>
33 */
34
35 #include "main/glheader.h"
36 #include "main/imports.h"
37 #include "main/mtypes.h"
38 #include "main/macros.h"
39
40 #include "swrast_setup/swrast_setup.h"
41 #include "math/m_translate.h"
42 #include "tnl/tnl.h"
43
44 #include "radeon_context.h"
45 #include "radeon_ioctl.h"
46 #include "radeon_state.h"
47 #include "radeon_swtcl.h"
48 #include "radeon_maos.h"
49 #include "radeon_tcl.h"
50
51 static void emit_vecfog(GLcontext *ctx, struct radeon_aos *aos,
52 GLvoid *data, int stride, int count)
53 {
54 int i;
55 uint32_t *out;
56 int size = 1;
57 radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
58
59 if (RADEON_DEBUG & RADEON_VERTS)
60 fprintf(stderr, "%s count %d stride %d\n",
61 __FUNCTION__, count, stride);
62
63 if (stride == 0) {
64 radeonAllocDmaRegion( rmesa, &aos->bo, &aos->offset, size * 4, 32 );
65 count = 1;
66 aos->stride = 0;
67 }
68 else {
69 radeonAllocDmaRegion(rmesa, &aos->bo, &aos->offset, size * 4, 32);
70 aos->stride = size;
71 }
72
73 aos->components = size;
74 aos->count = count;
75
76
77 /* Emit the data
78 */
79 out = (uint32_t*)((char*)aos->bo->ptr + aos->offset);
80 for (i = 0; i < count; i++) {
81 out[0] = radeonComputeFogBlendFactor( ctx, *(GLfloat *)data );
82 out++;
83 data += stride;
84 }
85 }
86
87 static void emit_s0_vec(uint32_t *out, GLvoid *data, int stride, int count)
88 {
89 int i;
90 if (RADEON_DEBUG & RADEON_VERTS)
91 fprintf(stderr, "%s count %d stride %d\n",
92 __FUNCTION__, count, stride);
93
94 for (i = 0; i < count; i++) {
95 out[0] = *(int *)data;
96 out[1] = 0;
97 out += 2;
98 data += stride;
99 }
100 }
101
102 static void emit_stq_vec(uint32_t *out, GLvoid *data, int stride, int count)
103 {
104 int i;
105
106 if (RADEON_DEBUG & RADEON_VERTS)
107 fprintf(stderr, "%s count %d stride %d\n",
108 __FUNCTION__, count, stride);
109
110 for (i = 0; i < count; i++) {
111 out[0] = *(int *)data;
112 out[1] = *(int *)(data+4);
113 out[2] = *(int *)(data+12);
114 out += 3;
115 data += stride;
116 }
117 }
118
119
120
121
122 static void emit_tex_vector(GLcontext *ctx, struct radeon_aos *aos,
123 GLvoid *data, int size, int stride, int count)
124 {
125 radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
126 int emitsize;
127 uint32_t *out;
128
129 if (RADEON_DEBUG & RADEON_VERTS)
130 fprintf(stderr, "%s %d/%d\n", __FUNCTION__, count, size);
131
132 switch (size) {
133 case 4: emitsize = 3; break;
134 case 3: emitsize = 3; break;
135 default: emitsize = 2; break;
136 }
137
138
139 if (stride == 0) {
140 radeonAllocDmaRegion(rmesa, &aos->bo, &aos->offset, emitsize * 4, 32);
141 count = 1;
142 aos->stride = 0;
143 }
144 else {
145 radeonAllocDmaRegion(rmesa, &aos->bo, &aos->offset, emitsize * count * 4, 32);
146 aos->stride = emitsize;
147 }
148
149 aos->components = emitsize;
150 aos->count = count;
151
152 /* Emit the data
153 */
154 out = (uint32_t*)((char*)aos->bo->ptr + aos->offset);
155 switch (size) {
156 case 1:
157 emit_s0_vec( out, data, stride, count );
158 break;
159 case 2:
160 radeonEmitVec8( out, data, stride, count );
161 break;
162 case 3:
163 radeonEmitVec12( out, data, stride, count );
164 break;
165 case 4:
166 emit_stq_vec( out, data, stride, count );
167 break;
168 default:
169 assert(0);
170 exit(1);
171 break;
172 }
173 }
174
175
176
177
178 /* Emit any changed arrays to new GART memory, re-emit a packet to
179 * update the arrays.
180 */
181 void radeonEmitArrays( GLcontext *ctx, GLuint inputs )
182 {
183 r100ContextPtr rmesa = R100_CONTEXT( ctx );
184 struct vertex_buffer *VB = &TNL_CONTEXT( ctx )->vb;
185 GLuint nr = 0;
186 GLuint vfmt = 0;
187 GLuint count = VB->Count;
188 GLuint vtx, unit;
189
190 #if 0
191 if (RADEON_DEBUG & RADEON_VERTS)
192 _tnl_print_vert_flags( __FUNCTION__, inputs );
193 #endif
194
195 if (1) {
196 if (!rmesa->tcl.obj.buf)
197 rcommon_emit_vector( ctx,
198 &(rmesa->tcl.aos[nr]),
199 (char *)VB->ObjPtr->data,
200 VB->ObjPtr->size,
201 VB->ObjPtr->stride,
202 count);
203
204 switch( VB->ObjPtr->size ) {
205 case 4: vfmt |= RADEON_CP_VC_FRMT_W0;
206 case 3: vfmt |= RADEON_CP_VC_FRMT_Z;
207 case 2: vfmt |= RADEON_CP_VC_FRMT_XY;
208 default:
209 break;
210 }
211 nr++;
212 }
213
214
215 if (inputs & VERT_BIT_NORMAL) {
216 if (!rmesa->tcl.norm.buf)
217 rcommon_emit_vector( ctx,
218 &(rmesa->tcl.aos[nr]),
219 (char *)VB->NormalPtr->data,
220 3,
221 VB->NormalPtr->stride,
222 count);
223
224 vfmt |= RADEON_CP_VC_FRMT_N0;
225 nr++;
226 }
227
228 if (inputs & VERT_BIT_COLOR0) {
229 int emitsize;
230 if (VB->ColorPtr[0]->size == 4 &&
231 (VB->ColorPtr[0]->stride != 0 ||
232 VB->ColorPtr[0]->data[0][3] != 1.0)) {
233 vfmt |= RADEON_CP_VC_FRMT_FPCOLOR | RADEON_CP_VC_FRMT_FPALPHA;
234 emitsize = 4;
235 }
236
237 else {
238 vfmt |= RADEON_CP_VC_FRMT_FPCOLOR;
239 emitsize = 3;
240 }
241
242 if (!rmesa->tcl.rgba.buf)
243 rcommon_emit_vector( ctx,
244 &(rmesa->tcl.aos[nr]),
245 (char *)VB->ColorPtr[0]->data,
246 emitsize,
247 VB->ColorPtr[0]->stride,
248 count);
249
250 nr++;
251 }
252
253
254 if (inputs & VERT_BIT_COLOR1) {
255 if (!rmesa->tcl.spec.buf) {
256
257 rcommon_emit_vector( ctx,
258 &(rmesa->tcl.aos[nr]),
259 (char *)VB->SecondaryColorPtr[0]->data,
260 3,
261 VB->SecondaryColorPtr[0]->stride,
262 count);
263 }
264
265 vfmt |= RADEON_CP_VC_FRMT_FPSPEC;
266 nr++;
267 }
268
269 /* FIXME: not sure if this is correct. May need to stitch this together with
270 secondary color. It seems odd that for primary color color and alpha values
271 are emitted together but for secondary color not. */
272 if (inputs & VERT_BIT_FOG) {
273 if (!rmesa->tcl.fog.buf)
274 emit_vecfog( ctx,
275 &(rmesa->tcl.aos[nr]),
276 (char *)VB->FogCoordPtr->data,
277 VB->FogCoordPtr->stride,
278 count);
279
280 vfmt |= RADEON_CP_VC_FRMT_FPFOG;
281 nr++;
282 }
283
284
285 vtx = (rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] &
286 ~(RADEON_TCL_VTX_Q0|RADEON_TCL_VTX_Q1|RADEON_TCL_VTX_Q2));
287
288 for (unit = 0; unit < ctx->Const.MaxTextureUnits; unit++) {
289 if (inputs & VERT_BIT_TEX(unit)) {
290 if (!rmesa->tcl.tex[unit].buf)
291 emit_tex_vector( ctx,
292 &(rmesa->tcl.aos[nr]),
293 (char *)VB->TexCoordPtr[unit]->data,
294 VB->TexCoordPtr[unit]->size,
295 VB->TexCoordPtr[unit]->stride,
296 count );
297 nr++;
298
299 vfmt |= RADEON_ST_BIT(unit);
300 /* assume we need the 3rd coord if texgen is active for r/q OR at least
301 3 coords are submitted. This may not be 100% correct */
302 if (VB->TexCoordPtr[unit]->size >= 3) {
303 vtx |= RADEON_Q_BIT(unit);
304 vfmt |= RADEON_Q_BIT(unit);
305 }
306 if ( (ctx->Texture.Unit[unit].TexGenEnabled & (R_BIT | Q_BIT)) )
307 vtx |= RADEON_Q_BIT(unit);
308 else if ((VB->TexCoordPtr[unit]->size >= 3) &&
309 ((ctx->Texture.Unit[unit]._ReallyEnabled & (TEXTURE_CUBE_BIT)) == 0)) {
310 GLuint swaptexmatcol = (VB->TexCoordPtr[unit]->size - 3);
311 if (((rmesa->NeedTexMatrix >> unit) & 1) &&
312 (swaptexmatcol != ((rmesa->TexMatColSwap >> unit) & 1)))
313 radeonUploadTexMatrix( rmesa, unit, swaptexmatcol ) ;
314 }
315 }
316 }
317
318 if (vtx != rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT]) {
319 RADEON_STATECHANGE( rmesa, tcl );
320 rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] = vtx;
321 }
322
323 rmesa->tcl.nr_aos_components = nr;
324 rmesa->tcl.vertex_format = vfmt;
325 }
326