src/mesa/drivers/dri/radeon/radeon_screen.c

   1 /**************************************************************************
   2
   3 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
   4                      VA Linux Systems Inc., Fremont, California.
   5
   6 All Rights Reserved.
   7
   8 Permission is hereby granted, free of charge, to any person obtaining
   9 a copy of this software and associated documentation files (the
  10 "Software"), to deal in the Software without restriction, including
  11 without limitation the rights to use, copy, modify, merge, publish,
  12 distribute, sublicense, and/or sell copies of the Software, and to
  13 permit persons to whom the Software is furnished to do so, subject to
  14 the following conditions:
  15
  16 The above copyright notice and this permission notice (including the
  17 next paragraph) shall be included in all copies or substantial
  18 portions of the Software.
  19
  20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  27
  28 **************************************************************************/
  29
  30 /**
  31  * \file radeon_screen.c
  32  * Screen initialization functions for the Radeon driver.
  33  *
  34  * \author Kevin E. Martin <martin@valinux.com>
  35  * \author  Gareth Hughes <gareth@valinux.com>
  36  */
  37
  38 #include <errno.h>
  39 #include "main/glheader.h"
  40 #include "main/imports.h"
  41 #include "main/mtypes.h"
  42 #include "main/framebuffer.h"
  43 #include "main/renderbuffer.h"
  44 #include "main/fbobject.h"
  45 #include "swrast/s_renderbuffer.h"
  46
  47 #include "radeon_chipset.h"
  48 #include "radeon_macros.h"
  49 #include "radeon_screen.h"
  50 #include "radeon_common.h"
  51 #include "radeon_common_context.h"
  52 #if defined(RADEON_R100)
  53 #include "radeon_context.h"
  54 #include "radeon_tex.h"
  55 #elif defined(RADEON_R200)
  56 #include "r200_context.h"
  57 #include "r200_tex.h"
  58 #endif
  59
  60 #include "utils.h"
  61
  62 #include "GL/internal/dri_interface.h"
  63
  64 /* Radeon configuration
  65  */
  66 #include "xmlpool.h"
  67
  68 #define DRI_CONF_COMMAND_BUFFER_SIZE(def,min,max) \
  69 DRI_CONF_OPT_BEGIN_V(command_buffer_size,int,def, # min ":" # max ) \
  70         DRI_CONF_DESC(en,"Size of command buffer (in KB)") \
  71         DRI_CONF_DESC(de,"Grösse des Befehlspuffers (in KB)") \
  72 DRI_CONF_OPT_END
  73
  74 #if defined(RADEON_R100)        /* R100 */
  75 static const __DRIconfigOptionsExtension radeon_config_options = {
  76    .base = { __DRI_CONFIG_OPTIONS, 1 },
  77    .xml =
  78 DRI_CONF_BEGIN
  79     DRI_CONF_SECTION_PERFORMANCE
  80         DRI_CONF_TCL_MODE(DRI_CONF_TCL_CODEGEN)
  81         DRI_CONF_FTHROTTLE_MODE(DRI_CONF_FTHROTTLE_IRQS)
  82         DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_DEF_INTERVAL_0)
  83         DRI_CONF_MAX_TEXTURE_UNITS(3,2,3)
  84         DRI_CONF_HYPERZ("false")
  85         DRI_CONF_COMMAND_BUFFER_SIZE(8, 8, 32)
  86     DRI_CONF_SECTION_END
  87     DRI_CONF_SECTION_QUALITY
  88         DRI_CONF_TEXTURE_DEPTH(DRI_CONF_TEXTURE_DEPTH_FB)
  89         DRI_CONF_DEF_MAX_ANISOTROPY(1.0,"1.0,2.0,4.0,8.0,16.0")
  90         DRI_CONF_NO_NEG_LOD_BIAS("false")
  91         DRI_CONF_FORCE_S3TC_ENABLE("false")
  92         DRI_CONF_COLOR_REDUCTION(DRI_CONF_COLOR_REDUCTION_DITHER)
  93         DRI_CONF_ROUND_MODE(DRI_CONF_ROUND_TRUNC)
  94         DRI_CONF_DITHER_MODE(DRI_CONF_DITHER_XERRORDIFF)
  95     DRI_CONF_SECTION_END
  96     DRI_CONF_SECTION_DEBUG
  97         DRI_CONF_NO_RAST("false")
  98     DRI_CONF_SECTION_END
  99 DRI_CONF_END
 100 };
 101
 102 #elif defined(RADEON_R200)
 103 static const __DRIconfigOptionsExtension radeon_config_options = {
 104    .base = { __DRI_CONFIG_OPTIONS, 1 },
 105    .xml =
 106 DRI_CONF_BEGIN
 107     DRI_CONF_SECTION_PERFORMANCE
 108         DRI_CONF_TCL_MODE(DRI_CONF_TCL_CODEGEN)
 109         DRI_CONF_FTHROTTLE_MODE(DRI_CONF_FTHROTTLE_IRQS)
 110         DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_DEF_INTERVAL_0)
 111         DRI_CONF_MAX_TEXTURE_UNITS(6,2,6)
 112         DRI_CONF_HYPERZ("false")
 113         DRI_CONF_COMMAND_BUFFER_SIZE(8, 8, 32)
 114     DRI_CONF_SECTION_END
 115     DRI_CONF_SECTION_QUALITY
 116         DRI_CONF_TEXTURE_DEPTH(DRI_CONF_TEXTURE_DEPTH_FB)
 117         DRI_CONF_DEF_MAX_ANISOTROPY(1.0,"1.0,2.0,4.0,8.0,16.0")
 118         DRI_CONF_NO_NEG_LOD_BIAS("false")
 119         DRI_CONF_FORCE_S3TC_ENABLE("false")
 120         DRI_CONF_COLOR_REDUCTION(DRI_CONF_COLOR_REDUCTION_DITHER)
 121         DRI_CONF_ROUND_MODE(DRI_CONF_ROUND_TRUNC)
 122         DRI_CONF_DITHER_MODE(DRI_CONF_DITHER_XERRORDIFF)
 123         DRI_CONF_TEXTURE_BLEND_QUALITY(1.0,"0.0:1.0")
 124     DRI_CONF_SECTION_END
 125     DRI_CONF_SECTION_DEBUG
 126         DRI_CONF_NO_RAST("false")
 127     DRI_CONF_SECTION_END
 128 DRI_CONF_END
 129 };
 130 #endif
 131
 132 #ifndef RADEON_INFO_TILE_CONFIG
 133 #define RADEON_INFO_TILE_CONFIG 0x6
 134 #endif
 135
 136 static int
 137 radeonGetParam(__DRIscreen *sPriv, int param, void *value)
 138 {
 139   int ret;
 140   drm_radeon_getparam_t gp = { 0 };
 141   struct drm_radeon_info info = { 0 };
 142
 143   if (sPriv->drm_version.major >= 2) {
 144       info.value = (uint64_t)(uintptr_t)value;
 145       switch (param) {
 146       case RADEON_PARAM_DEVICE_ID:
 147           info.request = RADEON_INFO_DEVICE_ID;
 148           break;
 149       case RADEON_PARAM_NUM_GB_PIPES:
 150           info.request = RADEON_INFO_NUM_GB_PIPES;
 151           break;
 152       case RADEON_PARAM_NUM_Z_PIPES:
 153           info.request = RADEON_INFO_NUM_Z_PIPES;
 154           break;
 155       case RADEON_INFO_TILE_CONFIG:
 156           info.request = RADEON_INFO_TILE_CONFIG;
 157           break;
 158       default:
 159           return -EINVAL;
 160       }
 161       ret = drmCommandWriteRead(sPriv->fd, DRM_RADEON_INFO, &info, sizeof(info));
 162   } else {
 163       gp.param = param;
 164       gp.value = value;
 165
 166       ret = drmCommandWriteRead(sPriv->fd, DRM_RADEON_GETPARAM, &gp, sizeof(gp));
 167   }
 168   return ret;
 169 }
 170
 171 #if defined(RADEON_R100)
 172 static const __DRItexBufferExtension radeonTexBufferExtension = {
 173     { __DRI_TEX_BUFFER, __DRI_TEX_BUFFER_VERSION },
 174    radeonSetTexBuffer,
 175    radeonSetTexBuffer2,
 176 };
 177 #elif defined(RADEON_R200)
 178 static const __DRItexBufferExtension r200TexBufferExtension = {
 179     { __DRI_TEX_BUFFER, __DRI_TEX_BUFFER_VERSION },
 180    r200SetTexBuffer,
 181    r200SetTexBuffer2,
 182 };
 183 #endif
 184
 185 static void
 186 radeonDRI2Flush(__DRIdrawable *drawable)
 187 {
 188     radeonContextPtr rmesa;
 189
 190     rmesa = (radeonContextPtr) drawable->driContextPriv->driverPrivate;
 191     radeonFlush(&rmesa->glCtx);
 192 }
 193
 194 static const struct __DRI2flushExtensionRec radeonFlushExtension = {
 195     { __DRI2_FLUSH, 3 },
 196     radeonDRI2Flush,
 197     dri2InvalidateDrawable,
 198 };
 199
 200 static __DRIimage *
 201 radeon_create_image_from_name(__DRIscreen *screen,
 202                               int width, int height, int format,
 203                               int name, int pitch, void *loaderPrivate)
 204 {
 205    __DRIimage *image;
 206    radeonScreenPtr radeonScreen = screen->driverPrivate;
 207
 208    if (name == 0)
 209       return NULL;
 210
 211    image = calloc(1, sizeof *image);
 212    if (image == NULL)
 213       return NULL;
 214
 215    switch (format) {
 216    case __DRI_IMAGE_FORMAT_RGB565:
 217       image->format = MESA_FORMAT_RGB565;
 218       image->internal_format = GL_RGB;
 219       image->data_type = GL_UNSIGNED_BYTE;
 220       break;
 221    case __DRI_IMAGE_FORMAT_XRGB8888:
 222       image->format = MESA_FORMAT_XRGB8888;
 223       image->internal_format = GL_RGB;
 224       image->data_type = GL_UNSIGNED_BYTE;
 225       break;
 226    case __DRI_IMAGE_FORMAT_ARGB8888:
 227       image->format = MESA_FORMAT_ARGB8888;
 228       image->internal_format = GL_RGBA;
 229       image->data_type = GL_UNSIGNED_BYTE;
 230       break;
 231    default:
 232       free(image);
 233       return NULL;
 234    }
 235
 236    image->data = loaderPrivate;
 237    image->cpp = _mesa_get_format_bytes(image->format);
 238    image->width = width;
 239    image->pitch = pitch;
 240    image->height = height;
 241
 242    image->bo = radeon_bo_open(radeonScreen->bom,
 243                               (uint32_t)name,
 244                               image->pitch * image->height * image->cpp,
 245                               0,
 246                               RADEON_GEM_DOMAIN_VRAM,
 247                               0);
 248
 249    if (image->bo == NULL) {
 250       free(image);
 251       return NULL;
 252    }
 253
 254    return image;
 255 }
 256
 257 static __DRIimage *
 258 radeon_create_image_from_renderbuffer(__DRIcontext *context,
 259                                       int renderbuffer, void *loaderPrivate)
 260 {
 261    __DRIimage *image;
 262    radeonContextPtr radeon = context->driverPrivate;
 263    struct gl_renderbuffer *rb;
 264    struct radeon_renderbuffer *rrb;
 265
 266    rb = _mesa_lookup_renderbuffer(&radeon->glCtx, renderbuffer);
 267    if (!rb) {
 268       _mesa_error(&radeon->glCtx,
 269                   GL_INVALID_OPERATION, "glRenderbufferExternalMESA");
 270       return NULL;
 271    }
 272
 273    rrb = radeon_renderbuffer(rb);
 274    image = calloc(1, sizeof *image);
 275    if (image == NULL)
 276       return NULL;
 277
 278    image->internal_format = rb->InternalFormat;
 279    image->format = rb->Format;
 280    image->cpp = rrb->cpp;
 281    image->data_type = GL_UNSIGNED_BYTE;
 282    image->data = loaderPrivate;
 283    radeon_bo_ref(rrb->bo);
 284    image->bo = rrb->bo;
 285
 286    image->width = rb->Width;
 287    image->height = rb->Height;
 288    image->pitch = rrb->pitch / image->cpp;
 289
 290    return image;
 291 }
 292
 293 static void
 294 radeon_destroy_image(__DRIimage *image)
 295 {
 296    radeon_bo_unref(image->bo);
 297    free(image);
 298 }
 299
 300 static __DRIimage *
 301 radeon_create_image(__DRIscreen *screen,
 302                     int width, int height, int format,
 303                     unsigned int use,
 304                     void *loaderPrivate)
 305 {
 306    __DRIimage *image;
 307    radeonScreenPtr radeonScreen = screen->driverPrivate;
 308
 309    image = calloc(1, sizeof *image);
 310    if (image == NULL)
 311       return NULL;
 312
 313    image->dri_format = format;
 314
 315    switch (format) {
 316    case __DRI_IMAGE_FORMAT_RGB565:
 317       image->format = MESA_FORMAT_RGB565;
 318       image->internal_format = GL_RGB;
 319       image->data_type = GL_UNSIGNED_BYTE;
 320       break;
 321    case __DRI_IMAGE_FORMAT_XRGB8888:
 322       image->format = MESA_FORMAT_XRGB8888;
 323       image->internal_format = GL_RGB;
 324       image->data_type = GL_UNSIGNED_BYTE;
 325       break;
 326    case __DRI_IMAGE_FORMAT_ARGB8888:
 327       image->format = MESA_FORMAT_ARGB8888;
 328       image->internal_format = GL_RGBA;
 329       image->data_type = GL_UNSIGNED_BYTE;
 330       break;
 331    default:
 332       free(image);
 333       return NULL;
 334    }
 335
 336    image->data = loaderPrivate;
 337    image->cpp = _mesa_get_format_bytes(image->format);
 338    image->width = width;
 339    image->height = height;
 340    image->pitch = ((image->cpp * image->width + 255) & ~255) / image->cpp;
 341
 342    image->bo = radeon_bo_open(radeonScreen->bom,
 343                               0,
 344                               image->pitch * image->height * image->cpp,
 345                               0,
 346                               RADEON_GEM_DOMAIN_VRAM,
 347                               0);
 348
 349    if (image->bo == NULL) {
 350       free(image);
 351       return NULL;
 352    }
 353
 354    return image;
 355 }
 356
 357 static GLboolean
 358 radeon_query_image(__DRIimage *image, int attrib, int *value)
 359 {
 360    switch (attrib) {
 361    case __DRI_IMAGE_ATTRIB_STRIDE:
 362       *value = image->pitch * image->cpp;
 363       return GL_TRUE;
 364    case __DRI_IMAGE_ATTRIB_HANDLE:
 365       *value = image->bo->handle;
 366       return GL_TRUE;
 367    case __DRI_IMAGE_ATTRIB_NAME:
 368       radeon_gem_get_kernel_name(image->bo, (uint32_t *) value);
 369       return GL_TRUE;
 370    default:
 371       return GL_FALSE;
 372    }
 373 }
 374
 375 static struct __DRIimageExtensionRec radeonImageExtension = {
 376     { __DRI_IMAGE, 1 },
 377    radeon_create_image_from_name,
 378    radeon_create_image_from_renderbuffer,
 379    radeon_destroy_image,
 380    radeon_create_image,
 381    radeon_query_image
 382 };
 383
 384 static int radeon_set_screen_flags(radeonScreenPtr screen, int device_id)
 385 {
 386    screen->device_id = device_id;
 387    screen->chip_flags = 0;
 388    switch ( device_id ) {
 389 #if defined(RADEON_R100)
 390    case PCI_CHIP_RN50_515E:
 391    case PCI_CHIP_RN50_5969:
 392         return -1;
 393
 394    case PCI_CHIP_RADEON_LY:
 395    case PCI_CHIP_RADEON_LZ:
 396    case PCI_CHIP_RADEON_QY:
 397    case PCI_CHIP_RADEON_QZ:
 398       screen->chip_family = CHIP_FAMILY_RV100;
 399       break;
 400
 401    case PCI_CHIP_RS100_4136:
 402    case PCI_CHIP_RS100_4336:
 403       screen->chip_family = CHIP_FAMILY_RS100;
 404       break;
 405
 406    case PCI_CHIP_RS200_4137:
 407    case PCI_CHIP_RS200_4337:
 408    case PCI_CHIP_RS250_4237:
 409    case PCI_CHIP_RS250_4437:
 410       screen->chip_family = CHIP_FAMILY_RS200;
 411       break;
 412
 413    case PCI_CHIP_RADEON_QD:
 414    case PCI_CHIP_RADEON_QE:
 415    case PCI_CHIP_RADEON_QF:
 416    case PCI_CHIP_RADEON_QG:
 417       /* all original radeons (7200) presumably have a stencil op bug */
 418       screen->chip_family = CHIP_FAMILY_R100;
 419       screen->chip_flags = RADEON_CHIPSET_TCL | RADEON_CHIPSET_BROKEN_STENCIL | RADEON_CHIPSET_DEPTH_ALWAYS_TILED;
 420       break;
 421
 422    case PCI_CHIP_RV200_QW:
 423    case PCI_CHIP_RV200_QX:
 424    case PCI_CHIP_RADEON_LW:
 425    case PCI_CHIP_RADEON_LX:
 426       screen->chip_family = CHIP_FAMILY_RV200;
 427       screen->chip_flags = RADEON_CHIPSET_TCL | RADEON_CHIPSET_DEPTH_ALWAYS_TILED;
 428       break;
 429
 430 #elif defined(RADEON_R200)
 431    case PCI_CHIP_R200_BB:
 432    case PCI_CHIP_R200_QH:
 433    case PCI_CHIP_R200_QL:
 434    case PCI_CHIP_R200_QM:
 435       screen->chip_family = CHIP_FAMILY_R200;
 436       screen->chip_flags = RADEON_CHIPSET_TCL | RADEON_CHIPSET_DEPTH_ALWAYS_TILED;
 437       break;
 438
 439    case PCI_CHIP_RV250_If:
 440    case PCI_CHIP_RV250_Ig:
 441    case PCI_CHIP_RV250_Ld:
 442    case PCI_CHIP_RV250_Lf:
 443    case PCI_CHIP_RV250_Lg:
 444       screen->chip_family = CHIP_FAMILY_RV250;
 445       screen->chip_flags = R200_CHIPSET_YCBCR_BROKEN | RADEON_CHIPSET_TCL | RADEON_CHIPSET_DEPTH_ALWAYS_TILED;
 446       break;
 447
 448    case PCI_CHIP_RV280_4C6E:
 449    case PCI_CHIP_RV280_5960:
 450    case PCI_CHIP_RV280_5961:
 451    case PCI_CHIP_RV280_5962:
 452    case PCI_CHIP_RV280_5964:
 453    case PCI_CHIP_RV280_5965:
 454    case PCI_CHIP_RV280_5C61:
 455    case PCI_CHIP_RV280_5C63:
 456       screen->chip_family = CHIP_FAMILY_RV280;
 457       screen->chip_flags = RADEON_CHIPSET_TCL | RADEON_CHIPSET_DEPTH_ALWAYS_TILED;
 458       break;
 459
 460    case PCI_CHIP_RS300_5834:
 461    case PCI_CHIP_RS300_5835:
 462    case PCI_CHIP_RS350_7834:
 463    case PCI_CHIP_RS350_7835:
 464       screen->chip_family = CHIP_FAMILY_RS300;
 465       screen->chip_flags = RADEON_CHIPSET_DEPTH_ALWAYS_TILED;
 466       break;
 467 #endif
 468
 469    default:
 470       fprintf(stderr, "unknown chip id 0x%x, can't guess.\n",
 471               device_id);
 472       return -1;
 473    }
 474
 475    return 0;
 476 }
 477
 478 static radeonScreenPtr
 479 radeonCreateScreen2(__DRIscreen *sPriv)
 480 {
 481    radeonScreenPtr screen;
 482    int i;
 483    int ret;
 484    uint32_t device_id = 0;
 485
 486    /* Allocate the private area */
 487    screen = calloc(1, sizeof(*screen));
 488    if ( !screen ) {
 489       fprintf(stderr, "%s: Could not allocate memory for screen structure", __FUNCTION__);
 490       fprintf(stderr, "leaving here\n");
 491       return NULL;
 492    }
 493
 494    radeon_init_debug();
 495
 496    /* parse information in __driConfigOptions */
 497    driParseOptionInfo (&screen->optionCache, radeon_config_options.xml);
 498
 499    screen->chip_flags = 0;
 500
 501    screen->irq = 1;
 502
 503    ret = radeonGetParam(sPriv, RADEON_PARAM_DEVICE_ID, &device_id);
 504    if (ret) {
 505      free( screen );
 506      fprintf(stderr, "drm_radeon_getparam_t (RADEON_PARAM_DEVICE_ID): %d\n", ret);
 507      return NULL;
 508    }
 509
 510    ret = radeon_set_screen_flags(screen, device_id);
 511    if (ret == -1) {
 512      free(screen);
 513      return NULL;
 514    }
 515
 516    if (getenv("RADEON_NO_TCL"))
 517            screen->chip_flags &= ~RADEON_CHIPSET_TCL;
 518
 519    i = 0;
 520    screen->extensions[i++] = &dri2ConfigQueryExtension.base;
 521
 522 #if defined(RADEON_R100)
 523    screen->extensions[i++] = &radeonTexBufferExtension.base;
 524 #elif defined(RADEON_R200)
 525    screen->extensions[i++] = &r200TexBufferExtension.base;
 526 #endif
 527
 528    screen->extensions[i++] = &radeonFlushExtension.base;
 529    screen->extensions[i++] = &radeonImageExtension.base;
 530
 531    screen->extensions[i++] = NULL;
 532    sPriv->extensions = screen->extensions;
 533
 534    screen->driScreen = sPriv;
 535    screen->bom = radeon_bo_manager_gem_ctor(sPriv->fd);
 536    if (screen->bom == NULL) {
 537        free(screen);
 538        return NULL;
 539    }
 540    return screen;
 541 }
 542
 543 /* Destroy the device specific screen private data struct.
 544  */
 545 static void
 546 radeonDestroyScreen( __DRIscreen *sPriv )
 547 {
 548     radeonScreenPtr screen = (radeonScreenPtr)sPriv->driverPrivate;
 549
 550     if (!screen)
 551         return;
 552
 553 #ifdef RADEON_BO_TRACK
 554     radeon_tracker_print(&screen->bom->tracker, stderr);
 555 #endif
 556     radeon_bo_manager_gem_dtor(screen->bom);
 557
 558     /* free all option information */
 559     driDestroyOptionInfo (&screen->optionCache);
 560
 561     free( screen );
 562     sPriv->driverPrivate = NULL;
 563 }
 564
 565
 566 /* Initialize the driver specific screen private data.
 567  */
 568 static GLboolean
 569 radeonInitDriver( __DRIscreen *sPriv )
 570 {
 571     sPriv->driverPrivate = (void *) radeonCreateScreen2( sPriv );
 572     if ( !sPriv->driverPrivate ) {
 573         radeonDestroyScreen( sPriv );
 574         return GL_FALSE;
 575     }
 576
 577     return GL_TRUE;
 578 }
 579
 580
 581
 582 /**
 583  * Create the Mesa framebuffer and renderbuffers for a given window/drawable.
 584  *
 585  * \todo This function (and its interface) will need to be updated to support
 586  * pbuffers.
 587  */
 588 static GLboolean
 589 radeonCreateBuffer( __DRIscreen *driScrnPriv,
 590                     __DRIdrawable *driDrawPriv,
 591                     const struct gl_config *mesaVis,
 592                     GLboolean isPixmap )
 593 {
 594     radeonScreenPtr screen = (radeonScreenPtr) driScrnPriv->driverPrivate;
 595
 596     const GLboolean swDepth = GL_FALSE;
 597     const GLboolean swAlpha = GL_FALSE;
 598     const GLboolean swAccum = mesaVis->accumRedBits > 0;
 599     const GLboolean swStencil = mesaVis->stencilBits > 0 &&
 600         mesaVis->depthBits != 24;
 601     gl_format rgbFormat;
 602     struct radeon_framebuffer *rfb;
 603
 604     if (isPixmap)
 605       return GL_FALSE; /* not implemented */
 606
 607     rfb = CALLOC_STRUCT(radeon_framebuffer);
 608     if (!rfb)
 609       return GL_FALSE;
 610
 611     _mesa_initialize_window_framebuffer(&rfb->base, mesaVis);
 612
 613     if (mesaVis->redBits == 5)
 614         rgbFormat = _mesa_little_endian() ? MESA_FORMAT_RGB565 : MESA_FORMAT_RGB565_REV;
 615     else if (mesaVis->alphaBits == 0)
 616         rgbFormat = _mesa_little_endian() ? MESA_FORMAT_XRGB8888 : MESA_FORMAT_XRGB8888_REV;
 617     else
 618         rgbFormat = _mesa_little_endian() ? MESA_FORMAT_ARGB8888 : MESA_FORMAT_ARGB8888_REV;
 619
 620     /* front color renderbuffer */
 621     rfb->color_rb[0] = radeon_create_renderbuffer(rgbFormat, driDrawPriv);
 622     _mesa_add_renderbuffer(&rfb->base, BUFFER_FRONT_LEFT, &rfb->color_rb[0]->base.Base);
 623     rfb->color_rb[0]->has_surface = 1;
 624
 625     /* back color renderbuffer */
 626     if (mesaVis->doubleBufferMode) {
 627       rfb->color_rb[1] = radeon_create_renderbuffer(rgbFormat, driDrawPriv);
 628         _mesa_add_renderbuffer(&rfb->base, BUFFER_BACK_LEFT, &rfb->color_rb[1]->base.Base);
 629         rfb->color_rb[1]->has_surface = 1;
 630     }
 631
 632     if (mesaVis->depthBits == 24) {
 633       if (mesaVis->stencilBits == 8) {
 634         struct radeon_renderbuffer *depthStencilRb =
 635            radeon_create_renderbuffer(MESA_FORMAT_S8_Z24, driDrawPriv);
 636         _mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depthStencilRb->base.Base);
 637         _mesa_add_renderbuffer(&rfb->base, BUFFER_STENCIL, &depthStencilRb->base.Base);
 638         depthStencilRb->has_surface = screen->depthHasSurface;
 639       } else {
 640         /* depth renderbuffer */
 641         struct radeon_renderbuffer *depth =
 642            radeon_create_renderbuffer(MESA_FORMAT_X8_Z24, driDrawPriv);
 643         _mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depth->base.Base);
 644         depth->has_surface = screen->depthHasSurface;
 645       }
 646     } else if (mesaVis->depthBits == 16) {
 647         /* just 16-bit depth buffer, no hw stencil */
 648         struct radeon_renderbuffer *depth =
 649            radeon_create_renderbuffer(MESA_FORMAT_Z16, driDrawPriv);
 650         _mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depth->base.Base);
 651         depth->has_surface = screen->depthHasSurface;
 652     }
 653
 654     _swrast_add_soft_renderbuffers(&rfb->base,
 655             GL_FALSE, /* color */
 656             swDepth,
 657             swStencil,
 658             swAccum,
 659             swAlpha,
 660             GL_FALSE /* aux */);
 661     driDrawPriv->driverPrivate = (void *) rfb;
 662
 663     return (driDrawPriv->driverPrivate != NULL);
 664 }
 665
 666
 667 static void radeon_cleanup_renderbuffers(struct radeon_framebuffer *rfb)
 668 {
 669         struct radeon_renderbuffer *rb;
 670
 671         rb = rfb->color_rb[0];
 672         if (rb && rb->bo) {
 673                 radeon_bo_unref(rb->bo);
 674                 rb->bo = NULL;
 675         }
 676         rb = rfb->color_rb[1];
 677         if (rb && rb->bo) {
 678                 radeon_bo_unref(rb->bo);
 679                 rb->bo = NULL;
 680         }
 681         rb = radeon_get_renderbuffer(&rfb->base, BUFFER_DEPTH);
 682         if (rb && rb->bo) {
 683                 radeon_bo_unref(rb->bo);
 684                 rb->bo = NULL;
 685         }
 686 }
 687
 688 void
 689 radeonDestroyBuffer(__DRIdrawable *driDrawPriv)
 690 {
 691     struct radeon_framebuffer *rfb;
 692     if (!driDrawPriv)
 693         return;
 694
 695     rfb = (void*)driDrawPriv->driverPrivate;
 696     if (!rfb)
 697         return;
 698     radeon_cleanup_renderbuffers(rfb);
 699     _mesa_reference_framebuffer((struct gl_framebuffer **)(&(driDrawPriv->driverPrivate)), NULL);
 700 }
 701
 702 /**
 703  * This is the driver specific part of the createNewScreen entry point.
 704  * Called when using DRI2.
 705  *
 706  * \return the struct gl_config supported by this driver
 707  */
 708 static const
 709 __DRIconfig **radeonInitScreen2(__DRIscreen *psp)
 710 {
 711    static const gl_format formats[3] = {
 712       MESA_FORMAT_RGB565,
 713       MESA_FORMAT_XRGB8888,
 714       MESA_FORMAT_ARGB8888
 715    };
 716    /* GLX_SWAP_COPY_OML is only supported because the Intel driver doesn't
 717     * support pageflipping at all.
 718     */
 719    static const GLenum back_buffer_modes[] = {
 720      GLX_NONE, GLX_SWAP_UNDEFINED_OML, /*, GLX_SWAP_COPY_OML*/
 721    };
 722    uint8_t depth_bits[4], stencil_bits[4], msaa_samples_array[1];
 723    int color;
 724    __DRIconfig **configs = NULL;
 725
 726    psp->max_gl_compat_version = 13;
 727    psp->max_gl_es1_version = 11;
 728
 729    if (!radeonInitDriver(psp)) {
 730        return NULL;
 731     }
 732    depth_bits[0] = 0;
 733    stencil_bits[0] = 0;
 734    depth_bits[1] = 16;
 735    stencil_bits[1] = 0;
 736    depth_bits[2] = 24;
 737    stencil_bits[2] = 0;
 738    depth_bits[3] = 24;
 739    stencil_bits[3] = 8;
 740
 741    msaa_samples_array[0] = 0;
 742
 743    for (color = 0; color < ARRAY_SIZE(formats); color++) {
 744       __DRIconfig **new_configs;
 745
 746       new_configs = driCreateConfigs(formats[color],
 747                                      depth_bits,
 748                                      stencil_bits,
 749                                      ARRAY_SIZE(depth_bits),
 750                                      back_buffer_modes,
 751                                      ARRAY_SIZE(back_buffer_modes),
 752                                      msaa_samples_array,
 753                                      ARRAY_SIZE(msaa_samples_array),
 754                                      GL_TRUE);
 755       configs = driConcatConfigs(configs, new_configs);
 756    }
 757
 758    if (configs == NULL) {
 759       fprintf(stderr, "[%s:%u] Error creating FBConfig!\n", __func__,
 760               __LINE__);
 761       return NULL;
 762    }
 763
 764    return (const __DRIconfig **)configs;
 765 }
 766
 767 static const struct __DriverAPIRec radeon_driver_api = {
 768    .InitScreen      = radeonInitScreen2,
 769    .DestroyScreen   = radeonDestroyScreen,
 770 #if defined(RADEON_R200)
 771    .CreateContext   = r200CreateContext,
 772    .DestroyContext  = r200DestroyContext,
 773 #else
 774    .CreateContext   = r100CreateContext,
 775    .DestroyContext  = radeonDestroyContext,
 776 #endif
 777    .CreateBuffer    = radeonCreateBuffer,
 778    .DestroyBuffer   = radeonDestroyBuffer,
 779    .MakeCurrent     = radeonMakeCurrent,
 780    .UnbindContext   = radeonUnbindContext,
 781 };
 782
 783 static const struct __DRIDriverVtableExtensionRec radeon_vtable = {
 784    .base = { __DRI_DRIVER_VTABLE, 1 },
 785    .vtable = &radeon_driver_api,
 786 };
 787
 788 /* This is the table of extensions that the loader will dlsym() for. */
 789 static const __DRIextension *radeon_driver_extensions[] = {
 790     &driCoreExtension.base,
 791     &driDRI2Extension.base,
 792     &radeon_config_options.base,
 793     &radeon_vtable.base,
 794     NULL
 795 };
 796
 797 #ifdef RADEON_R200
 798 PUBLIC const __DRIextension **__driDriverGetExtensions_r200(void)
 799 {
 800    globalDriverAPI = &radeon_driver_api;
 801
 802    return radeon_driver_extensions;
 803 }
 804 #else
 805 PUBLIC const __DRIextension **__driDriverGetExtensions_radeon(void)
 806 {
 807    globalDriverAPI = &radeon_driver_api;
 808
 809    return radeon_driver_extensions;
 810 }
 811 #endif