dri: Move API version validation into dri/common.
[mesa.git] / src / mesa / drivers / dri / radeon / radeon_screen.c
1 /**************************************************************************
2
3 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
4 VA Linux Systems Inc., Fremont, California.
5
6 All Rights Reserved.
7
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
15
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
19
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27
28 **************************************************************************/
29
30 /**
31 * \file radeon_screen.c
32 * Screen initialization functions for the Radeon driver.
33 *
34 * \author Kevin E. Martin <martin@valinux.com>
35 * \author Gareth Hughes <gareth@valinux.com>
36 */
37
38 #include <errno.h>
39 #include "main/glheader.h"
40 #include "main/imports.h"
41 #include "main/mtypes.h"
42 #include "main/framebuffer.h"
43 #include "main/renderbuffer.h"
44 #include "main/fbobject.h"
45 #include "swrast/s_renderbuffer.h"
46
47 #include "radeon_chipset.h"
48 #include "radeon_macros.h"
49 #include "radeon_screen.h"
50 #include "radeon_common.h"
51 #include "radeon_common_context.h"
52 #if defined(RADEON_R100)
53 #include "radeon_context.h"
54 #include "radeon_tex.h"
55 #elif defined(RADEON_R200)
56 #include "r200_context.h"
57 #include "r200_tex.h"
58 #endif
59
60 #include "utils.h"
61
62 #include "GL/internal/dri_interface.h"
63
64 /* Radeon configuration
65 */
66 #include "xmlpool.h"
67
68 #define DRI_CONF_COMMAND_BUFFER_SIZE(def,min,max) \
69 DRI_CONF_OPT_BEGIN_V(command_buffer_size,int,def, # min ":" # max ) \
70 DRI_CONF_DESC(en,"Size of command buffer (in KB)") \
71 DRI_CONF_DESC(de,"Grösse des Befehlspuffers (in KB)") \
72 DRI_CONF_OPT_END
73
74 #if defined(RADEON_R100) /* R100 */
75 PUBLIC const char __driConfigOptions[] =
76 DRI_CONF_BEGIN
77 DRI_CONF_SECTION_PERFORMANCE
78 DRI_CONF_TCL_MODE(DRI_CONF_TCL_CODEGEN)
79 DRI_CONF_FTHROTTLE_MODE(DRI_CONF_FTHROTTLE_IRQS)
80 DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_DEF_INTERVAL_0)
81 DRI_CONF_MAX_TEXTURE_UNITS(3,2,3)
82 DRI_CONF_HYPERZ("false")
83 DRI_CONF_COMMAND_BUFFER_SIZE(8, 8, 32)
84 DRI_CONF_SECTION_END
85 DRI_CONF_SECTION_QUALITY
86 DRI_CONF_TEXTURE_DEPTH(DRI_CONF_TEXTURE_DEPTH_FB)
87 DRI_CONF_DEF_MAX_ANISOTROPY(1.0,"1.0,2.0,4.0,8.0,16.0")
88 DRI_CONF_NO_NEG_LOD_BIAS("false")
89 DRI_CONF_FORCE_S3TC_ENABLE("false")
90 DRI_CONF_COLOR_REDUCTION(DRI_CONF_COLOR_REDUCTION_DITHER)
91 DRI_CONF_ROUND_MODE(DRI_CONF_ROUND_TRUNC)
92 DRI_CONF_DITHER_MODE(DRI_CONF_DITHER_XERRORDIFF)
93 DRI_CONF_SECTION_END
94 DRI_CONF_SECTION_DEBUG
95 DRI_CONF_NO_RAST("false")
96 DRI_CONF_SECTION_END
97 DRI_CONF_END;
98
99 #elif defined(RADEON_R200)
100
101 PUBLIC const char __driConfigOptions[] =
102 DRI_CONF_BEGIN
103 DRI_CONF_SECTION_PERFORMANCE
104 DRI_CONF_TCL_MODE(DRI_CONF_TCL_CODEGEN)
105 DRI_CONF_FTHROTTLE_MODE(DRI_CONF_FTHROTTLE_IRQS)
106 DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_DEF_INTERVAL_0)
107 DRI_CONF_MAX_TEXTURE_UNITS(6,2,6)
108 DRI_CONF_HYPERZ("false")
109 DRI_CONF_COMMAND_BUFFER_SIZE(8, 8, 32)
110 DRI_CONF_SECTION_END
111 DRI_CONF_SECTION_QUALITY
112 DRI_CONF_TEXTURE_DEPTH(DRI_CONF_TEXTURE_DEPTH_FB)
113 DRI_CONF_DEF_MAX_ANISOTROPY(1.0,"1.0,2.0,4.0,8.0,16.0")
114 DRI_CONF_NO_NEG_LOD_BIAS("false")
115 DRI_CONF_FORCE_S3TC_ENABLE("false")
116 DRI_CONF_COLOR_REDUCTION(DRI_CONF_COLOR_REDUCTION_DITHER)
117 DRI_CONF_ROUND_MODE(DRI_CONF_ROUND_TRUNC)
118 DRI_CONF_DITHER_MODE(DRI_CONF_DITHER_XERRORDIFF)
119 DRI_CONF_TEXTURE_BLEND_QUALITY(1.0,"0.0:1.0")
120 DRI_CONF_SECTION_END
121 DRI_CONF_SECTION_DEBUG
122 DRI_CONF_NO_RAST("false")
123 DRI_CONF_SECTION_END
124 DRI_CONF_END;
125
126 #endif
127
128 #ifndef RADEON_INFO_TILE_CONFIG
129 #define RADEON_INFO_TILE_CONFIG 0x6
130 #endif
131
132 static int
133 radeonGetParam(__DRIscreen *sPriv, int param, void *value)
134 {
135 int ret;
136 drm_radeon_getparam_t gp = { 0 };
137 struct drm_radeon_info info = { 0 };
138
139 if (sPriv->drm_version.major >= 2) {
140 info.value = (uint64_t)(uintptr_t)value;
141 switch (param) {
142 case RADEON_PARAM_DEVICE_ID:
143 info.request = RADEON_INFO_DEVICE_ID;
144 break;
145 case RADEON_PARAM_NUM_GB_PIPES:
146 info.request = RADEON_INFO_NUM_GB_PIPES;
147 break;
148 case RADEON_PARAM_NUM_Z_PIPES:
149 info.request = RADEON_INFO_NUM_Z_PIPES;
150 break;
151 case RADEON_INFO_TILE_CONFIG:
152 info.request = RADEON_INFO_TILE_CONFIG;
153 break;
154 default:
155 return -EINVAL;
156 }
157 ret = drmCommandWriteRead(sPriv->fd, DRM_RADEON_INFO, &info, sizeof(info));
158 } else {
159 gp.param = param;
160 gp.value = value;
161
162 ret = drmCommandWriteRead(sPriv->fd, DRM_RADEON_GETPARAM, &gp, sizeof(gp));
163 }
164 return ret;
165 }
166
167 #if defined(RADEON_R100)
168 static const __DRItexBufferExtension radeonTexBufferExtension = {
169 { __DRI_TEX_BUFFER, __DRI_TEX_BUFFER_VERSION },
170 radeonSetTexBuffer,
171 radeonSetTexBuffer2,
172 };
173 #elif defined(RADEON_R200)
174 static const __DRItexBufferExtension r200TexBufferExtension = {
175 { __DRI_TEX_BUFFER, __DRI_TEX_BUFFER_VERSION },
176 r200SetTexBuffer,
177 r200SetTexBuffer2,
178 };
179 #endif
180
181 static void
182 radeonDRI2Flush(__DRIdrawable *drawable)
183 {
184 radeonContextPtr rmesa;
185
186 rmesa = (radeonContextPtr) drawable->driContextPriv->driverPrivate;
187 radeonFlush(&rmesa->glCtx);
188 }
189
190 static const struct __DRI2flushExtensionRec radeonFlushExtension = {
191 { __DRI2_FLUSH, 3 },
192 radeonDRI2Flush,
193 dri2InvalidateDrawable,
194 };
195
196 static __DRIimage *
197 radeon_create_image_from_name(__DRIscreen *screen,
198 int width, int height, int format,
199 int name, int pitch, void *loaderPrivate)
200 {
201 __DRIimage *image;
202 radeonScreenPtr radeonScreen = screen->driverPrivate;
203
204 if (name == 0)
205 return NULL;
206
207 image = calloc(1, sizeof *image);
208 if (image == NULL)
209 return NULL;
210
211 switch (format) {
212 case __DRI_IMAGE_FORMAT_RGB565:
213 image->format = MESA_FORMAT_RGB565;
214 image->internal_format = GL_RGB;
215 image->data_type = GL_UNSIGNED_BYTE;
216 break;
217 case __DRI_IMAGE_FORMAT_XRGB8888:
218 image->format = MESA_FORMAT_XRGB8888;
219 image->internal_format = GL_RGB;
220 image->data_type = GL_UNSIGNED_BYTE;
221 break;
222 case __DRI_IMAGE_FORMAT_ARGB8888:
223 image->format = MESA_FORMAT_ARGB8888;
224 image->internal_format = GL_RGBA;
225 image->data_type = GL_UNSIGNED_BYTE;
226 break;
227 default:
228 free(image);
229 return NULL;
230 }
231
232 image->data = loaderPrivate;
233 image->cpp = _mesa_get_format_bytes(image->format);
234 image->width = width;
235 image->pitch = pitch;
236 image->height = height;
237
238 image->bo = radeon_bo_open(radeonScreen->bom,
239 (uint32_t)name,
240 image->pitch * image->height * image->cpp,
241 0,
242 RADEON_GEM_DOMAIN_VRAM,
243 0);
244
245 if (image->bo == NULL) {
246 free(image);
247 return NULL;
248 }
249
250 return image;
251 }
252
253 static __DRIimage *
254 radeon_create_image_from_renderbuffer(__DRIcontext *context,
255 int renderbuffer, void *loaderPrivate)
256 {
257 __DRIimage *image;
258 radeonContextPtr radeon = context->driverPrivate;
259 struct gl_renderbuffer *rb;
260 struct radeon_renderbuffer *rrb;
261
262 rb = _mesa_lookup_renderbuffer(&radeon->glCtx, renderbuffer);
263 if (!rb) {
264 _mesa_error(&radeon->glCtx,
265 GL_INVALID_OPERATION, "glRenderbufferExternalMESA");
266 return NULL;
267 }
268
269 rrb = radeon_renderbuffer(rb);
270 image = calloc(1, sizeof *image);
271 if (image == NULL)
272 return NULL;
273
274 image->internal_format = rb->InternalFormat;
275 image->format = rb->Format;
276 image->cpp = rrb->cpp;
277 image->data_type = GL_UNSIGNED_BYTE;
278 image->data = loaderPrivate;
279 radeon_bo_ref(rrb->bo);
280 image->bo = rrb->bo;
281
282 image->width = rb->Width;
283 image->height = rb->Height;
284 image->pitch = rrb->pitch / image->cpp;
285
286 return image;
287 }
288
289 static void
290 radeon_destroy_image(__DRIimage *image)
291 {
292 radeon_bo_unref(image->bo);
293 free(image);
294 }
295
296 static __DRIimage *
297 radeon_create_image(__DRIscreen *screen,
298 int width, int height, int format,
299 unsigned int use,
300 void *loaderPrivate)
301 {
302 __DRIimage *image;
303 radeonScreenPtr radeonScreen = screen->driverPrivate;
304
305 image = calloc(1, sizeof *image);
306 if (image == NULL)
307 return NULL;
308
309 image->dri_format = format;
310
311 switch (format) {
312 case __DRI_IMAGE_FORMAT_RGB565:
313 image->format = MESA_FORMAT_RGB565;
314 image->internal_format = GL_RGB;
315 image->data_type = GL_UNSIGNED_BYTE;
316 break;
317 case __DRI_IMAGE_FORMAT_XRGB8888:
318 image->format = MESA_FORMAT_XRGB8888;
319 image->internal_format = GL_RGB;
320 image->data_type = GL_UNSIGNED_BYTE;
321 break;
322 case __DRI_IMAGE_FORMAT_ARGB8888:
323 image->format = MESA_FORMAT_ARGB8888;
324 image->internal_format = GL_RGBA;
325 image->data_type = GL_UNSIGNED_BYTE;
326 break;
327 default:
328 free(image);
329 return NULL;
330 }
331
332 image->data = loaderPrivate;
333 image->cpp = _mesa_get_format_bytes(image->format);
334 image->width = width;
335 image->height = height;
336 image->pitch = ((image->cpp * image->width + 255) & ~255) / image->cpp;
337
338 image->bo = radeon_bo_open(radeonScreen->bom,
339 0,
340 image->pitch * image->height * image->cpp,
341 0,
342 RADEON_GEM_DOMAIN_VRAM,
343 0);
344
345 if (image->bo == NULL) {
346 free(image);
347 return NULL;
348 }
349
350 return image;
351 }
352
353 static GLboolean
354 radeon_query_image(__DRIimage *image, int attrib, int *value)
355 {
356 switch (attrib) {
357 case __DRI_IMAGE_ATTRIB_STRIDE:
358 *value = image->pitch * image->cpp;
359 return GL_TRUE;
360 case __DRI_IMAGE_ATTRIB_HANDLE:
361 *value = image->bo->handle;
362 return GL_TRUE;
363 case __DRI_IMAGE_ATTRIB_NAME:
364 radeon_gem_get_kernel_name(image->bo, (uint32_t *) value);
365 return GL_TRUE;
366 default:
367 return GL_FALSE;
368 }
369 }
370
371 static struct __DRIimageExtensionRec radeonImageExtension = {
372 { __DRI_IMAGE, 1 },
373 radeon_create_image_from_name,
374 radeon_create_image_from_renderbuffer,
375 radeon_destroy_image,
376 radeon_create_image,
377 radeon_query_image
378 };
379
380 static int radeon_set_screen_flags(radeonScreenPtr screen, int device_id)
381 {
382 screen->device_id = device_id;
383 screen->chip_flags = 0;
384 switch ( device_id ) {
385 #if defined(RADEON_R100)
386 case PCI_CHIP_RN50_515E:
387 case PCI_CHIP_RN50_5969:
388 return -1;
389
390 case PCI_CHIP_RADEON_LY:
391 case PCI_CHIP_RADEON_LZ:
392 case PCI_CHIP_RADEON_QY:
393 case PCI_CHIP_RADEON_QZ:
394 screen->chip_family = CHIP_FAMILY_RV100;
395 break;
396
397 case PCI_CHIP_RS100_4136:
398 case PCI_CHIP_RS100_4336:
399 screen->chip_family = CHIP_FAMILY_RS100;
400 break;
401
402 case PCI_CHIP_RS200_4137:
403 case PCI_CHIP_RS200_4337:
404 case PCI_CHIP_RS250_4237:
405 case PCI_CHIP_RS250_4437:
406 screen->chip_family = CHIP_FAMILY_RS200;
407 break;
408
409 case PCI_CHIP_RADEON_QD:
410 case PCI_CHIP_RADEON_QE:
411 case PCI_CHIP_RADEON_QF:
412 case PCI_CHIP_RADEON_QG:
413 /* all original radeons (7200) presumably have a stencil op bug */
414 screen->chip_family = CHIP_FAMILY_R100;
415 screen->chip_flags = RADEON_CHIPSET_TCL | RADEON_CHIPSET_BROKEN_STENCIL | RADEON_CHIPSET_DEPTH_ALWAYS_TILED;
416 break;
417
418 case PCI_CHIP_RV200_QW:
419 case PCI_CHIP_RV200_QX:
420 case PCI_CHIP_RADEON_LW:
421 case PCI_CHIP_RADEON_LX:
422 screen->chip_family = CHIP_FAMILY_RV200;
423 screen->chip_flags = RADEON_CHIPSET_TCL | RADEON_CHIPSET_DEPTH_ALWAYS_TILED;
424 break;
425
426 #elif defined(RADEON_R200)
427 case PCI_CHIP_R200_BB:
428 case PCI_CHIP_R200_QH:
429 case PCI_CHIP_R200_QL:
430 case PCI_CHIP_R200_QM:
431 screen->chip_family = CHIP_FAMILY_R200;
432 screen->chip_flags = RADEON_CHIPSET_TCL | RADEON_CHIPSET_DEPTH_ALWAYS_TILED;
433 break;
434
435 case PCI_CHIP_RV250_If:
436 case PCI_CHIP_RV250_Ig:
437 case PCI_CHIP_RV250_Ld:
438 case PCI_CHIP_RV250_Lf:
439 case PCI_CHIP_RV250_Lg:
440 screen->chip_family = CHIP_FAMILY_RV250;
441 screen->chip_flags = R200_CHIPSET_YCBCR_BROKEN | RADEON_CHIPSET_TCL | RADEON_CHIPSET_DEPTH_ALWAYS_TILED;
442 break;
443
444 case PCI_CHIP_RV280_4C6E:
445 case PCI_CHIP_RV280_5960:
446 case PCI_CHIP_RV280_5961:
447 case PCI_CHIP_RV280_5962:
448 case PCI_CHIP_RV280_5964:
449 case PCI_CHIP_RV280_5965:
450 case PCI_CHIP_RV280_5C61:
451 case PCI_CHIP_RV280_5C63:
452 screen->chip_family = CHIP_FAMILY_RV280;
453 screen->chip_flags = RADEON_CHIPSET_TCL | RADEON_CHIPSET_DEPTH_ALWAYS_TILED;
454 break;
455
456 case PCI_CHIP_RS300_5834:
457 case PCI_CHIP_RS300_5835:
458 case PCI_CHIP_RS350_7834:
459 case PCI_CHIP_RS350_7835:
460 screen->chip_family = CHIP_FAMILY_RS300;
461 screen->chip_flags = RADEON_CHIPSET_DEPTH_ALWAYS_TILED;
462 break;
463 #endif
464
465 default:
466 fprintf(stderr, "unknown chip id 0x%x, can't guess.\n",
467 device_id);
468 return -1;
469 }
470
471 return 0;
472 }
473
474 static radeonScreenPtr
475 radeonCreateScreen2(__DRIscreen *sPriv)
476 {
477 radeonScreenPtr screen;
478 int i;
479 int ret;
480 uint32_t device_id = 0;
481
482 /* Allocate the private area */
483 screen = calloc(1, sizeof(*screen));
484 if ( !screen ) {
485 fprintf(stderr, "%s: Could not allocate memory for screen structure", __FUNCTION__);
486 fprintf(stderr, "leaving here\n");
487 return NULL;
488 }
489
490 radeon_init_debug();
491
492 /* parse information in __driConfigOptions */
493 driParseOptionInfo (&screen->optionCache, __driConfigOptions);
494
495 screen->chip_flags = 0;
496
497 screen->irq = 1;
498
499 ret = radeonGetParam(sPriv, RADEON_PARAM_DEVICE_ID, &device_id);
500 if (ret) {
501 free( screen );
502 fprintf(stderr, "drm_radeon_getparam_t (RADEON_PARAM_DEVICE_ID): %d\n", ret);
503 return NULL;
504 }
505
506 ret = radeon_set_screen_flags(screen, device_id);
507 if (ret == -1) {
508 free(screen);
509 return NULL;
510 }
511
512 if (getenv("RADEON_NO_TCL"))
513 screen->chip_flags &= ~RADEON_CHIPSET_TCL;
514
515 i = 0;
516 screen->extensions[i++] = &dri2ConfigQueryExtension.base;
517
518 #if defined(RADEON_R100)
519 screen->extensions[i++] = &radeonTexBufferExtension.base;
520 #elif defined(RADEON_R200)
521 screen->extensions[i++] = &r200TexBufferExtension.base;
522 #endif
523
524 screen->extensions[i++] = &radeonFlushExtension.base;
525 screen->extensions[i++] = &radeonImageExtension.base;
526
527 screen->extensions[i++] = NULL;
528 sPriv->extensions = screen->extensions;
529
530 screen->driScreen = sPriv;
531 screen->bom = radeon_bo_manager_gem_ctor(sPriv->fd);
532 if (screen->bom == NULL) {
533 free(screen);
534 return NULL;
535 }
536 return screen;
537 }
538
539 /* Destroy the device specific screen private data struct.
540 */
541 static void
542 radeonDestroyScreen( __DRIscreen *sPriv )
543 {
544 radeonScreenPtr screen = (radeonScreenPtr)sPriv->driverPrivate;
545
546 if (!screen)
547 return;
548
549 #ifdef RADEON_BO_TRACK
550 radeon_tracker_print(&screen->bom->tracker, stderr);
551 #endif
552 radeon_bo_manager_gem_dtor(screen->bom);
553
554 /* free all option information */
555 driDestroyOptionInfo (&screen->optionCache);
556
557 free( screen );
558 sPriv->driverPrivate = NULL;
559 }
560
561
562 /* Initialize the driver specific screen private data.
563 */
564 static GLboolean
565 radeonInitDriver( __DRIscreen *sPriv )
566 {
567 sPriv->driverPrivate = (void *) radeonCreateScreen2( sPriv );
568 if ( !sPriv->driverPrivate ) {
569 radeonDestroyScreen( sPriv );
570 return GL_FALSE;
571 }
572
573 return GL_TRUE;
574 }
575
576
577
578 /**
579 * Create the Mesa framebuffer and renderbuffers for a given window/drawable.
580 *
581 * \todo This function (and its interface) will need to be updated to support
582 * pbuffers.
583 */
584 static GLboolean
585 radeonCreateBuffer( __DRIscreen *driScrnPriv,
586 __DRIdrawable *driDrawPriv,
587 const struct gl_config *mesaVis,
588 GLboolean isPixmap )
589 {
590 radeonScreenPtr screen = (radeonScreenPtr) driScrnPriv->driverPrivate;
591
592 const GLboolean swDepth = GL_FALSE;
593 const GLboolean swAlpha = GL_FALSE;
594 const GLboolean swAccum = mesaVis->accumRedBits > 0;
595 const GLboolean swStencil = mesaVis->stencilBits > 0 &&
596 mesaVis->depthBits != 24;
597 gl_format rgbFormat;
598 struct radeon_framebuffer *rfb;
599
600 if (isPixmap)
601 return GL_FALSE; /* not implemented */
602
603 rfb = CALLOC_STRUCT(radeon_framebuffer);
604 if (!rfb)
605 return GL_FALSE;
606
607 _mesa_initialize_window_framebuffer(&rfb->base, mesaVis);
608
609 if (mesaVis->redBits == 5)
610 rgbFormat = _mesa_little_endian() ? MESA_FORMAT_RGB565 : MESA_FORMAT_RGB565_REV;
611 else if (mesaVis->alphaBits == 0)
612 rgbFormat = _mesa_little_endian() ? MESA_FORMAT_XRGB8888 : MESA_FORMAT_XRGB8888_REV;
613 else
614 rgbFormat = _mesa_little_endian() ? MESA_FORMAT_ARGB8888 : MESA_FORMAT_ARGB8888_REV;
615
616 /* front color renderbuffer */
617 rfb->color_rb[0] = radeon_create_renderbuffer(rgbFormat, driDrawPriv);
618 _mesa_add_renderbuffer(&rfb->base, BUFFER_FRONT_LEFT, &rfb->color_rb[0]->base.Base);
619 rfb->color_rb[0]->has_surface = 1;
620
621 /* back color renderbuffer */
622 if (mesaVis->doubleBufferMode) {
623 rfb->color_rb[1] = radeon_create_renderbuffer(rgbFormat, driDrawPriv);
624 _mesa_add_renderbuffer(&rfb->base, BUFFER_BACK_LEFT, &rfb->color_rb[1]->base.Base);
625 rfb->color_rb[1]->has_surface = 1;
626 }
627
628 if (mesaVis->depthBits == 24) {
629 if (mesaVis->stencilBits == 8) {
630 struct radeon_renderbuffer *depthStencilRb =
631 radeon_create_renderbuffer(MESA_FORMAT_S8_Z24, driDrawPriv);
632 _mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depthStencilRb->base.Base);
633 _mesa_add_renderbuffer(&rfb->base, BUFFER_STENCIL, &depthStencilRb->base.Base);
634 depthStencilRb->has_surface = screen->depthHasSurface;
635 } else {
636 /* depth renderbuffer */
637 struct radeon_renderbuffer *depth =
638 radeon_create_renderbuffer(MESA_FORMAT_X8_Z24, driDrawPriv);
639 _mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depth->base.Base);
640 depth->has_surface = screen->depthHasSurface;
641 }
642 } else if (mesaVis->depthBits == 16) {
643 /* just 16-bit depth buffer, no hw stencil */
644 struct radeon_renderbuffer *depth =
645 radeon_create_renderbuffer(MESA_FORMAT_Z16, driDrawPriv);
646 _mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depth->base.Base);
647 depth->has_surface = screen->depthHasSurface;
648 }
649
650 _swrast_add_soft_renderbuffers(&rfb->base,
651 GL_FALSE, /* color */
652 swDepth,
653 swStencil,
654 swAccum,
655 swAlpha,
656 GL_FALSE /* aux */);
657 driDrawPriv->driverPrivate = (void *) rfb;
658
659 return (driDrawPriv->driverPrivate != NULL);
660 }
661
662
663 static void radeon_cleanup_renderbuffers(struct radeon_framebuffer *rfb)
664 {
665 struct radeon_renderbuffer *rb;
666
667 rb = rfb->color_rb[0];
668 if (rb && rb->bo) {
669 radeon_bo_unref(rb->bo);
670 rb->bo = NULL;
671 }
672 rb = rfb->color_rb[1];
673 if (rb && rb->bo) {
674 radeon_bo_unref(rb->bo);
675 rb->bo = NULL;
676 }
677 rb = radeon_get_renderbuffer(&rfb->base, BUFFER_DEPTH);
678 if (rb && rb->bo) {
679 radeon_bo_unref(rb->bo);
680 rb->bo = NULL;
681 }
682 }
683
684 void
685 radeonDestroyBuffer(__DRIdrawable *driDrawPriv)
686 {
687 struct radeon_framebuffer *rfb;
688 if (!driDrawPriv)
689 return;
690
691 rfb = (void*)driDrawPriv->driverPrivate;
692 if (!rfb)
693 return;
694 radeon_cleanup_renderbuffers(rfb);
695 _mesa_reference_framebuffer((struct gl_framebuffer **)(&(driDrawPriv->driverPrivate)), NULL);
696 }
697
698 /**
699 * This is the driver specific part of the createNewScreen entry point.
700 * Called when using DRI2.
701 *
702 * \return the struct gl_config supported by this driver
703 */
704 static const
705 __DRIconfig **radeonInitScreen2(__DRIscreen *psp)
706 {
707 static const gl_format formats[3] = {
708 MESA_FORMAT_RGB565,
709 MESA_FORMAT_XRGB8888,
710 MESA_FORMAT_ARGB8888
711 };
712 /* GLX_SWAP_COPY_OML is only supported because the Intel driver doesn't
713 * support pageflipping at all.
714 */
715 static const GLenum back_buffer_modes[] = {
716 GLX_NONE, GLX_SWAP_UNDEFINED_OML, /*, GLX_SWAP_COPY_OML*/
717 };
718 uint8_t depth_bits[4], stencil_bits[4], msaa_samples_array[1];
719 int color;
720 __DRIconfig **configs = NULL;
721
722 psp->max_gl_compat_version = 13;
723 psp->max_gl_es1_version = 11;
724
725 if (!radeonInitDriver(psp)) {
726 return NULL;
727 }
728 depth_bits[0] = 0;
729 stencil_bits[0] = 0;
730 depth_bits[1] = 16;
731 stencil_bits[1] = 0;
732 depth_bits[2] = 24;
733 stencil_bits[2] = 0;
734 depth_bits[3] = 24;
735 stencil_bits[3] = 8;
736
737 msaa_samples_array[0] = 0;
738
739 for (color = 0; color < ARRAY_SIZE(formats); color++) {
740 __DRIconfig **new_configs;
741
742 new_configs = driCreateConfigs(formats[color],
743 depth_bits,
744 stencil_bits,
745 ARRAY_SIZE(depth_bits),
746 back_buffer_modes,
747 ARRAY_SIZE(back_buffer_modes),
748 msaa_samples_array,
749 ARRAY_SIZE(msaa_samples_array),
750 GL_TRUE);
751 configs = driConcatConfigs(configs, new_configs);
752 }
753
754 if (configs == NULL) {
755 fprintf(stderr, "[%s:%u] Error creating FBConfig!\n", __func__,
756 __LINE__);
757 return NULL;
758 }
759
760 return (const __DRIconfig **)configs;
761 }
762
763 const struct __DriverAPIRec driDriverAPI = {
764 .InitScreen = radeonInitScreen2,
765 .DestroyScreen = radeonDestroyScreen,
766 #if defined(RADEON_R200)
767 .CreateContext = r200CreateContext,
768 .DestroyContext = r200DestroyContext,
769 #else
770 .CreateContext = r100CreateContext,
771 .DestroyContext = radeonDestroyContext,
772 #endif
773 .CreateBuffer = radeonCreateBuffer,
774 .DestroyBuffer = radeonDestroyBuffer,
775 .MakeCurrent = radeonMakeCurrent,
776 .UnbindContext = radeonUnbindContext,
777 };
778
779 /* This is the table of extensions that the loader will dlsym() for. */
780 PUBLIC const __DRIextension *__driDriverExtensions[] = {
781 &driCoreExtension.base,
782 &driDRI2Extension.base,
783 NULL
784 };