src/mesa/drivers/dri/radeon/radeon_screen.c

   1 /**************************************************************************
   2
   3 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
   4                      VA Linux Systems Inc., Fremont, California.
   5
   6 All Rights Reserved.
   7
   8 Permission is hereby granted, free of charge, to any person obtaining
   9 a copy of this software and associated documentation files (the
  10 "Software"), to deal in the Software without restriction, including
  11 without limitation the rights to use, copy, modify, merge, publish,
  12 distribute, sublicense, and/or sell copies of the Software, and to
  13 permit persons to whom the Software is furnished to do so, subject to
  14 the following conditions:
  15
  16 The above copyright notice and this permission notice (including the
  17 next paragraph) shall be included in all copies or substantial
  18 portions of the Software.
  19
  20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  27
  28 **************************************************************************/
  29
  30 /**
  31  * \file radeon_screen.c
  32  * Screen initialization functions for the Radeon driver.
  33  *
  34  * \author Kevin E. Martin <martin@valinux.com>
  35  * \author  Gareth Hughes <gareth@valinux.com>
  36  */
  37
  38 #include <errno.h>
  39 #include "main/glheader.h"
  40 #include "main/imports.h"
  41 #include "main/mtypes.h"
  42 #include "main/framebuffer.h"
  43 #include "main/renderbuffer.h"
  44 #include "main/fbobject.h"
  45 #include "swrast/s_renderbuffer.h"
  46
  47 #include "radeon_chipset.h"
  48 #include "radeon_macros.h"
  49 #include "radeon_screen.h"
  50 #include "radeon_common.h"
  51 #include "radeon_common_context.h"
  52 #if defined(RADEON_R100)
  53 #include "radeon_context.h"
  54 #include "radeon_tex.h"
  55 #elif defined(RADEON_R200)
  56 #include "r200_context.h"
  57 #include "r200_tex.h"
  58 #endif
  59
  60 #include "utils.h"
  61
  62 #include "GL/internal/dri_interface.h"
  63
  64 /* Radeon configuration
  65  */
  66 #include "xmlpool.h"
  67
  68 #define DRI_CONF_COMMAND_BUFFER_SIZE(def,min,max) \
  69 DRI_CONF_OPT_BEGIN_V(command_buffer_size,int,def, # min ":" # max ) \
  70         DRI_CONF_DESC(en,"Size of command buffer (in KB)") \
  71         DRI_CONF_DESC(de,"Grösse des Befehlspuffers (in KB)") \
  72 DRI_CONF_OPT_END
  73
  74 #if defined(RADEON_R100)        /* R100 */
  75 static const __DRIconfigOptionsExtension radeon_config_options = {
  76    .base = { __DRI_CONFIG_OPTIONS, 1 },
  77    .xml =
  78 DRI_CONF_BEGIN
  79     DRI_CONF_SECTION_PERFORMANCE
  80         DRI_CONF_TCL_MODE(DRI_CONF_TCL_CODEGEN)
  81         DRI_CONF_FTHROTTLE_MODE(DRI_CONF_FTHROTTLE_IRQS)
  82         DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_DEF_INTERVAL_0)
  83         DRI_CONF_MAX_TEXTURE_UNITS(3,2,3)
  84         DRI_CONF_HYPERZ("false")
  85         DRI_CONF_COMMAND_BUFFER_SIZE(8, 8, 32)
  86     DRI_CONF_SECTION_END
  87     DRI_CONF_SECTION_QUALITY
  88         DRI_CONF_TEXTURE_DEPTH(DRI_CONF_TEXTURE_DEPTH_FB)
  89         DRI_CONF_DEF_MAX_ANISOTROPY(1.0,"1.0,2.0,4.0,8.0,16.0")
  90         DRI_CONF_NO_NEG_LOD_BIAS("false")
  91         DRI_CONF_FORCE_S3TC_ENABLE("false")
  92         DRI_CONF_COLOR_REDUCTION(DRI_CONF_COLOR_REDUCTION_DITHER)
  93         DRI_CONF_ROUND_MODE(DRI_CONF_ROUND_TRUNC)
  94         DRI_CONF_DITHER_MODE(DRI_CONF_DITHER_XERRORDIFF)
  95     DRI_CONF_SECTION_END
  96     DRI_CONF_SECTION_DEBUG
  97         DRI_CONF_NO_RAST("false")
  98     DRI_CONF_SECTION_END
  99 DRI_CONF_END
 100 };
 101
 102 #elif defined(RADEON_R200)
 103 static const __DRIconfigOptionsExtension radeon_config_options = {
 104    .base = { __DRI_CONFIG_OPTIONS, 1 },
 105    .xml =
 106 DRI_CONF_BEGIN
 107     DRI_CONF_SECTION_PERFORMANCE
 108         DRI_CONF_TCL_MODE(DRI_CONF_TCL_CODEGEN)
 109         DRI_CONF_FTHROTTLE_MODE(DRI_CONF_FTHROTTLE_IRQS)
 110         DRI_CONF_VBLANK_MODE(DRI_CONF_VBLANK_DEF_INTERVAL_0)
 111         DRI_CONF_MAX_TEXTURE_UNITS(6,2,6)
 112         DRI_CONF_HYPERZ("false")
 113         DRI_CONF_COMMAND_BUFFER_SIZE(8, 8, 32)
 114     DRI_CONF_SECTION_END
 115     DRI_CONF_SECTION_QUALITY
 116         DRI_CONF_TEXTURE_DEPTH(DRI_CONF_TEXTURE_DEPTH_FB)
 117         DRI_CONF_DEF_MAX_ANISOTROPY(1.0,"1.0,2.0,4.0,8.0,16.0")
 118         DRI_CONF_NO_NEG_LOD_BIAS("false")
 119         DRI_CONF_FORCE_S3TC_ENABLE("false")
 120         DRI_CONF_COLOR_REDUCTION(DRI_CONF_COLOR_REDUCTION_DITHER)
 121         DRI_CONF_ROUND_MODE(DRI_CONF_ROUND_TRUNC)
 122         DRI_CONF_DITHER_MODE(DRI_CONF_DITHER_XERRORDIFF)
 123         DRI_CONF_TEXTURE_BLEND_QUALITY(1.0,"0.0:1.0")
 124     DRI_CONF_SECTION_END
 125     DRI_CONF_SECTION_DEBUG
 126         DRI_CONF_NO_RAST("false")
 127     DRI_CONF_SECTION_END
 128 DRI_CONF_END
 129 };
 130 #endif
 131
 132 #ifndef RADEON_INFO_TILE_CONFIG
 133 #define RADEON_INFO_TILE_CONFIG 0x6
 134 #endif
 135
 136 static int
 137 radeonGetParam(__DRIscreen *sPriv, int param, void *value)
 138 {
 139   int ret;
 140   drm_radeon_getparam_t gp = { 0 };
 141   struct drm_radeon_info info = { 0 };
 142
 143   if (sPriv->drm_version.major >= 2) {
 144       info.value = (uint64_t)(uintptr_t)value;
 145       switch (param) {
 146       case RADEON_PARAM_DEVICE_ID:
 147           info.request = RADEON_INFO_DEVICE_ID;
 148           break;
 149       case RADEON_PARAM_NUM_GB_PIPES:
 150           info.request = RADEON_INFO_NUM_GB_PIPES;
 151           break;
 152       case RADEON_PARAM_NUM_Z_PIPES:
 153           info.request = RADEON_INFO_NUM_Z_PIPES;
 154           break;
 155       case RADEON_INFO_TILE_CONFIG:
 156           info.request = RADEON_INFO_TILE_CONFIG;
 157           break;
 158       default:
 159           return -EINVAL;
 160       }
 161       ret = drmCommandWriteRead(sPriv->fd, DRM_RADEON_INFO, &info, sizeof(info));
 162   } else {
 163       gp.param = param;
 164       gp.value = value;
 165
 166       ret = drmCommandWriteRead(sPriv->fd, DRM_RADEON_GETPARAM, &gp, sizeof(gp));
 167   }
 168   return ret;
 169 }
 170
 171 #if defined(RADEON_R100)
 172 static const __DRItexBufferExtension radeonTexBufferExtension = {
 173     { __DRI_TEX_BUFFER, __DRI_TEX_BUFFER_VERSION },
 174    radeonSetTexBuffer,
 175    radeonSetTexBuffer2,
 176 };
 177 #elif defined(RADEON_R200)
 178 static const __DRItexBufferExtension r200TexBufferExtension = {
 179     { __DRI_TEX_BUFFER, __DRI_TEX_BUFFER_VERSION },
 180    r200SetTexBuffer,
 181    r200SetTexBuffer2,
 182 };
 183 #endif
 184
 185 static void
 186 radeonDRI2Flush(__DRIdrawable *drawable)
 187 {
 188     radeonContextPtr rmesa;
 189
 190     rmesa = (radeonContextPtr) drawable->driContextPriv->driverPrivate;
 191     radeonFlush(&rmesa->glCtx);
 192 }
 193
 194 static const struct __DRI2flushExtensionRec radeonFlushExtension = {
 195    .base = { __DRI2_FLUSH, 3 },
 196
 197    .flush               = radeonDRI2Flush,
 198    .invalidate          = dri2InvalidateDrawable,
 199 };
 200
 201 static __DRIimage *
 202 radeon_create_image_from_name(__DRIscreen *screen,
 203                               int width, int height, int format,
 204                               int name, int pitch, void *loaderPrivate)
 205 {
 206    __DRIimage *image;
 207    radeonScreenPtr radeonScreen = screen->driverPrivate;
 208
 209    if (name == 0)
 210       return NULL;
 211
 212    image = calloc(1, sizeof *image);
 213    if (image == NULL)
 214       return NULL;
 215
 216    switch (format) {
 217    case __DRI_IMAGE_FORMAT_RGB565:
 218       image->format = MESA_FORMAT_B5G6R5_UNORM;
 219       image->internal_format = GL_RGB;
 220       image->data_type = GL_UNSIGNED_BYTE;
 221       break;
 222    case __DRI_IMAGE_FORMAT_XRGB8888:
 223       image->format = MESA_FORMAT_B8G8R8X8_UNORM;
 224       image->internal_format = GL_RGB;
 225       image->data_type = GL_UNSIGNED_BYTE;
 226       break;
 227    case __DRI_IMAGE_FORMAT_ARGB8888:
 228       image->format = MESA_FORMAT_B8G8R8A8_UNORM;
 229       image->internal_format = GL_RGBA;
 230       image->data_type = GL_UNSIGNED_BYTE;
 231       break;
 232    default:
 233       free(image);
 234       return NULL;
 235    }
 236
 237    image->data = loaderPrivate;
 238    image->cpp = _mesa_get_format_bytes(image->format);
 239    image->width = width;
 240    image->pitch = pitch;
 241    image->height = height;
 242
 243    image->bo = radeon_bo_open(radeonScreen->bom,
 244                               (uint32_t)name,
 245                               image->pitch * image->height * image->cpp,
 246                               0,
 247                               RADEON_GEM_DOMAIN_VRAM,
 248                               0);
 249
 250    if (image->bo == NULL) {
 251       free(image);
 252       return NULL;
 253    }
 254
 255    return image;
 256 }
 257
 258 static __DRIimage *
 259 radeon_create_image_from_renderbuffer(__DRIcontext *context,
 260                                       int renderbuffer, void *loaderPrivate)
 261 {
 262    __DRIimage *image;
 263    radeonContextPtr radeon = context->driverPrivate;
 264    struct gl_renderbuffer *rb;
 265    struct radeon_renderbuffer *rrb;
 266
 267    rb = _mesa_lookup_renderbuffer(&radeon->glCtx, renderbuffer);
 268    if (!rb) {
 269       _mesa_error(&radeon->glCtx,
 270                   GL_INVALID_OPERATION, "glRenderbufferExternalMESA");
 271       return NULL;
 272    }
 273
 274    rrb = radeon_renderbuffer(rb);
 275    image = calloc(1, sizeof *image);
 276    if (image == NULL)
 277       return NULL;
 278
 279    image->internal_format = rb->InternalFormat;
 280    image->format = rb->Format;
 281    image->cpp = rrb->cpp;
 282    image->data_type = GL_UNSIGNED_BYTE;
 283    image->data = loaderPrivate;
 284    radeon_bo_ref(rrb->bo);
 285    image->bo = rrb->bo;
 286
 287    image->width = rb->Width;
 288    image->height = rb->Height;
 289    image->pitch = rrb->pitch / image->cpp;
 290
 291    return image;
 292 }
 293
 294 static void
 295 radeon_destroy_image(__DRIimage *image)
 296 {
 297    radeon_bo_unref(image->bo);
 298    free(image);
 299 }
 300
 301 static __DRIimage *
 302 radeon_create_image(__DRIscreen *screen,
 303                     int width, int height, int format,
 304                     unsigned int use,
 305                     void *loaderPrivate)
 306 {
 307    __DRIimage *image;
 308    radeonScreenPtr radeonScreen = screen->driverPrivate;
 309
 310    image = calloc(1, sizeof *image);
 311    if (image == NULL)
 312       return NULL;
 313
 314    image->dri_format = format;
 315
 316    switch (format) {
 317    case __DRI_IMAGE_FORMAT_RGB565:
 318       image->format = MESA_FORMAT_B5G6R5_UNORM;
 319       image->internal_format = GL_RGB;
 320       image->data_type = GL_UNSIGNED_BYTE;
 321       break;
 322    case __DRI_IMAGE_FORMAT_XRGB8888:
 323       image->format = MESA_FORMAT_B8G8R8X8_UNORM;
 324       image->internal_format = GL_RGB;
 325       image->data_type = GL_UNSIGNED_BYTE;
 326       break;
 327    case __DRI_IMAGE_FORMAT_ARGB8888:
 328       image->format = MESA_FORMAT_B8G8R8A8_UNORM;
 329       image->internal_format = GL_RGBA;
 330       image->data_type = GL_UNSIGNED_BYTE;
 331       break;
 332    default:
 333       free(image);
 334       return NULL;
 335    }
 336
 337    image->data = loaderPrivate;
 338    image->cpp = _mesa_get_format_bytes(image->format);
 339    image->width = width;
 340    image->height = height;
 341    image->pitch = ((image->cpp * image->width + 255) & ~255) / image->cpp;
 342
 343    image->bo = radeon_bo_open(radeonScreen->bom,
 344                               0,
 345                               image->pitch * image->height * image->cpp,
 346                               0,
 347                               RADEON_GEM_DOMAIN_VRAM,
 348                               0);
 349
 350    if (image->bo == NULL) {
 351       free(image);
 352       return NULL;
 353    }
 354
 355    return image;
 356 }
 357
 358 static GLboolean
 359 radeon_query_image(__DRIimage *image, int attrib, int *value)
 360 {
 361    switch (attrib) {
 362    case __DRI_IMAGE_ATTRIB_STRIDE:
 363       *value = image->pitch * image->cpp;
 364       return GL_TRUE;
 365    case __DRI_IMAGE_ATTRIB_HANDLE:
 366       *value = image->bo->handle;
 367       return GL_TRUE;
 368    case __DRI_IMAGE_ATTRIB_NAME:
 369       radeon_gem_get_kernel_name(image->bo, (uint32_t *) value);
 370       return GL_TRUE;
 371    default:
 372       return GL_FALSE;
 373    }
 374 }
 375
 376 static struct __DRIimageExtensionRec radeonImageExtension = {
 377     { __DRI_IMAGE, 1 },
 378    radeon_create_image_from_name,
 379    radeon_create_image_from_renderbuffer,
 380    radeon_destroy_image,
 381    radeon_create_image,
 382    radeon_query_image
 383 };
 384
 385 static int radeon_set_screen_flags(radeonScreenPtr screen, int device_id)
 386 {
 387    screen->device_id = device_id;
 388    screen->chip_flags = 0;
 389    switch ( device_id ) {
 390 #if defined(RADEON_R100)
 391    case PCI_CHIP_RN50_515E:
 392    case PCI_CHIP_RN50_5969:
 393         return -1;
 394
 395    case PCI_CHIP_RADEON_LY:
 396    case PCI_CHIP_RADEON_LZ:
 397    case PCI_CHIP_RADEON_QY:
 398    case PCI_CHIP_RADEON_QZ:
 399       screen->chip_family = CHIP_FAMILY_RV100;
 400       break;
 401
 402    case PCI_CHIP_RS100_4136:
 403    case PCI_CHIP_RS100_4336:
 404       screen->chip_family = CHIP_FAMILY_RS100;
 405       break;
 406
 407    case PCI_CHIP_RS200_4137:
 408    case PCI_CHIP_RS200_4337:
 409    case PCI_CHIP_RS250_4237:
 410    case PCI_CHIP_RS250_4437:
 411       screen->chip_family = CHIP_FAMILY_RS200;
 412       break;
 413
 414    case PCI_CHIP_RADEON_QD:
 415    case PCI_CHIP_RADEON_QE:
 416    case PCI_CHIP_RADEON_QF:
 417    case PCI_CHIP_RADEON_QG:
 418       /* all original radeons (7200) presumably have a stencil op bug */
 419       screen->chip_family = CHIP_FAMILY_R100;
 420       screen->chip_flags = RADEON_CHIPSET_TCL | RADEON_CHIPSET_BROKEN_STENCIL | RADEON_CHIPSET_DEPTH_ALWAYS_TILED;
 421       break;
 422
 423    case PCI_CHIP_RV200_QW:
 424    case PCI_CHIP_RV200_QX:
 425    case PCI_CHIP_RADEON_LW:
 426    case PCI_CHIP_RADEON_LX:
 427       screen->chip_family = CHIP_FAMILY_RV200;
 428       screen->chip_flags = RADEON_CHIPSET_TCL | RADEON_CHIPSET_DEPTH_ALWAYS_TILED;
 429       break;
 430
 431 #elif defined(RADEON_R200)
 432    case PCI_CHIP_R200_BB:
 433    case PCI_CHIP_R200_QH:
 434    case PCI_CHIP_R200_QL:
 435    case PCI_CHIP_R200_QM:
 436       screen->chip_family = CHIP_FAMILY_R200;
 437       screen->chip_flags = RADEON_CHIPSET_TCL | RADEON_CHIPSET_DEPTH_ALWAYS_TILED;
 438       break;
 439
 440    case PCI_CHIP_RV250_If:
 441    case PCI_CHIP_RV250_Ig:
 442    case PCI_CHIP_RV250_Ld:
 443    case PCI_CHIP_RV250_Lf:
 444    case PCI_CHIP_RV250_Lg:
 445       screen->chip_family = CHIP_FAMILY_RV250;
 446       screen->chip_flags = R200_CHIPSET_YCBCR_BROKEN | RADEON_CHIPSET_TCL | RADEON_CHIPSET_DEPTH_ALWAYS_TILED;
 447       break;
 448
 449    case PCI_CHIP_RV280_4C6E:
 450    case PCI_CHIP_RV280_5960:
 451    case PCI_CHIP_RV280_5961:
 452    case PCI_CHIP_RV280_5962:
 453    case PCI_CHIP_RV280_5964:
 454    case PCI_CHIP_RV280_5965:
 455    case PCI_CHIP_RV280_5C61:
 456    case PCI_CHIP_RV280_5C63:
 457       screen->chip_family = CHIP_FAMILY_RV280;
 458       screen->chip_flags = RADEON_CHIPSET_TCL | RADEON_CHIPSET_DEPTH_ALWAYS_TILED;
 459       break;
 460
 461    case PCI_CHIP_RS300_5834:
 462    case PCI_CHIP_RS300_5835:
 463    case PCI_CHIP_RS350_7834:
 464    case PCI_CHIP_RS350_7835:
 465       screen->chip_family = CHIP_FAMILY_RS300;
 466       screen->chip_flags = RADEON_CHIPSET_DEPTH_ALWAYS_TILED;
 467       break;
 468 #endif
 469
 470    default:
 471       fprintf(stderr, "unknown chip id 0x%x, can't guess.\n",
 472               device_id);
 473       return -1;
 474    }
 475
 476    return 0;
 477 }
 478
 479 static radeonScreenPtr
 480 radeonCreateScreen2(__DRIscreen *sPriv)
 481 {
 482    radeonScreenPtr screen;
 483    int i;
 484    int ret;
 485    uint32_t device_id = 0;
 486
 487    /* Allocate the private area */
 488    screen = calloc(1, sizeof(*screen));
 489    if ( !screen ) {
 490       fprintf(stderr, "%s: Could not allocate memory for screen structure", __FUNCTION__);
 491       fprintf(stderr, "leaving here\n");
 492       return NULL;
 493    }
 494
 495    radeon_init_debug();
 496
 497    /* parse information in __driConfigOptions */
 498    driParseOptionInfo (&screen->optionCache, radeon_config_options.xml);
 499
 500    screen->chip_flags = 0;
 501
 502    screen->irq = 1;
 503
 504    ret = radeonGetParam(sPriv, RADEON_PARAM_DEVICE_ID, &device_id);
 505    if (ret) {
 506      free( screen );
 507      fprintf(stderr, "drm_radeon_getparam_t (RADEON_PARAM_DEVICE_ID): %d\n", ret);
 508      return NULL;
 509    }
 510
 511    ret = radeon_set_screen_flags(screen, device_id);
 512    if (ret == -1) {
 513      free(screen);
 514      return NULL;
 515    }
 516
 517    if (getenv("RADEON_NO_TCL"))
 518            screen->chip_flags &= ~RADEON_CHIPSET_TCL;
 519
 520    i = 0;
 521    screen->extensions[i++] = &dri2ConfigQueryExtension.base;
 522
 523 #if defined(RADEON_R100)
 524    screen->extensions[i++] = &radeonTexBufferExtension.base;
 525 #elif defined(RADEON_R200)
 526    screen->extensions[i++] = &r200TexBufferExtension.base;
 527 #endif
 528
 529    screen->extensions[i++] = &radeonFlushExtension.base;
 530    screen->extensions[i++] = &radeonImageExtension.base;
 531
 532    screen->extensions[i++] = NULL;
 533    sPriv->extensions = screen->extensions;
 534
 535    screen->driScreen = sPriv;
 536    screen->bom = radeon_bo_manager_gem_ctor(sPriv->fd);
 537    if (screen->bom == NULL) {
 538        free(screen);
 539        return NULL;
 540    }
 541    return screen;
 542 }
 543
 544 /* Destroy the device specific screen private data struct.
 545  */
 546 static void
 547 radeonDestroyScreen( __DRIscreen *sPriv )
 548 {
 549     radeonScreenPtr screen = (radeonScreenPtr)sPriv->driverPrivate;
 550
 551     if (!screen)
 552         return;
 553
 554 #ifdef RADEON_BO_TRACK
 555     radeon_tracker_print(&screen->bom->tracker, stderr);
 556 #endif
 557     radeon_bo_manager_gem_dtor(screen->bom);
 558
 559     /* free all option information */
 560     driDestroyOptionInfo (&screen->optionCache);
 561
 562     free( screen );
 563     sPriv->driverPrivate = NULL;
 564 }
 565
 566
 567 /* Initialize the driver specific screen private data.
 568  */
 569 static GLboolean
 570 radeonInitDriver( __DRIscreen *sPriv )
 571 {
 572     sPriv->driverPrivate = (void *) radeonCreateScreen2( sPriv );
 573     if ( !sPriv->driverPrivate ) {
 574         radeonDestroyScreen( sPriv );
 575         return GL_FALSE;
 576     }
 577
 578     return GL_TRUE;
 579 }
 580
 581
 582
 583 /**
 584  * Create the Mesa framebuffer and renderbuffers for a given window/drawable.
 585  *
 586  * \todo This function (and its interface) will need to be updated to support
 587  * pbuffers.
 588  */
 589 static GLboolean
 590 radeonCreateBuffer( __DRIscreen *driScrnPriv,
 591                     __DRIdrawable *driDrawPriv,
 592                     const struct gl_config *mesaVis,
 593                     GLboolean isPixmap )
 594 {
 595     radeonScreenPtr screen = (radeonScreenPtr) driScrnPriv->driverPrivate;
 596
 597     const GLboolean swDepth = GL_FALSE;
 598     const GLboolean swAlpha = GL_FALSE;
 599     const GLboolean swAccum = mesaVis->accumRedBits > 0;
 600     const GLboolean swStencil = mesaVis->stencilBits > 0 &&
 601         mesaVis->depthBits != 24;
 602     mesa_format rgbFormat;
 603     struct radeon_framebuffer *rfb;
 604
 605     if (isPixmap)
 606       return GL_FALSE; /* not implemented */
 607
 608     rfb = CALLOC_STRUCT(radeon_framebuffer);
 609     if (!rfb)
 610       return GL_FALSE;
 611
 612     _mesa_initialize_window_framebuffer(&rfb->base, mesaVis);
 613
 614     if (mesaVis->redBits == 5)
 615         rgbFormat = _mesa_little_endian() ? MESA_FORMAT_B5G6R5_UNORM : MESA_FORMAT_R5G6B5_UNORM;
 616     else if (mesaVis->alphaBits == 0)
 617         rgbFormat = _mesa_little_endian() ? MESA_FORMAT_B8G8R8X8_UNORM : MESA_FORMAT_X8R8G8B8_UNORM;
 618     else
 619         rgbFormat = _mesa_little_endian() ? MESA_FORMAT_B8G8R8A8_UNORM : MESA_FORMAT_A8R8G8B8_UNORM;
 620
 621     /* front color renderbuffer */
 622     rfb->color_rb[0] = radeon_create_renderbuffer(rgbFormat, driDrawPriv);
 623     _mesa_add_renderbuffer(&rfb->base, BUFFER_FRONT_LEFT, &rfb->color_rb[0]->base.Base);
 624     rfb->color_rb[0]->has_surface = 1;
 625
 626     /* back color renderbuffer */
 627     if (mesaVis->doubleBufferMode) {
 628       rfb->color_rb[1] = radeon_create_renderbuffer(rgbFormat, driDrawPriv);
 629         _mesa_add_renderbuffer(&rfb->base, BUFFER_BACK_LEFT, &rfb->color_rb[1]->base.Base);
 630         rfb->color_rb[1]->has_surface = 1;
 631     }
 632
 633     if (mesaVis->depthBits == 24) {
 634       if (mesaVis->stencilBits == 8) {
 635         struct radeon_renderbuffer *depthStencilRb =
 636            radeon_create_renderbuffer(MESA_FORMAT_Z24_UNORM_S8_UINT, driDrawPriv);
 637         _mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depthStencilRb->base.Base);
 638         _mesa_add_renderbuffer(&rfb->base, BUFFER_STENCIL, &depthStencilRb->base.Base);
 639         depthStencilRb->has_surface = screen->depthHasSurface;
 640       } else {
 641         /* depth renderbuffer */
 642         struct radeon_renderbuffer *depth =
 643            radeon_create_renderbuffer(MESA_FORMAT_Z24_UNORM_X8_UINT, driDrawPriv);
 644         _mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depth->base.Base);
 645         depth->has_surface = screen->depthHasSurface;
 646       }
 647     } else if (mesaVis->depthBits == 16) {
 648         /* just 16-bit depth buffer, no hw stencil */
 649         struct radeon_renderbuffer *depth =
 650            radeon_create_renderbuffer(MESA_FORMAT_Z_UNORM16, driDrawPriv);
 651         _mesa_add_renderbuffer(&rfb->base, BUFFER_DEPTH, &depth->base.Base);
 652         depth->has_surface = screen->depthHasSurface;
 653     }
 654
 655     _swrast_add_soft_renderbuffers(&rfb->base,
 656             GL_FALSE, /* color */
 657             swDepth,
 658             swStencil,
 659             swAccum,
 660             swAlpha,
 661             GL_FALSE /* aux */);
 662     driDrawPriv->driverPrivate = (void *) rfb;
 663
 664     return (driDrawPriv->driverPrivate != NULL);
 665 }
 666
 667
 668 static void radeon_cleanup_renderbuffers(struct radeon_framebuffer *rfb)
 669 {
 670         struct radeon_renderbuffer *rb;
 671
 672         rb = rfb->color_rb[0];
 673         if (rb && rb->bo) {
 674                 radeon_bo_unref(rb->bo);
 675                 rb->bo = NULL;
 676         }
 677         rb = rfb->color_rb[1];
 678         if (rb && rb->bo) {
 679                 radeon_bo_unref(rb->bo);
 680                 rb->bo = NULL;
 681         }
 682         rb = radeon_get_renderbuffer(&rfb->base, BUFFER_DEPTH);
 683         if (rb && rb->bo) {
 684                 radeon_bo_unref(rb->bo);
 685                 rb->bo = NULL;
 686         }
 687 }
 688
 689 void
 690 radeonDestroyBuffer(__DRIdrawable *driDrawPriv)
 691 {
 692     struct radeon_framebuffer *rfb;
 693     if (!driDrawPriv)
 694         return;
 695
 696     rfb = (void*)driDrawPriv->driverPrivate;
 697     if (!rfb)
 698         return;
 699     radeon_cleanup_renderbuffers(rfb);
 700     _mesa_reference_framebuffer((struct gl_framebuffer **)(&(driDrawPriv->driverPrivate)), NULL);
 701 }
 702
 703 /**
 704  * This is the driver specific part of the createNewScreen entry point.
 705  * Called when using DRI2.
 706  *
 707  * \return the struct gl_config supported by this driver
 708  */
 709 static const
 710 __DRIconfig **radeonInitScreen2(__DRIscreen *psp)
 711 {
 712    static const mesa_format formats[3] = {
 713       MESA_FORMAT_B5G6R5_UNORM,
 714       MESA_FORMAT_B8G8R8X8_UNORM,
 715       MESA_FORMAT_B8G8R8A8_UNORM
 716    };
 717    /* GLX_SWAP_COPY_OML is only supported because the Intel driver doesn't
 718     * support pageflipping at all.
 719     */
 720    static const GLenum back_buffer_modes[] = {
 721      GLX_NONE, GLX_SWAP_UNDEFINED_OML, /*, GLX_SWAP_COPY_OML*/
 722    };
 723    uint8_t depth_bits[4], stencil_bits[4], msaa_samples_array[1];
 724    int color;
 725    __DRIconfig **configs = NULL;
 726
 727    psp->max_gl_compat_version = 13;
 728    psp->max_gl_es1_version = 11;
 729
 730    if (!radeonInitDriver(psp)) {
 731        return NULL;
 732     }
 733    depth_bits[0] = 0;
 734    stencil_bits[0] = 0;
 735    depth_bits[1] = 16;
 736    stencil_bits[1] = 0;
 737    depth_bits[2] = 24;
 738    stencil_bits[2] = 0;
 739    depth_bits[3] = 24;
 740    stencil_bits[3] = 8;
 741
 742    msaa_samples_array[0] = 0;
 743
 744    for (color = 0; color < ARRAY_SIZE(formats); color++) {
 745       __DRIconfig **new_configs;
 746
 747       new_configs = driCreateConfigs(formats[color],
 748                                      depth_bits,
 749                                      stencil_bits,
 750                                      ARRAY_SIZE(depth_bits),
 751                                      back_buffer_modes,
 752                                      ARRAY_SIZE(back_buffer_modes),
 753                                      msaa_samples_array,
 754                                      ARRAY_SIZE(msaa_samples_array),
 755                                      GL_TRUE);
 756       configs = driConcatConfigs(configs, new_configs);
 757    }
 758
 759    if (configs == NULL) {
 760       fprintf(stderr, "[%s:%u] Error creating FBConfig!\n", __func__,
 761               __LINE__);
 762       return NULL;
 763    }
 764
 765    return (const __DRIconfig **)configs;
 766 }
 767
 768 static const struct __DriverAPIRec radeon_driver_api = {
 769    .InitScreen      = radeonInitScreen2,
 770    .DestroyScreen   = radeonDestroyScreen,
 771 #if defined(RADEON_R200)
 772    .CreateContext   = r200CreateContext,
 773    .DestroyContext  = r200DestroyContext,
 774 #else
 775    .CreateContext   = r100CreateContext,
 776    .DestroyContext  = radeonDestroyContext,
 777 #endif
 778    .CreateBuffer    = radeonCreateBuffer,
 779    .DestroyBuffer   = radeonDestroyBuffer,
 780    .MakeCurrent     = radeonMakeCurrent,
 781    .UnbindContext   = radeonUnbindContext,
 782 };
 783
 784 static const struct __DRIDriverVtableExtensionRec radeon_vtable = {
 785    .base = { __DRI_DRIVER_VTABLE, 1 },
 786    .vtable = &radeon_driver_api,
 787 };
 788
 789 /* This is the table of extensions that the loader will dlsym() for. */
 790 static const __DRIextension *radeon_driver_extensions[] = {
 791     &driCoreExtension.base,
 792     &driDRI2Extension.base,
 793     &radeon_config_options.base,
 794     &radeon_vtable.base,
 795     NULL
 796 };
 797
 798 #ifdef RADEON_R200
 799 PUBLIC const __DRIextension **__driDriverGetExtensions_r200(void)
 800 {
 801    globalDriverAPI = &radeon_driver_api;
 802
 803    return radeon_driver_extensions;
 804 }
 805 #else
 806 PUBLIC const __DRIextension **__driDriverGetExtensions_radeon(void)
 807 {
 808    globalDriverAPI = &radeon_driver_api;
 809
 810    return radeon_driver_extensions;
 811 }
 812 #endif