Added few more stubs so that control reaches to DestroyDevice().
[mesa.git] / src / mesa / drivers / dri / radeon / radeon_screen.h
1 /**************************************************************************
2
3 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
4 VA Linux Systems Inc., Fremont, California.
5
6 All Rights Reserved.
7
8 Permission is hereby granted, free of charge, to any person obtaining
9 a copy of this software and associated documentation files (the
10 "Software"), to deal in the Software without restriction, including
11 without limitation the rights to use, copy, modify, merge, publish,
12 distribute, sublicense, and/or sell copies of the Software, and to
13 permit persons to whom the Software is furnished to do so, subject to
14 the following conditions:
15
16 The above copyright notice and this permission notice (including the
17 next paragraph) shall be included in all copies or substantial
18 portions of the Software.
19
20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27
28 **************************************************************************/
29
30 /*
31 * Authors:
32 * Kevin E. Martin <martin@valinux.com>
33 * Gareth Hughes <gareth@valinux.com>
34 */
35
36 #ifndef __RADEON_SCREEN_H__
37 #define __RADEON_SCREEN_H__
38
39 /*
40 * IMPORTS: these headers contain all the DRI, X and kernel-related
41 * definitions that we need.
42 */
43 #include <xf86drm.h>
44 #include <radeon_drm.h>
45 #include "dri_util.h"
46 #include "radeon_chipset.h"
47 #include "radeon_reg.h"
48 #include "util/xmlconfig.h"
49
50 #define DRI_CONF_COLOR_REDUCTION_ROUND 0
51 #define DRI_CONF_COLOR_REDUCTION_DITHER 1
52 #define DRI_CONF_COLOR_REDUCTION(def) \
53 DRI_CONF_OPT_BEGIN_V(color_reduction,enum,def,"0:1") \
54 DRI_CONF_DESC_BEGIN("Initial color reduction method") \
55 DRI_CONF_ENUM(0,"Round colors") \
56 DRI_CONF_ENUM(1,"Dither colors") \
57 DRI_CONF_DESC_END \
58 DRI_CONF_OPT_END
59
60 #define DRI_CONF_DITHER_XERRORDIFF 0
61 #define DRI_CONF_DITHER_XERRORDIFFRESET 1
62 #define DRI_CONF_DITHER_ORDERED 2
63 #define DRI_CONF_DITHER_MODE(def) \
64 DRI_CONF_OPT_BEGIN_V(dither_mode,enum,def,"0:2") \
65 DRI_CONF_DESC_BEGIN("Color dithering method") \
66 DRI_CONF_ENUM(0,"Horizontal error diffusion") \
67 DRI_CONF_ENUM(1,"Horizontal error diffusion, reset error at line start") \
68 DRI_CONF_ENUM(2,"Ordered 2D color dithering") \
69 DRI_CONF_DESC_END \
70 DRI_CONF_OPT_END
71
72 #define DRI_CONF_ROUND_TRUNC 0
73 #define DRI_CONF_ROUND_ROUND 1
74 #define DRI_CONF_ROUND_MODE(def) \
75 DRI_CONF_OPT_BEGIN_V(round_mode,enum,def,"0:1") \
76 DRI_CONF_DESC_BEGIN("Color rounding method") \
77 DRI_CONF_ENUM(0,"Round color components downward") \
78 DRI_CONF_ENUM(1,"Round to nearest color") \
79 DRI_CONF_DESC_END \
80 DRI_CONF_OPT_END
81
82 #define DRI_CONF_FTHROTTLE_BUSY 0
83 #define DRI_CONF_FTHROTTLE_USLEEPS 1
84 #define DRI_CONF_FTHROTTLE_IRQS 2
85 #define DRI_CONF_FTHROTTLE_MODE(def) \
86 DRI_CONF_OPT_BEGIN_V(fthrottle_mode,enum,def,"0:2") \
87 DRI_CONF_DESC_BEGIN("Method to limit rendering latency") \
88 DRI_CONF_ENUM(0,"Busy waiting for the graphics hardware") \
89 DRI_CONF_ENUM(1,"Sleep for brief intervals while waiting for the graphics hardware") \
90 DRI_CONF_ENUM(2,"Let the graphics hardware emit a software interrupt and sleep") \
91 DRI_CONF_DESC_END \
92 DRI_CONF_OPT_END
93
94 #define DRI_CONF_TEXTURE_DEPTH_FB 0
95 #define DRI_CONF_TEXTURE_DEPTH_32 1
96 #define DRI_CONF_TEXTURE_DEPTH_16 2
97 #define DRI_CONF_TEXTURE_DEPTH_FORCE_16 3
98 #define DRI_CONF_TEXTURE_DEPTH(def) \
99 DRI_CONF_OPT_BEGIN_V(texture_depth,enum,def,"0:3") \
100 DRI_CONF_DESC_BEGIN("Texture color depth") \
101 DRI_CONF_ENUM(0,"Prefer frame buffer color depth") \
102 DRI_CONF_ENUM(1,"Prefer 32 bits per texel") \
103 DRI_CONF_ENUM(2,"Prefer 16 bits per texel") \
104 DRI_CONF_ENUM(3,"Force 16 bits per texel") \
105 DRI_CONF_DESC_END \
106 DRI_CONF_OPT_END
107
108 #define DRI_CONF_TCL_SW 0
109 #define DRI_CONF_TCL_PIPELINED 1
110 #define DRI_CONF_TCL_VTXFMT 2
111 #define DRI_CONF_TCL_CODEGEN 3
112
113 typedef struct {
114 drm_handle_t handle; /* Handle to the DRM region */
115 drmSize size; /* Size of the DRM region */
116 drmAddress map; /* Mapping of the DRM region */
117 } radeonRegionRec, *radeonRegionPtr;
118
119 typedef struct radeon_screen {
120 int chip_family;
121 int chip_flags;
122 int cpp;
123 int card_type;
124 int device_id; /* PCI ID */
125 int AGPMode;
126 unsigned int irq; /* IRQ number (0 means none) */
127
128 unsigned int fbLocation;
129 unsigned int frontOffset;
130 unsigned int frontPitch;
131 unsigned int backOffset;
132 unsigned int backPitch;
133
134 unsigned int depthOffset;
135 unsigned int depthPitch;
136
137 /* Shared texture data */
138 int numTexHeaps;
139 int texOffset[RADEON_NR_TEX_HEAPS];
140 int texSize[RADEON_NR_TEX_HEAPS];
141 int logTexGranularity[RADEON_NR_TEX_HEAPS];
142
143 radeonRegionRec mmio;
144 radeonRegionRec status;
145 radeonRegionRec gartTextures;
146
147 drmBufMapPtr buffers;
148
149 __volatile__ uint32_t *scratch;
150
151 __DRIscreen *driScreen;
152 unsigned int gart_buffer_offset; /* offset in card memory space */
153 unsigned int gart_texture_offset; /* offset in card memory space */
154 unsigned int gart_base;
155
156 GLboolean depthHasSurface;
157
158 /* Configuration cache with default values for all contexts */
159 driOptionCache optionCache;
160
161 int num_gb_pipes;
162 int num_z_pipes;
163 struct radeon_bo_manager *bom;
164
165 } radeonScreenRec, *radeonScreenPtr;
166
167 struct __DRIimageRec {
168 struct radeon_bo *bo;
169 GLenum internal_format;
170 uint32_t dri_format;
171 GLuint format;
172 GLenum data_type;
173 int width, height; /* in pixels */
174 int pitch; /* in pixels */
175 int cpp;
176 void *data;
177 };
178
179 #ifdef RADEON_R200
180 /* These defines are to ensure that r200_dri's symbols don't conflict with
181 * radeon's when linked together.
182 */
183 #define get_radeon_buffer_object r200_get_radeon_buffer_object
184 #define radeonInitBufferObjectFuncs r200_radeonInitBufferObjectFuncs
185 #define radeonDestroyContext r200_radeonDestroyContext
186 #define radeonInitContext r200_radeonInitContext
187 #define radeonMakeCurrent r200_radeonMakeCurrent
188 #define radeon_prepare_render r200_radeon_prepare_render
189 #define radeonUnbindContext r200_radeonUnbindContext
190 #define radeon_update_renderbuffers r200_radeon_update_renderbuffers
191 #define radeonCountStateEmitSize r200_radeonCountStateEmitSize
192 #define radeon_draw_buffer r200_radeon_draw_buffer
193 #define radeonDrawBuffer r200_radeonDrawBuffer
194 #define radeonEmitState r200_radeonEmitState
195 #define radeonFinish r200_radeonFinish
196 #define radeonFlush r200_radeonFlush
197 #define radeonGetAge r200_radeonGetAge
198 #define radeonReadBuffer r200_radeonReadBuffer
199 #define radeonScissor r200_radeonScissor
200 #define radeonSetCliprects r200_radeonSetCliprects
201 #define radeonUpdateScissor r200_radeonUpdateScissor
202 #define radeonUserClear r200_radeonUserClear
203 #define radeon_viewport r200_radeon_viewport
204 #define radeon_window_moved r200_radeon_window_moved
205 #define rcommonBeginBatch r200_rcommonBeginBatch
206 #define rcommonDestroyCmdBuf r200_rcommonDestroyCmdBuf
207 #define rcommonEnsureCmdBufSpace r200_rcommonEnsureCmdBufSpace
208 #define rcommonFlushCmdBuf r200_rcommonFlushCmdBuf
209 #define rcommonFlushCmdBufLocked r200_rcommonFlushCmdBufLocked
210 #define rcommonInitCmdBuf r200_rcommonInitCmdBuf
211 #define radeonAllocDmaRegion r200_radeonAllocDmaRegion
212 #define radeonEmitVec12 r200_radeonEmitVec12
213 #define radeonEmitVec16 r200_radeonEmitVec16
214 #define radeonEmitVec4 r200_radeonEmitVec4
215 #define radeonEmitVec8 r200_radeonEmitVec8
216 #define radeonFreeDmaRegions r200_radeonFreeDmaRegions
217 #define radeon_init_dma r200_radeon_init_dma
218 #define radeonRefillCurrentDmaRegion r200_radeonRefillCurrentDmaRegion
219 #define radeonReleaseArrays r200_radeonReleaseArrays
220 #define radeonReleaseDmaRegions r200_radeonReleaseDmaRegions
221 #define radeonReturnDmaRegion r200_radeonReturnDmaRegion
222 #define rcommonAllocDmaLowVerts r200_rcommonAllocDmaLowVerts
223 #define rcommon_emit_vecfog r200_rcommon_emit_vecfog
224 #define rcommon_emit_vector r200_rcommon_emit_vector
225 #define rcommon_flush_last_swtcl_prim r200_rcommon_flush_last_swtcl_prim
226 #define _radeon_debug_add_indent r200__radeon_debug_add_indent
227 #define _radeon_debug_remove_indent r200__radeon_debug_remove_indent
228 #define radeon_init_debug r200_radeon_init_debug
229 #define _radeon_print r200__radeon_print
230 #define radeon_create_renderbuffer r200_radeon_create_renderbuffer
231 #define radeon_fbo_init r200_radeon_fbo_init
232 #define radeon_renderbuffer_set_bo r200_radeon_renderbuffer_set_bo
233 #define radeonComputeFogBlendFactor r200_radeonComputeFogBlendFactor
234 #define radeonInitStaticFogData r200_radeonInitStaticFogData
235 #define get_base_teximage_offset r200_get_base_teximage_offset
236 #define get_texture_image_row_stride r200_get_texture_image_row_stride
237 #define get_texture_image_size r200_get_texture_image_size
238 #define radeon_miptree_create r200_radeon_miptree_create
239 #define radeon_miptree_image_offset r200_radeon_miptree_image_offset
240 #define radeon_miptree_matches_image r200_radeon_miptree_matches_image
241 #define radeon_miptree_reference r200_radeon_miptree_reference
242 #define radeon_miptree_unreference r200_radeon_miptree_unreference
243 #define radeon_try_alloc_miptree r200_radeon_try_alloc_miptree
244 #define radeon_validate_texture_miptree r200_radeon_validate_texture_miptree
245 #define radeonReadPixels r200_radeonReadPixels
246 #define radeon_check_query_active r200_radeon_check_query_active
247 #define radeonEmitQueryEnd r200_radeonEmitQueryEnd
248 #define radeon_emit_queryobj r200_radeon_emit_queryobj
249 #define radeonInitQueryObjFunctions r200_radeonInitQueryObjFunctions
250 #define radeonInitSpanFuncs r200_radeonInitSpanFuncs
251 #define copy_rows r200_copy_rows
252 #define radeonChooseTextureFormat r200_radeonChooseTextureFormat
253 #define radeonChooseTextureFormat_mesa r200_radeonChooseTextureFormat_mesa
254 #define radeonFreeTextureImageBuffer r200_radeonFreeTextureImageBuffer
255 #define radeon_image_target_texture_2d r200_radeon_image_target_texture_2d
256 #define radeon_init_common_texture_funcs r200_radeon_init_common_texture_funcs
257 #define radeonIsFormatRenderable r200_radeonIsFormatRenderable
258 #define radeonNewTextureImage r200_radeonNewTextureImage
259 #define _radeon_texformat_al88 r200__radeon_texformat_al88
260 #define _radeon_texformat_argb1555 r200__radeon_texformat_argb1555
261 #define _radeon_texformat_argb4444 r200__radeon_texformat_argb4444
262 #define _radeon_texformat_argb8888 r200__radeon_texformat_argb8888
263 #define _radeon_texformat_rgb565 r200__radeon_texformat_rgb565
264 #define _radeon_texformat_rgba8888 r200__radeon_texformat_rgba8888
265 #define radeonCopyTexSubImage r200_radeonCopyTexSubImage
266 #define get_tile_size r200_get_tile_size
267 #define tile_image r200_tile_image
268 #define untile_image r200_untile_image
269 #define set_re_cntl_d3d r200_set_re_cntl_d3d
270 #define radeonDestroyBuffer r200_radeonDestroyBuffer
271 #define radeonVendorString r200_radeonVendorString
272 #define radeonGetRendererString r200_radeonGetRendererString
273 #endif
274
275 extern void radeonDestroyBuffer(__DRIdrawable *driDrawPriv);
276 const __DRIextension **__driDriverGetExtensions_radeon(void);
277 const __DRIextension **__driDriverGetExtensions_r200(void);
278
279 #endif /* __RADEON_SCREEN_H__ */