src/mesa/drivers/dri/radeon/radeon_swtcl.c

   1 /**************************************************************************
   2
   3 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
   4                      VA Linux Systems Inc., Fremont, California.
   5
   6 All Rights Reserved.
   7
   8 Permission is hereby granted, free of charge, to any person obtaining
   9 a copy of this software and associated documentation files (the
  10 "Software"), to deal in the Software without restriction, including
  11 without limitation the rights to use, copy, modify, merge, publish,
  12 distribute, sublicense, and/or sell copies of the Software, and to
  13 permit persons to whom the Software is furnished to do so, subject to
  14 the following conditions:
  15
  16 The above copyright notice and this permission notice (including the
  17 next paragraph) shall be included in all copies or substantial
  18 portions of the Software.
  19
  20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  27
  28 **************************************************************************/
  29
  30 /*
  31  * Authors:
  32  *   Keith Whitwell <keith@tungstengraphics.com>
  33  */
  34
  35 #include "main/glheader.h"
  36 #include "main/mtypes.h"
  37 #include "main/colormac.h"
  38 #include "main/enums.h"
  39 #include "main/imports.h"
  40 #include "main/macros.h"
  41 #include "main/simple_list.h"
  42
  43 #include "swrast_setup/swrast_setup.h"
  44 #include "math/m_translate.h"
  45 #include "tnl/tnl.h"
  46 #include "tnl/t_context.h"
  47 #include "tnl/t_pipeline.h"
  48
  49 #include "radeon_context.h"
  50 #include "radeon_ioctl.h"
  51 #include "radeon_state.h"
  52 #include "radeon_swtcl.h"
  53 #include "radeon_tcl.h"
  54
  55
  56 /* R100: xyzw, c0, c1/fog, stq[0..2]  = 4+1+1+3*3 = 15  right? */
  57 /* R200: xyzw, c0, c1/fog, strq[0..5] = 4+1+1+4*6 = 30 */
  58 #define RADEON_MAX_TNL_VERTEX_SIZE (15 * sizeof(GLfloat))       /* for mesa _tnl stage */
  59
  60 /***********************************************************************
  61  *                         Initialization
  62  ***********************************************************************/
  63
  64 #define EMIT_ATTR( ATTR, STYLE, F0 )                                    \
  65 do {                                                                    \
  66    rmesa->radeon.swtcl.vertex_attrs[rmesa->radeon.swtcl.vertex_attr_count].attrib = (ATTR);     \
  67    rmesa->radeon.swtcl.vertex_attrs[rmesa->radeon.swtcl.vertex_attr_count].format = (STYLE);    \
  68    rmesa->radeon.swtcl.vertex_attr_count++;                                     \
  69    fmt_0 |= F0;                                                         \
  70 } while (0)
  71
  72 #define EMIT_PAD( N )                                                   \
  73 do {                                                                    \
  74    rmesa->radeon.swtcl.vertex_attrs[rmesa->radeon.swtcl.vertex_attr_count].attrib = 0;          \
  75    rmesa->radeon.swtcl.vertex_attrs[rmesa->radeon.swtcl.vertex_attr_count].format = EMIT_PAD;   \
  76    rmesa->radeon.swtcl.vertex_attrs[rmesa->radeon.swtcl.vertex_attr_count].offset = (N);                \
  77    rmesa->radeon.swtcl.vertex_attr_count++;                                     \
  78 } while (0)
  79
  80 static GLuint radeon_cp_vc_frmts[3][2] =
  81 {
  82    { RADEON_CP_VC_FRMT_ST0, RADEON_CP_VC_FRMT_ST0 | RADEON_CP_VC_FRMT_Q0 },
  83    { RADEON_CP_VC_FRMT_ST1, RADEON_CP_VC_FRMT_ST1 | RADEON_CP_VC_FRMT_Q1 },
  84    { RADEON_CP_VC_FRMT_ST2, RADEON_CP_VC_FRMT_ST2 | RADEON_CP_VC_FRMT_Q2 },
  85 };
  86
  87 static void radeonSetVertexFormat( GLcontext *ctx )
  88 {
  89    r100ContextPtr rmesa = R100_CONTEXT( ctx );
  90    TNLcontext *tnl = TNL_CONTEXT(ctx);
  91    struct vertex_buffer *VB = &tnl->vb;
  92    DECLARE_RENDERINPUTS(index_bitset);
  93    int fmt_0 = 0;
  94    int offset = 0;
  95
  96    RENDERINPUTS_COPY( index_bitset, tnl->render_inputs_bitset );
  97
  98    /* Important:
  99     */
 100    if ( VB->NdcPtr != NULL ) {
 101       VB->AttribPtr[VERT_ATTRIB_POS] = VB->NdcPtr;
 102    }
 103    else {
 104       VB->AttribPtr[VERT_ATTRIB_POS] = VB->ClipPtr;
 105    }
 106
 107    assert( VB->AttribPtr[VERT_ATTRIB_POS] != NULL );
 108    rmesa->radeon.swtcl.vertex_attr_count = 0;
 109
 110    /* EMIT_ATTR's must be in order as they tell t_vertex.c how to
 111     * build up a hardware vertex.
 112     */
 113    if ( !rmesa->swtcl.needproj ||
 114         RENDERINPUTS_TEST_RANGE( index_bitset, _TNL_FIRST_TEX, _TNL_LAST_TEX )) {       /* for projtex */
 115       EMIT_ATTR( _TNL_ATTRIB_POS, EMIT_4F,
 116                  RADEON_CP_VC_FRMT_XY | RADEON_CP_VC_FRMT_Z | RADEON_CP_VC_FRMT_W0 );
 117       offset = 4;
 118    }
 119    else {
 120       EMIT_ATTR( _TNL_ATTRIB_POS, EMIT_3F,
 121                  RADEON_CP_VC_FRMT_XY | RADEON_CP_VC_FRMT_Z );
 122       offset = 3;
 123    }
 124
 125    rmesa->swtcl.coloroffset = offset;
 126 #if MESA_LITTLE_ENDIAN
 127    EMIT_ATTR( _TNL_ATTRIB_COLOR0, EMIT_4UB_4F_RGBA,
 128               RADEON_CP_VC_FRMT_PKCOLOR );
 129 #else
 130    EMIT_ATTR( _TNL_ATTRIB_COLOR0, EMIT_4UB_4F_ABGR,
 131               RADEON_CP_VC_FRMT_PKCOLOR );
 132 #endif
 133    offset += 1;
 134
 135    rmesa->swtcl.specoffset = 0;
 136    if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_COLOR1 ) ||
 137        RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_FOG )) {
 138
 139 #if MESA_LITTLE_ENDIAN
 140       if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_COLOR1 )) {
 141          rmesa->swtcl.specoffset = offset;
 142          EMIT_ATTR( _TNL_ATTRIB_COLOR1, EMIT_3UB_3F_RGB,
 143                     RADEON_CP_VC_FRMT_PKSPEC );
 144       }
 145       else {
 146          EMIT_PAD( 3 );
 147       }
 148
 149       if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_FOG )) {
 150          EMIT_ATTR( _TNL_ATTRIB_FOG, EMIT_1UB_1F,
 151                     RADEON_CP_VC_FRMT_PKSPEC );
 152       }
 153       else {
 154          EMIT_PAD( 1 );
 155       }
 156 #else
 157       if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_FOG )) {
 158          EMIT_ATTR( _TNL_ATTRIB_FOG, EMIT_1UB_1F,
 159                     RADEON_CP_VC_FRMT_PKSPEC );
 160       }
 161       else {
 162          EMIT_PAD( 1 );
 163       }
 164
 165       if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_COLOR1 )) {
 166          rmesa->swtcl.specoffset = offset;
 167          EMIT_ATTR( _TNL_ATTRIB_COLOR1, EMIT_3UB_3F_BGR,
 168                     RADEON_CP_VC_FRMT_PKSPEC );
 169       }
 170       else {
 171          EMIT_PAD( 3 );
 172       }
 173 #endif
 174    }
 175
 176    if (RENDERINPUTS_TEST_RANGE( index_bitset, _TNL_FIRST_TEX, _TNL_LAST_TEX )) {
 177       int i;
 178
 179       for (i = 0; i < ctx->Const.MaxTextureUnits; i++) {
 180          if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX(i) )) {
 181             GLuint sz = VB->TexCoordPtr[i]->size;
 182
 183             switch (sz) {
 184             case 1:
 185             case 2:
 186                EMIT_ATTR( _TNL_ATTRIB_TEX0+i, EMIT_2F,
 187                           radeon_cp_vc_frmts[i][0] );
 188                break;
 189             case 3:
 190             case 4:
 191                if (ctx->Texture.Unit[i]._ReallyEnabled & (TEXTURE_CUBE_BIT) ) {
 192                   EMIT_ATTR( _TNL_ATTRIB_TEX0+i, EMIT_3F,
 193                              radeon_cp_vc_frmts[i][1] );
 194                } else {
 195                   EMIT_ATTR( _TNL_ATTRIB_TEX0+i, EMIT_3F_XYW,
 196                              radeon_cp_vc_frmts[i][1] );
 197                }
 198                break;
 199             default:
 200                continue;
 201             };
 202          }
 203       }
 204    }
 205
 206    if (!RENDERINPUTS_EQUAL( rmesa->radeon.tnl_index_bitset, index_bitset ) ||
 207         fmt_0 != rmesa->swtcl.vertex_format) {
 208       RADEON_NEWPRIM(rmesa);
 209       rmesa->swtcl.vertex_format = fmt_0;
 210       rmesa->radeon.swtcl.vertex_size =
 211           _tnl_install_attrs( ctx,
 212                               rmesa->radeon.swtcl.vertex_attrs,
 213                               rmesa->radeon.swtcl.vertex_attr_count,
 214                               NULL, 0 );
 215       rmesa->radeon.swtcl.vertex_size /= 4;
 216       RENDERINPUTS_COPY( rmesa->radeon.tnl_index_bitset, index_bitset );
 217       if (RADEON_DEBUG & DEBUG_VERTS)
 218          fprintf( stderr, "%s: vertex_size= %d floats\n",
 219                   __FUNCTION__, rmesa->radeon.swtcl.vertex_size);
 220    }
 221 }
 222
 223
 224 static void radeonRenderStart( GLcontext *ctx )
 225 {
 226     r100ContextPtr rmesa = R100_CONTEXT( ctx );
 227
 228     radeonSetVertexFormat( ctx );
 229
 230     if (rmesa->radeon.dma.flush != 0 &&
 231             rmesa->radeon.dma.flush != rcommon_flush_last_swtcl_prim)
 232         rmesa->radeon.dma.flush( ctx );
 233
 234     if (!rmesa->radeon.swtcl.primitive_counter) {
 235         if (rcommonEnsureCmdBufSpace(&rmesa->radeon,
 236                     radeonCountStateEmitSize( &rmesa->radeon ) +
 237                     (8 + 8 + 7), /* scissor + primis + VertexAOS */
 238                     __FUNCTION__))
 239             rmesa->radeon.swtcl.primitive_counter = 0;
 240         else
 241             rmesa->radeon.swtcl.primitive_counter = 1;
 242     }
 243 }
 244
 245
 246 /**
 247  * Set vertex state for SW TCL.  The primary purpose of this function is to
 248  * determine in advance whether or not the hardware can / should do the
 249  * projection divide or Mesa should do it.
 250  */
 251 void radeonChooseVertexState( GLcontext *ctx )
 252 {
 253    r100ContextPtr rmesa = R100_CONTEXT( ctx );
 254    TNLcontext *tnl = TNL_CONTEXT(ctx);
 255
 256    GLuint se_coord_fmt = rmesa->hw.set.cmd[SET_SE_COORDFMT];
 257
 258    se_coord_fmt &= ~(RADEON_VTX_XY_PRE_MULT_1_OVER_W0 |
 259                      RADEON_VTX_Z_PRE_MULT_1_OVER_W0 |
 260                      RADEON_VTX_W0_IS_NOT_1_OVER_W0);
 261
 262    /* We must ensure that we don't do _tnl_need_projected_coords while in a
 263     * rasterization fallback.  As this function will be called again when we
 264     * leave a rasterization fallback, we can just skip it for now.
 265     */
 266    if (rmesa->radeon.Fallback != 0)
 267       return;
 268
 269    /* HW perspective divide is a win, but tiny vertex formats are a
 270     * bigger one.
 271     */
 272
 273    if ((!RENDERINPUTS_TEST_RANGE( tnl->render_inputs_bitset, _TNL_FIRST_TEX, _TNL_LAST_TEX ) &&
 274        !RENDERINPUTS_TEST( tnl->render_inputs_bitset, _TNL_ATTRIB_COLOR1 ))
 275        || (ctx->_TriangleCaps & (DD_TRI_LIGHT_TWOSIDE|DD_TRI_UNFILLED))) {
 276       rmesa->swtcl.needproj = GL_TRUE;
 277       se_coord_fmt |= (RADEON_VTX_XY_PRE_MULT_1_OVER_W0 |
 278                       RADEON_VTX_Z_PRE_MULT_1_OVER_W0);
 279    }
 280    else {
 281       rmesa->swtcl.needproj = GL_FALSE;
 282       se_coord_fmt |= (RADEON_VTX_W0_IS_NOT_1_OVER_W0);
 283    }
 284
 285    _tnl_need_projected_coords( ctx, rmesa->swtcl.needproj );
 286
 287    if ( se_coord_fmt != rmesa->hw.set.cmd[SET_SE_COORDFMT] ) {
 288       RADEON_STATECHANGE( rmesa, set );
 289       rmesa->hw.set.cmd[SET_SE_COORDFMT] = se_coord_fmt;
 290    }
 291 }
 292
 293 void r100_swtcl_flush(GLcontext *ctx, uint32_t current_offset)
 294 {
 295    r100ContextPtr rmesa = R100_CONTEXT(ctx);
 296
 297
 298
 299    radeonEmitState(&rmesa->radeon);
 300    radeonEmitVertexAOS( rmesa,
 301                         rmesa->radeon.swtcl.vertex_size,
 302                         first_elem(&rmesa->radeon.dma.reserved)->bo,
 303                         current_offset);
 304
 305
 306    radeonEmitVbufPrim( rmesa,
 307                        rmesa->swtcl.vertex_format,
 308                        rmesa->radeon.swtcl.hw_primitive,
 309                        rmesa->radeon.swtcl.numverts);
 310
 311
 312    rmesa->radeon.swtcl.primitive_counter = 0;
 313
 314 }
 315
 316 /*
 317  * Render unclipped vertex buffers by emitting vertices directly to
 318  * dma buffers.  Use strip/fan hardware primitives where possible.
 319  * Try to simulate missing primitives with indexed vertices.
 320  */
 321 #define HAVE_POINTS      1
 322 #define HAVE_LINES       1
 323 #define HAVE_LINE_STRIPS 1
 324 #define HAVE_TRIANGLES   1
 325 #define HAVE_TRI_STRIPS  1
 326 #define HAVE_TRI_STRIP_1 0
 327 #define HAVE_TRI_FANS    1
 328 #define HAVE_QUADS       0
 329 #define HAVE_QUAD_STRIPS 0
 330 #define HAVE_POLYGONS    0
 331 /* \todo: is it possible to make "ELTS" work with t_vertex code ? */
 332 #define HAVE_ELTS        0
 333
 334 static const GLuint hw_prim[GL_POLYGON+1] = {
 335    RADEON_CP_VC_CNTL_PRIM_TYPE_POINT,
 336    RADEON_CP_VC_CNTL_PRIM_TYPE_LINE,
 337    0,
 338    RADEON_CP_VC_CNTL_PRIM_TYPE_LINE_STRIP,
 339    RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST,
 340    RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_STRIP,
 341    RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_FAN,
 342    0,
 343    0,
 344    0
 345 };
 346
 347 static INLINE void
 348 radeonDmaPrimitive( r100ContextPtr rmesa, GLenum prim )
 349 {
 350    RADEON_NEWPRIM( rmesa );
 351    rmesa->radeon.swtcl.hw_primitive = hw_prim[prim];
 352    //   assert(rmesa->radeon.dma.current.ptr == rmesa->radeon.dma.current.start);
 353 }
 354
 355 #define LOCAL_VARS r100ContextPtr rmesa = R100_CONTEXT(ctx)
 356 #define INIT( prim ) radeonDmaPrimitive( rmesa, prim )
 357 #define FLUSH()  RADEON_NEWPRIM( rmesa )
 358 #define GET_CURRENT_VB_MAX_VERTS()                                      10\
 359 //  (((int)rmesa->radeon.dma.current.end - (int)rmesa->radeon.dma.current.ptr) / (rmesa->radeon.swtcl.vertex_size*4))
 360 #define GET_SUBSEQUENT_VB_MAX_VERTS() \
 361   ((RADEON_BUFFER_SIZE) / (rmesa->radeon.swtcl.vertex_size*4))
 362 #define ALLOC_VERTS( nr ) \
 363   rcommonAllocDmaLowVerts( &rmesa->radeon, nr, rmesa->radeon.swtcl.vertex_size * 4 )
 364 #define EMIT_VERTS( ctx, j, nr, buf ) \
 365   _tnl_emit_vertices_to_buffer(ctx, j, (j)+(nr), buf)
 366
 367 #define TAG(x) radeon_dma_##x
 368 #include "tnl_dd/t_dd_dmatmp.h"
 369
 370
 371 /**********************************************************************/
 372 /*                          Render pipeline stage                     */
 373 /**********************************************************************/
 374
 375
 376 static GLboolean radeon_run_render( GLcontext *ctx,
 377                                     struct tnl_pipeline_stage *stage )
 378 {
 379    r100ContextPtr rmesa = R100_CONTEXT(ctx);
 380    TNLcontext *tnl = TNL_CONTEXT(ctx);
 381    struct vertex_buffer *VB = &tnl->vb;
 382    tnl_render_func *tab = TAG(render_tab_verts);
 383    GLuint i;
 384
 385    if (rmesa->radeon.swtcl.RenderIndex != 0 ||
 386        !radeon_dma_validate_render( ctx, VB ))
 387       return GL_TRUE;
 388
 389    tnl->Driver.Render.Start( ctx );
 390
 391    for (i = 0 ; i < VB->PrimitiveCount ; i++)
 392    {
 393       GLuint prim = VB->Primitive[i].mode;
 394       GLuint start = VB->Primitive[i].start;
 395       GLuint length = VB->Primitive[i].count;
 396
 397       if (!length)
 398          continue;
 399
 400       if (RADEON_DEBUG & DEBUG_PRIMS)
 401          fprintf(stderr, "radeon_render.c: prim %s %d..%d\n",
 402                  _mesa_lookup_enum_by_nr(prim & PRIM_MODE_MASK),
 403                  start, start+length);
 404
 405       if (length)
 406          tab[prim & PRIM_MODE_MASK]( ctx, start, start + length, prim );
 407    }
 408
 409    tnl->Driver.Render.Finish( ctx );
 410
 411    return GL_FALSE;             /* finished the pipe */
 412 }
 413
 414
 415
 416 const struct tnl_pipeline_stage _radeon_render_stage =
 417 {
 418    "radeon render",
 419    NULL,
 420    NULL,
 421    NULL,
 422    NULL,
 423    radeon_run_render            /* run */
 424 };
 425
 426
 427 /**************************************************************************/
 428
 429
 430 static const GLuint reduced_hw_prim[GL_POLYGON+1] = {
 431    RADEON_CP_VC_CNTL_PRIM_TYPE_POINT,
 432    RADEON_CP_VC_CNTL_PRIM_TYPE_LINE,
 433    RADEON_CP_VC_CNTL_PRIM_TYPE_LINE,
 434    RADEON_CP_VC_CNTL_PRIM_TYPE_LINE,
 435    RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST,
 436    RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST,
 437    RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST,
 438    RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST,
 439    RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST,
 440    RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST
 441 };
 442
 443 static void radeonRasterPrimitive( GLcontext *ctx, GLuint hwprim );
 444 static void radeonRenderPrimitive( GLcontext *ctx, GLenum prim );
 445 static void radeonResetLineStipple( GLcontext *ctx );
 446
 447
 448 /***********************************************************************
 449  *                    Emit primitives as inline vertices               *
 450  ***********************************************************************/
 451
 452 #undef LOCAL_VARS
 453 #undef ALLOC_VERTS
 454 #define CTX_ARG r100ContextPtr rmesa
 455 #define GET_VERTEX_DWORDS() rmesa->radeon.swtcl.vertex_size
 456 #define ALLOC_VERTS( n, size ) rcommonAllocDmaLowVerts( &rmesa->radeon, n, (size) * 4 )
 457 #undef LOCAL_VARS
 458 #define LOCAL_VARS                                              \
 459    r100ContextPtr rmesa = R100_CONTEXT(ctx);            \
 460    const char *radeonverts = (char *)rmesa->radeon.swtcl.verts;
 461 #define VERT(x) (radeonVertex *)(radeonverts + ((x) * (vertsize) * sizeof(int)))
 462 #define VERTEX radeonVertex
 463 #undef TAG
 464 #define TAG(x) radeon_##x
 465 #include "tnl_dd/t_dd_triemit.h"
 466
 467
 468 /***********************************************************************
 469  *          Macros for t_dd_tritmp.h to draw basic primitives          *
 470  ***********************************************************************/
 471
 472 #define QUAD( a, b, c, d ) radeon_quad( rmesa, a, b, c, d )
 473 #define TRI( a, b, c )     radeon_triangle( rmesa, a, b, c )
 474 #define LINE( a, b )       radeon_line( rmesa, a, b )
 475 #define POINT( a )         radeon_point( rmesa, a )
 476
 477 /***********************************************************************
 478  *              Build render functions from dd templates               *
 479  ***********************************************************************/
 480
 481 #define RADEON_TWOSIDE_BIT      0x01
 482 #define RADEON_UNFILLED_BIT     0x02
 483 #define RADEON_MAX_TRIFUNC      0x04
 484
 485
 486 static struct {
 487    tnl_points_func              points;
 488    tnl_line_func                line;
 489    tnl_triangle_func    triangle;
 490    tnl_quad_func                quad;
 491 } rast_tab[RADEON_MAX_TRIFUNC];
 492
 493
 494 #define DO_FALLBACK  0
 495 #define DO_OFFSET    0
 496 #define DO_UNFILLED (IND & RADEON_UNFILLED_BIT)
 497 #define DO_TWOSIDE  (IND & RADEON_TWOSIDE_BIT)
 498 #define DO_FLAT      0
 499 #define DO_TRI       1
 500 #define DO_QUAD      1
 501 #define DO_LINE      1
 502 #define DO_POINTS    1
 503 #define DO_FULL_QUAD 1
 504
 505 #define HAVE_RGBA   1
 506 #define HAVE_SPEC   1
 507 #define HAVE_BACK_COLORS  0
 508 #define HAVE_HW_FLATSHADE 1
 509 #define TAB rast_tab
 510
 511 #define DEPTH_SCALE 1.0
 512 #define UNFILLED_TRI unfilled_tri
 513 #define UNFILLED_QUAD unfilled_quad
 514 #define VERT_X(_v) _v->v.x
 515 #define VERT_Y(_v) _v->v.y
 516 #define VERT_Z(_v) _v->v.z
 517 #define AREA_IS_CCW( a ) (a < 0)
 518 #define GET_VERTEX(e) (rmesa->radeon.swtcl.verts + ((e) * rmesa->radeon.swtcl.vertex_size * sizeof(int)))
 519
 520 #define VERT_SET_RGBA( v, c )                                   \
 521 do {                                                            \
 522    radeon_color_t *color = (radeon_color_t *)&((v)->ui[coloroffset]);   \
 523    UNCLAMPED_FLOAT_TO_UBYTE(color->red, (c)[0]);                \
 524    UNCLAMPED_FLOAT_TO_UBYTE(color->green, (c)[1]);              \
 525    UNCLAMPED_FLOAT_TO_UBYTE(color->blue, (c)[2]);               \
 526    UNCLAMPED_FLOAT_TO_UBYTE(color->alpha, (c)[3]);              \
 527 } while (0)
 528
 529 #define VERT_COPY_RGBA( v0, v1 ) v0->ui[coloroffset] = v1->ui[coloroffset]
 530
 531 #define VERT_SET_SPEC( v, c )                                   \
 532 do {                                                            \
 533    if (specoffset) {                                            \
 534       radeon_color_t *spec = (radeon_color_t *)&((v)->ui[specoffset]);  \
 535       UNCLAMPED_FLOAT_TO_UBYTE(spec->red, (c)[0]);      \
 536       UNCLAMPED_FLOAT_TO_UBYTE(spec->green, (c)[1]);    \
 537       UNCLAMPED_FLOAT_TO_UBYTE(spec->blue, (c)[2]);     \
 538    }                                                            \
 539 } while (0)
 540 #define VERT_COPY_SPEC( v0, v1 )                        \
 541 do {                                                    \
 542    if (specoffset) {                                    \
 543       radeon_color_t *spec0 = (radeon_color_t *)&((v0)->ui[specoffset]);        \
 544       radeon_color_t *spec1 = (radeon_color_t *)&((v1)->ui[specoffset]);        \
 545       spec0->red   = spec1->red;        \
 546       spec0->green = spec1->green;      \
 547       spec0->blue  = spec1->blue;       \
 548    }                                                    \
 549 } while (0)
 550
 551 /* These don't need LE32_TO_CPU() as they used to save and restore
 552  * colors which are already in the correct format.
 553  */
 554 #define VERT_SAVE_RGBA( idx )    color[idx] = v[idx]->ui[coloroffset]
 555 #define VERT_RESTORE_RGBA( idx ) v[idx]->ui[coloroffset] = color[idx]
 556 #define VERT_SAVE_SPEC( idx )    if (specoffset) spec[idx] = v[idx]->ui[specoffset]
 557 #define VERT_RESTORE_SPEC( idx ) if (specoffset) v[idx]->ui[specoffset] = spec[idx]
 558
 559 #undef LOCAL_VARS
 560 #undef TAG
 561 #undef INIT
 562
 563 #define LOCAL_VARS(n)                                                   \
 564    r100ContextPtr rmesa = R100_CONTEXT(ctx);                    \
 565    GLuint color[n] = {0}, spec[n] = {0};                                                \
 566    GLuint coloroffset = rmesa->swtcl.coloroffset;       \
 567    GLuint specoffset = rmesa->swtcl.specoffset;                 \
 568    (void) color; (void) spec; (void) coloroffset; (void) specoffset;
 569
 570 /***********************************************************************
 571  *                Helpers for rendering unfilled primitives            *
 572  ***********************************************************************/
 573
 574 #define RASTERIZE(x) radeonRasterPrimitive( ctx, reduced_hw_prim[x] )
 575 #define RENDER_PRIMITIVE rmesa->radeon.swtcl.render_primitive
 576 #undef TAG
 577 #define TAG(x) x
 578 #include "tnl_dd/t_dd_unfilled.h"
 579 #undef IND
 580
 581
 582 /***********************************************************************
 583  *                      Generate GL render functions                   *
 584  ***********************************************************************/
 585
 586
 587 #define IND (0)
 588 #define TAG(x) x
 589 #include "tnl_dd/t_dd_tritmp.h"
 590
 591 #define IND (RADEON_TWOSIDE_BIT)
 592 #define TAG(x) x##_twoside
 593 #include "tnl_dd/t_dd_tritmp.h"
 594
 595 #define IND (RADEON_UNFILLED_BIT)
 596 #define TAG(x) x##_unfilled
 597 #include "tnl_dd/t_dd_tritmp.h"
 598
 599 #define IND (RADEON_TWOSIDE_BIT|RADEON_UNFILLED_BIT)
 600 #define TAG(x) x##_twoside_unfilled
 601 #include "tnl_dd/t_dd_tritmp.h"
 602
 603
 604 static void init_rast_tab( void )
 605 {
 606    init();
 607    init_twoside();
 608    init_unfilled();
 609    init_twoside_unfilled();
 610 }
 611
 612 /**********************************************************************/
 613 /*               Render unclipped begin/end objects                   */
 614 /**********************************************************************/
 615
 616 #define RENDER_POINTS( start, count )           \
 617    for ( ; start < count ; start++)             \
 618       radeon_point( rmesa, VERT(start) )
 619 #define RENDER_LINE( v0, v1 ) \
 620    radeon_line( rmesa, VERT(v0), VERT(v1) )
 621 #define RENDER_TRI( v0, v1, v2 )  \
 622    radeon_triangle( rmesa, VERT(v0), VERT(v1), VERT(v2) )
 623 #define RENDER_QUAD( v0, v1, v2, v3 ) \
 624    radeon_quad( rmesa, VERT(v0), VERT(v1), VERT(v2), VERT(v3) )
 625 #undef INIT
 626 #define INIT(x) do {                                    \
 627    radeonRenderPrimitive( ctx, x );                     \
 628 } while (0)
 629 #undef LOCAL_VARS
 630 #define LOCAL_VARS                                              \
 631    r100ContextPtr rmesa = R100_CONTEXT(ctx);            \
 632    const GLuint vertsize = rmesa->radeon.swtcl.vertex_size;             \
 633    const char *radeonverts = (char *)rmesa->radeon.swtcl.verts;         \
 634    const GLuint * const elt = TNL_CONTEXT(ctx)->vb.Elts;        \
 635    const GLboolean stipple = ctx->Line.StippleFlag;             \
 636    (void) elt; (void) stipple;
 637 #define RESET_STIPPLE   if ( stipple ) radeonResetLineStipple( ctx );
 638 #define RESET_OCCLUSION
 639 #define PRESERVE_VB_DEFS
 640 #define ELT(x) (x)
 641 #define TAG(x) radeon_##x##_verts
 642 #include "tnl/t_vb_rendertmp.h"
 643 #undef ELT
 644 #undef TAG
 645 #define TAG(x) radeon_##x##_elts
 646 #define ELT(x) elt[x]
 647 #include "tnl/t_vb_rendertmp.h"
 648
 649
 650
 651 /**********************************************************************/
 652 /*                    Choose render functions                         */
 653 /**********************************************************************/
 654
 655 void radeonChooseRenderState( GLcontext *ctx )
 656 {
 657    TNLcontext *tnl = TNL_CONTEXT(ctx);
 658    r100ContextPtr rmesa = R100_CONTEXT(ctx);
 659    GLuint index = 0;
 660    GLuint flags = ctx->_TriangleCaps;
 661
 662    if (!rmesa->radeon.TclFallback || rmesa->radeon.Fallback)
 663       return;
 664
 665    if (flags & DD_TRI_LIGHT_TWOSIDE) index |= RADEON_TWOSIDE_BIT;
 666    if (flags & DD_TRI_UNFILLED)      index |= RADEON_UNFILLED_BIT;
 667
 668    if (index != rmesa->radeon.swtcl.RenderIndex) {
 669       tnl->Driver.Render.Points = rast_tab[index].points;
 670       tnl->Driver.Render.Line = rast_tab[index].line;
 671       tnl->Driver.Render.ClippedLine = rast_tab[index].line;
 672       tnl->Driver.Render.Triangle = rast_tab[index].triangle;
 673       tnl->Driver.Render.Quad = rast_tab[index].quad;
 674
 675       if (index == 0) {
 676          tnl->Driver.Render.PrimTabVerts = radeon_render_tab_verts;
 677          tnl->Driver.Render.PrimTabElts = radeon_render_tab_elts;
 678          tnl->Driver.Render.ClippedPolygon = radeon_fast_clipped_poly;
 679       } else {
 680          tnl->Driver.Render.PrimTabVerts = _tnl_render_tab_verts;
 681          tnl->Driver.Render.PrimTabElts = _tnl_render_tab_elts;
 682          tnl->Driver.Render.ClippedPolygon = _tnl_RenderClippedPolygon;
 683       }
 684
 685       rmesa->radeon.swtcl.RenderIndex = index;
 686    }
 687 }
 688
 689
 690 /**********************************************************************/
 691 /*                 High level hooks for t_vb_render.c                 */
 692 /**********************************************************************/
 693
 694
 695 static void radeonRasterPrimitive( GLcontext *ctx, GLuint hwprim )
 696 {
 697    r100ContextPtr rmesa = R100_CONTEXT(ctx);
 698
 699    if (rmesa->radeon.swtcl.hw_primitive != hwprim) {
 700       RADEON_NEWPRIM( rmesa );
 701       rmesa->radeon.swtcl.hw_primitive = hwprim;
 702    }
 703 }
 704
 705 static void radeonRenderPrimitive( GLcontext *ctx, GLenum prim )
 706 {
 707    r100ContextPtr rmesa = R100_CONTEXT(ctx);
 708    rmesa->radeon.swtcl.render_primitive = prim;
 709    if (prim < GL_TRIANGLES || !(ctx->_TriangleCaps & DD_TRI_UNFILLED))
 710       radeonRasterPrimitive( ctx, reduced_hw_prim[prim] );
 711 }
 712
 713 static void radeonRenderFinish( GLcontext *ctx )
 714 {
 715 }
 716
 717 static void radeonResetLineStipple( GLcontext *ctx )
 718 {
 719    r100ContextPtr rmesa = R100_CONTEXT(ctx);
 720    RADEON_STATECHANGE( rmesa, lin );
 721 }
 722
 723
 724 /**********************************************************************/
 725 /*           Transition to/from hardware rasterization.               */
 726 /**********************************************************************/
 727
 728 static const char * const fallbackStrings[] = {
 729    "Texture mode",
 730    "glDrawBuffer(GL_FRONT_AND_BACK)",
 731    "glEnable(GL_STENCIL) without hw stencil buffer",
 732    "glRenderMode(selection or feedback)",
 733    "glBlendEquation",
 734    "glBlendFunc",
 735    "RADEON_NO_RAST",
 736    "Mixing GL_CLAMP_TO_BORDER and GL_CLAMP (or GL_MIRROR_CLAMP_ATI)"
 737 };
 738
 739
 740 static const char *getFallbackString(GLuint bit)
 741 {
 742    int i = 0;
 743    while (bit > 1) {
 744       i++;
 745       bit >>= 1;
 746    }
 747    return fallbackStrings[i];
 748 }
 749
 750
 751 void radeonFallback( GLcontext *ctx, GLuint bit, GLboolean mode )
 752 {
 753    r100ContextPtr rmesa = R100_CONTEXT(ctx);
 754    TNLcontext *tnl = TNL_CONTEXT(ctx);
 755    GLuint oldfallback = rmesa->radeon.Fallback;
 756
 757    if (mode) {
 758       rmesa->radeon.Fallback |= bit;
 759       if (oldfallback == 0) {
 760          radeon_firevertices(&rmesa->radeon);
 761          TCL_FALLBACK( ctx, RADEON_TCL_FALLBACK_RASTER, GL_TRUE );
 762          _swsetup_Wakeup( ctx );
 763          rmesa->radeon.swtcl.RenderIndex = ~0;
 764          if (RADEON_DEBUG & DEBUG_FALLBACKS) {
 765             fprintf(stderr, "Radeon begin rasterization fallback: 0x%x %s\n",
 766                     bit, getFallbackString(bit));
 767          }
 768       }
 769    }
 770    else {
 771       rmesa->radeon.Fallback &= ~bit;
 772       if (oldfallback == bit) {
 773          _swrast_flush( ctx );
 774          tnl->Driver.Render.Start = radeonRenderStart;
 775          tnl->Driver.Render.PrimitiveNotify = radeonRenderPrimitive;
 776          tnl->Driver.Render.Finish = radeonRenderFinish;
 777
 778          tnl->Driver.Render.BuildVertices = _tnl_build_vertices;
 779          tnl->Driver.Render.CopyPV = _tnl_copy_pv;
 780          tnl->Driver.Render.Interp = _tnl_interp;
 781
 782          tnl->Driver.Render.ResetLineStipple = radeonResetLineStipple;
 783          TCL_FALLBACK( ctx, RADEON_TCL_FALLBACK_RASTER, GL_FALSE );
 784          if (rmesa->radeon.TclFallback) {
 785             /* These are already done if rmesa->radeon.TclFallback goes to
 786              * zero above. But not if it doesn't (RADEON_NO_TCL for
 787              * example?)
 788              */
 789             _tnl_invalidate_vertex_state( ctx, ~0 );
 790             _tnl_invalidate_vertices( ctx, ~0 );
 791             RENDERINPUTS_ZERO( rmesa->radeon.tnl_index_bitset );
 792             radeonChooseVertexState( ctx );
 793             radeonChooseRenderState( ctx );
 794          }
 795          if (RADEON_DEBUG & DEBUG_FALLBACKS) {
 796             fprintf(stderr, "Radeon end rasterization fallback: 0x%x %s\n",
 797                     bit, getFallbackString(bit));
 798          }
 799       }
 800    }
 801 }
 802
 803
 804 /**********************************************************************/
 805 /*                            Initialization.                         */
 806 /**********************************************************************/
 807
 808 void radeonInitSwtcl( GLcontext *ctx )
 809 {
 810    TNLcontext *tnl = TNL_CONTEXT(ctx);
 811    r100ContextPtr rmesa = R100_CONTEXT(ctx);
 812    static int firsttime = 1;
 813
 814    if (firsttime) {
 815       init_rast_tab();
 816       firsttime = 0;
 817       rmesa->radeon.swtcl.primitive_counter = 0;
 818    }
 819
 820    tnl->Driver.Render.Start = radeonRenderStart;
 821    tnl->Driver.Render.Finish = radeonRenderFinish;
 822    tnl->Driver.Render.PrimitiveNotify = radeonRenderPrimitive;
 823    tnl->Driver.Render.ResetLineStipple = radeonResetLineStipple;
 824    tnl->Driver.Render.BuildVertices = _tnl_build_vertices;
 825    tnl->Driver.Render.CopyPV = _tnl_copy_pv;
 826    tnl->Driver.Render.Interp = _tnl_interp;
 827
 828    _tnl_init_vertices( ctx, ctx->Const.MaxArrayLockSize + 12,
 829                        RADEON_MAX_TNL_VERTEX_SIZE);
 830
 831    rmesa->radeon.swtcl.verts = (GLubyte *)tnl->clipspace.vertex_buf;
 832    rmesa->radeon.swtcl.RenderIndex = ~0;
 833    rmesa->radeon.swtcl.render_primitive = GL_TRIANGLES;
 834    rmesa->radeon.swtcl.hw_primitive = 0;
 835 }
 836