src/mesa/drivers/dri/radeon/radeon_tcl.c

   1 /**************************************************************************
   2
   3 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
   4                      Tungsten Graphics Inc., Austin, Texas.
   5
   6 All Rights Reserved.
   7
   8 Permission is hereby granted, free of charge, to any person obtaining
   9 a copy of this software and associated documentation files (the
  10 "Software"), to deal in the Software without restriction, including
  11 without limitation the rights to use, copy, modify, merge, publish,
  12 distribute, sublicense, and/or sell copies of the Software, and to
  13 permit persons to whom the Software is furnished to do so, subject to
  14 the following conditions:
  15
  16 The above copyright notice and this permission notice (including the
  17 next paragraph) shall be included in all copies or substantial
  18 portions of the Software.
  19
  20 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  21 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  22 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  23 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  24 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  25 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  26 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  27
  28 **************************************************************************/
  29
  30 /*
  31  * Authors:
  32  *   Keith Whitwell <keith@tungstengraphics.com>
  33  */
  34
  35 #include "main/glheader.h"
  36 #include "main/imports.h"
  37 #include "main/light.h"
  38 #include "main/mtypes.h"
  39 #include "main/enums.h"
  40
  41 #include "vbo/vbo.h"
  42 #include "tnl/tnl.h"
  43 #include "tnl/t_pipeline.h"
  44
  45 #include "radeon_common.h"
  46 #include "radeon_context.h"
  47 #include "radeon_state.h"
  48 #include "radeon_ioctl.h"
  49 #include "radeon_tcl.h"
  50 #include "radeon_swtcl.h"
  51 #include "radeon_maos.h"
  52 #include "radeon_common_context.h"
  53
  54
  55
  56 /*
  57  * Render unclipped vertex buffers by emitting vertices directly to
  58  * dma buffers.  Use strip/fan hardware primitives where possible.
  59  * Try to simulate missing primitives with indexed vertices.
  60  */
  61 #define HAVE_POINTS      1
  62 #define HAVE_LINES       1
  63 #define HAVE_LINE_LOOP   0
  64 #define HAVE_LINE_STRIPS 1
  65 #define HAVE_TRIANGLES   1
  66 #define HAVE_TRI_STRIPS  1
  67 #define HAVE_TRI_STRIP_1 0
  68 #define HAVE_TRI_FANS    1
  69 #define HAVE_QUADS       0
  70 #define HAVE_QUAD_STRIPS 0
  71 #define HAVE_POLYGONS    1
  72 #define HAVE_ELTS        1
  73
  74
  75 #define HW_POINTS           RADEON_CP_VC_CNTL_PRIM_TYPE_POINT
  76 #define HW_LINES            RADEON_CP_VC_CNTL_PRIM_TYPE_LINE
  77 #define HW_LINE_LOOP        0
  78 #define HW_LINE_STRIP       RADEON_CP_VC_CNTL_PRIM_TYPE_LINE_STRIP
  79 #define HW_TRIANGLES        RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_LIST
  80 #define HW_TRIANGLE_STRIP_0 RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_STRIP
  81 #define HW_TRIANGLE_STRIP_1 0
  82 #define HW_TRIANGLE_FAN     RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_FAN
  83 #define HW_QUADS            0
  84 #define HW_QUAD_STRIP       0
  85 #define HW_POLYGON          RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_FAN
  86
  87
  88 static GLboolean discrete_prim[0x10] = {
  89    0,                           /* 0 none */
  90    1,                           /* 1 points */
  91    1,                           /* 2 lines */
  92    0,                           /* 3 line_strip */
  93    1,                           /* 4 tri_list */
  94    0,                           /* 5 tri_fan */
  95    0,                           /* 6 tri_type2 */
  96    1,                           /* 7 rect list (unused) */
  97    1,                           /* 8 3vert point */
  98    1,                           /* 9 3vert line */
  99    0,
 100    0,
 101    0,
 102    0,
 103    0,
 104    0,
 105 };
 106
 107
 108 #define LOCAL_VARS r100ContextPtr rmesa = R100_CONTEXT(ctx)
 109 #define ELT_TYPE  GLushort
 110
 111 #define ELT_INIT(prim, hw_prim) \
 112    radeonTclPrimitive( ctx, prim, hw_prim | RADEON_CP_VC_CNTL_PRIM_WALK_IND )
 113
 114 #define GET_MESA_ELTS() rmesa->tcl.Elts
 115
 116
 117 /* Don't really know how many elts will fit in what's left of cmdbuf,
 118  * as there is state to emit, etc:
 119  */
 120
 121 /* Testing on isosurf shows a maximum around here.  Don't know if it's
 122  * the card or driver or kernel module that is causing the behaviour.
 123  */
 124 #define GET_MAX_HW_ELTS() 300
 125
 126
 127 #define RESET_STIPPLE() do {                    \
 128    RADEON_STATECHANGE( rmesa, lin );            \
 129    radeonEmitState(&rmesa->radeon);                     \
 130 } while (0)
 131
 132 #define AUTO_STIPPLE( mode )  do {              \
 133    RADEON_STATECHANGE( rmesa, lin );            \
 134    if (mode)                                    \
 135       rmesa->hw.lin.cmd[LIN_RE_LINE_PATTERN] |= \
 136          RADEON_LINE_PATTERN_AUTO_RESET;        \
 137    else                                         \
 138       rmesa->hw.lin.cmd[LIN_RE_LINE_PATTERN] &= \
 139          ~RADEON_LINE_PATTERN_AUTO_RESET;       \
 140    radeonEmitState(&rmesa->radeon);             \
 141 } while (0)
 142
 143
 144
 145 #define ALLOC_ELTS(nr)  radeonAllocElts( rmesa, nr )
 146
 147 static GLushort *radeonAllocElts( r100ContextPtr rmesa, GLuint nr )
 148 {
 149       if (rmesa->radeon.dma.flush)
 150          rmesa->radeon.dma.flush( rmesa->radeon.glCtx );
 151
 152       radeonEmitAOS( rmesa,
 153                      rmesa->radeon.tcl.aos_count, 0 );
 154
 155       return radeonAllocEltsOpenEnded( rmesa, rmesa->tcl.vertex_format,
 156                                        rmesa->tcl.hw_primitive, nr );
 157 }
 158
 159 #define CLOSE_ELTS() if (0)  RADEON_NEWPRIM( rmesa )
 160
 161
 162
 163 /* TODO: Try to extend existing primitive if both are identical,
 164  * discrete and there are no intervening state changes.  (Somewhat
 165  * duplicates changes to DrawArrays code)
 166  */
 167 static void radeonEmitPrim( GLcontext *ctx,
 168                        GLenum prim,
 169                        GLuint hwprim,
 170                        GLuint start,
 171                        GLuint count)
 172 {
 173    r100ContextPtr rmesa = R100_CONTEXT( ctx );
 174    radeonTclPrimitive( ctx, prim, hwprim );
 175
 176    radeonEmitAOS( rmesa,
 177                   rmesa->radeon.tcl.aos_count,
 178                   start );
 179
 180    /* Why couldn't this packet have taken an offset param?
 181     */
 182    radeonEmitVbufPrim( rmesa,
 183                        rmesa->tcl.vertex_format,
 184                        rmesa->tcl.hw_primitive,
 185                        count - start );
 186 }
 187
 188 #define EMIT_PRIM( ctx, prim, hwprim, start, count ) do {       \
 189    radeonEmitPrim( ctx, prim, hwprim, start, count );           \
 190    (void) rmesa; } while (0)
 191
 192 #define MAX_CONVERSION_SIZE 40
 193
 194 /* Try & join small primitives
 195  */
 196 #if 0
 197 #define PREFER_DISCRETE_ELT_PRIM( NR, PRIM ) 0
 198 #else
 199 #define PREFER_DISCRETE_ELT_PRIM( NR, PRIM )                    \
 200   ((NR) < 20 ||                                                 \
 201    ((NR) < 40 &&                                                \
 202     rmesa->tcl.hw_primitive == (PRIM|                           \
 203                             RADEON_CP_VC_CNTL_PRIM_WALK_IND|    \
 204                             RADEON_CP_VC_CNTL_TCL_ENABLE)))
 205 #endif
 206
 207 #ifdef MESA_BIG_ENDIAN
 208 /* We could do without (most of) this ugliness if dest was always 32 bit word aligned... */
 209 #define EMIT_ELT(dest, offset, x) do {                          \
 210         int off = offset + ( ( (GLuint)dest & 0x2 ) >> 1 );     \
 211         GLushort *des = (GLushort *)( (GLuint)dest & ~0x2 );    \
 212         (des)[ off + 1 - 2 * ( off & 1 ) ] = (GLushort)(x);     \
 213         (void)rmesa; } while (0)
 214 #else
 215 #define EMIT_ELT(dest, offset, x) do {                          \
 216         (dest)[offset] = (GLushort) (x);                        \
 217         (void)rmesa; } while (0)
 218 #endif
 219
 220 #define EMIT_TWO_ELTS(dest, offset, x, y)  *(GLuint *)(dest+offset) = ((y)<<16)|(x);
 221
 222
 223
 224 #define TAG(x) tcl_##x
 225 #include "tnl_dd/t_dd_dmatmp2.h"
 226
 227 /**********************************************************************/
 228 /*                          External entrypoints                     */
 229 /**********************************************************************/
 230
 231 void radeonEmitPrimitive( GLcontext *ctx,
 232                           GLuint first,
 233                           GLuint last,
 234                           GLuint flags )
 235 {
 236    tcl_render_tab_verts[flags&PRIM_MODE_MASK]( ctx, first, last, flags );
 237 }
 238
 239 void radeonEmitEltPrimitive( GLcontext *ctx,
 240                              GLuint first,
 241                              GLuint last,
 242                              GLuint flags )
 243 {
 244    tcl_render_tab_elts[flags&PRIM_MODE_MASK]( ctx, first, last, flags );
 245 }
 246
 247 void radeonTclPrimitive( GLcontext *ctx,
 248                          GLenum prim,
 249                          int hw_prim )
 250 {
 251    r100ContextPtr rmesa = R100_CONTEXT(ctx);
 252    GLuint se_cntl;
 253    GLuint newprim = hw_prim | RADEON_CP_VC_CNTL_TCL_ENABLE;
 254
 255    if (newprim != rmesa->tcl.hw_primitive ||
 256        !discrete_prim[hw_prim&0xf]) {
 257       RADEON_NEWPRIM( rmesa );
 258       rmesa->tcl.hw_primitive = newprim;
 259    }
 260
 261    se_cntl = rmesa->hw.set.cmd[SET_SE_CNTL];
 262    se_cntl &= ~RADEON_FLAT_SHADE_VTX_LAST;
 263
 264    if (prim == GL_POLYGON && (ctx->_TriangleCaps & DD_FLATSHADE))
 265       se_cntl |= RADEON_FLAT_SHADE_VTX_0;
 266    else
 267       se_cntl |= RADEON_FLAT_SHADE_VTX_LAST;
 268
 269    if (se_cntl != rmesa->hw.set.cmd[SET_SE_CNTL]) {
 270       RADEON_STATECHANGE( rmesa, set );
 271       rmesa->hw.set.cmd[SET_SE_CNTL] = se_cntl;
 272    }
 273 }
 274
 275 /**********************************************************************/
 276 /*             Fog blend factor computation for hw tcl                */
 277 /*             same calculation used as in t_vb_fog.c                 */
 278 /**********************************************************************/
 279
 280 #define FOG_EXP_TABLE_SIZE 256
 281 #define FOG_MAX (10.0)
 282 #define EXP_FOG_MAX .0006595
 283 #define FOG_INCR (FOG_MAX/FOG_EXP_TABLE_SIZE)
 284 static GLfloat exp_table[FOG_EXP_TABLE_SIZE];
 285
 286 #if 1
 287 #define NEG_EXP( result, narg )                                         \
 288 do {                                                                    \
 289    GLfloat f = (GLfloat) (narg * (1.0/FOG_INCR));                       \
 290    GLint k = (GLint) f;                                                 \
 291    if (k > FOG_EXP_TABLE_SIZE-2)                                        \
 292       result = (GLfloat) EXP_FOG_MAX;                                   \
 293    else                                                                 \
 294       result = exp_table[k] + (f-k)*(exp_table[k+1]-exp_table[k]);      \
 295 } while (0)
 296 #else
 297 #define NEG_EXP( result, narg )                                 \
 298 do {                                                            \
 299    result = exp(-narg);                                         \
 300 } while (0)
 301 #endif
 302
 303
 304 /**
 305  * Initialize the exp_table[] lookup table for approximating exp().
 306  */
 307 void
 308 radeonInitStaticFogData( void )
 309 {
 310    GLfloat f = 0.0F;
 311    GLint i = 0;
 312    for ( ; i < FOG_EXP_TABLE_SIZE ; i++, f += FOG_INCR) {
 313       exp_table[i] = (GLfloat) exp(-f);
 314    }
 315 }
 316
 317
 318 /**
 319  * Compute per-vertex fog blend factors from fog coordinates by
 320  * evaluating the GL_LINEAR, GL_EXP or GL_EXP2 fog function.
 321  * Fog coordinates are distances from the eye (typically between the
 322  * near and far clip plane distances).
 323  * Note the fog (eye Z) coords may be negative so we use ABS(z) below.
 324  * Fog blend factors are in the range [0,1].
 325  */
 326 float
 327 radeonComputeFogBlendFactor( GLcontext *ctx, GLfloat fogcoord )
 328 {
 329    GLfloat end  = ctx->Fog.End;
 330    GLfloat d, temp;
 331    const GLfloat z = FABSF(fogcoord);
 332
 333    switch (ctx->Fog.Mode) {
 334    case GL_LINEAR:
 335       if (ctx->Fog.Start == ctx->Fog.End)
 336          d = 1.0F;
 337       else
 338          d = 1.0F / (ctx->Fog.End - ctx->Fog.Start);
 339       temp = (end - z) * d;
 340       return CLAMP(temp, 0.0F, 1.0F);
 341       break;
 342    case GL_EXP:
 343       d = ctx->Fog.Density;
 344       NEG_EXP( temp, d * z );
 345       return temp;
 346       break;
 347    case GL_EXP2:
 348       d = ctx->Fog.Density*ctx->Fog.Density;
 349       NEG_EXP( temp, d * z * z );
 350       return temp;
 351       break;
 352    default:
 353       _mesa_problem(ctx, "Bad fog mode in make_fog_coord");
 354       return 0;
 355    }
 356 }
 357
 358 /**
 359  * Predict total emit size for next rendering operation so there is no flush in middle of rendering
 360  * Prediction has to aim towards the best possible value that is worse than worst case scenario
 361  */
 362 static GLuint radeonEnsureEmitSize( GLcontext * ctx , GLuint inputs )
 363 {
 364   r100ContextPtr rmesa = R100_CONTEXT(ctx);
 365   TNLcontext *tnl = TNL_CONTEXT(ctx);
 366   struct vertex_buffer *VB = &tnl->vb;
 367   GLuint space_required;
 368   GLuint state_size;
 369   GLuint nr_aos = 1; /* radeonEmitArrays does always emit one */
 370   int i;
 371   /* list of flags that are allocating aos object */
 372   const GLuint flags_to_check[] = {
 373     VERT_BIT_NORMAL,
 374     VERT_BIT_COLOR0,
 375     VERT_BIT_COLOR1,
 376     VERT_BIT_FOG
 377   };
 378   /* predict number of aos to emit */
 379   for (i=0; i < sizeof(flags_to_check)/sizeof(flags_to_check[0]); ++i)
 380   {
 381     if (inputs & flags_to_check[i])
 382       ++nr_aos;
 383   }
 384   for (i = 0; i < ctx->Const.MaxTextureUnits; ++i)
 385   {
 386     if (inputs & VERT_BIT_TEX(i))
 387       ++nr_aos;
 388   }
 389
 390   {
 391     /* count the prediction for state size */
 392     space_required = 0;
 393     state_size = radeonCountStateEmitSize( &rmesa->radeon );
 394     /* tcl may be changed in radeonEmitArrays so account for it if not dirty */
 395     if (!rmesa->hw.tcl.dirty)
 396       state_size += rmesa->hw.tcl.check( rmesa->radeon.glCtx, &rmesa->hw.tcl );
 397     /* predict size for elements */
 398     for (i = 0; i < VB->PrimitiveCount; ++i)
 399     {
 400       if (!VB->Primitive[i].count)
 401         continue;
 402       /* If primitive.count is less than MAX_CONVERSION_SIZE
 403          rendering code may decide convert to elts.
 404          In that case we have to make pessimistic prediction.
 405          and use larger of 2 paths. */
 406       const GLuint elts = ELTS_BUFSZ(nr_aos);
 407       const GLuint index = INDEX_BUFSZ;
 408       const GLuint vbuf = VBUF_BUFSZ;
 409       if ( (!VB->Elts && VB->Primitive[i].count >= MAX_CONVERSION_SIZE)
 410           || vbuf > index + elts)
 411         space_required += vbuf;
 412       else
 413         space_required += index + elts;
 414       space_required += VB->Primitive[i].count * 3;
 415       space_required += AOS_BUFSZ(nr_aos);
 416     }
 417     space_required += SCISSOR_BUFSZ;
 418   }
 419   /* flush the buffer in case we need more than is left. */
 420   if (rcommonEnsureCmdBufSpace(&rmesa->radeon, space_required, __FUNCTION__))
 421     return space_required + radeonCountStateEmitSize( &rmesa->radeon );
 422   else
 423     return space_required + state_size;
 424 }
 425
 426 /**********************************************************************/
 427 /*                          Render pipeline stage                     */
 428 /**********************************************************************/
 429
 430
 431 /* TCL render.
 432  */
 433 static GLboolean radeon_run_tcl_render( GLcontext *ctx,
 434                                         struct tnl_pipeline_stage *stage )
 435 {
 436    r100ContextPtr rmesa = R100_CONTEXT(ctx);
 437    TNLcontext *tnl = TNL_CONTEXT(ctx);
 438    struct vertex_buffer *VB = &tnl->vb;
 439    GLuint inputs = VERT_BIT_POS | VERT_BIT_COLOR0;
 440    GLuint i;
 441
 442    /* TODO: separate this from the swtnl pipeline
 443     */
 444    if (rmesa->radeon.TclFallback)
 445       return GL_TRUE;   /* fallback to software t&l */
 446
 447    if (VB->Count == 0)
 448       return GL_FALSE;
 449
 450    /* NOTE: inputs != tnl->render_inputs - these are the untransformed
 451     * inputs.
 452     */
 453    if (ctx->Light.Enabled) {
 454       inputs |= VERT_BIT_NORMAL;
 455    }
 456
 457    if (ctx->_TriangleCaps & DD_SEPARATE_SPECULAR) {
 458       inputs |= VERT_BIT_COLOR1;
 459    }
 460
 461    if ( (ctx->Fog.FogCoordinateSource == GL_FOG_COORD) && ctx->Fog.Enabled ) {
 462       inputs |= VERT_BIT_FOG;
 463    }
 464
 465    for (i = 0 ; i < ctx->Const.MaxTextureUnits; i++) {
 466       if (ctx->Texture.Unit[i]._ReallyEnabled) {
 467       /* TODO: probably should not emit texture coords when texgen is enabled */
 468          if (rmesa->TexGenNeedNormals[i]) {
 469             inputs |= VERT_BIT_NORMAL;
 470          }
 471          inputs |= VERT_BIT_TEX(i);
 472       }
 473    }
 474
 475    radeonReleaseArrays( ctx, ~0 );
 476    GLuint emit_end = radeonEnsureEmitSize( ctx, inputs )
 477      + rmesa->radeon.cmdbuf.cs->cdw;
 478    radeonEmitArrays( ctx, inputs );
 479
 480    rmesa->tcl.Elts = VB->Elts;
 481
 482    for (i = 0 ; i < VB->PrimitiveCount ; i++)
 483    {
 484       GLuint prim = _tnl_translate_prim(&VB->Primitive[i]);
 485       GLuint start = VB->Primitive[i].start;
 486       GLuint length = VB->Primitive[i].count;
 487
 488       if (!length)
 489          continue;
 490
 491       if (rmesa->tcl.Elts)
 492          radeonEmitEltPrimitive( ctx, start, start+length, prim );
 493       else
 494          radeonEmitPrimitive( ctx, start, start+length, prim );
 495    }
 496
 497    if (emit_end < rmesa->radeon.cmdbuf.cs->cdw)
 498       WARN_ONCE("Rendering was %d commands larger than predicted size."
 499           " We might overflow  command buffer.\n", rmesa->radeon.cmdbuf.cs->cdw - emit_end);
 500
 501    return GL_FALSE;             /* finished the pipe */
 502 }
 503
 504
 505
 506 /* Initial state for tcl stage.
 507  */
 508 const struct tnl_pipeline_stage _radeon_tcl_stage =
 509 {
 510    "radeon render",
 511    NULL,
 512    NULL,
 513    NULL,
 514    NULL,
 515    radeon_run_tcl_render        /* run */
 516 };
 517
 518
 519
 520 /**********************************************************************/
 521 /*                 Validate state at pipeline start                   */
 522 /**********************************************************************/
 523
 524
 525 /*-----------------------------------------------------------------------
 526  * Manage TCL fallbacks
 527  */
 528
 529
 530 static void transition_to_swtnl( GLcontext *ctx )
 531 {
 532    r100ContextPtr rmesa = R100_CONTEXT(ctx);
 533    TNLcontext *tnl = TNL_CONTEXT(ctx);
 534    GLuint se_cntl;
 535
 536    RADEON_NEWPRIM( rmesa );
 537    rmesa->swtcl.vertex_format = 0;
 538
 539    radeonChooseVertexState( ctx );
 540    radeonChooseRenderState( ctx );
 541
 542    _mesa_validate_all_lighting_tables( ctx );
 543
 544    tnl->Driver.NotifyMaterialChange =
 545       _mesa_validate_all_lighting_tables;
 546
 547    radeonReleaseArrays( ctx, ~0 );
 548
 549    se_cntl = rmesa->hw.set.cmd[SET_SE_CNTL];
 550    se_cntl |= RADEON_FLAT_SHADE_VTX_LAST;
 551
 552    if (se_cntl != rmesa->hw.set.cmd[SET_SE_CNTL]) {
 553       RADEON_STATECHANGE( rmesa, set );
 554       rmesa->hw.set.cmd[SET_SE_CNTL] = se_cntl;
 555    }
 556 }
 557
 558
 559 static void transition_to_hwtnl( GLcontext *ctx )
 560 {
 561    r100ContextPtr rmesa = R100_CONTEXT(ctx);
 562    TNLcontext *tnl = TNL_CONTEXT(ctx);
 563    GLuint se_coord_fmt = rmesa->hw.set.cmd[SET_SE_COORDFMT];
 564
 565    se_coord_fmt &= ~(RADEON_VTX_XY_PRE_MULT_1_OVER_W0 |
 566                      RADEON_VTX_Z_PRE_MULT_1_OVER_W0 |
 567                      RADEON_VTX_W0_IS_NOT_1_OVER_W0);
 568    se_coord_fmt |= RADEON_VTX_W0_IS_NOT_1_OVER_W0;
 569
 570    if ( se_coord_fmt != rmesa->hw.set.cmd[SET_SE_COORDFMT] ) {
 571       RADEON_STATECHANGE( rmesa, set );
 572       rmesa->hw.set.cmd[SET_SE_COORDFMT] = se_coord_fmt;
 573       _tnl_need_projected_coords( ctx, GL_FALSE );
 574    }
 575
 576    radeonUpdateMaterial( ctx );
 577
 578    tnl->Driver.NotifyMaterialChange = radeonUpdateMaterial;
 579
 580    if ( rmesa->radeon.dma.flush )
 581       rmesa->radeon.dma.flush( rmesa->radeon.glCtx );
 582
 583    rmesa->radeon.dma.flush = NULL;
 584    rmesa->swtcl.vertex_format = 0;
 585
 586    //   if (rmesa->swtcl.indexed_verts.buf)
 587    //      radeonReleaseDmaRegion( rmesa, &rmesa->swtcl.indexed_verts,
 588    //                         __FUNCTION__ );
 589
 590    if (RADEON_DEBUG & RADEON_FALLBACKS)
 591       fprintf(stderr, "Radeon end tcl fallback\n");
 592 }
 593
 594 static char *fallbackStrings[] = {
 595    "Rasterization fallback",
 596    "Unfilled triangles",
 597    "Twosided lighting, differing materials",
 598    "Materials in VB (maybe between begin/end)",
 599    "Texgen unit 0",
 600    "Texgen unit 1",
 601    "Texgen unit 2",
 602    "User disable",
 603    "Fogcoord with separate specular lighting"
 604 };
 605
 606
 607 static char *getFallbackString(GLuint bit)
 608 {
 609    int i = 0;
 610    while (bit > 1) {
 611       i++;
 612       bit >>= 1;
 613    }
 614    return fallbackStrings[i];
 615 }
 616
 617
 618
 619 void radeonTclFallback( GLcontext *ctx, GLuint bit, GLboolean mode )
 620 {
 621    r100ContextPtr rmesa = R100_CONTEXT(ctx);
 622    GLuint oldfallback = rmesa->radeon.TclFallback;
 623
 624    if (mode) {
 625       rmesa->radeon.TclFallback |= bit;
 626       if (oldfallback == 0) {
 627          if (RADEON_DEBUG & RADEON_FALLBACKS)
 628             fprintf(stderr, "Radeon begin tcl fallback %s\n",
 629                     getFallbackString( bit ));
 630          transition_to_swtnl( ctx );
 631       }
 632    }
 633    else {
 634       rmesa->radeon.TclFallback &= ~bit;
 635       if (oldfallback == bit) {
 636          if (RADEON_DEBUG & RADEON_FALLBACKS)
 637             fprintf(stderr, "Radeon end tcl fallback %s\n",
 638                     getFallbackString( bit ));
 639          transition_to_hwtnl( ctx );
 640       }
 641    }
 642 }