src/mesa/drivers/dri/radeon/radeon_tex.c

   1 /*
   2 Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and
   3                      VA Linux Systems Inc., Fremont, California.
   4
   5 All Rights Reserved.
   6
   7 Permission is hereby granted, free of charge, to any person obtaining
   8 a copy of this software and associated documentation files (the
   9 "Software"), to deal in the Software without restriction, including
  10 without limitation the rights to use, copy, modify, merge, publish,
  11 distribute, sublicense, and/or sell copies of the Software, and to
  12 permit persons to whom the Software is furnished to do so, subject to
  13 the following conditions:
  14
  15 The above copyright notice and this permission notice (including the
  16 next paragraph) shall be included in all copies or substantial
  17 portions of the Software.
  18
  19 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  20 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  21 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  22 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  23 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  24 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  25 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  26 */
  27
  28 /*
  29  * Authors:
  30  *    Gareth Hughes <gareth@valinux.com>
  31  *    Brian Paul <brianp@valinux.com>
  32  */
  33
  34 #include "main/glheader.h"
  35 #include "main/imports.h"
  36 #include "main/colormac.h"
  37 #include "main/context.h"
  38 #include "main/enums.h"
  39 #include "main/image.h"
  40 #include "main/simple_list.h"
  41 #include "main/texstore.h"
  42 #include "main/teximage.h"
  43 #include "main/texobj.h"
  44
  45 #include "radeon_context.h"
  46 #include "radeon_mipmap_tree.h"
  47 #include "radeon_state.h"
  48 #include "radeon_ioctl.h"
  49 #include "radeon_swtcl.h"
  50 #include "radeon_tex.h"
  51
  52 #include "xmlpool.h"
  53
  54
  55
  56 /**
  57  * Set the texture wrap modes.
  58  *
  59  * \param t Texture object whose wrap modes are to be set
  60  * \param swrap Wrap mode for the \a s texture coordinate
  61  * \param twrap Wrap mode for the \a t texture coordinate
  62  */
  63
  64 static void radeonSetTexWrap( radeonTexObjPtr t, GLenum swrap, GLenum twrap )
  65 {
  66    GLboolean  is_clamp = GL_FALSE;
  67    GLboolean  is_clamp_to_border = GL_FALSE;
  68
  69    t->pp_txfilter &= ~(RADEON_CLAMP_S_MASK | RADEON_CLAMP_T_MASK | RADEON_BORDER_MODE_D3D);
  70
  71    switch ( swrap ) {
  72    case GL_REPEAT:
  73       t->pp_txfilter |= RADEON_CLAMP_S_WRAP;
  74       break;
  75    case GL_CLAMP:
  76       t->pp_txfilter |= RADEON_CLAMP_S_CLAMP_GL;
  77       is_clamp = GL_TRUE;
  78       break;
  79    case GL_CLAMP_TO_EDGE:
  80       t->pp_txfilter |= RADEON_CLAMP_S_CLAMP_LAST;
  81       break;
  82    case GL_CLAMP_TO_BORDER:
  83       t->pp_txfilter |= RADEON_CLAMP_S_CLAMP_GL;
  84       is_clamp_to_border = GL_TRUE;
  85       break;
  86    case GL_MIRRORED_REPEAT:
  87       t->pp_txfilter |= RADEON_CLAMP_S_MIRROR;
  88       break;
  89    case GL_MIRROR_CLAMP_EXT:
  90       t->pp_txfilter |= RADEON_CLAMP_S_MIRROR_CLAMP_GL;
  91       is_clamp = GL_TRUE;
  92       break;
  93    case GL_MIRROR_CLAMP_TO_EDGE_EXT:
  94       t->pp_txfilter |= RADEON_CLAMP_S_MIRROR_CLAMP_LAST;
  95       break;
  96    case GL_MIRROR_CLAMP_TO_BORDER_EXT:
  97       t->pp_txfilter |= RADEON_CLAMP_S_MIRROR_CLAMP_GL;
  98       is_clamp_to_border = GL_TRUE;
  99       break;
 100    default:
 101       _mesa_problem(NULL, "bad S wrap mode in %s", __FUNCTION__);
 102    }
 103
 104    switch ( twrap ) {
 105    case GL_REPEAT:
 106       t->pp_txfilter |= RADEON_CLAMP_T_WRAP;
 107       break;
 108    case GL_CLAMP:
 109       t->pp_txfilter |= RADEON_CLAMP_T_CLAMP_GL;
 110       is_clamp = GL_TRUE;
 111       break;
 112    case GL_CLAMP_TO_EDGE:
 113       t->pp_txfilter |= RADEON_CLAMP_T_CLAMP_LAST;
 114       break;
 115    case GL_CLAMP_TO_BORDER:
 116       t->pp_txfilter |= RADEON_CLAMP_T_CLAMP_GL;
 117       is_clamp_to_border = GL_TRUE;
 118       break;
 119    case GL_MIRRORED_REPEAT:
 120       t->pp_txfilter |= RADEON_CLAMP_T_MIRROR;
 121       break;
 122    case GL_MIRROR_CLAMP_EXT:
 123       t->pp_txfilter |= RADEON_CLAMP_T_MIRROR_CLAMP_GL;
 124       is_clamp = GL_TRUE;
 125       break;
 126    case GL_MIRROR_CLAMP_TO_EDGE_EXT:
 127       t->pp_txfilter |= RADEON_CLAMP_T_MIRROR_CLAMP_LAST;
 128       break;
 129    case GL_MIRROR_CLAMP_TO_BORDER_EXT:
 130       t->pp_txfilter |= RADEON_CLAMP_T_MIRROR_CLAMP_GL;
 131       is_clamp_to_border = GL_TRUE;
 132       break;
 133    default:
 134       _mesa_problem(NULL, "bad T wrap mode in %s", __FUNCTION__);
 135    }
 136
 137    if ( is_clamp_to_border ) {
 138       t->pp_txfilter |= RADEON_BORDER_MODE_D3D;
 139    }
 140
 141    t->border_fallback = (is_clamp && is_clamp_to_border);
 142 }
 143
 144 static void radeonSetTexMaxAnisotropy( radeonTexObjPtr t, GLfloat max )
 145 {
 146    t->pp_txfilter &= ~RADEON_MAX_ANISO_MASK;
 147
 148    if ( max == 1.0 ) {
 149       t->pp_txfilter |= RADEON_MAX_ANISO_1_TO_1;
 150    } else if ( max <= 2.0 ) {
 151       t->pp_txfilter |= RADEON_MAX_ANISO_2_TO_1;
 152    } else if ( max <= 4.0 ) {
 153       t->pp_txfilter |= RADEON_MAX_ANISO_4_TO_1;
 154    } else if ( max <= 8.0 ) {
 155       t->pp_txfilter |= RADEON_MAX_ANISO_8_TO_1;
 156    } else {
 157       t->pp_txfilter |= RADEON_MAX_ANISO_16_TO_1;
 158    }
 159 }
 160
 161 /**
 162  * Set the texture magnification and minification modes.
 163  *
 164  * \param t Texture whose filter modes are to be set
 165  * \param minf Texture minification mode
 166  * \param magf Texture magnification mode
 167  */
 168
 169 static void radeonSetTexFilter( radeonTexObjPtr t, GLenum minf, GLenum magf )
 170 {
 171    GLuint anisotropy = (t->pp_txfilter & RADEON_MAX_ANISO_MASK);
 172
 173    /* Force revalidation to account for switches from/to mipmapping. */
 174    t->validated = GL_FALSE;
 175
 176    t->pp_txfilter &= ~(RADEON_MIN_FILTER_MASK | RADEON_MAG_FILTER_MASK);
 177
 178    /* r100 chips can't handle mipmaps/aniso for cubemap/volume textures */
 179    if ( t->base.Target == GL_TEXTURE_CUBE_MAP ) {
 180       switch ( minf ) {
 181       case GL_NEAREST:
 182       case GL_NEAREST_MIPMAP_NEAREST:
 183       case GL_NEAREST_MIPMAP_LINEAR:
 184          t->pp_txfilter |= RADEON_MIN_FILTER_NEAREST;
 185          break;
 186       case GL_LINEAR:
 187       case GL_LINEAR_MIPMAP_NEAREST:
 188       case GL_LINEAR_MIPMAP_LINEAR:
 189          t->pp_txfilter |= RADEON_MIN_FILTER_LINEAR;
 190          break;
 191       default:
 192          break;
 193       }
 194    }
 195    else if ( anisotropy == RADEON_MAX_ANISO_1_TO_1 ) {
 196       switch ( minf ) {
 197       case GL_NEAREST:
 198          t->pp_txfilter |= RADEON_MIN_FILTER_NEAREST;
 199          break;
 200       case GL_LINEAR:
 201          t->pp_txfilter |= RADEON_MIN_FILTER_LINEAR;
 202          break;
 203       case GL_NEAREST_MIPMAP_NEAREST:
 204          t->pp_txfilter |= RADEON_MIN_FILTER_NEAREST_MIP_NEAREST;
 205          break;
 206       case GL_NEAREST_MIPMAP_LINEAR:
 207          t->pp_txfilter |= RADEON_MIN_FILTER_LINEAR_MIP_NEAREST;
 208          break;
 209       case GL_LINEAR_MIPMAP_NEAREST:
 210          t->pp_txfilter |= RADEON_MIN_FILTER_NEAREST_MIP_LINEAR;
 211          break;
 212       case GL_LINEAR_MIPMAP_LINEAR:
 213          t->pp_txfilter |= RADEON_MIN_FILTER_LINEAR_MIP_LINEAR;
 214          break;
 215       }
 216    } else {
 217       switch ( minf ) {
 218       case GL_NEAREST:
 219          t->pp_txfilter |= RADEON_MIN_FILTER_ANISO_NEAREST;
 220          break;
 221       case GL_LINEAR:
 222          t->pp_txfilter |= RADEON_MIN_FILTER_ANISO_LINEAR;
 223          break;
 224       case GL_NEAREST_MIPMAP_NEAREST:
 225       case GL_LINEAR_MIPMAP_NEAREST:
 226          t->pp_txfilter |= RADEON_MIN_FILTER_ANISO_NEAREST_MIP_NEAREST;
 227          break;
 228       case GL_NEAREST_MIPMAP_LINEAR:
 229       case GL_LINEAR_MIPMAP_LINEAR:
 230          t->pp_txfilter |= RADEON_MIN_FILTER_ANISO_NEAREST_MIP_LINEAR;
 231          break;
 232       }
 233    }
 234
 235    switch ( magf ) {
 236    case GL_NEAREST:
 237       t->pp_txfilter |= RADEON_MAG_FILTER_NEAREST;
 238       break;
 239    case GL_LINEAR:
 240       t->pp_txfilter |= RADEON_MAG_FILTER_LINEAR;
 241       break;
 242    }
 243 }
 244
 245 static void radeonSetTexBorderColor( radeonTexObjPtr t, const GLfloat color[4] )
 246 {
 247    GLubyte c[4];
 248    CLAMPED_FLOAT_TO_UBYTE(c[0], color[0]);
 249    CLAMPED_FLOAT_TO_UBYTE(c[1], color[1]);
 250    CLAMPED_FLOAT_TO_UBYTE(c[2], color[2]);
 251    CLAMPED_FLOAT_TO_UBYTE(c[3], color[3]);
 252    t->pp_border_color = radeonPackColor( 4, c[0], c[1], c[2], c[3] );
 253 }
 254
 255 #define SCALED_FLOAT_TO_BYTE( x, scale ) \
 256                 (((GLuint)((255.0F / scale) * (x))) / 2)
 257
 258 static void radeonTexEnv( GLcontext *ctx, GLenum target,
 259                           GLenum pname, const GLfloat *param )
 260 {
 261    r100ContextPtr rmesa = R100_CONTEXT(ctx);
 262    GLuint unit = ctx->Texture.CurrentUnit;
 263    struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit];
 264
 265    if ( RADEON_DEBUG & RADEON_STATE ) {
 266       fprintf( stderr, "%s( %s )\n",
 267                __FUNCTION__, _mesa_lookup_enum_by_nr( pname ) );
 268    }
 269
 270    switch ( pname ) {
 271    case GL_TEXTURE_ENV_COLOR: {
 272       GLubyte c[4];
 273       GLuint envColor;
 274       UNCLAMPED_FLOAT_TO_RGBA_CHAN( c, texUnit->EnvColor );
 275       envColor = radeonPackColor( 4, c[0], c[1], c[2], c[3] );
 276       if ( rmesa->hw.tex[unit].cmd[TEX_PP_TFACTOR] != envColor ) {
 277          RADEON_STATECHANGE( rmesa, tex[unit] );
 278          rmesa->hw.tex[unit].cmd[TEX_PP_TFACTOR] = envColor;
 279       }
 280       break;
 281    }
 282
 283    case GL_TEXTURE_LOD_BIAS_EXT: {
 284       GLfloat bias, min;
 285       GLuint b;
 286
 287       /* The Radeon's LOD bias is a signed 2's complement value with a
 288        * range of -1.0 <= bias < 4.0.  We break this into two linear
 289        * functions, one mapping [-1.0,0.0] to [-128,0] and one mapping
 290        * [0.0,4.0] to [0,127].
 291        */
 292       min = driQueryOptionb (&rmesa->radeon.optionCache, "no_neg_lod_bias") ?
 293           0.0 : -1.0;
 294       bias = CLAMP( *param, min, 4.0 );
 295       if ( bias == 0 ) {
 296          b = 0;
 297       } else if ( bias > 0 ) {
 298          b = ((GLuint)SCALED_FLOAT_TO_BYTE( bias, 4.0 )) << RADEON_LOD_BIAS_SHIFT;
 299       } else {
 300          b = ((GLuint)SCALED_FLOAT_TO_BYTE( bias, 1.0 )) << RADEON_LOD_BIAS_SHIFT;
 301       }
 302       if ( (rmesa->hw.tex[unit].cmd[TEX_PP_TXFILTER] & RADEON_LOD_BIAS_MASK) != b ) {
 303          RADEON_STATECHANGE( rmesa, tex[unit] );
 304          rmesa->hw.tex[unit].cmd[TEX_PP_TXFILTER] &= ~RADEON_LOD_BIAS_MASK;
 305          rmesa->hw.tex[unit].cmd[TEX_PP_TXFILTER] |= (b & RADEON_LOD_BIAS_MASK);
 306       }
 307       break;
 308    }
 309
 310    default:
 311       return;
 312    }
 313 }
 314
 315
 316 /**
 317  * Changes variables and flags for a state update, which will happen at the
 318  * next UpdateTextureState
 319  */
 320
 321 static void radeonTexParameter( GLcontext *ctx, GLenum target,
 322                                 struct gl_texture_object *texObj,
 323                                 GLenum pname, const GLfloat *params )
 324 {
 325    radeonTexObj* t = radeon_tex_obj(texObj);
 326
 327    radeon_print(RADEON_TEXTURE, RADEON_VERBOSE, "%s( %s )\n", __FUNCTION__,
 328                _mesa_lookup_enum_by_nr( pname ) );
 329
 330    switch ( pname ) {
 331    case GL_TEXTURE_MIN_FILTER:
 332    case GL_TEXTURE_MAG_FILTER:
 333    case GL_TEXTURE_MAX_ANISOTROPY_EXT:
 334       radeonSetTexMaxAnisotropy( t, texObj->MaxAnisotropy );
 335       radeonSetTexFilter( t, texObj->MinFilter, texObj->MagFilter );
 336       break;
 337
 338    case GL_TEXTURE_WRAP_S:
 339    case GL_TEXTURE_WRAP_T:
 340       radeonSetTexWrap( t, texObj->WrapS, texObj->WrapT );
 341       break;
 342
 343    case GL_TEXTURE_BORDER_COLOR:
 344       radeonSetTexBorderColor( t, texObj->BorderColor.f );
 345       break;
 346
 347    case GL_TEXTURE_BASE_LEVEL:
 348    case GL_TEXTURE_MAX_LEVEL:
 349    case GL_TEXTURE_MIN_LOD:
 350    case GL_TEXTURE_MAX_LOD:
 351       t->validated = GL_FALSE;
 352       break;
 353
 354    default:
 355       return;
 356    }
 357 }
 358
 359 static void radeonDeleteTexture( GLcontext *ctx,
 360                                  struct gl_texture_object *texObj )
 361 {
 362    r100ContextPtr rmesa = R100_CONTEXT(ctx);
 363    radeonTexObj* t = radeon_tex_obj(texObj);
 364    int i;
 365
 366    radeon_print(RADEON_TEXTURE, RADEON_NORMAL,
 367          "%s( %p (target = %s) )\n", __FUNCTION__, (void *)texObj,
 368                _mesa_lookup_enum_by_nr( texObj->Target ) );
 369
 370    if ( rmesa ) {
 371      radeon_firevertices(&rmesa->radeon);
 372      for ( i = 0 ; i < rmesa->radeon.glCtx->Const.MaxTextureUnits ; i++ ) {
 373        if ( t == rmesa->state.texture.unit[i].texobj ) {
 374          rmesa->state.texture.unit[i].texobj = NULL;
 375          rmesa->hw.tex[i].dirty = GL_FALSE;
 376          rmesa->hw.cube[i].dirty = GL_FALSE;
 377        }
 378      }
 379    }
 380
 381    radeon_miptree_unreference(&t->mt);
 382
 383    /* Free mipmap images and the texture object itself */
 384    _mesa_delete_texture_object(ctx, texObj);
 385 }
 386
 387 /* Need:
 388  *  - Same GEN_MODE for all active bits
 389  *  - Same EyePlane/ObjPlane for all active bits when using Eye/Obj
 390  *  - STRQ presumably all supported (matrix means incoming R values
 391  *    can end up in STQ, this has implications for vertex support,
 392  *    presumably ok if maos is used, though?)
 393  *
 394  * Basically impossible to do this on the fly - just collect some
 395  * basic info & do the checks from ValidateState().
 396  */
 397 static void radeonTexGen( GLcontext *ctx,
 398                           GLenum coord,
 399                           GLenum pname,
 400                           const GLfloat *params )
 401 {
 402    r100ContextPtr rmesa = R100_CONTEXT(ctx);
 403    GLuint unit = ctx->Texture.CurrentUnit;
 404    rmesa->recheck_texgen[unit] = GL_TRUE;
 405 }
 406
 407 /**
 408  * Allocate a new texture object.
 409  * Called via ctx->Driver.NewTextureObject.
 410  * Note: we could use containment here to 'derive' the driver-specific
 411  * texture object from the core mesa gl_texture_object.  Not done at this time.
 412  */
 413 static struct gl_texture_object *
 414 radeonNewTextureObject( GLcontext *ctx, GLuint name, GLenum target )
 415 {
 416    r100ContextPtr rmesa = R100_CONTEXT(ctx);
 417    radeonTexObj* t = CALLOC_STRUCT(radeon_tex_obj);
 418
 419    _mesa_initialize_texture_object(&t->base, name, target);
 420    t->base.MaxAnisotropy = rmesa->radeon.initialMaxAnisotropy;
 421
 422    t->border_fallback = GL_FALSE;
 423
 424    t->pp_txfilter = RADEON_BORDER_MODE_OGL;
 425    t->pp_txformat = (RADEON_TXFORMAT_ENDIAN_NO_SWAP |
 426                      RADEON_TXFORMAT_PERSPECTIVE_ENABLE);
 427
 428    radeonSetTexWrap( t, t->base.WrapS, t->base.WrapT );
 429    radeonSetTexMaxAnisotropy( t, t->base.MaxAnisotropy );
 430    radeonSetTexFilter( t, t->base.MinFilter, t->base.MagFilter );
 431    radeonSetTexBorderColor( t, t->base.BorderColor.f );
 432    return &t->base;
 433 }
 434
 435
 436
 437 void radeonInitTextureFuncs( struct dd_function_table *functions )
 438 {
 439    functions->ChooseTextureFormat       = radeonChooseTextureFormat_mesa;
 440    functions->TexImage1D                = radeonTexImage1D;
 441    functions->TexImage2D                = radeonTexImage2D;
 442    functions->TexSubImage1D             = radeonTexSubImage1D;
 443    functions->TexSubImage2D             = radeonTexSubImage2D;
 444    functions->GetTexImage               = radeonGetTexImage;
 445    functions->GetCompressedTexImage     = radeonGetCompressedTexImage;
 446
 447    functions->NewTextureObject          = radeonNewTextureObject;
 448    //   functions->BindTexture          = radeonBindTexture;
 449    functions->DeleteTexture             = radeonDeleteTexture;
 450
 451    functions->TexEnv                    = radeonTexEnv;
 452    functions->TexParameter              = radeonTexParameter;
 453    functions->TexGen                    = radeonTexGen;
 454
 455    functions->CompressedTexImage2D      = radeonCompressedTexImage2D;
 456    functions->CompressedTexSubImage2D   = radeonCompressedTexSubImage2D;
 457
 458    functions->GenerateMipmap = radeonGenerateMipmap;
 459
 460    functions->NewTextureImage = radeonNewTextureImage;
 461    functions->FreeTexImageData = radeonFreeTexImageData;
 462    functions->MapTexture = radeonMapTexture;
 463    functions->UnmapTexture = radeonUnmapTexture;
 464
 465    driInitTextureFormats();
 466 }