2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
27 * \file ir_to_mesa.cpp
29 * Translates the IR to ARB_fragment_program text if possible,
35 #include "ir_visitor.h"
36 #include "ir_print_visitor.h"
37 #include "ir_expression_flattening.h"
38 #include "glsl_types.h"
39 #include "glsl_parser_extras.h"
40 #include "../glsl/program.h"
41 #include "ir_optimization.h"
45 #include "main/mtypes.h"
46 #include "main/shaderobj.h"
47 #include "main/uniforms.h"
48 #include "program/prog_instruction.h"
49 #include "program/prog_optimize.h"
50 #include "program/prog_print.h"
51 #include "program/program.h"
52 #include "program/prog_uniform.h"
53 #include "program/prog_parameter.h"
57 * This struct is a corresponding struct to Mesa prog_src_register, with
60 typedef struct ir_to_mesa_src_reg
{
61 int file
; /**< PROGRAM_* from Mesa */
62 int index
; /**< temporary index, VERT_ATTRIB_*, FRAG_ATTRIB_*, etc. */
63 GLuint swizzle
; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
64 int negate
; /**< NEGATE_XYZW mask from mesa */
65 /** Register index should be offset by the integer in this reg. */
66 ir_to_mesa_src_reg
*reladdr
;
69 typedef struct ir_to_mesa_dst_reg
{
70 int file
; /**< PROGRAM_* from Mesa */
71 int index
; /**< temporary index, VERT_ATTRIB_*, FRAG_ATTRIB_*, etc. */
72 int writemask
; /**< Bitfield of WRITEMASK_[XYZW] */
74 /** Register index should be offset by the integer in this reg. */
75 ir_to_mesa_src_reg
*reladdr
;
78 extern ir_to_mesa_src_reg ir_to_mesa_undef
;
80 class ir_to_mesa_instruction
: public exec_node
{
83 ir_to_mesa_dst_reg dst_reg
;
84 ir_to_mesa_src_reg src_reg
[3];
85 /** Pointer to the ir source this tree came from for debugging */
87 GLboolean cond_update
;
88 int sampler
; /**< sampler index */
89 int tex_target
; /**< One of TEXTURE_*_INDEX */
92 class function_entry
*function
; /* Set on OPCODE_CAL or OPCODE_BGNSUB */
95 class variable_storage
: public exec_node
{
97 variable_storage(ir_variable
*var
, int file
, int index
)
98 : file(file
), index(index
), var(var
)
105 ir_variable
*var
; /* variable that maps to this, if any */
108 class function_entry
: public exec_node
{
110 ir_function_signature
*sig
;
113 * identifier of this function signature used by the program.
115 * At the point that Mesa instructions for function calls are
116 * generated, we don't know the address of the first instruction of
117 * the function body. So we make the BranchTarget that is called a
118 * small integer and rewrite them during set_branchtargets().
123 * Pointer to first instruction of the function body.
125 * Set during function body emits after main() is processed.
127 ir_to_mesa_instruction
*bgn_inst
;
130 * Index of the first instruction of the function body in actual
133 * Set after convertion from ir_to_mesa_instruction to prog_instruction.
137 /** Storage for the return value. */
138 ir_to_mesa_src_reg return_reg
;
141 class ir_to_mesa_visitor
: public ir_visitor
{
143 ir_to_mesa_visitor();
145 function_entry
*current_function
;
148 struct gl_program
*prog
;
152 variable_storage
*find_variable_storage(ir_variable
*var
);
154 function_entry
*get_function_signature(ir_function_signature
*sig
);
156 ir_to_mesa_src_reg
get_temp(const glsl_type
*type
);
157 void reladdr_to_temp(ir_instruction
*ir
,
158 ir_to_mesa_src_reg
*reg
, int *num_reladdr
);
160 struct ir_to_mesa_src_reg
src_reg_for_float(float val
);
163 * \name Visit methods
165 * As typical for the visitor pattern, there must be one \c visit method for
166 * each concrete subclass of \c ir_instruction. Virtual base classes within
167 * the hierarchy should not have \c visit methods.
170 virtual void visit(ir_variable
*);
171 virtual void visit(ir_loop
*);
172 virtual void visit(ir_loop_jump
*);
173 virtual void visit(ir_function_signature
*);
174 virtual void visit(ir_function
*);
175 virtual void visit(ir_expression
*);
176 virtual void visit(ir_swizzle
*);
177 virtual void visit(ir_dereference_variable
*);
178 virtual void visit(ir_dereference_array
*);
179 virtual void visit(ir_dereference_record
*);
180 virtual void visit(ir_assignment
*);
181 virtual void visit(ir_constant
*);
182 virtual void visit(ir_call
*);
183 virtual void visit(ir_return
*);
184 virtual void visit(ir_discard
*);
185 virtual void visit(ir_texture
*);
186 virtual void visit(ir_if
*);
189 struct ir_to_mesa_src_reg result
;
191 /** List of variable_storage */
194 /** List of function_entry */
195 exec_list function_signatures
;
196 int next_signature_id
;
198 /** List of ir_to_mesa_instruction */
199 exec_list instructions
;
201 ir_to_mesa_instruction
*ir_to_mesa_emit_op0(ir_instruction
*ir
,
202 enum prog_opcode op
);
204 ir_to_mesa_instruction
*ir_to_mesa_emit_op1(ir_instruction
*ir
,
206 ir_to_mesa_dst_reg dst
,
207 ir_to_mesa_src_reg src0
);
209 ir_to_mesa_instruction
*ir_to_mesa_emit_op2(ir_instruction
*ir
,
211 ir_to_mesa_dst_reg dst
,
212 ir_to_mesa_src_reg src0
,
213 ir_to_mesa_src_reg src1
);
215 ir_to_mesa_instruction
*ir_to_mesa_emit_op3(ir_instruction
*ir
,
217 ir_to_mesa_dst_reg dst
,
218 ir_to_mesa_src_reg src0
,
219 ir_to_mesa_src_reg src1
,
220 ir_to_mesa_src_reg src2
);
222 void ir_to_mesa_emit_scalar_op1(ir_instruction
*ir
,
224 ir_to_mesa_dst_reg dst
,
225 ir_to_mesa_src_reg src0
);
227 void ir_to_mesa_emit_scalar_op2(ir_instruction
*ir
,
229 ir_to_mesa_dst_reg dst
,
230 ir_to_mesa_src_reg src0
,
231 ir_to_mesa_src_reg src1
);
233 GLboolean
try_emit_mad(ir_expression
*ir
,
237 int sampler_map_size
;
239 void map_sampler(int location
, int sampler
);
240 int get_sampler_number(int location
);
245 ir_to_mesa_src_reg ir_to_mesa_undef
= {
246 PROGRAM_UNDEFINED
, 0, SWIZZLE_NOOP
, NEGATE_NONE
, NULL
,
249 ir_to_mesa_dst_reg ir_to_mesa_undef_dst
= {
250 PROGRAM_UNDEFINED
, 0, SWIZZLE_NOOP
, COND_TR
, NULL
,
253 ir_to_mesa_dst_reg ir_to_mesa_address_reg
= {
254 PROGRAM_ADDRESS
, 0, WRITEMASK_X
, COND_TR
, NULL
257 static int swizzle_for_size(int size
)
259 int size_swizzles
[4] = {
260 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
),
261 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Y
, SWIZZLE_Y
),
262 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_Z
),
263 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
),
266 return size_swizzles
[size
- 1];
269 ir_to_mesa_instruction
*
270 ir_to_mesa_visitor::ir_to_mesa_emit_op3(ir_instruction
*ir
,
272 ir_to_mesa_dst_reg dst
,
273 ir_to_mesa_src_reg src0
,
274 ir_to_mesa_src_reg src1
,
275 ir_to_mesa_src_reg src2
)
277 ir_to_mesa_instruction
*inst
= new(mem_ctx
) ir_to_mesa_instruction();
280 /* If we have to do relative addressing, we want to load the ARL
281 * reg directly for one of the regs, and preload the other reladdr
282 * sources into temps.
284 num_reladdr
+= dst
.reladdr
!= NULL
;
285 num_reladdr
+= src0
.reladdr
!= NULL
;
286 num_reladdr
+= src1
.reladdr
!= NULL
;
287 num_reladdr
+= src2
.reladdr
!= NULL
;
289 reladdr_to_temp(ir
, &src2
, &num_reladdr
);
290 reladdr_to_temp(ir
, &src1
, &num_reladdr
);
291 reladdr_to_temp(ir
, &src0
, &num_reladdr
);
294 ir_to_mesa_emit_op1(ir
, OPCODE_ARL
, ir_to_mesa_address_reg
,
299 assert(num_reladdr
== 0);
303 inst
->src_reg
[0] = src0
;
304 inst
->src_reg
[1] = src1
;
305 inst
->src_reg
[2] = src2
;
308 inst
->function
= NULL
;
310 this->instructions
.push_tail(inst
);
316 ir_to_mesa_instruction
*
317 ir_to_mesa_visitor::ir_to_mesa_emit_op2(ir_instruction
*ir
,
319 ir_to_mesa_dst_reg dst
,
320 ir_to_mesa_src_reg src0
,
321 ir_to_mesa_src_reg src1
)
323 return ir_to_mesa_emit_op3(ir
, op
, dst
, src0
, src1
, ir_to_mesa_undef
);
326 ir_to_mesa_instruction
*
327 ir_to_mesa_visitor::ir_to_mesa_emit_op1(ir_instruction
*ir
,
329 ir_to_mesa_dst_reg dst
,
330 ir_to_mesa_src_reg src0
)
332 return ir_to_mesa_emit_op3(ir
, op
, dst
,
333 src0
, ir_to_mesa_undef
, ir_to_mesa_undef
);
336 ir_to_mesa_instruction
*
337 ir_to_mesa_visitor::ir_to_mesa_emit_op0(ir_instruction
*ir
,
340 return ir_to_mesa_emit_op3(ir
, op
, ir_to_mesa_undef_dst
,
347 ir_to_mesa_visitor::map_sampler(int location
, int sampler
)
349 if (this->sampler_map_size
<= location
) {
350 this->sampler_map
= talloc_realloc(this->mem_ctx
, this->sampler_map
,
352 this->sampler_map_size
= location
+ 1;
355 this->sampler_map
[location
] = sampler
;
359 ir_to_mesa_visitor::get_sampler_number(int location
)
361 assert(location
< this->sampler_map_size
);
362 return this->sampler_map
[location
];
365 inline ir_to_mesa_dst_reg
366 ir_to_mesa_dst_reg_from_src(ir_to_mesa_src_reg reg
)
368 ir_to_mesa_dst_reg dst_reg
;
370 dst_reg
.file
= reg
.file
;
371 dst_reg
.index
= reg
.index
;
372 dst_reg
.writemask
= WRITEMASK_XYZW
;
373 dst_reg
.cond_mask
= COND_TR
;
374 dst_reg
.reladdr
= reg
.reladdr
;
379 inline ir_to_mesa_src_reg
380 ir_to_mesa_src_reg_from_dst(ir_to_mesa_dst_reg reg
)
382 ir_to_mesa_src_reg src_reg
;
384 src_reg
.file
= reg
.file
;
385 src_reg
.index
= reg
.index
;
386 src_reg
.swizzle
= SWIZZLE_XYZW
;
388 src_reg
.reladdr
= reg
.reladdr
;
394 * Emits Mesa scalar opcodes to produce unique answers across channels.
396 * Some Mesa opcodes are scalar-only, like ARB_fp/vp. The src X
397 * channel determines the result across all channels. So to do a vec4
398 * of this operation, we want to emit a scalar per source channel used
399 * to produce dest channels.
402 ir_to_mesa_visitor::ir_to_mesa_emit_scalar_op2(ir_instruction
*ir
,
404 ir_to_mesa_dst_reg dst
,
405 ir_to_mesa_src_reg orig_src0
,
406 ir_to_mesa_src_reg orig_src1
)
409 int done_mask
= ~dst
.writemask
;
411 /* Mesa RCP is a scalar operation splatting results to all channels,
412 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
415 for (i
= 0; i
< 4; i
++) {
416 GLuint this_mask
= (1 << i
);
417 ir_to_mesa_instruction
*inst
;
418 ir_to_mesa_src_reg src0
= orig_src0
;
419 ir_to_mesa_src_reg src1
= orig_src1
;
421 if (done_mask
& this_mask
)
424 GLuint src0_swiz
= GET_SWZ(src0
.swizzle
, i
);
425 GLuint src1_swiz
= GET_SWZ(src1
.swizzle
, i
);
426 for (j
= i
+ 1; j
< 4; j
++) {
427 if (!(done_mask
& (1 << j
)) &&
428 GET_SWZ(src0
.swizzle
, j
) == src0_swiz
&&
429 GET_SWZ(src1
.swizzle
, j
) == src1_swiz
) {
430 this_mask
|= (1 << j
);
433 src0
.swizzle
= MAKE_SWIZZLE4(src0_swiz
, src0_swiz
,
434 src0_swiz
, src0_swiz
);
435 src1
.swizzle
= MAKE_SWIZZLE4(src1_swiz
, src1_swiz
,
436 src1_swiz
, src1_swiz
);
438 inst
= ir_to_mesa_emit_op2(ir
, op
,
442 inst
->dst_reg
.writemask
= this_mask
;
443 done_mask
|= this_mask
;
448 ir_to_mesa_visitor::ir_to_mesa_emit_scalar_op1(ir_instruction
*ir
,
450 ir_to_mesa_dst_reg dst
,
451 ir_to_mesa_src_reg src0
)
453 ir_to_mesa_src_reg undef
= ir_to_mesa_undef
;
455 undef
.swizzle
= SWIZZLE_XXXX
;
457 ir_to_mesa_emit_scalar_op2(ir
, op
, dst
, src0
, undef
);
460 struct ir_to_mesa_src_reg
461 ir_to_mesa_visitor::src_reg_for_float(float val
)
463 ir_to_mesa_src_reg src_reg
;
465 src_reg
.file
= PROGRAM_CONSTANT
;
466 src_reg
.index
= _mesa_add_unnamed_constant(this->prog
->Parameters
,
467 &val
, 1, &src_reg
.swizzle
);
468 src_reg
.reladdr
= NULL
;
475 type_size(const struct glsl_type
*type
)
480 switch (type
->base_type
) {
483 case GLSL_TYPE_FLOAT
:
485 if (type
->is_matrix()) {
486 return type
->matrix_columns
;
488 /* Regardless of size of vector, it gets a vec4. This is bad
489 * packing for things like floats, but otherwise arrays become a
490 * mess. Hopefully a later pass over the code can pack scalars
491 * down if appropriate.
495 case GLSL_TYPE_ARRAY
:
496 return type_size(type
->fields
.array
) * type
->length
;
497 case GLSL_TYPE_STRUCT
:
499 for (i
= 0; i
< type
->length
; i
++) {
500 size
+= type_size(type
->fields
.structure
[i
].type
);
509 * In the initial pass of codegen, we assign temporary numbers to
510 * intermediate results. (not SSA -- variable assignments will reuse
511 * storage). Actual register allocation for the Mesa VM occurs in a
512 * pass over the Mesa IR later.
515 ir_to_mesa_visitor::get_temp(const glsl_type
*type
)
517 ir_to_mesa_src_reg src_reg
;
521 assert(!type
->is_array());
523 src_reg
.file
= PROGRAM_TEMPORARY
;
524 src_reg
.index
= next_temp
;
525 src_reg
.reladdr
= NULL
;
526 next_temp
+= type_size(type
);
528 for (i
= 0; i
< type
->vector_elements
; i
++)
531 swizzle
[i
] = type
->vector_elements
- 1;
532 src_reg
.swizzle
= MAKE_SWIZZLE4(swizzle
[0], swizzle
[1],
533 swizzle
[2], swizzle
[3]);
540 ir_to_mesa_visitor::find_variable_storage(ir_variable
*var
)
543 variable_storage
*entry
;
545 foreach_iter(exec_list_iterator
, iter
, this->variables
) {
546 entry
= (variable_storage
*)iter
.get();
548 if (entry
->var
== var
)
556 ir_to_mesa_visitor::visit(ir_variable
*ir
)
562 ir_to_mesa_visitor::visit(ir_loop
*ir
)
566 assert(!ir
->increment
);
567 assert(!ir
->counter
);
569 ir_to_mesa_emit_op0(NULL
, OPCODE_BGNLOOP
);
570 visit_exec_list(&ir
->body_instructions
, this);
571 ir_to_mesa_emit_op0(NULL
, OPCODE_ENDLOOP
);
575 ir_to_mesa_visitor::visit(ir_loop_jump
*ir
)
578 case ir_loop_jump::jump_break
:
579 ir_to_mesa_emit_op0(NULL
, OPCODE_BRK
);
581 case ir_loop_jump::jump_continue
:
582 ir_to_mesa_emit_op0(NULL
, OPCODE_CONT
);
589 ir_to_mesa_visitor::visit(ir_function_signature
*ir
)
596 ir_to_mesa_visitor::visit(ir_function
*ir
)
598 /* Ignore function bodies other than main() -- we shouldn't see calls to
599 * them since they should all be inlined before we get to ir_to_mesa.
601 if (strcmp(ir
->name
, "main") == 0) {
602 const ir_function_signature
*sig
;
605 sig
= ir
->matching_signature(&empty
);
609 foreach_iter(exec_list_iterator
, iter
, sig
->body
) {
610 ir_instruction
*ir
= (ir_instruction
*)iter
.get();
618 ir_to_mesa_visitor::try_emit_mad(ir_expression
*ir
, int mul_operand
)
620 int nonmul_operand
= 1 - mul_operand
;
621 ir_to_mesa_src_reg a
, b
, c
;
623 ir_expression
*expr
= ir
->operands
[mul_operand
]->as_expression();
624 if (!expr
|| expr
->operation
!= ir_binop_mul
)
627 expr
->operands
[0]->accept(this);
629 expr
->operands
[1]->accept(this);
631 ir
->operands
[nonmul_operand
]->accept(this);
634 this->result
= get_temp(ir
->type
);
635 ir_to_mesa_emit_op3(ir
, OPCODE_MAD
,
636 ir_to_mesa_dst_reg_from_src(this->result
), a
, b
, c
);
642 ir_to_mesa_visitor::reladdr_to_temp(ir_instruction
*ir
,
643 ir_to_mesa_src_reg
*reg
, int *num_reladdr
)
648 ir_to_mesa_emit_op1(ir
, OPCODE_ARL
, ir_to_mesa_address_reg
, *reg
->reladdr
);
650 if (*num_reladdr
!= 1) {
651 ir_to_mesa_src_reg temp
= get_temp(glsl_type::vec4_type
);
653 ir_to_mesa_emit_op1(ir
, OPCODE_MOV
,
654 ir_to_mesa_dst_reg_from_src(temp
), *reg
);
662 ir_to_mesa_visitor::visit(ir_expression
*ir
)
664 unsigned int operand
;
665 struct ir_to_mesa_src_reg op
[2];
666 struct ir_to_mesa_src_reg result_src
;
667 struct ir_to_mesa_dst_reg result_dst
;
668 const glsl_type
*vec4_type
= glsl_type::get_instance(GLSL_TYPE_FLOAT
, 4, 1);
669 const glsl_type
*vec3_type
= glsl_type::get_instance(GLSL_TYPE_FLOAT
, 3, 1);
670 const glsl_type
*vec2_type
= glsl_type::get_instance(GLSL_TYPE_FLOAT
, 2, 1);
672 /* Quick peephole: Emit OPCODE_MAD(a, b, c) instead of ADD(MUL(a, b), c)
674 if (ir
->operation
== ir_binop_add
) {
675 if (try_emit_mad(ir
, 1))
677 if (try_emit_mad(ir
, 0))
681 for (operand
= 0; operand
< ir
->get_num_operands(); operand
++) {
682 this->result
.file
= PROGRAM_UNDEFINED
;
683 ir
->operands
[operand
]->accept(this);
684 if (this->result
.file
== PROGRAM_UNDEFINED
) {
686 printf("Failed to get tree for expression operand:\n");
687 ir
->operands
[operand
]->accept(&v
);
690 op
[operand
] = this->result
;
692 /* Matrix expression operands should have been broken down to vector
693 * operations already.
695 assert(!ir
->operands
[operand
]->type
->is_matrix());
698 this->result
.file
= PROGRAM_UNDEFINED
;
700 /* Storage for our result. Ideally for an assignment we'd be using
701 * the actual storage for the result here, instead.
703 result_src
= get_temp(ir
->type
);
704 /* convenience for the emit functions below. */
705 result_dst
= ir_to_mesa_dst_reg_from_src(result_src
);
706 /* Limit writes to the channels that will be used by result_src later.
707 * This does limit this temp's use as a temporary for multi-instruction
710 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
712 switch (ir
->operation
) {
713 case ir_unop_logic_not
:
714 ir_to_mesa_emit_op2(ir
, OPCODE_SEQ
, result_dst
,
715 op
[0], src_reg_for_float(0.0));
718 op
[0].negate
= ~op
[0].negate
;
722 ir_to_mesa_emit_op1(ir
, OPCODE_ABS
, result_dst
, op
[0]);
725 ir_to_mesa_emit_op1(ir
, OPCODE_SSG
, result_dst
, op
[0]);
728 ir_to_mesa_emit_scalar_op1(ir
, OPCODE_RCP
, result_dst
, op
[0]);
732 ir_to_mesa_emit_scalar_op2(ir
, OPCODE_POW
, result_dst
,
733 src_reg_for_float(M_E
), op
[0]);
736 ir_to_mesa_emit_scalar_op1(ir
, OPCODE_EX2
, result_dst
, op
[0]);
739 ir_to_mesa_emit_scalar_op1(ir
, OPCODE_LOG
, result_dst
, op
[0]);
742 ir_to_mesa_emit_scalar_op1(ir
, OPCODE_LG2
, result_dst
, op
[0]);
745 ir_to_mesa_emit_scalar_op1(ir
, OPCODE_SIN
, result_dst
, op
[0]);
748 ir_to_mesa_emit_scalar_op1(ir
, OPCODE_COS
, result_dst
, op
[0]);
752 ir_to_mesa_emit_op1(ir
, OPCODE_DDX
, result_dst
, op
[0]);
755 ir_to_mesa_emit_op1(ir
, OPCODE_DDY
, result_dst
, op
[0]);
759 ir_to_mesa_emit_op2(ir
, OPCODE_ADD
, result_dst
, op
[0], op
[1]);
762 ir_to_mesa_emit_op2(ir
, OPCODE_SUB
, result_dst
, op
[0], op
[1]);
766 ir_to_mesa_emit_op2(ir
, OPCODE_MUL
, result_dst
, op
[0], op
[1]);
769 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
771 assert(!"ir_binop_mod should have been converted to b * fract(a/b)");
775 ir_to_mesa_emit_op2(ir
, OPCODE_SLT
, result_dst
, op
[0], op
[1]);
777 case ir_binop_greater
:
778 ir_to_mesa_emit_op2(ir
, OPCODE_SGT
, result_dst
, op
[0], op
[1]);
780 case ir_binop_lequal
:
781 ir_to_mesa_emit_op2(ir
, OPCODE_SLE
, result_dst
, op
[0], op
[1]);
783 case ir_binop_gequal
:
784 ir_to_mesa_emit_op2(ir
, OPCODE_SGE
, result_dst
, op
[0], op
[1]);
787 ir_to_mesa_emit_op2(ir
, OPCODE_SEQ
, result_dst
, op
[0], op
[1]);
789 case ir_binop_logic_xor
:
790 case ir_binop_nequal
:
791 ir_to_mesa_emit_op2(ir
, OPCODE_SNE
, result_dst
, op
[0], op
[1]);
794 case ir_binop_logic_or
:
795 /* This could be a saturated add and skip the SNE. */
796 ir_to_mesa_emit_op2(ir
, OPCODE_ADD
,
800 ir_to_mesa_emit_op2(ir
, OPCODE_SNE
,
802 result_src
, src_reg_for_float(0.0));
805 case ir_binop_logic_and
:
806 /* the bool args are stored as float 0.0 or 1.0, so "mul" gives us "and". */
807 ir_to_mesa_emit_op2(ir
, OPCODE_MUL
,
813 if (ir
->operands
[0]->type
== vec4_type
) {
814 assert(ir
->operands
[1]->type
== vec4_type
);
815 ir_to_mesa_emit_op2(ir
, OPCODE_DP4
,
818 } else if (ir
->operands
[0]->type
== vec3_type
) {
819 assert(ir
->operands
[1]->type
== vec3_type
);
820 ir_to_mesa_emit_op2(ir
, OPCODE_DP3
,
823 } else if (ir
->operands
[0]->type
== vec2_type
) {
824 assert(ir
->operands
[1]->type
== vec2_type
);
825 ir_to_mesa_emit_op2(ir
, OPCODE_DP2
,
832 ir_to_mesa_emit_op2(ir
, OPCODE_XPD
, result_dst
, op
[0], op
[1]);
836 ir_to_mesa_emit_scalar_op1(ir
, OPCODE_RSQ
, result_dst
, op
[0]);
837 ir_to_mesa_emit_scalar_op1(ir
, OPCODE_RCP
, result_dst
, result_src
);
838 /* For incoming channels < 0, set the result to 0. */
839 ir_to_mesa_emit_op3(ir
, OPCODE_CMP
, result_dst
,
840 op
[0], src_reg_for_float(0.0), result_src
);
843 ir_to_mesa_emit_scalar_op1(ir
, OPCODE_RSQ
, result_dst
, op
[0]);
848 /* Mesa IR lacks types, ints are stored as truncated floats. */
852 ir_to_mesa_emit_op1(ir
, OPCODE_TRUNC
, result_dst
, op
[0]);
856 ir_to_mesa_emit_op2(ir
, OPCODE_SNE
, result_dst
,
857 result_src
, src_reg_for_float(0.0));
860 ir_to_mesa_emit_op1(ir
, OPCODE_TRUNC
, result_dst
, op
[0]);
863 op
[0].negate
= ~op
[0].negate
;
864 ir_to_mesa_emit_op1(ir
, OPCODE_FLR
, result_dst
, op
[0]);
865 result_src
.negate
= ~result_src
.negate
;
868 ir_to_mesa_emit_op1(ir
, OPCODE_FLR
, result_dst
, op
[0]);
871 ir_to_mesa_emit_op1(ir
, OPCODE_FRC
, result_dst
, op
[0]);
875 ir_to_mesa_emit_op2(ir
, OPCODE_MIN
, result_dst
, op
[0], op
[1]);
878 ir_to_mesa_emit_op2(ir
, OPCODE_MAX
, result_dst
, op
[0], op
[1]);
881 ir_to_mesa_emit_scalar_op2(ir
, OPCODE_POW
, result_dst
, op
[0], op
[1]);
884 case ir_unop_bit_not
:
886 case ir_binop_lshift
:
887 case ir_binop_rshift
:
888 case ir_binop_bit_and
:
889 case ir_binop_bit_xor
:
890 case ir_binop_bit_or
:
891 assert(!"GLSL 1.30 features unsupported");
895 this->result
= result_src
;
900 ir_to_mesa_visitor::visit(ir_swizzle
*ir
)
902 ir_to_mesa_src_reg src_reg
;
906 /* Note that this is only swizzles in expressions, not those on the left
907 * hand side of an assignment, which do write masking. See ir_assignment
911 ir
->val
->accept(this);
912 src_reg
= this->result
;
913 assert(src_reg
.file
!= PROGRAM_UNDEFINED
);
915 for (i
= 0; i
< 4; i
++) {
916 if (i
< ir
->type
->vector_elements
) {
919 swizzle
[i
] = GET_SWZ(src_reg
.swizzle
, ir
->mask
.x
);
922 swizzle
[i
] = GET_SWZ(src_reg
.swizzle
, ir
->mask
.y
);
925 swizzle
[i
] = GET_SWZ(src_reg
.swizzle
, ir
->mask
.z
);
928 swizzle
[i
] = GET_SWZ(src_reg
.swizzle
, ir
->mask
.w
);
932 /* If the type is smaller than a vec4, replicate the last
935 swizzle
[i
] = swizzle
[ir
->type
->vector_elements
- 1];
939 src_reg
.swizzle
= MAKE_SWIZZLE4(swizzle
[0],
944 this->result
= src_reg
;
948 add_matrix_ref(struct gl_program
*prog
, int *tokens
)
953 /* Add a ref for each column. It looks like the reason we do
954 * it this way is that _mesa_add_state_reference doesn't work
955 * for things that aren't vec4s, so the tokens[2]/tokens[3]
956 * range has to be equal.
958 for (i
= 0; i
< 4; i
++) {
961 int pos
= _mesa_add_state_reference(prog
->Parameters
,
962 (gl_state_index
*)tokens
);
966 assert(base_pos
+ i
== pos
);
972 static variable_storage
*
973 get_builtin_matrix_ref(void *mem_ctx
, struct gl_program
*prog
, ir_variable
*var
,
974 ir_rvalue
*array_index
)
977 * NOTE: The ARB_vertex_program extension specified that matrices get
978 * loaded in registers in row-major order. With GLSL, we want column-
979 * major order. So, we need to transpose all matrices here...
981 static const struct {
986 { "gl_ModelViewMatrix", STATE_MODELVIEW_MATRIX
, STATE_MATRIX_TRANSPOSE
},
987 { "gl_ModelViewMatrixInverse", STATE_MODELVIEW_MATRIX
, STATE_MATRIX_INVTRANS
},
988 { "gl_ModelViewMatrixTranspose", STATE_MODELVIEW_MATRIX
, 0 },
989 { "gl_ModelViewMatrixInverseTranspose", STATE_MODELVIEW_MATRIX
, STATE_MATRIX_INVERSE
},
991 { "gl_ProjectionMatrix", STATE_PROJECTION_MATRIX
, STATE_MATRIX_TRANSPOSE
},
992 { "gl_ProjectionMatrixInverse", STATE_PROJECTION_MATRIX
, STATE_MATRIX_INVTRANS
},
993 { "gl_ProjectionMatrixTranspose", STATE_PROJECTION_MATRIX
, 0 },
994 { "gl_ProjectionMatrixInverseTranspose", STATE_PROJECTION_MATRIX
, STATE_MATRIX_INVERSE
},
996 { "gl_ModelViewProjectionMatrix", STATE_MVP_MATRIX
, STATE_MATRIX_TRANSPOSE
},
997 { "gl_ModelViewProjectionMatrixInverse", STATE_MVP_MATRIX
, STATE_MATRIX_INVTRANS
},
998 { "gl_ModelViewProjectionMatrixTranspose", STATE_MVP_MATRIX
, 0 },
999 { "gl_ModelViewProjectionMatrixInverseTranspose", STATE_MVP_MATRIX
, STATE_MATRIX_INVERSE
},
1001 { "gl_TextureMatrix", STATE_TEXTURE_MATRIX
, STATE_MATRIX_TRANSPOSE
},
1002 { "gl_TextureMatrixInverse", STATE_TEXTURE_MATRIX
, STATE_MATRIX_INVTRANS
},
1003 { "gl_TextureMatrixTranspose", STATE_TEXTURE_MATRIX
, 0 },
1004 { "gl_TextureMatrixInverseTranspose", STATE_TEXTURE_MATRIX
, STATE_MATRIX_INVERSE
},
1006 { "gl_NormalMatrix", STATE_MODELVIEW_MATRIX
, STATE_MATRIX_INVERSE
},
1010 variable_storage
*entry
;
1012 /* C++ gets angry when we try to use an int as a gl_state_index, so we use
1013 * ints for gl_state_index. Make sure they're compatible.
1015 assert(sizeof(gl_state_index
) == sizeof(int));
1017 for (i
= 0; i
< Elements(matrices
); i
++) {
1018 if (strcmp(var
->name
, matrices
[i
].name
) == 0) {
1019 int tokens
[STATE_LENGTH
];
1022 tokens
[0] = matrices
[i
].matrix
;
1023 tokens
[4] = matrices
[i
].modifier
;
1024 if (matrices
[i
].matrix
== STATE_TEXTURE_MATRIX
) {
1025 ir_constant
*index
= array_index
->constant_expression_value();
1027 tokens
[1] = index
->value
.i
[0];
1028 base_pos
= add_matrix_ref(prog
, tokens
);
1030 for (i
= 0; i
< var
->type
->length
; i
++) {
1032 int pos
= add_matrix_ref(prog
, tokens
);
1036 assert(base_pos
+ (int)i
* 4 == pos
);
1040 tokens
[1] = 0; /* unused array index */
1041 base_pos
= add_matrix_ref(prog
, tokens
);
1043 tokens
[4] = matrices
[i
].modifier
;
1045 entry
= new(mem_ctx
) variable_storage(var
,
1057 ir_to_mesa_visitor::visit(ir_dereference_variable
*ir
)
1059 ir_to_mesa_src_reg src_reg
;
1060 variable_storage
*entry
= find_variable_storage(ir
->var
);
1064 switch (ir
->var
->mode
) {
1065 case ir_var_uniform
:
1066 entry
= get_builtin_matrix_ref(this->mem_ctx
, this->prog
, ir
->var
,
1071 /* FINISHME: Fix up uniform name for arrays and things */
1072 if (ir
->var
->type
->base_type
== GLSL_TYPE_SAMPLER
) {
1073 /* FINISHME: we whack the location of the var here, which
1074 * is probably not expected. But we need to communicate
1075 * mesa's sampler number to the tex instruction.
1077 int sampler
= _mesa_add_sampler(this->prog
->Parameters
,
1079 ir
->var
->type
->gl_type
);
1080 map_sampler(ir
->var
->location
, sampler
);
1082 entry
= new(mem_ctx
) variable_storage(ir
->var
, PROGRAM_SAMPLER
,
1084 this->variables
.push_tail(entry
);
1088 assert(ir
->var
->type
->gl_type
!= 0 &&
1089 ir
->var
->type
->gl_type
!= GL_INVALID_ENUM
);
1090 loc
= _mesa_add_uniform(this->prog
->Parameters
,
1092 type_size(ir
->var
->type
) * 4,
1093 ir
->var
->type
->gl_type
,
1096 /* Always mark the uniform used at this point. If it isn't
1097 * used, dead code elimination should have nuked the decl already.
1099 this->prog
->Parameters
->Parameters
[loc
].Used
= GL_TRUE
;
1101 entry
= new(mem_ctx
) variable_storage(ir
->var
, PROGRAM_UNIFORM
, loc
);
1102 this->variables
.push_tail(entry
);
1107 /* The linker assigns locations for varyings and attributes,
1108 * including deprecated builtins (like gl_Color), user-assign
1109 * generic attributes (glBindVertexLocation), and
1110 * user-defined varyings.
1112 * FINISHME: We would hit this path for function arguments. Fix!
1114 assert(ir
->var
->location
!= -1);
1115 if (ir
->var
->mode
== ir_var_in
||
1116 ir
->var
->mode
== ir_var_inout
) {
1117 entry
= new(mem_ctx
) variable_storage(ir
->var
,
1121 if (this->prog
->Target
== GL_VERTEX_PROGRAM_ARB
&&
1122 ir
->var
->location
>= VERT_ATTRIB_GENERIC0
) {
1123 _mesa_add_attribute(prog
->Attributes
,
1125 type_size(ir
->var
->type
) * 4,
1126 ir
->var
->type
->gl_type
,
1127 ir
->var
->location
- VERT_ATTRIB_GENERIC0
);
1130 entry
= new(mem_ctx
) variable_storage(ir
->var
,
1137 case ir_var_temporary
:
1138 entry
= new(mem_ctx
) variable_storage(ir
->var
, PROGRAM_TEMPORARY
,
1140 this->variables
.push_tail(entry
);
1142 next_temp
+= type_size(ir
->var
->type
);
1147 printf("Failed to make storage for %s\n", ir
->var
->name
);
1152 src_reg
.file
= entry
->file
;
1153 src_reg
.index
= entry
->index
;
1154 /* If the type is smaller than a vec4, replicate the last channel out. */
1155 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
1156 src_reg
.swizzle
= swizzle_for_size(ir
->var
->type
->vector_elements
);
1158 src_reg
.swizzle
= SWIZZLE_NOOP
;
1159 src_reg
.reladdr
= NULL
;
1162 this->result
= src_reg
;
1166 ir_to_mesa_visitor::visit(ir_dereference_array
*ir
)
1169 ir_to_mesa_src_reg src_reg
;
1170 ir_dereference_variable
*deref_var
= ir
->array
->as_dereference_variable();
1171 int element_size
= type_size(ir
->type
);
1173 index
= ir
->array_index
->constant_expression_value();
1175 if (deref_var
&& strncmp(deref_var
->var
->name
,
1177 strlen("gl_TextureMatrix")) == 0) {
1178 ir_to_mesa_src_reg src_reg
;
1179 struct variable_storage
*entry
;
1181 entry
= get_builtin_matrix_ref(this->mem_ctx
, this->prog
, deref_var
->var
,
1185 src_reg
.file
= entry
->file
;
1186 src_reg
.index
= entry
->index
;
1187 src_reg
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
1191 src_reg
.reladdr
= NULL
;
1193 ir_to_mesa_src_reg index_reg
= get_temp(glsl_type::float_type
);
1195 ir
->array_index
->accept(this);
1196 ir_to_mesa_emit_op2(ir
, OPCODE_MUL
,
1197 ir_to_mesa_dst_reg_from_src(index_reg
),
1198 this->result
, src_reg_for_float(element_size
));
1200 src_reg
.reladdr
= talloc(mem_ctx
, ir_to_mesa_src_reg
);
1201 memcpy(src_reg
.reladdr
, &index_reg
, sizeof(index_reg
));
1204 this->result
= src_reg
;
1208 ir
->array
->accept(this);
1209 src_reg
= this->result
;
1212 src_reg
.index
+= index
->value
.i
[0] * element_size
;
1214 ir_to_mesa_src_reg array_base
= this->result
;
1215 /* Variable index array dereference. It eats the "vec4" of the
1216 * base of the array and an index that offsets the Mesa register
1219 ir
->array_index
->accept(this);
1221 ir_to_mesa_src_reg index_reg
;
1223 if (element_size
== 1) {
1224 index_reg
= this->result
;
1226 index_reg
= get_temp(glsl_type::float_type
);
1228 ir_to_mesa_emit_op2(ir
, OPCODE_MUL
,
1229 ir_to_mesa_dst_reg_from_src(index_reg
),
1230 this->result
, src_reg_for_float(element_size
));
1233 src_reg
.reladdr
= talloc(mem_ctx
, ir_to_mesa_src_reg
);
1234 memcpy(src_reg
.reladdr
, &index_reg
, sizeof(index_reg
));
1237 /* If the type is smaller than a vec4, replicate the last channel out. */
1238 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
1239 src_reg
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
1241 src_reg
.swizzle
= SWIZZLE_NOOP
;
1243 this->result
= src_reg
;
1247 ir_to_mesa_visitor::visit(ir_dereference_record
*ir
)
1250 const glsl_type
*struct_type
= ir
->record
->type
;
1253 ir
->record
->accept(this);
1255 for (i
= 0; i
< struct_type
->length
; i
++) {
1256 if (strcmp(struct_type
->fields
.structure
[i
].name
, ir
->field
) == 0)
1258 offset
+= type_size(struct_type
->fields
.structure
[i
].type
);
1260 this->result
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
1261 this->result
.index
+= offset
;
1265 * We want to be careful in assignment setup to hit the actual storage
1266 * instead of potentially using a temporary like we might with the
1267 * ir_dereference handler.
1269 * Thanks to ir_swizzle_swizzle, and ir_vec_index_to_swizzle, we
1270 * should only see potentially one variable array index of a vector,
1271 * and one swizzle, before getting to actual vec4 storage. So handle
1272 * those, then go use ir_dereference to handle the rest.
1274 static struct ir_to_mesa_dst_reg
1275 get_assignment_lhs(ir_instruction
*ir
, ir_to_mesa_visitor
*v
,
1276 ir_to_mesa_src_reg
*r
)
1278 struct ir_to_mesa_dst_reg dst_reg
;
1281 ir_dereference_array
*deref_array
= ir
->as_dereference_array();
1282 /* This should have been handled by ir_vec_index_to_cond_assign */
1284 assert(!deref_array
->array
->type
->is_vector());
1287 /* Use the rvalue deref handler for the most part. We'll ignore
1288 * swizzles in it and write swizzles using writemask, though.
1291 dst_reg
= ir_to_mesa_dst_reg_from_src(v
->result
);
1293 if ((swiz
= ir
->as_swizzle())) {
1300 int new_r_swizzle
[4];
1301 int orig_r_swizzle
= r
->swizzle
;
1304 for (i
= 0; i
< 4; i
++) {
1305 new_r_swizzle
[i
] = GET_SWZ(orig_r_swizzle
, 0);
1308 dst_reg
.writemask
= 0;
1309 for (i
= 0; i
< 4; i
++) {
1310 if (i
< swiz
->mask
.num_components
) {
1311 dst_reg
.writemask
|= 1 << swizzles
[i
];
1312 new_r_swizzle
[swizzles
[i
]] = GET_SWZ(orig_r_swizzle
, i
);
1316 r
->swizzle
= MAKE_SWIZZLE4(new_r_swizzle
[0],
1326 ir_to_mesa_visitor::visit(ir_assignment
*ir
)
1328 struct ir_to_mesa_dst_reg l
;
1329 struct ir_to_mesa_src_reg r
;
1332 assert(!ir
->lhs
->type
->is_array());
1334 ir
->rhs
->accept(this);
1337 l
= get_assignment_lhs(ir
->lhs
, this, &r
);
1339 assert(l
.file
!= PROGRAM_UNDEFINED
);
1340 assert(r
.file
!= PROGRAM_UNDEFINED
);
1342 if (ir
->condition
) {
1343 ir_to_mesa_src_reg condition
;
1345 ir
->condition
->accept(this);
1346 condition
= this->result
;
1348 /* We use the OPCODE_CMP (a < 0 ? b : c) for conditional moves,
1349 * and the condition we produced is 0.0 or 1.0. By flipping the
1350 * sign, we can choose which value OPCODE_CMP produces without
1351 * an extra computing the condition.
1353 condition
.negate
= ~condition
.negate
;
1354 for (i
= 0; i
< type_size(ir
->lhs
->type
); i
++) {
1355 ir_to_mesa_emit_op3(ir
, OPCODE_CMP
, l
,
1356 condition
, r
, ir_to_mesa_src_reg_from_dst(l
));
1361 for (i
= 0; i
< type_size(ir
->lhs
->type
); i
++) {
1362 ir_to_mesa_emit_op1(ir
, OPCODE_MOV
, l
, r
);
1371 ir_to_mesa_visitor::visit(ir_constant
*ir
)
1373 ir_to_mesa_src_reg src_reg
;
1374 GLfloat stack_vals
[4];
1375 GLfloat
*values
= stack_vals
;
1378 if (ir
->type
->is_array()) {
1381 assert(!"FINISHME: array constants");
1384 if (ir
->type
->is_matrix()) {
1385 /* Unfortunately, 4 floats is all we can get into
1386 * _mesa_add_unnamed_constant. So, make a temp to store the
1387 * matrix and move each constant value into it. If we get
1388 * lucky, copy propagation will eliminate the extra moves.
1390 ir_to_mesa_src_reg mat
= get_temp(glsl_type::vec4_type
);
1391 ir_to_mesa_dst_reg mat_column
= ir_to_mesa_dst_reg_from_src(mat
);
1393 for (i
= 0; i
< ir
->type
->matrix_columns
; i
++) {
1394 src_reg
.file
= PROGRAM_CONSTANT
;
1396 assert(ir
->type
->base_type
== GLSL_TYPE_FLOAT
);
1397 values
= &ir
->value
.f
[i
* ir
->type
->vector_elements
];
1399 src_reg
.index
= _mesa_add_unnamed_constant(this->prog
->Parameters
,
1401 ir
->type
->vector_elements
,
1403 src_reg
.reladdr
= NULL
;
1405 ir_to_mesa_emit_op1(ir
, OPCODE_MOV
, mat_column
, src_reg
);
1413 src_reg
.file
= PROGRAM_CONSTANT
;
1414 switch (ir
->type
->base_type
) {
1415 case GLSL_TYPE_FLOAT
:
1416 values
= &ir
->value
.f
[0];
1418 case GLSL_TYPE_UINT
:
1419 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
1420 values
[i
] = ir
->value
.u
[i
];
1424 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
1425 values
[i
] = ir
->value
.i
[i
];
1428 case GLSL_TYPE_BOOL
:
1429 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
1430 values
[i
] = ir
->value
.b
[i
];
1434 assert(!"Non-float/uint/int/bool constant");
1437 src_reg
.index
= _mesa_add_unnamed_constant(this->prog
->Parameters
,
1438 values
, ir
->type
->vector_elements
,
1440 src_reg
.reladdr
= NULL
;
1443 this->result
= src_reg
;
1447 ir_to_mesa_visitor::get_function_signature(ir_function_signature
*sig
)
1449 function_entry
*entry
;
1451 foreach_iter(exec_list_iterator
, iter
, this->function_signatures
) {
1452 entry
= (function_entry
*)iter
.get();
1454 if (entry
->sig
== sig
)
1458 entry
= talloc(mem_ctx
, function_entry
);
1460 entry
->sig_id
= this->next_signature_id
++;
1461 entry
->bgn_inst
= NULL
;
1463 /* Allocate storage for all the parameters. */
1464 foreach_iter(exec_list_iterator
, iter
, sig
->parameters
) {
1465 ir_variable
*param
= (ir_variable
*)iter
.get();
1466 variable_storage
*storage
;
1468 storage
= find_variable_storage(param
);
1471 storage
= new(mem_ctx
) variable_storage(param
, PROGRAM_TEMPORARY
,
1473 this->variables
.push_tail(storage
);
1475 this->next_temp
+= type_size(param
->type
);
1479 if (sig
->return_type
) {
1480 entry
->return_reg
= get_temp(sig
->return_type
);
1482 entry
->return_reg
= ir_to_mesa_undef
;
1485 this->function_signatures
.push_tail(entry
);
1490 ir_to_mesa_visitor::visit(ir_call
*ir
)
1492 ir_to_mesa_instruction
*call_inst
;
1493 ir_function_signature
*sig
= ir
->get_callee();
1494 function_entry
*entry
= get_function_signature(sig
);
1497 /* Process in parameters. */
1498 exec_list_iterator sig_iter
= sig
->parameters
.iterator();
1499 foreach_iter(exec_list_iterator
, iter
, *ir
) {
1500 ir_rvalue
*param_rval
= (ir_rvalue
*)iter
.get();
1501 ir_variable
*param
= (ir_variable
*)sig_iter
.get();
1503 if (param
->mode
== ir_var_in
||
1504 param
->mode
== ir_var_inout
) {
1505 variable_storage
*storage
= find_variable_storage(param
);
1508 param_rval
->accept(this);
1509 ir_to_mesa_src_reg r
= this->result
;
1511 ir_to_mesa_dst_reg l
;
1512 l
.file
= storage
->file
;
1513 l
.index
= storage
->index
;
1515 l
.writemask
= WRITEMASK_XYZW
;
1516 l
.cond_mask
= COND_TR
;
1518 for (i
= 0; i
< type_size(param
->type
); i
++) {
1519 ir_to_mesa_emit_op1(ir
, OPCODE_MOV
, l
, r
);
1527 assert(!sig_iter
.has_next());
1529 /* Emit call instruction */
1530 call_inst
= ir_to_mesa_emit_op1(ir
, OPCODE_CAL
,
1531 ir_to_mesa_undef_dst
, ir_to_mesa_undef
);
1532 call_inst
->function
= entry
;
1534 /* Process out parameters. */
1535 sig_iter
= sig
->parameters
.iterator();
1536 foreach_iter(exec_list_iterator
, iter
, *ir
) {
1537 ir_rvalue
*param_rval
= (ir_rvalue
*)iter
.get();
1538 ir_variable
*param
= (ir_variable
*)sig_iter
.get();
1540 if (param
->mode
== ir_var_out
||
1541 param
->mode
== ir_var_inout
) {
1542 variable_storage
*storage
= find_variable_storage(param
);
1545 ir_to_mesa_src_reg r
;
1546 r
.file
= storage
->file
;
1547 r
.index
= storage
->index
;
1549 r
.swizzle
= SWIZZLE_NOOP
;
1552 param_rval
->accept(this);
1553 ir_to_mesa_dst_reg l
= ir_to_mesa_dst_reg_from_src(this->result
);
1555 for (i
= 0; i
< type_size(param
->type
); i
++) {
1556 ir_to_mesa_emit_op1(ir
, OPCODE_MOV
, l
, r
);
1564 assert(!sig_iter
.has_next());
1566 /* Process return value. */
1567 this->result
= entry
->return_reg
;
1572 ir_to_mesa_visitor::visit(ir_texture
*ir
)
1574 ir_to_mesa_src_reg result_src
, coord
, lod_info
= { 0 }, projector
;
1575 ir_to_mesa_dst_reg result_dst
, coord_dst
;
1576 ir_to_mesa_instruction
*inst
= NULL
;
1577 prog_opcode opcode
= OPCODE_NOP
;
1579 ir
->coordinate
->accept(this);
1581 /* Put our coords in a temp. We'll need to modify them for shadow,
1582 * projection, or LOD, so the only case we'd use it as is is if
1583 * we're doing plain old texturing. Mesa IR optimization should
1584 * handle cleaning up our mess in that case.
1586 coord
= get_temp(glsl_type::vec4_type
);
1587 coord_dst
= ir_to_mesa_dst_reg_from_src(coord
);
1588 ir_to_mesa_emit_op1(ir
, OPCODE_MOV
, coord_dst
,
1591 if (ir
->projector
) {
1592 ir
->projector
->accept(this);
1593 projector
= this->result
;
1596 /* Storage for our result. Ideally for an assignment we'd be using
1597 * the actual storage for the result here, instead.
1599 result_src
= get_temp(glsl_type::vec4_type
);
1600 result_dst
= ir_to_mesa_dst_reg_from_src(result_src
);
1604 opcode
= OPCODE_TEX
;
1607 opcode
= OPCODE_TXB
;
1608 ir
->lod_info
.bias
->accept(this);
1609 lod_info
= this->result
;
1612 opcode
= OPCODE_TXL
;
1613 ir
->lod_info
.lod
->accept(this);
1614 lod_info
= this->result
;
1618 assert(!"GLSL 1.30 features unsupported");
1622 if (ir
->projector
) {
1623 if (opcode
== OPCODE_TEX
) {
1624 /* Slot the projector in as the last component of the coord. */
1625 coord_dst
.writemask
= WRITEMASK_W
;
1626 ir_to_mesa_emit_op1(ir
, OPCODE_MOV
, coord_dst
, projector
);
1627 coord_dst
.writemask
= WRITEMASK_XYZW
;
1628 opcode
= OPCODE_TXP
;
1630 ir_to_mesa_src_reg coord_w
= coord
;
1631 coord_w
.swizzle
= SWIZZLE_WWWW
;
1633 /* For the other TEX opcodes there's no projective version
1634 * since the last slot is taken up by lod info. Do the
1635 * projective divide now.
1637 coord_dst
.writemask
= WRITEMASK_W
;
1638 ir_to_mesa_emit_op1(ir
, OPCODE_RCP
, coord_dst
, projector
);
1640 coord_dst
.writemask
= WRITEMASK_XYZ
;
1641 ir_to_mesa_emit_op2(ir
, OPCODE_MUL
, coord_dst
, coord
, coord_w
);
1643 coord_dst
.writemask
= WRITEMASK_XYZW
;
1644 coord
.swizzle
= SWIZZLE_XYZW
;
1648 if (ir
->shadow_comparitor
) {
1649 /* Slot the shadow value in as the second to last component of the
1652 ir
->shadow_comparitor
->accept(this);
1653 coord_dst
.writemask
= WRITEMASK_Z
;
1654 ir_to_mesa_emit_op1(ir
, OPCODE_MOV
, coord_dst
, this->result
);
1655 coord_dst
.writemask
= WRITEMASK_XYZW
;
1658 if (opcode
== OPCODE_TXL
|| opcode
== OPCODE_TXB
) {
1659 /* Mesa IR stores lod or lod bias in the last channel of the coords. */
1660 coord_dst
.writemask
= WRITEMASK_W
;
1661 ir_to_mesa_emit_op1(ir
, OPCODE_MOV
, coord_dst
, lod_info
);
1662 coord_dst
.writemask
= WRITEMASK_XYZW
;
1665 inst
= ir_to_mesa_emit_op1(ir
, opcode
, result_dst
, coord
);
1667 if (ir
->shadow_comparitor
)
1668 inst
->tex_shadow
= GL_TRUE
;
1670 ir_dereference_variable
*sampler
= ir
->sampler
->as_dereference_variable();
1671 assert(sampler
); /* FINISHME: sampler arrays */
1672 /* generate the mapping, remove when we generate storage at
1675 sampler
->accept(this);
1677 inst
->sampler
= get_sampler_number(sampler
->var
->location
);
1679 switch (sampler
->type
->sampler_dimensionality
) {
1680 case GLSL_SAMPLER_DIM_1D
:
1681 inst
->tex_target
= TEXTURE_1D_INDEX
;
1683 case GLSL_SAMPLER_DIM_2D
:
1684 inst
->tex_target
= TEXTURE_2D_INDEX
;
1686 case GLSL_SAMPLER_DIM_3D
:
1687 inst
->tex_target
= TEXTURE_3D_INDEX
;
1689 case GLSL_SAMPLER_DIM_CUBE
:
1690 inst
->tex_target
= TEXTURE_CUBE_INDEX
;
1693 assert(!"FINISHME: other texture targets");
1696 this->result
= result_src
;
1700 ir_to_mesa_visitor::visit(ir_return
*ir
)
1702 assert(current_function
);
1704 if (ir
->get_value()) {
1705 ir_to_mesa_dst_reg l
;
1708 ir
->get_value()->accept(this);
1709 ir_to_mesa_src_reg r
= this->result
;
1711 l
= ir_to_mesa_dst_reg_from_src(current_function
->return_reg
);
1713 for (i
= 0; i
< type_size(current_function
->sig
->return_type
); i
++) {
1714 ir_to_mesa_emit_op1(ir
, OPCODE_MOV
, l
, r
);
1720 ir_to_mesa_emit_op0(ir
, OPCODE_RET
);
1724 ir_to_mesa_visitor::visit(ir_discard
*ir
)
1726 assert(ir
->condition
== NULL
); /* FINISHME */
1728 ir_to_mesa_emit_op0(ir
, OPCODE_KIL_NV
);
1732 ir_to_mesa_visitor::visit(ir_if
*ir
)
1734 ir_to_mesa_instruction
*cond_inst
, *if_inst
, *else_inst
= NULL
;
1735 ir_to_mesa_instruction
*prev_inst
;
1737 prev_inst
= (ir_to_mesa_instruction
*)this->instructions
.get_tail();
1739 ir
->condition
->accept(this);
1740 assert(this->result
.file
!= PROGRAM_UNDEFINED
);
1742 if (ctx
->Shader
.EmitCondCodes
) {
1743 cond_inst
= (ir_to_mesa_instruction
*)this->instructions
.get_tail();
1745 /* See if we actually generated any instruction for generating
1746 * the condition. If not, then cook up a move to a temp so we
1747 * have something to set cond_update on.
1749 if (cond_inst
== prev_inst
) {
1750 ir_to_mesa_src_reg temp
= get_temp(glsl_type::bool_type
);
1751 cond_inst
= ir_to_mesa_emit_op1(ir
->condition
, OPCODE_MOV
,
1752 ir_to_mesa_dst_reg_from_src(temp
),
1755 cond_inst
->cond_update
= GL_TRUE
;
1757 if_inst
= ir_to_mesa_emit_op0(ir
->condition
, OPCODE_IF
);
1758 if_inst
->dst_reg
.cond_mask
= COND_NE
;
1760 if_inst
= ir_to_mesa_emit_op1(ir
->condition
,
1761 OPCODE_IF
, ir_to_mesa_undef_dst
,
1765 this->instructions
.push_tail(if_inst
);
1767 visit_exec_list(&ir
->then_instructions
, this);
1769 if (!ir
->else_instructions
.is_empty()) {
1770 else_inst
= ir_to_mesa_emit_op0(ir
->condition
, OPCODE_ELSE
);
1771 visit_exec_list(&ir
->else_instructions
, this);
1774 if_inst
= ir_to_mesa_emit_op1(ir
->condition
, OPCODE_ENDIF
,
1775 ir_to_mesa_undef_dst
, ir_to_mesa_undef
);
1778 ir_to_mesa_visitor::ir_to_mesa_visitor()
1780 result
.file
= PROGRAM_UNDEFINED
;
1782 next_signature_id
= 1;
1784 sampler_map_size
= 0;
1785 current_function
= NULL
;
1788 static struct prog_src_register
1789 mesa_src_reg_from_ir_src_reg(ir_to_mesa_src_reg reg
)
1791 struct prog_src_register mesa_reg
;
1793 mesa_reg
.File
= reg
.file
;
1794 assert(reg
.index
< (1 << INST_INDEX_BITS
) - 1);
1795 mesa_reg
.Index
= reg
.index
;
1796 mesa_reg
.Swizzle
= reg
.swizzle
;
1797 mesa_reg
.RelAddr
= reg
.reladdr
!= NULL
;
1798 mesa_reg
.Negate
= reg
.negate
;
1805 set_branchtargets(ir_to_mesa_visitor
*v
,
1806 struct prog_instruction
*mesa_instructions
,
1807 int num_instructions
)
1809 int if_count
= 0, loop_count
= 0;
1810 int *if_stack
, *loop_stack
;
1811 int if_stack_pos
= 0, loop_stack_pos
= 0;
1814 for (i
= 0; i
< num_instructions
; i
++) {
1815 switch (mesa_instructions
[i
].Opcode
) {
1819 case OPCODE_BGNLOOP
:
1824 mesa_instructions
[i
].BranchTarget
= -1;
1831 if_stack
= (int *)calloc(if_count
, sizeof(*if_stack
));
1832 loop_stack
= (int *)calloc(loop_count
, sizeof(*loop_stack
));
1834 for (i
= 0; i
< num_instructions
; i
++) {
1835 switch (mesa_instructions
[i
].Opcode
) {
1837 if_stack
[if_stack_pos
] = i
;
1841 mesa_instructions
[if_stack
[if_stack_pos
- 1]].BranchTarget
= i
;
1842 if_stack
[if_stack_pos
- 1] = i
;
1845 mesa_instructions
[if_stack
[if_stack_pos
- 1]].BranchTarget
= i
;
1848 case OPCODE_BGNLOOP
:
1849 loop_stack
[loop_stack_pos
] = i
;
1852 case OPCODE_ENDLOOP
:
1854 /* Rewrite any breaks/conts at this nesting level (haven't
1855 * already had a BranchTarget assigned) to point to the end
1858 for (j
= loop_stack
[loop_stack_pos
]; j
< i
; j
++) {
1859 if (mesa_instructions
[j
].Opcode
== OPCODE_BRK
||
1860 mesa_instructions
[j
].Opcode
== OPCODE_CONT
) {
1861 if (mesa_instructions
[j
].BranchTarget
== -1) {
1862 mesa_instructions
[j
].BranchTarget
= i
;
1866 /* The loop ends point at each other. */
1867 mesa_instructions
[i
].BranchTarget
= loop_stack
[loop_stack_pos
];
1868 mesa_instructions
[loop_stack
[loop_stack_pos
]].BranchTarget
= i
;
1871 foreach_iter(exec_list_iterator
, iter
, v
->function_signatures
) {
1872 function_entry
*entry
= (function_entry
*)iter
.get();
1874 if (entry
->sig_id
== mesa_instructions
[i
].BranchTarget
) {
1875 mesa_instructions
[i
].BranchTarget
= entry
->inst
;
1889 print_program(struct prog_instruction
*mesa_instructions
,
1890 ir_instruction
**mesa_instruction_annotation
,
1891 int num_instructions
)
1893 ir_instruction
*last_ir
= NULL
;
1897 for (i
= 0; i
< num_instructions
; i
++) {
1898 struct prog_instruction
*mesa_inst
= mesa_instructions
+ i
;
1899 ir_instruction
*ir
= mesa_instruction_annotation
[i
];
1901 fprintf(stdout
, "%3d: ", i
);
1903 if (last_ir
!= ir
&& ir
) {
1906 for (j
= 0; j
< indent
; j
++) {
1907 fprintf(stdout
, " ");
1913 fprintf(stdout
, " "); /* line number spacing. */
1916 indent
= _mesa_fprint_instruction_opt(stdout
, mesa_inst
, indent
,
1917 PROG_PRINT_DEBUG
, NULL
);
1922 mark_input(struct gl_program
*prog
,
1926 prog
->InputsRead
|= BITFIELD64_BIT(index
);
1930 if (index
>= FRAG_ATTRIB_TEX0
&& index
<= FRAG_ATTRIB_TEX7
) {
1931 for (i
= 0; i
< 8; i
++) {
1932 prog
->InputsRead
|= BITFIELD64_BIT(FRAG_ATTRIB_TEX0
+ i
);
1935 assert(!"FINISHME: Mark InputsRead for varying arrays");
1941 mark_output(struct gl_program
*prog
,
1945 prog
->OutputsWritten
|= BITFIELD64_BIT(index
);
1949 if (index
>= VERT_RESULT_TEX0
&& index
<= VERT_RESULT_TEX7
) {
1950 for (i
= 0; i
< 8; i
++) {
1951 prog
->OutputsWritten
|= BITFIELD64_BIT(FRAG_ATTRIB_TEX0
+ i
);
1954 assert(!"FINISHME: Mark OutputsWritten for varying arrays");
1960 count_resources(struct gl_program
*prog
)
1964 prog
->InputsRead
= 0;
1965 prog
->OutputsWritten
= 0;
1966 prog
->SamplersUsed
= 0;
1968 for (i
= 0; i
< prog
->NumInstructions
; i
++) {
1969 struct prog_instruction
*inst
= &prog
->Instructions
[i
];
1972 switch (inst
->DstReg
.File
) {
1973 case PROGRAM_OUTPUT
:
1974 mark_output(prog
, inst
->DstReg
.Index
, inst
->DstReg
.RelAddr
);
1977 mark_input(prog
, inst
->DstReg
.Index
, inst
->DstReg
.RelAddr
);
1983 for (reg
= 0; reg
< _mesa_num_inst_src_regs(inst
->Opcode
); reg
++) {
1984 switch (inst
->SrcReg
[reg
].File
) {
1985 case PROGRAM_OUTPUT
:
1986 mark_output(prog
, inst
->SrcReg
[reg
].Index
,
1987 inst
->SrcReg
[reg
].RelAddr
);
1990 mark_input(prog
, inst
->SrcReg
[reg
].Index
, inst
->SrcReg
[reg
].RelAddr
);
1997 /* Instead of just using the uniform's value to map to a
1998 * sampler, Mesa first allocates a separate number for the
1999 * sampler (_mesa_add_sampler), then we reindex it down to a
2000 * small integer (sampler_map[], SamplersUsed), then that gets
2001 * mapped to the uniform's value, and we get an actual sampler.
2003 if (_mesa_is_tex_instruction(inst
->Opcode
)) {
2004 prog
->SamplerTargets
[inst
->TexSrcUnit
] =
2005 (gl_texture_index
)inst
->TexSrcTarget
;
2006 prog
->SamplersUsed
|= 1 << inst
->TexSrcUnit
;
2007 if (inst
->TexShadow
) {
2008 prog
->ShadowSamplers
|= 1 << inst
->TexSrcUnit
;
2013 _mesa_update_shader_textures_used(prog
);
2016 /* Each stage has some uniforms in its Parameters list. The Uniforms
2017 * list for the linked shader program has a pointer to these uniforms
2018 * in each of the stage's Parameters list, so that their values can be
2019 * updated when a uniform is set.
2022 link_uniforms_to_shared_uniform_list(struct gl_uniform_list
*uniforms
,
2023 struct gl_program
*prog
)
2027 for (i
= 0; i
< prog
->Parameters
->NumParameters
; i
++) {
2028 const struct gl_program_parameter
*p
= prog
->Parameters
->Parameters
+ i
;
2030 if (p
->Type
== PROGRAM_UNIFORM
|| p
->Type
== PROGRAM_SAMPLER
) {
2031 struct gl_uniform
*uniform
=
2032 _mesa_append_uniform(uniforms
, p
->Name
, prog
->Target
, i
);
2034 uniform
->Initialized
= p
->Initialized
;
2040 get_mesa_program(GLcontext
*ctx
, struct gl_shader_program
*shader_program
,
2041 struct gl_shader
*shader
)
2043 void *mem_ctx
= shader_program
;
2044 ir_to_mesa_visitor v
;
2045 struct prog_instruction
*mesa_instructions
, *mesa_inst
;
2046 ir_instruction
**mesa_instruction_annotation
;
2048 struct gl_program
*prog
;
2050 const char *target_string
;
2053 switch (shader
->Type
) {
2054 case GL_VERTEX_SHADER
:
2055 target
= GL_VERTEX_PROGRAM_ARB
;
2056 target_string
= "vertex";
2058 case GL_FRAGMENT_SHADER
:
2059 target
= GL_FRAGMENT_PROGRAM_ARB
;
2060 target_string
= "fragment";
2063 assert(!"should not be reached");
2067 validate_ir_tree(shader
->ir
);
2069 prog
= ctx
->Driver
.NewProgram(ctx
, target
, 1);
2072 prog
->Parameters
= _mesa_new_parameter_list();
2073 prog
->Varying
= _mesa_new_parameter_list();
2074 prog
->Attributes
= _mesa_new_parameter_list();
2078 v
.mem_ctx
= talloc_new(NULL
);
2080 /* Emit Mesa IR for main(). */
2081 visit_exec_list(shader
->ir
, &v
);
2082 v
.ir_to_mesa_emit_op0(NULL
, OPCODE_END
);
2084 /* Now emit bodies for any functions that were used. */
2086 progress
= GL_FALSE
;
2088 foreach_iter(exec_list_iterator
, iter
, v
.function_signatures
) {
2089 function_entry
*entry
= (function_entry
*)iter
.get();
2091 if (!entry
->bgn_inst
) {
2092 v
.current_function
= entry
;
2094 entry
->bgn_inst
= v
.ir_to_mesa_emit_op0(NULL
, OPCODE_BGNSUB
);
2095 entry
->bgn_inst
->function
= entry
;
2097 visit_exec_list(&entry
->sig
->body
, &v
);
2099 entry
->bgn_inst
= v
.ir_to_mesa_emit_op0(NULL
, OPCODE_RET
);
2100 entry
->bgn_inst
= v
.ir_to_mesa_emit_op0(NULL
, OPCODE_ENDSUB
);
2106 prog
->NumTemporaries
= v
.next_temp
;
2108 int num_instructions
= 0;
2109 foreach_iter(exec_list_iterator
, iter
, v
.instructions
) {
2114 (struct prog_instruction
*)calloc(num_instructions
,
2115 sizeof(*mesa_instructions
));
2116 mesa_instruction_annotation
= talloc_array(mem_ctx
, ir_instruction
*,
2119 mesa_inst
= mesa_instructions
;
2121 foreach_iter(exec_list_iterator
, iter
, v
.instructions
) {
2122 ir_to_mesa_instruction
*inst
= (ir_to_mesa_instruction
*)iter
.get();
2124 mesa_inst
->Opcode
= inst
->op
;
2125 mesa_inst
->CondUpdate
= inst
->cond_update
;
2126 mesa_inst
->DstReg
.File
= inst
->dst_reg
.file
;
2127 mesa_inst
->DstReg
.Index
= inst
->dst_reg
.index
;
2128 mesa_inst
->DstReg
.CondMask
= inst
->dst_reg
.cond_mask
;
2129 mesa_inst
->DstReg
.WriteMask
= inst
->dst_reg
.writemask
;
2130 mesa_inst
->DstReg
.RelAddr
= inst
->dst_reg
.reladdr
!= NULL
;
2131 mesa_inst
->SrcReg
[0] = mesa_src_reg_from_ir_src_reg(inst
->src_reg
[0]);
2132 mesa_inst
->SrcReg
[1] = mesa_src_reg_from_ir_src_reg(inst
->src_reg
[1]);
2133 mesa_inst
->SrcReg
[2] = mesa_src_reg_from_ir_src_reg(inst
->src_reg
[2]);
2134 mesa_inst
->TexSrcUnit
= inst
->sampler
;
2135 mesa_inst
->TexSrcTarget
= inst
->tex_target
;
2136 mesa_inst
->TexShadow
= inst
->tex_shadow
;
2137 mesa_instruction_annotation
[i
] = inst
->ir
;
2139 if (ctx
->Shader
.EmitNoIfs
&& mesa_inst
->Opcode
== OPCODE_IF
) {
2140 shader_program
->InfoLog
=
2141 talloc_asprintf_append(shader_program
->InfoLog
,
2142 "Couldn't flatten if statement\n");
2143 shader_program
->LinkStatus
= false;
2146 if (mesa_inst
->Opcode
== OPCODE_BGNSUB
)
2147 inst
->function
->inst
= i
;
2148 else if (mesa_inst
->Opcode
== OPCODE_CAL
)
2149 mesa_inst
->BranchTarget
= inst
->function
->sig_id
; /* rewritten later */
2150 else if (mesa_inst
->Opcode
== OPCODE_ARL
)
2151 prog
->NumAddressRegs
= 1;
2157 set_branchtargets(&v
, mesa_instructions
, num_instructions
);
2158 if (ctx
->Shader
.Flags
& GLSL_DUMP
) {
2159 printf("Mesa %s program:\n", target_string
);
2160 print_program(mesa_instructions
, mesa_instruction_annotation
,
2164 prog
->Instructions
= mesa_instructions
;
2165 prog
->NumInstructions
= num_instructions
;
2167 _mesa_reference_program(ctx
, &shader
->Program
, prog
);
2169 if ((ctx
->Shader
.Flags
& GLSL_NO_OPT
) == 0) {
2170 _mesa_optimize_program(ctx
, prog
);
2179 _mesa_glsl_compile_shader(GLcontext
*ctx
, struct gl_shader
*shader
)
2181 struct _mesa_glsl_parse_state
*state
=
2182 new(shader
) _mesa_glsl_parse_state(ctx
, shader
->Type
, shader
);
2184 const char *source
= shader
->Source
;
2185 state
->error
= preprocess(state
, &source
, &state
->info_log
,
2188 if (!state
->error
) {
2189 _mesa_glsl_lexer_ctor(state
, source
);
2190 _mesa_glsl_parse(state
);
2191 _mesa_glsl_lexer_dtor(state
);
2194 shader
->ir
= new(shader
) exec_list
;
2195 if (!state
->error
&& !state
->translation_unit
.is_empty())
2196 _mesa_ast_to_hir(shader
->ir
, state
);
2198 if (!state
->error
&& !shader
->ir
->is_empty()) {
2199 validate_ir_tree(shader
->ir
);
2202 do_mat_op_to_vec(shader
->ir
);
2203 do_mod_to_fract(shader
->ir
);
2204 do_div_to_mul_rcp(shader
->ir
);
2206 /* Optimization passes */
2211 progress
= do_function_inlining(shader
->ir
) || progress
;
2212 progress
= do_if_simplification(shader
->ir
) || progress
;
2213 progress
= do_copy_propagation(shader
->ir
) || progress
;
2214 progress
= do_dead_code_local(shader
->ir
) || progress
;
2215 progress
= do_dead_code_unlinked(state
, shader
->ir
) || progress
;
2216 progress
= do_constant_variable_unlinked(shader
->ir
) || progress
;
2217 progress
= do_constant_folding(shader
->ir
) || progress
;
2218 progress
= do_if_return(shader
->ir
) || progress
;
2219 if (ctx
->Shader
.EmitNoIfs
)
2220 progress
= do_if_to_cond_assign(shader
->ir
) || progress
;
2222 progress
= do_vec_index_to_swizzle(shader
->ir
) || progress
;
2223 /* Do this one after the previous to let the easier pass handle
2224 * constant vector indexing.
2226 progress
= do_vec_index_to_cond_assign(shader
->ir
) || progress
;
2228 progress
= do_swizzle_swizzle(shader
->ir
) || progress
;
2231 validate_ir_tree(shader
->ir
);
2234 shader
->symbols
= state
->symbols
;
2236 shader
->CompileStatus
= !state
->error
;
2237 shader
->InfoLog
= state
->info_log
;
2238 shader
->Version
= state
->language_version
;
2239 memcpy(shader
->builtins_to_link
, state
->builtins_to_link
,
2240 sizeof(shader
->builtins_to_link
[0]) * state
->num_builtins_to_link
);
2241 shader
->num_builtins_to_link
= state
->num_builtins_to_link
;
2243 /* Retain any live IR, but trash the rest. */
2244 reparent_ir(shader
->ir
, shader
);
2250 _mesa_glsl_link_shader(GLcontext
*ctx
, struct gl_shader_program
*prog
)
2254 _mesa_clear_shader_program_data(ctx
, prog
);
2256 prog
->LinkStatus
= GL_TRUE
;
2258 for (i
= 0; i
< prog
->NumShaders
; i
++) {
2259 if (!prog
->Shaders
[i
]->CompileStatus
) {
2261 talloc_asprintf_append(prog
->InfoLog
,
2262 "linking with uncompiled shader");
2263 prog
->LinkStatus
= GL_FALSE
;
2267 prog
->Varying
= _mesa_new_parameter_list();
2268 _mesa_reference_vertprog(ctx
, &prog
->VertexProgram
, NULL
);
2269 _mesa_reference_fragprog(ctx
, &prog
->FragmentProgram
, NULL
);
2271 if (prog
->LinkStatus
) {
2274 /* We don't use the linker's uniforms list, and cook up our own at
2277 free(prog
->Uniforms
);
2278 prog
->Uniforms
= _mesa_new_uniform_list();
2281 if (prog
->LinkStatus
) {
2282 for (i
= 0; i
< prog
->_NumLinkedShaders
; i
++) {
2283 struct gl_program
*linked_prog
;
2285 linked_prog
= get_mesa_program(ctx
, prog
,
2286 prog
->_LinkedShaders
[i
]);
2287 count_resources(linked_prog
);
2289 link_uniforms_to_shared_uniform_list(prog
->Uniforms
, linked_prog
);
2291 switch (prog
->_LinkedShaders
[i
]->Type
) {
2292 case GL_VERTEX_SHADER
:
2293 _mesa_reference_vertprog(ctx
, &prog
->VertexProgram
,
2294 (struct gl_vertex_program
*)linked_prog
);
2295 ctx
->Driver
.ProgramStringNotify(ctx
, GL_VERTEX_PROGRAM_ARB
,
2298 case GL_FRAGMENT_SHADER
:
2299 _mesa_reference_fragprog(ctx
, &prog
->FragmentProgram
,
2300 (struct gl_fragment_program
*)linked_prog
);
2301 ctx
->Driver
.ProgramStringNotify(ctx
, GL_FRAGMENT_PROGRAM_ARB
,