2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
27 * \file ir_to_mesa.cpp
29 * Translate GLSL IR to Mesa's gl_program representation.
33 #include "main/macros.h"
34 #include "main/mtypes.h"
35 #include "main/shaderapi.h"
36 #include "main/shaderobj.h"
37 #include "main/uniforms.h"
38 #include "main/glspirv.h"
39 #include "compiler/glsl/ast.h"
40 #include "compiler/glsl/ir.h"
41 #include "compiler/glsl/ir_expression_flattening.h"
42 #include "compiler/glsl/ir_visitor.h"
43 #include "compiler/glsl/ir_optimization.h"
44 #include "compiler/glsl/ir_uniform.h"
45 #include "compiler/glsl/glsl_parser_extras.h"
46 #include "compiler/glsl_types.h"
47 #include "compiler/glsl/linker.h"
48 #include "compiler/glsl/program.h"
49 #include "compiler/glsl/shader_cache.h"
50 #include "compiler/glsl/string_to_uint_map.h"
51 #include "program/prog_instruction.h"
52 #include "program/prog_optimize.h"
53 #include "program/prog_print.h"
54 #include "program/program.h"
55 #include "program/prog_parameter.h"
58 static int swizzle_for_size(int size
);
66 * This struct is a corresponding struct to Mesa prog_src_register, with
71 src_reg(gl_register_file file
, int index
, const glsl_type
*type
)
75 if (type
&& (type
->is_scalar() || type
->is_vector() || type
->is_matrix()))
76 this->swizzle
= swizzle_for_size(type
->vector_elements
);
78 this->swizzle
= SWIZZLE_XYZW
;
85 this->file
= PROGRAM_UNDEFINED
;
92 explicit src_reg(dst_reg reg
);
94 gl_register_file file
; /**< PROGRAM_* from Mesa */
95 int index
; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
96 GLuint swizzle
; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
97 int negate
; /**< NEGATE_XYZW mask from mesa */
98 /** Register index should be offset by the integer in this reg. */
104 dst_reg(gl_register_file file
, int writemask
)
108 this->writemask
= writemask
;
109 this->reladdr
= NULL
;
114 this->file
= PROGRAM_UNDEFINED
;
117 this->reladdr
= NULL
;
120 explicit dst_reg(src_reg reg
);
122 gl_register_file file
; /**< PROGRAM_* from Mesa */
123 int index
; /**< temporary index, VERT_ATTRIB_*, VARYING_SLOT_*, etc. */
124 int writemask
; /**< Bitfield of WRITEMASK_[XYZW] */
125 /** Register index should be offset by the integer in this reg. */
129 } /* anonymous namespace */
131 src_reg::src_reg(dst_reg reg
)
133 this->file
= reg
.file
;
134 this->index
= reg
.index
;
135 this->swizzle
= SWIZZLE_XYZW
;
137 this->reladdr
= reg
.reladdr
;
140 dst_reg::dst_reg(src_reg reg
)
142 this->file
= reg
.file
;
143 this->index
= reg
.index
;
144 this->writemask
= WRITEMASK_XYZW
;
145 this->reladdr
= reg
.reladdr
;
150 class ir_to_mesa_instruction
: public exec_node
{
152 DECLARE_RALLOC_CXX_OPERATORS(ir_to_mesa_instruction
)
157 /** Pointer to the ir source this tree came from for debugging */
160 int sampler
; /**< sampler index */
161 int tex_target
; /**< One of TEXTURE_*_INDEX */
162 GLboolean tex_shadow
;
165 class variable_storage
: public exec_node
{
167 variable_storage(ir_variable
*var
, gl_register_file file
, int index
)
168 : file(file
), index(index
), var(var
)
173 gl_register_file file
;
175 ir_variable
*var
; /* variable that maps to this, if any */
178 class function_entry
: public exec_node
{
180 ir_function_signature
*sig
;
183 * identifier of this function signature used by the program.
185 * At the point that Mesa instructions for function calls are
186 * generated, we don't know the address of the first instruction of
187 * the function body. So we make the BranchTarget that is called a
188 * small integer and rewrite them during set_branchtargets().
193 * Pointer to first instruction of the function body.
195 * Set during function body emits after main() is processed.
197 ir_to_mesa_instruction
*bgn_inst
;
200 * Index of the first instruction of the function body in actual
203 * Set after convertion from ir_to_mesa_instruction to prog_instruction.
207 /** Storage for the return value. */
211 class ir_to_mesa_visitor
: public ir_visitor
{
213 ir_to_mesa_visitor();
214 ~ir_to_mesa_visitor();
216 function_entry
*current_function
;
218 struct gl_context
*ctx
;
219 struct gl_program
*prog
;
220 struct gl_shader_program
*shader_program
;
221 struct gl_shader_compiler_options
*options
;
225 variable_storage
*find_variable_storage(const ir_variable
*var
);
227 src_reg
get_temp(const glsl_type
*type
);
228 void reladdr_to_temp(ir_instruction
*ir
, src_reg
*reg
, int *num_reladdr
);
230 src_reg
src_reg_for_float(float val
);
233 * \name Visit methods
235 * As typical for the visitor pattern, there must be one \c visit method for
236 * each concrete subclass of \c ir_instruction. Virtual base classes within
237 * the hierarchy should not have \c visit methods.
240 virtual void visit(ir_variable
*);
241 virtual void visit(ir_loop
*);
242 virtual void visit(ir_loop_jump
*);
243 virtual void visit(ir_function_signature
*);
244 virtual void visit(ir_function
*);
245 virtual void visit(ir_expression
*);
246 virtual void visit(ir_swizzle
*);
247 virtual void visit(ir_dereference_variable
*);
248 virtual void visit(ir_dereference_array
*);
249 virtual void visit(ir_dereference_record
*);
250 virtual void visit(ir_assignment
*);
251 virtual void visit(ir_constant
*);
252 virtual void visit(ir_call
*);
253 virtual void visit(ir_return
*);
254 virtual void visit(ir_discard
*);
255 virtual void visit(ir_texture
*);
256 virtual void visit(ir_if
*);
257 virtual void visit(ir_emit_vertex
*);
258 virtual void visit(ir_end_primitive
*);
259 virtual void visit(ir_barrier
*);
264 /** List of variable_storage */
267 /** List of function_entry */
268 exec_list function_signatures
;
269 int next_signature_id
;
271 /** List of ir_to_mesa_instruction */
272 exec_list instructions
;
274 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
);
276 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
,
277 dst_reg dst
, src_reg src0
);
279 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
,
280 dst_reg dst
, src_reg src0
, src_reg src1
);
282 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
,
284 src_reg src0
, src_reg src1
, src_reg src2
);
287 * Emit the correct dot-product instruction for the type of arguments
289 ir_to_mesa_instruction
* emit_dp(ir_instruction
*ir
,
295 void emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
296 dst_reg dst
, src_reg src0
);
298 void emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
299 dst_reg dst
, src_reg src0
, src_reg src1
);
301 bool try_emit_mad(ir_expression
*ir
,
303 bool try_emit_mad_for_and_not(ir_expression
*ir
,
306 void emit_swz(ir_expression
*ir
);
308 void emit_equality_comparison(ir_expression
*ir
, enum prog_opcode op
,
310 const src_reg
&src0
, const src_reg
&src1
);
312 inline void emit_sne(ir_expression
*ir
, dst_reg dst
,
313 const src_reg
&src0
, const src_reg
&src1
)
315 emit_equality_comparison(ir
, OPCODE_SLT
, dst
, src0
, src1
);
318 inline void emit_seq(ir_expression
*ir
, dst_reg dst
,
319 const src_reg
&src0
, const src_reg
&src1
)
321 emit_equality_comparison(ir
, OPCODE_SGE
, dst
, src0
, src1
);
324 bool process_move_condition(ir_rvalue
*ir
);
326 void copy_propagate(void);
331 } /* anonymous namespace */
333 static src_reg undef_src
= src_reg(PROGRAM_UNDEFINED
, 0, NULL
);
335 static dst_reg undef_dst
= dst_reg(PROGRAM_UNDEFINED
, SWIZZLE_NOOP
);
337 static dst_reg address_reg
= dst_reg(PROGRAM_ADDRESS
, WRITEMASK_X
);
340 swizzle_for_size(int size
)
342 static const int size_swizzles
[4] = {
343 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
),
344 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Y
, SWIZZLE_Y
),
345 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_Z
),
346 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
),
349 assert((size
>= 1) && (size
<= 4));
350 return size_swizzles
[size
- 1];
353 ir_to_mesa_instruction
*
354 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
,
356 src_reg src0
, src_reg src1
, src_reg src2
)
358 ir_to_mesa_instruction
*inst
= new(mem_ctx
) ir_to_mesa_instruction();
361 /* If we have to do relative addressing, we want to load the ARL
362 * reg directly for one of the regs, and preload the other reladdr
363 * sources into temps.
365 num_reladdr
+= dst
.reladdr
!= NULL
;
366 num_reladdr
+= src0
.reladdr
!= NULL
;
367 num_reladdr
+= src1
.reladdr
!= NULL
;
368 num_reladdr
+= src2
.reladdr
!= NULL
;
370 reladdr_to_temp(ir
, &src2
, &num_reladdr
);
371 reladdr_to_temp(ir
, &src1
, &num_reladdr
);
372 reladdr_to_temp(ir
, &src0
, &num_reladdr
);
375 emit(ir
, OPCODE_ARL
, address_reg
, *dst
.reladdr
);
378 assert(num_reladdr
== 0);
387 this->instructions
.push_tail(inst
);
393 ir_to_mesa_instruction
*
394 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
,
395 dst_reg dst
, src_reg src0
, src_reg src1
)
397 return emit(ir
, op
, dst
, src0
, src1
, undef_src
);
400 ir_to_mesa_instruction
*
401 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
,
402 dst_reg dst
, src_reg src0
)
404 assert(dst
.writemask
!= 0);
405 return emit(ir
, op
, dst
, src0
, undef_src
, undef_src
);
408 ir_to_mesa_instruction
*
409 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
)
411 return emit(ir
, op
, undef_dst
, undef_src
, undef_src
, undef_src
);
414 ir_to_mesa_instruction
*
415 ir_to_mesa_visitor::emit_dp(ir_instruction
*ir
,
416 dst_reg dst
, src_reg src0
, src_reg src1
,
419 static const enum prog_opcode dot_opcodes
[] = {
420 OPCODE_DP2
, OPCODE_DP3
, OPCODE_DP4
423 return emit(ir
, dot_opcodes
[elements
- 2], dst
, src0
, src1
);
427 * Emits Mesa scalar opcodes to produce unique answers across channels.
429 * Some Mesa opcodes are scalar-only, like ARB_fp/vp. The src X
430 * channel determines the result across all channels. So to do a vec4
431 * of this operation, we want to emit a scalar per source channel used
432 * to produce dest channels.
435 ir_to_mesa_visitor::emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
437 src_reg orig_src0
, src_reg orig_src1
)
440 int done_mask
= ~dst
.writemask
;
442 /* Mesa RCP is a scalar operation splatting results to all channels,
443 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
446 for (i
= 0; i
< 4; i
++) {
447 GLuint this_mask
= (1 << i
);
448 ir_to_mesa_instruction
*inst
;
449 src_reg src0
= orig_src0
;
450 src_reg src1
= orig_src1
;
452 if (done_mask
& this_mask
)
455 GLuint src0_swiz
= GET_SWZ(src0
.swizzle
, i
);
456 GLuint src1_swiz
= GET_SWZ(src1
.swizzle
, i
);
457 for (j
= i
+ 1; j
< 4; j
++) {
458 /* If there is another enabled component in the destination that is
459 * derived from the same inputs, generate its value on this pass as
462 if (!(done_mask
& (1 << j
)) &&
463 GET_SWZ(src0
.swizzle
, j
) == src0_swiz
&&
464 GET_SWZ(src1
.swizzle
, j
) == src1_swiz
) {
465 this_mask
|= (1 << j
);
468 src0
.swizzle
= MAKE_SWIZZLE4(src0_swiz
, src0_swiz
,
469 src0_swiz
, src0_swiz
);
470 src1
.swizzle
= MAKE_SWIZZLE4(src1_swiz
, src1_swiz
,
471 src1_swiz
, src1_swiz
);
473 inst
= emit(ir
, op
, dst
, src0
, src1
);
474 inst
->dst
.writemask
= this_mask
;
475 done_mask
|= this_mask
;
480 ir_to_mesa_visitor::emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
481 dst_reg dst
, src_reg src0
)
483 src_reg undef
= undef_src
;
485 undef
.swizzle
= SWIZZLE_XXXX
;
487 emit_scalar(ir
, op
, dst
, src0
, undef
);
491 ir_to_mesa_visitor::src_reg_for_float(float val
)
493 src_reg
src(PROGRAM_CONSTANT
, -1, NULL
);
495 src
.index
= _mesa_add_unnamed_constant(this->prog
->Parameters
,
496 (const gl_constant_value
*)&val
, 1, &src
.swizzle
);
502 storage_type_size(const struct glsl_type
*type
, bool bindless
)
507 switch (type
->base_type
) {
510 case GLSL_TYPE_UINT8
:
512 case GLSL_TYPE_UINT16
:
513 case GLSL_TYPE_INT16
:
514 case GLSL_TYPE_FLOAT
:
515 case GLSL_TYPE_FLOAT16
:
517 if (type
->is_matrix()) {
518 return type
->matrix_columns
;
520 /* Regardless of size of vector, it gets a vec4. This is bad
521 * packing for things like floats, but otherwise arrays become a
522 * mess. Hopefully a later pass over the code can pack scalars
523 * down if appropriate.
528 case GLSL_TYPE_DOUBLE
:
529 if (type
->is_matrix()) {
530 if (type
->vector_elements
> 2)
531 return type
->matrix_columns
* 2;
533 return type
->matrix_columns
;
535 if (type
->vector_elements
> 2)
541 case GLSL_TYPE_UINT64
:
542 case GLSL_TYPE_INT64
:
543 if (type
->vector_elements
> 2)
547 case GLSL_TYPE_ARRAY
:
548 assert(type
->length
> 0);
549 return storage_type_size(type
->fields
.array
, bindless
) * type
->length
;
550 case GLSL_TYPE_STRUCT
:
552 for (i
= 0; i
< type
->length
; i
++) {
553 size
+= storage_type_size(type
->fields
.structure
[i
].type
, bindless
);
556 case GLSL_TYPE_SAMPLER
:
557 case GLSL_TYPE_IMAGE
:
561 case GLSL_TYPE_SUBROUTINE
:
563 case GLSL_TYPE_ATOMIC_UINT
:
565 case GLSL_TYPE_ERROR
:
566 case GLSL_TYPE_INTERFACE
:
567 case GLSL_TYPE_FUNCTION
:
568 assert(!"Invalid type in type_size");
576 type_size(const struct glsl_type
*type
)
578 return storage_type_size(type
, false);
582 * In the initial pass of codegen, we assign temporary numbers to
583 * intermediate results. (not SSA -- variable assignments will reuse
584 * storage). Actual register allocation for the Mesa VM occurs in a
585 * pass over the Mesa IR later.
588 ir_to_mesa_visitor::get_temp(const glsl_type
*type
)
592 src
.file
= PROGRAM_TEMPORARY
;
593 src
.index
= next_temp
;
595 next_temp
+= type_size(type
);
597 if (type
->is_array() || type
->is_record()) {
598 src
.swizzle
= SWIZZLE_NOOP
;
600 src
.swizzle
= swizzle_for_size(type
->vector_elements
);
608 ir_to_mesa_visitor::find_variable_storage(const ir_variable
*var
)
610 foreach_in_list(variable_storage
, entry
, &this->variables
) {
611 if (entry
->var
== var
)
619 ir_to_mesa_visitor::visit(ir_variable
*ir
)
621 if (strcmp(ir
->name
, "gl_FragCoord") == 0) {
622 this->prog
->OriginUpperLeft
= ir
->data
.origin_upper_left
;
623 this->prog
->PixelCenterInteger
= ir
->data
.pixel_center_integer
;
626 if (ir
->data
.mode
== ir_var_uniform
&& strncmp(ir
->name
, "gl_", 3) == 0) {
628 const ir_state_slot
*const slots
= ir
->get_state_slots();
629 assert(slots
!= NULL
);
631 /* Check if this statevar's setup in the STATE file exactly
632 * matches how we'll want to reference it as a
633 * struct/array/whatever. If not, then we need to move it into
634 * temporary storage and hope that it'll get copy-propagated
637 for (i
= 0; i
< ir
->get_num_state_slots(); i
++) {
638 if (slots
[i
].swizzle
!= SWIZZLE_XYZW
) {
643 variable_storage
*storage
;
645 if (i
== ir
->get_num_state_slots()) {
646 /* We'll set the index later. */
647 storage
= new(mem_ctx
) variable_storage(ir
, PROGRAM_STATE_VAR
, -1);
648 this->variables
.push_tail(storage
);
652 /* The variable_storage constructor allocates slots based on the size
653 * of the type. However, this had better match the number of state
654 * elements that we're going to copy into the new temporary.
656 assert((int) ir
->get_num_state_slots() == type_size(ir
->type
));
658 storage
= new(mem_ctx
) variable_storage(ir
, PROGRAM_TEMPORARY
,
660 this->variables
.push_tail(storage
);
661 this->next_temp
+= type_size(ir
->type
);
663 dst
= dst_reg(src_reg(PROGRAM_TEMPORARY
, storage
->index
, NULL
));
667 for (unsigned int i
= 0; i
< ir
->get_num_state_slots(); i
++) {
668 int index
= _mesa_add_state_reference(this->prog
->Parameters
,
671 if (storage
->file
== PROGRAM_STATE_VAR
) {
672 if (storage
->index
== -1) {
673 storage
->index
= index
;
675 assert(index
== storage
->index
+ (int)i
);
678 src_reg
src(PROGRAM_STATE_VAR
, index
, NULL
);
679 src
.swizzle
= slots
[i
].swizzle
;
680 emit(ir
, OPCODE_MOV
, dst
, src
);
681 /* even a float takes up a whole vec4 reg in a struct/array. */
686 if (storage
->file
== PROGRAM_TEMPORARY
&&
687 dst
.index
!= storage
->index
+ (int) ir
->get_num_state_slots()) {
688 linker_error(this->shader_program
,
689 "failed to load builtin uniform `%s' "
690 "(%d/%d regs loaded)\n",
691 ir
->name
, dst
.index
- storage
->index
,
692 type_size(ir
->type
));
698 ir_to_mesa_visitor::visit(ir_loop
*ir
)
700 emit(NULL
, OPCODE_BGNLOOP
);
702 visit_exec_list(&ir
->body_instructions
, this);
704 emit(NULL
, OPCODE_ENDLOOP
);
708 ir_to_mesa_visitor::visit(ir_loop_jump
*ir
)
711 case ir_loop_jump::jump_break
:
712 emit(NULL
, OPCODE_BRK
);
714 case ir_loop_jump::jump_continue
:
715 emit(NULL
, OPCODE_CONT
);
722 ir_to_mesa_visitor::visit(ir_function_signature
*ir
)
729 ir_to_mesa_visitor::visit(ir_function
*ir
)
731 /* Ignore function bodies other than main() -- we shouldn't see calls to
732 * them since they should all be inlined before we get to ir_to_mesa.
734 if (strcmp(ir
->name
, "main") == 0) {
735 const ir_function_signature
*sig
;
738 sig
= ir
->matching_signature(NULL
, &empty
, false);
742 foreach_in_list(ir_instruction
, ir
, &sig
->body
) {
749 ir_to_mesa_visitor::try_emit_mad(ir_expression
*ir
, int mul_operand
)
751 int nonmul_operand
= 1 - mul_operand
;
754 ir_expression
*expr
= ir
->operands
[mul_operand
]->as_expression();
755 if (!expr
|| expr
->operation
!= ir_binop_mul
)
758 expr
->operands
[0]->accept(this);
760 expr
->operands
[1]->accept(this);
762 ir
->operands
[nonmul_operand
]->accept(this);
765 this->result
= get_temp(ir
->type
);
766 emit(ir
, OPCODE_MAD
, dst_reg(this->result
), a
, b
, c
);
772 * Emit OPCODE_MAD(a, -b, a) instead of AND(a, NOT(b))
774 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
775 * implemented using multiplication, and logical-or is implemented using
776 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
777 * As result, the logical expression (a & !b) can be rewritten as:
781 * - (a * 1) - (a * b)
785 * This final expression can be implemented as a single MAD(a, -b, a)
789 ir_to_mesa_visitor::try_emit_mad_for_and_not(ir_expression
*ir
, int try_operand
)
791 const int other_operand
= 1 - try_operand
;
794 ir_expression
*expr
= ir
->operands
[try_operand
]->as_expression();
795 if (!expr
|| expr
->operation
!= ir_unop_logic_not
)
798 ir
->operands
[other_operand
]->accept(this);
800 expr
->operands
[0]->accept(this);
803 b
.negate
= ~b
.negate
;
805 this->result
= get_temp(ir
->type
);
806 emit(ir
, OPCODE_MAD
, dst_reg(this->result
), a
, b
, a
);
812 ir_to_mesa_visitor::reladdr_to_temp(ir_instruction
*ir
,
813 src_reg
*reg
, int *num_reladdr
)
818 emit(ir
, OPCODE_ARL
, address_reg
, *reg
->reladdr
);
820 if (*num_reladdr
!= 1) {
821 src_reg temp
= get_temp(glsl_type::vec4_type
);
823 emit(ir
, OPCODE_MOV
, dst_reg(temp
), *reg
);
831 ir_to_mesa_visitor::emit_swz(ir_expression
*ir
)
833 /* Assume that the vector operator is in a form compatible with OPCODE_SWZ.
834 * This means that each of the operands is either an immediate value of -1,
835 * 0, or 1, or is a component from one source register (possibly with
838 uint8_t components
[4] = { 0 };
839 bool negate
[4] = { false };
840 ir_variable
*var
= NULL
;
842 for (unsigned i
= 0; i
< ir
->type
->vector_elements
; i
++) {
843 ir_rvalue
*op
= ir
->operands
[i
];
845 assert(op
->type
->is_scalar());
848 switch (op
->ir_type
) {
849 case ir_type_constant
: {
851 assert(op
->type
->is_scalar());
853 const ir_constant
*const c
= op
->as_constant();
855 components
[i
] = SWIZZLE_ONE
;
856 } else if (c
->is_zero()) {
857 components
[i
] = SWIZZLE_ZERO
;
858 } else if (c
->is_negative_one()) {
859 components
[i
] = SWIZZLE_ONE
;
862 assert(!"SWZ constant must be 0.0 or 1.0.");
869 case ir_type_dereference_variable
: {
870 ir_dereference_variable
*const deref
=
871 (ir_dereference_variable
*) op
;
873 assert((var
== NULL
) || (deref
->var
== var
));
874 components
[i
] = SWIZZLE_X
;
880 case ir_type_expression
: {
881 ir_expression
*const expr
= (ir_expression
*) op
;
883 assert(expr
->operation
== ir_unop_neg
);
886 op
= expr
->operands
[0];
890 case ir_type_swizzle
: {
891 ir_swizzle
*const swiz
= (ir_swizzle
*) op
;
893 components
[i
] = swiz
->mask
.x
;
899 assert(!"Should not get here.");
907 ir_dereference_variable
*const deref
=
908 new(mem_ctx
) ir_dereference_variable(var
);
910 this->result
.file
= PROGRAM_UNDEFINED
;
912 if (this->result
.file
== PROGRAM_UNDEFINED
) {
913 printf("Failed to get tree for expression operand:\n");
922 src
.swizzle
= MAKE_SWIZZLE4(components
[0],
926 src
.negate
= ((unsigned(negate
[0]) << 0)
927 | (unsigned(negate
[1]) << 1)
928 | (unsigned(negate
[2]) << 2)
929 | (unsigned(negate
[3]) << 3));
931 /* Storage for our result. Ideally for an assignment we'd be using the
932 * actual storage for the result here, instead.
934 const src_reg result_src
= get_temp(ir
->type
);
935 dst_reg result_dst
= dst_reg(result_src
);
937 /* Limit writes to the channels that will be used by result_src later.
938 * This does limit this temp's use as a temporary for multi-instruction
941 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
943 emit(ir
, OPCODE_SWZ
, result_dst
, src
);
944 this->result
= result_src
;
948 ir_to_mesa_visitor::emit_equality_comparison(ir_expression
*ir
,
955 src_reg abs_difference
= get_temp(glsl_type::vec4_type
);
956 const src_reg zero
= src_reg_for_float(0.0);
958 /* x == y is equivalent to -abs(x-y) >= 0. Since all of the code that
959 * consumes the generated IR is pretty dumb, take special care when one
960 * of the operands is zero.
962 * Similarly, x != y is equivalent to -abs(x-y) < 0.
964 if (src0
.file
== zero
.file
&&
965 src0
.index
== zero
.index
&&
966 src0
.swizzle
== zero
.swizzle
) {
968 } else if (src1
.file
== zero
.file
&&
969 src1
.index
== zero
.index
&&
970 src1
.swizzle
== zero
.swizzle
) {
973 difference
= get_temp(glsl_type::vec4_type
);
975 src_reg tmp_src
= src0
;
976 tmp_src
.negate
= ~tmp_src
.negate
;
978 emit(ir
, OPCODE_ADD
, dst_reg(difference
), tmp_src
, src1
);
981 emit(ir
, OPCODE_ABS
, dst_reg(abs_difference
), difference
);
983 abs_difference
.negate
= ~abs_difference
.negate
;
984 emit(ir
, op
, dst
, abs_difference
, zero
);
988 ir_to_mesa_visitor::visit(ir_expression
*ir
)
990 unsigned int operand
;
991 src_reg op
[ARRAY_SIZE(ir
->operands
)];
995 /* Quick peephole: Emit OPCODE_MAD(a, b, c) instead of ADD(MUL(a, b), c)
997 if (ir
->operation
== ir_binop_add
) {
998 if (try_emit_mad(ir
, 1))
1000 if (try_emit_mad(ir
, 0))
1004 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
1006 if (ir
->operation
== ir_binop_logic_and
) {
1007 if (try_emit_mad_for_and_not(ir
, 1))
1009 if (try_emit_mad_for_and_not(ir
, 0))
1013 if (ir
->operation
== ir_quadop_vector
) {
1018 for (operand
= 0; operand
< ir
->num_operands
; operand
++) {
1019 this->result
.file
= PROGRAM_UNDEFINED
;
1020 ir
->operands
[operand
]->accept(this);
1021 if (this->result
.file
== PROGRAM_UNDEFINED
) {
1022 printf("Failed to get tree for expression operand:\n");
1023 ir
->operands
[operand
]->print();
1027 op
[operand
] = this->result
;
1029 /* Matrix expression operands should have been broken down to vector
1030 * operations already.
1032 assert(!ir
->operands
[operand
]->type
->is_matrix());
1035 int vector_elements
= ir
->operands
[0]->type
->vector_elements
;
1036 if (ir
->operands
[1]) {
1037 vector_elements
= MAX2(vector_elements
,
1038 ir
->operands
[1]->type
->vector_elements
);
1041 this->result
.file
= PROGRAM_UNDEFINED
;
1043 /* Storage for our result. Ideally for an assignment we'd be using
1044 * the actual storage for the result here, instead.
1046 result_src
= get_temp(ir
->type
);
1047 /* convenience for the emit functions below. */
1048 result_dst
= dst_reg(result_src
);
1049 /* Limit writes to the channels that will be used by result_src later.
1050 * This does limit this temp's use as a temporary for multi-instruction
1053 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1055 switch (ir
->operation
) {
1056 case ir_unop_logic_not
:
1057 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
1058 * older GPUs implement SEQ using multiple instructions (i915 uses two
1059 * SGE instructions and a MUL instruction). Since our logic values are
1060 * 0.0 and 1.0, 1-x also implements !x.
1062 op
[0].negate
= ~op
[0].negate
;
1063 emit(ir
, OPCODE_ADD
, result_dst
, op
[0], src_reg_for_float(1.0));
1066 op
[0].negate
= ~op
[0].negate
;
1070 emit(ir
, OPCODE_ABS
, result_dst
, op
[0]);
1073 emit(ir
, OPCODE_SSG
, result_dst
, op
[0]);
1076 emit_scalar(ir
, OPCODE_RCP
, result_dst
, op
[0]);
1080 emit_scalar(ir
, OPCODE_EX2
, result_dst
, op
[0]);
1083 assert(!"not reached: should be handled by exp_to_exp2");
1086 assert(!"not reached: should be handled by log_to_log2");
1089 emit_scalar(ir
, OPCODE_LG2
, result_dst
, op
[0]);
1092 emit_scalar(ir
, OPCODE_SIN
, result_dst
, op
[0]);
1095 emit_scalar(ir
, OPCODE_COS
, result_dst
, op
[0]);
1099 emit(ir
, OPCODE_DDX
, result_dst
, op
[0]);
1102 emit(ir
, OPCODE_DDY
, result_dst
, op
[0]);
1105 case ir_unop_saturate
: {
1106 ir_to_mesa_instruction
*inst
= emit(ir
, OPCODE_MOV
,
1108 inst
->saturate
= true;
1111 case ir_unop_noise
: {
1112 const enum prog_opcode opcode
=
1113 prog_opcode(OPCODE_NOISE1
1114 + (ir
->operands
[0]->type
->vector_elements
) - 1);
1115 assert((opcode
>= OPCODE_NOISE1
) && (opcode
<= OPCODE_NOISE4
));
1117 emit(ir
, opcode
, result_dst
, op
[0]);
1122 emit(ir
, OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1125 emit(ir
, OPCODE_SUB
, result_dst
, op
[0], op
[1]);
1129 emit(ir
, OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1132 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1135 /* Floating point should be lowered by MOD_TO_FLOOR in the compiler. */
1136 assert(ir
->type
->is_integer());
1137 emit(ir
, OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1141 emit(ir
, OPCODE_SLT
, result_dst
, op
[0], op
[1]);
1143 case ir_binop_gequal
:
1144 emit(ir
, OPCODE_SGE
, result_dst
, op
[0], op
[1]);
1146 case ir_binop_equal
:
1147 emit_seq(ir
, result_dst
, op
[0], op
[1]);
1149 case ir_binop_nequal
:
1150 emit_sne(ir
, result_dst
, op
[0], op
[1]);
1152 case ir_binop_all_equal
:
1153 /* "==" operator producing a scalar boolean. */
1154 if (ir
->operands
[0]->type
->is_vector() ||
1155 ir
->operands
[1]->type
->is_vector()) {
1156 src_reg temp
= get_temp(glsl_type::vec4_type
);
1157 emit_sne(ir
, dst_reg(temp
), op
[0], op
[1]);
1159 /* After the dot-product, the value will be an integer on the
1160 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1162 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1164 /* Negating the result of the dot-product gives values on the range
1165 * [-4, 0]. Zero becomes 1.0, and negative values become zero. This
1166 * achieved using SGE.
1168 src_reg sge_src
= result_src
;
1169 sge_src
.negate
= ~sge_src
.negate
;
1170 emit(ir
, OPCODE_SGE
, result_dst
, sge_src
, src_reg_for_float(0.0));
1172 emit_seq(ir
, result_dst
, op
[0], op
[1]);
1175 case ir_binop_any_nequal
:
1176 /* "!=" operator producing a scalar boolean. */
1177 if (ir
->operands
[0]->type
->is_vector() ||
1178 ir
->operands
[1]->type
->is_vector()) {
1179 src_reg temp
= get_temp(glsl_type::vec4_type
);
1180 if (ir
->operands
[0]->type
->is_boolean() &&
1181 ir
->operands
[1]->as_constant() &&
1182 ir
->operands
[1]->as_constant()->is_zero()) {
1185 emit_sne(ir
, dst_reg(temp
), op
[0], op
[1]);
1188 /* After the dot-product, the value will be an integer on the
1189 * range [0,4]. Zero stays zero, and positive values become 1.0.
1191 ir_to_mesa_instruction
*const dp
=
1192 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1193 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1194 /* The clamping to [0,1] can be done for free in the fragment
1195 * shader with a saturate.
1197 dp
->saturate
= true;
1199 /* Negating the result of the dot-product gives values on the range
1200 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1201 * achieved using SLT.
1203 src_reg slt_src
= result_src
;
1204 slt_src
.negate
= ~slt_src
.negate
;
1205 emit(ir
, OPCODE_SLT
, result_dst
, slt_src
, src_reg_for_float(0.0));
1208 emit_sne(ir
, result_dst
, op
[0], op
[1]);
1212 case ir_binop_logic_xor
:
1213 emit_sne(ir
, result_dst
, op
[0], op
[1]);
1216 case ir_binop_logic_or
: {
1217 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1218 /* After the addition, the value will be an integer on the
1219 * range [0,2]. Zero stays zero, and positive values become 1.0.
1221 ir_to_mesa_instruction
*add
=
1222 emit(ir
, OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1223 add
->saturate
= true;
1225 /* The Boolean arguments are stored as float 0.0 and 1.0. If either
1226 * value is 1.0, the result of the logcal-or should be 1.0. If both
1227 * values are 0.0, the result should be 0.0. This is exactly what
1230 emit(ir
, OPCODE_MAX
, result_dst
, op
[0], op
[1]);
1235 case ir_binop_logic_and
:
1236 /* the bool args are stored as float 0.0 or 1.0, so "mul" gives us "and". */
1237 emit(ir
, OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1241 assert(ir
->operands
[0]->type
->is_vector());
1242 assert(ir
->operands
[0]->type
== ir
->operands
[1]->type
);
1243 emit_dp(ir
, result_dst
, op
[0], op
[1],
1244 ir
->operands
[0]->type
->vector_elements
);
1248 /* sqrt(x) = x * rsq(x). */
1249 emit_scalar(ir
, OPCODE_RSQ
, result_dst
, op
[0]);
1250 emit(ir
, OPCODE_MUL
, result_dst
, result_src
, op
[0]);
1251 /* For incoming channels <= 0, set the result to 0. */
1252 op
[0].negate
= ~op
[0].negate
;
1253 emit(ir
, OPCODE_CMP
, result_dst
,
1254 op
[0], result_src
, src_reg_for_float(0.0));
1257 emit_scalar(ir
, OPCODE_RSQ
, result_dst
, op
[0]);
1265 /* Mesa IR lacks types, ints are stored as truncated floats. */
1270 emit(ir
, OPCODE_TRUNC
, result_dst
, op
[0]);
1274 emit_sne(ir
, result_dst
, op
[0], src_reg_for_float(0.0));
1276 case ir_unop_bitcast_f2i
: // Ignore these 4, they can't happen here anyway
1277 case ir_unop_bitcast_f2u
:
1278 case ir_unop_bitcast_i2f
:
1279 case ir_unop_bitcast_u2f
:
1282 emit(ir
, OPCODE_TRUNC
, result_dst
, op
[0]);
1285 op
[0].negate
= ~op
[0].negate
;
1286 emit(ir
, OPCODE_FLR
, result_dst
, op
[0]);
1287 result_src
.negate
= ~result_src
.negate
;
1290 emit(ir
, OPCODE_FLR
, result_dst
, op
[0]);
1293 emit(ir
, OPCODE_FRC
, result_dst
, op
[0]);
1295 case ir_unop_pack_snorm_2x16
:
1296 case ir_unop_pack_snorm_4x8
:
1297 case ir_unop_pack_unorm_2x16
:
1298 case ir_unop_pack_unorm_4x8
:
1299 case ir_unop_pack_half_2x16
:
1300 case ir_unop_pack_double_2x32
:
1301 case ir_unop_unpack_snorm_2x16
:
1302 case ir_unop_unpack_snorm_4x8
:
1303 case ir_unop_unpack_unorm_2x16
:
1304 case ir_unop_unpack_unorm_4x8
:
1305 case ir_unop_unpack_half_2x16
:
1306 case ir_unop_unpack_double_2x32
:
1307 case ir_unop_bitfield_reverse
:
1308 case ir_unop_bit_count
:
1309 case ir_unop_find_msb
:
1310 case ir_unop_find_lsb
:
1318 case ir_unop_frexp_sig
:
1319 case ir_unop_frexp_exp
:
1320 assert(!"not supported");
1323 emit(ir
, OPCODE_MIN
, result_dst
, op
[0], op
[1]);
1326 emit(ir
, OPCODE_MAX
, result_dst
, op
[0], op
[1]);
1329 emit_scalar(ir
, OPCODE_POW
, result_dst
, op
[0], op
[1]);
1332 /* GLSL 1.30 integer ops are unsupported in Mesa IR, but since
1333 * hardware backends have no way to avoid Mesa IR generation
1334 * even if they don't use it, we need to emit "something" and
1337 case ir_binop_lshift
:
1338 case ir_binop_rshift
:
1339 case ir_binop_bit_and
:
1340 case ir_binop_bit_xor
:
1341 case ir_binop_bit_or
:
1342 emit(ir
, OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1345 case ir_unop_bit_not
:
1346 case ir_unop_round_even
:
1347 emit(ir
, OPCODE_MOV
, result_dst
, op
[0]);
1350 case ir_binop_ubo_load
:
1351 assert(!"not supported");
1355 /* ir_triop_lrp operands are (x, y, a) while
1356 * OPCODE_LRP operands are (a, y, x) to match ARB_fragment_program.
1358 emit(ir
, OPCODE_LRP
, result_dst
, op
[2], op
[1], op
[0]);
1362 /* We assume that boolean true and false are 1.0 and 0.0. OPCODE_CMP
1363 * selects src1 if src0 is < 0, src2 otherwise.
1365 op
[0].negate
= ~op
[0].negate
;
1366 emit(ir
, OPCODE_CMP
, result_dst
, op
[0], op
[1], op
[2]);
1369 case ir_binop_vector_extract
:
1371 case ir_triop_bitfield_extract
:
1372 case ir_triop_vector_insert
:
1373 case ir_quadop_bitfield_insert
:
1374 case ir_binop_ldexp
:
1375 case ir_binop_carry
:
1376 case ir_binop_borrow
:
1377 case ir_binop_imul_high
:
1378 case ir_unop_interpolate_at_centroid
:
1379 case ir_binop_interpolate_at_offset
:
1380 case ir_binop_interpolate_at_sample
:
1381 case ir_unop_dFdx_coarse
:
1382 case ir_unop_dFdx_fine
:
1383 case ir_unop_dFdy_coarse
:
1384 case ir_unop_dFdy_fine
:
1385 case ir_unop_subroutine_to_int
:
1386 case ir_unop_get_buffer_size
:
1387 case ir_unop_bitcast_u642d
:
1388 case ir_unop_bitcast_i642d
:
1389 case ir_unop_bitcast_d2u64
:
1390 case ir_unop_bitcast_d2i64
:
1409 case ir_unop_u642i64
:
1410 case ir_unop_i642u64
:
1411 case ir_unop_pack_int_2x32
:
1412 case ir_unop_unpack_int_2x32
:
1413 case ir_unop_pack_uint_2x32
:
1414 case ir_unop_unpack_uint_2x32
:
1415 case ir_unop_pack_sampler_2x32
:
1416 case ir_unop_unpack_sampler_2x32
:
1417 case ir_unop_pack_image_2x32
:
1418 case ir_unop_unpack_image_2x32
:
1419 assert(!"not supported");
1422 case ir_unop_ssbo_unsized_array_length
:
1423 case ir_quadop_vector
:
1424 /* This operation should have already been handled.
1426 assert(!"Should not get here.");
1430 this->result
= result_src
;
1435 ir_to_mesa_visitor::visit(ir_swizzle
*ir
)
1441 /* Note that this is only swizzles in expressions, not those on the left
1442 * hand side of an assignment, which do write masking. See ir_assignment
1446 ir
->val
->accept(this);
1448 assert(src
.file
!= PROGRAM_UNDEFINED
);
1449 assert(ir
->type
->vector_elements
> 0);
1451 for (i
= 0; i
< 4; i
++) {
1452 if (i
< ir
->type
->vector_elements
) {
1455 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.x
);
1458 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.y
);
1461 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.z
);
1464 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.w
);
1468 /* If the type is smaller than a vec4, replicate the last
1471 swizzle
[i
] = swizzle
[ir
->type
->vector_elements
- 1];
1475 src
.swizzle
= MAKE_SWIZZLE4(swizzle
[0], swizzle
[1], swizzle
[2], swizzle
[3]);
1481 ir_to_mesa_visitor::visit(ir_dereference_variable
*ir
)
1483 variable_storage
*entry
= find_variable_storage(ir
->var
);
1484 ir_variable
*var
= ir
->var
;
1487 switch (var
->data
.mode
) {
1488 case ir_var_uniform
:
1489 entry
= new(mem_ctx
) variable_storage(var
, PROGRAM_UNIFORM
,
1490 var
->data
.param_index
);
1491 this->variables
.push_tail(entry
);
1493 case ir_var_shader_in
:
1494 /* The linker assigns locations for varyings and attributes,
1495 * including deprecated builtins (like gl_Color),
1496 * user-assigned generic attributes (glBindVertexLocation),
1497 * and user-defined varyings.
1499 assert(var
->data
.location
!= -1);
1500 entry
= new(mem_ctx
) variable_storage(var
,
1502 var
->data
.location
);
1504 case ir_var_shader_out
:
1505 assert(var
->data
.location
!= -1);
1506 entry
= new(mem_ctx
) variable_storage(var
,
1508 var
->data
.location
);
1510 case ir_var_system_value
:
1511 entry
= new(mem_ctx
) variable_storage(var
,
1512 PROGRAM_SYSTEM_VALUE
,
1513 var
->data
.location
);
1516 case ir_var_temporary
:
1517 entry
= new(mem_ctx
) variable_storage(var
, PROGRAM_TEMPORARY
,
1519 this->variables
.push_tail(entry
);
1521 next_temp
+= type_size(var
->type
);
1526 printf("Failed to make storage for %s\n", var
->name
);
1531 this->result
= src_reg(entry
->file
, entry
->index
, var
->type
);
1535 ir_to_mesa_visitor::visit(ir_dereference_array
*ir
)
1539 int element_size
= type_size(ir
->type
);
1541 index
= ir
->array_index
->constant_expression_value(ralloc_parent(ir
));
1543 ir
->array
->accept(this);
1547 src
.index
+= index
->value
.i
[0] * element_size
;
1549 /* Variable index array dereference. It eats the "vec4" of the
1550 * base of the array and an index that offsets the Mesa register
1553 ir
->array_index
->accept(this);
1557 if (element_size
== 1) {
1558 index_reg
= this->result
;
1560 index_reg
= get_temp(glsl_type::float_type
);
1562 emit(ir
, OPCODE_MUL
, dst_reg(index_reg
),
1563 this->result
, src_reg_for_float(element_size
));
1566 /* If there was already a relative address register involved, add the
1567 * new and the old together to get the new offset.
1569 if (src
.reladdr
!= NULL
) {
1570 src_reg accum_reg
= get_temp(glsl_type::float_type
);
1572 emit(ir
, OPCODE_ADD
, dst_reg(accum_reg
),
1573 index_reg
, *src
.reladdr
);
1575 index_reg
= accum_reg
;
1578 src
.reladdr
= ralloc(mem_ctx
, src_reg
);
1579 memcpy(src
.reladdr
, &index_reg
, sizeof(index_reg
));
1582 /* If the type is smaller than a vec4, replicate the last channel out. */
1583 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
1584 src
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
1586 src
.swizzle
= SWIZZLE_NOOP
;
1592 ir_to_mesa_visitor::visit(ir_dereference_record
*ir
)
1595 const glsl_type
*struct_type
= ir
->record
->type
;
1598 ir
->record
->accept(this);
1600 assert(ir
->field_idx
>= 0);
1601 for (i
= 0; i
< struct_type
->length
; i
++) {
1602 if (i
== (unsigned) ir
->field_idx
)
1604 offset
+= type_size(struct_type
->fields
.structure
[i
].type
);
1607 /* If the type is smaller than a vec4, replicate the last channel out. */
1608 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
1609 this->result
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
1611 this->result
.swizzle
= SWIZZLE_NOOP
;
1613 this->result
.index
+= offset
;
1617 * We want to be careful in assignment setup to hit the actual storage
1618 * instead of potentially using a temporary like we might with the
1619 * ir_dereference handler.
1622 get_assignment_lhs(ir_dereference
*ir
, ir_to_mesa_visitor
*v
)
1624 /* The LHS must be a dereference. If the LHS is a variable indexed array
1625 * access of a vector, it must be separated into a series conditional moves
1626 * before reaching this point (see ir_vec_index_to_cond_assign).
1628 assert(ir
->as_dereference());
1629 ir_dereference_array
*deref_array
= ir
->as_dereference_array();
1631 assert(!deref_array
->array
->type
->is_vector());
1634 /* Use the rvalue deref handler for the most part. We'll ignore
1635 * swizzles in it and write swizzles using writemask, though.
1638 return dst_reg(v
->result
);
1641 /* Calculate the sampler index and also calculate the base uniform location
1642 * for struct members.
1645 calc_sampler_offsets(struct gl_shader_program
*prog
, ir_dereference
*deref
,
1646 unsigned *offset
, unsigned *array_elements
,
1649 if (deref
->ir_type
== ir_type_dereference_variable
)
1652 switch (deref
->ir_type
) {
1653 case ir_type_dereference_array
: {
1654 ir_dereference_array
*deref_arr
= deref
->as_dereference_array();
1656 void *mem_ctx
= ralloc_parent(deref_arr
);
1657 ir_constant
*array_index
=
1658 deref_arr
->array_index
->constant_expression_value(mem_ctx
);
1661 /* GLSL 1.10 and 1.20 allowed variable sampler array indices,
1662 * while GLSL 1.30 requires that the array indices be
1663 * constant integer expressions. We don't expect any driver
1664 * to actually work with a really variable array index, so
1665 * all that would work would be an unrolled loop counter that ends
1666 * up being constant above.
1668 ralloc_strcat(&prog
->data
->InfoLog
,
1669 "warning: Variable sampler array index unsupported.\n"
1670 "This feature of the language was removed in GLSL 1.20 "
1671 "and is unlikely to be supported for 1.10 in Mesa.\n");
1673 *offset
+= array_index
->value
.u
[0] * *array_elements
;
1676 *array_elements
*= deref_arr
->array
->type
->length
;
1678 calc_sampler_offsets(prog
, deref_arr
->array
->as_dereference(),
1679 offset
, array_elements
, location
);
1683 case ir_type_dereference_record
: {
1684 ir_dereference_record
*deref_record
= deref
->as_dereference_record();
1685 unsigned field_index
= deref_record
->field_idx
;
1687 deref_record
->record
->type
->record_location_offset(field_index
);
1688 calc_sampler_offsets(prog
, deref_record
->record
->as_dereference(),
1689 offset
, array_elements
, location
);
1694 unreachable("Invalid deref type");
1700 get_sampler_uniform_value(class ir_dereference
*sampler
,
1701 struct gl_shader_program
*shader_program
,
1702 const struct gl_program
*prog
)
1704 GLuint shader
= _mesa_program_enum_to_shader_stage(prog
->Target
);
1705 ir_variable
*var
= sampler
->variable_referenced();
1706 unsigned location
= var
->data
.location
;
1707 unsigned array_elements
= 1;
1708 unsigned offset
= 0;
1710 calc_sampler_offsets(shader_program
, sampler
, &offset
, &array_elements
,
1713 assert(shader_program
->data
->UniformStorage
[location
].opaque
[shader
].active
);
1714 return shader_program
->data
->UniformStorage
[location
].opaque
[shader
].index
+
1719 * Process the condition of a conditional assignment
1721 * Examines the condition of a conditional assignment to generate the optimal
1722 * first operand of a \c CMP instruction. If the condition is a relational
1723 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
1724 * used as the source for the \c CMP instruction. Otherwise the comparison
1725 * is processed to a boolean result, and the boolean result is used as the
1726 * operand to the CMP instruction.
1729 ir_to_mesa_visitor::process_move_condition(ir_rvalue
*ir
)
1731 ir_rvalue
*src_ir
= ir
;
1733 bool switch_order
= false;
1735 ir_expression
*const expr
= ir
->as_expression();
1736 if ((expr
!= NULL
) && (expr
->num_operands
== 2)) {
1737 bool zero_on_left
= false;
1739 if (expr
->operands
[0]->is_zero()) {
1740 src_ir
= expr
->operands
[1];
1741 zero_on_left
= true;
1742 } else if (expr
->operands
[1]->is_zero()) {
1743 src_ir
= expr
->operands
[0];
1744 zero_on_left
= false;
1748 * (a < 0) T F F ( a < 0) T F F
1749 * (0 < a) F F T (-a < 0) F F T
1750 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
1751 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
1753 * Note that exchanging the order of 0 and 'a' in the comparison simply
1754 * means that the value of 'a' should be negated.
1757 switch (expr
->operation
) {
1759 switch_order
= false;
1760 negate
= zero_on_left
;
1763 case ir_binop_gequal
:
1764 switch_order
= true;
1765 negate
= zero_on_left
;
1769 /* This isn't the right kind of comparison afterall, so make sure
1770 * the whole condition is visited.
1778 src_ir
->accept(this);
1780 /* We use the OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
1781 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
1782 * choose which value OPCODE_CMP produces without an extra instruction
1783 * computing the condition.
1786 this->result
.negate
= ~this->result
.negate
;
1788 return switch_order
;
1792 ir_to_mesa_visitor::visit(ir_assignment
*ir
)
1798 ir
->rhs
->accept(this);
1801 l
= get_assignment_lhs(ir
->lhs
, this);
1803 /* FINISHME: This should really set to the correct maximal writemask for each
1804 * FINISHME: component written (in the loops below). This case can only
1805 * FINISHME: occur for matrices, arrays, and structures.
1807 if (ir
->write_mask
== 0) {
1808 assert(!ir
->lhs
->type
->is_scalar() && !ir
->lhs
->type
->is_vector());
1809 l
.writemask
= WRITEMASK_XYZW
;
1810 } else if (ir
->lhs
->type
->is_scalar()) {
1811 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
1812 * FINISHME: W component of fragment shader output zero, work correctly.
1814 l
.writemask
= WRITEMASK_XYZW
;
1817 int first_enabled_chan
= 0;
1820 assert(ir
->lhs
->type
->is_vector());
1821 l
.writemask
= ir
->write_mask
;
1823 for (int i
= 0; i
< 4; i
++) {
1824 if (l
.writemask
& (1 << i
)) {
1825 first_enabled_chan
= GET_SWZ(r
.swizzle
, i
);
1830 /* Swizzle a small RHS vector into the channels being written.
1832 * glsl ir treats write_mask as dictating how many channels are
1833 * present on the RHS while Mesa IR treats write_mask as just
1834 * showing which channels of the vec4 RHS get written.
1836 for (int i
= 0; i
< 4; i
++) {
1837 if (l
.writemask
& (1 << i
))
1838 swizzles
[i
] = GET_SWZ(r
.swizzle
, rhs_chan
++);
1840 swizzles
[i
] = first_enabled_chan
;
1842 r
.swizzle
= MAKE_SWIZZLE4(swizzles
[0], swizzles
[1],
1843 swizzles
[2], swizzles
[3]);
1846 assert(l
.file
!= PROGRAM_UNDEFINED
);
1847 assert(r
.file
!= PROGRAM_UNDEFINED
);
1849 if (ir
->condition
) {
1850 const bool switch_order
= this->process_move_condition(ir
->condition
);
1851 src_reg condition
= this->result
;
1853 for (i
= 0; i
< type_size(ir
->lhs
->type
); i
++) {
1855 emit(ir
, OPCODE_CMP
, l
, condition
, src_reg(l
), r
);
1857 emit(ir
, OPCODE_CMP
, l
, condition
, r
, src_reg(l
));
1864 for (i
= 0; i
< type_size(ir
->lhs
->type
); i
++) {
1865 emit(ir
, OPCODE_MOV
, l
, r
);
1874 ir_to_mesa_visitor::visit(ir_constant
*ir
)
1877 GLfloat stack_vals
[4] = { 0 };
1878 GLfloat
*values
= stack_vals
;
1881 /* Unfortunately, 4 floats is all we can get into
1882 * _mesa_add_unnamed_constant. So, make a temp to store an
1883 * aggregate constant and move each constant value into it. If we
1884 * get lucky, copy propagation will eliminate the extra moves.
1887 if (ir
->type
->is_record()) {
1888 src_reg temp_base
= get_temp(ir
->type
);
1889 dst_reg temp
= dst_reg(temp_base
);
1891 for (i
= 0; i
< ir
->type
->length
; i
++) {
1892 ir_constant
*const field_value
= ir
->get_record_field(i
);
1893 int size
= type_size(field_value
->type
);
1897 field_value
->accept(this);
1900 for (unsigned j
= 0; j
< (unsigned int)size
; j
++) {
1901 emit(ir
, OPCODE_MOV
, temp
, src
);
1907 this->result
= temp_base
;
1911 if (ir
->type
->is_array()) {
1912 src_reg temp_base
= get_temp(ir
->type
);
1913 dst_reg temp
= dst_reg(temp_base
);
1914 int size
= type_size(ir
->type
->fields
.array
);
1918 for (i
= 0; i
< ir
->type
->length
; i
++) {
1919 ir
->const_elements
[i
]->accept(this);
1921 for (int j
= 0; j
< size
; j
++) {
1922 emit(ir
, OPCODE_MOV
, temp
, src
);
1928 this->result
= temp_base
;
1932 if (ir
->type
->is_matrix()) {
1933 src_reg mat
= get_temp(ir
->type
);
1934 dst_reg mat_column
= dst_reg(mat
);
1936 for (i
= 0; i
< ir
->type
->matrix_columns
; i
++) {
1937 assert(ir
->type
->is_float());
1938 values
= &ir
->value
.f
[i
* ir
->type
->vector_elements
];
1940 src
= src_reg(PROGRAM_CONSTANT
, -1, NULL
);
1941 src
.index
= _mesa_add_unnamed_constant(this->prog
->Parameters
,
1942 (gl_constant_value
*) values
,
1943 ir
->type
->vector_elements
,
1945 emit(ir
, OPCODE_MOV
, mat_column
, src
);
1954 src
.file
= PROGRAM_CONSTANT
;
1955 switch (ir
->type
->base_type
) {
1956 case GLSL_TYPE_FLOAT
:
1957 values
= &ir
->value
.f
[0];
1959 case GLSL_TYPE_UINT
:
1960 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
1961 values
[i
] = ir
->value
.u
[i
];
1965 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
1966 values
[i
] = ir
->value
.i
[i
];
1969 case GLSL_TYPE_BOOL
:
1970 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
1971 values
[i
] = ir
->value
.b
[i
];
1975 assert(!"Non-float/uint/int/bool constant");
1978 this->result
= src_reg(PROGRAM_CONSTANT
, -1, ir
->type
);
1979 this->result
.index
= _mesa_add_unnamed_constant(this->prog
->Parameters
,
1980 (gl_constant_value
*) values
,
1981 ir
->type
->vector_elements
,
1982 &this->result
.swizzle
);
1986 ir_to_mesa_visitor::visit(ir_call
*)
1988 assert(!"ir_to_mesa: All function calls should have been inlined by now.");
1992 ir_to_mesa_visitor::visit(ir_texture
*ir
)
1994 src_reg result_src
, coord
, lod_info
, projector
, dx
, dy
;
1995 dst_reg result_dst
, coord_dst
;
1996 ir_to_mesa_instruction
*inst
= NULL
;
1997 prog_opcode opcode
= OPCODE_NOP
;
1999 if (ir
->op
== ir_txs
)
2000 this->result
= src_reg_for_float(0.0);
2002 ir
->coordinate
->accept(this);
2004 /* Put our coords in a temp. We'll need to modify them for shadow,
2005 * projection, or LOD, so the only case we'd use it as-is is if
2006 * we're doing plain old texturing. Mesa IR optimization should
2007 * handle cleaning up our mess in that case.
2009 coord
= get_temp(glsl_type::vec4_type
);
2010 coord_dst
= dst_reg(coord
);
2011 emit(ir
, OPCODE_MOV
, coord_dst
, this->result
);
2013 if (ir
->projector
) {
2014 ir
->projector
->accept(this);
2015 projector
= this->result
;
2018 /* Storage for our result. Ideally for an assignment we'd be using
2019 * the actual storage for the result here, instead.
2021 result_src
= get_temp(glsl_type::vec4_type
);
2022 result_dst
= dst_reg(result_src
);
2027 opcode
= OPCODE_TEX
;
2030 opcode
= OPCODE_TXB
;
2031 ir
->lod_info
.bias
->accept(this);
2032 lod_info
= this->result
;
2035 /* Pretend to be TXL so the sampler, coordinate, lod are available */
2037 opcode
= OPCODE_TXL
;
2038 ir
->lod_info
.lod
->accept(this);
2039 lod_info
= this->result
;
2042 opcode
= OPCODE_TXD
;
2043 ir
->lod_info
.grad
.dPdx
->accept(this);
2045 ir
->lod_info
.grad
.dPdy
->accept(this);
2049 assert(!"Unexpected ir_txf_ms opcode");
2052 assert(!"Unexpected ir_lod opcode");
2055 assert(!"Unexpected ir_tg4 opcode");
2057 case ir_query_levels
:
2058 assert(!"Unexpected ir_query_levels opcode");
2060 case ir_samples_identical
:
2061 unreachable("Unexpected ir_samples_identical opcode");
2062 case ir_texture_samples
:
2063 unreachable("Unexpected ir_texture_samples opcode");
2066 const glsl_type
*sampler_type
= ir
->sampler
->type
;
2068 if (ir
->projector
) {
2069 if (opcode
== OPCODE_TEX
) {
2070 /* Slot the projector in as the last component of the coord. */
2071 coord_dst
.writemask
= WRITEMASK_W
;
2072 emit(ir
, OPCODE_MOV
, coord_dst
, projector
);
2073 coord_dst
.writemask
= WRITEMASK_XYZW
;
2074 opcode
= OPCODE_TXP
;
2076 src_reg coord_w
= coord
;
2077 coord_w
.swizzle
= SWIZZLE_WWWW
;
2079 /* For the other TEX opcodes there's no projective version
2080 * since the last slot is taken up by lod info. Do the
2081 * projective divide now.
2083 coord_dst
.writemask
= WRITEMASK_W
;
2084 emit(ir
, OPCODE_RCP
, coord_dst
, projector
);
2086 /* In the case where we have to project the coordinates "by hand,"
2087 * the shadow comparator value must also be projected.
2089 src_reg tmp_src
= coord
;
2090 if (ir
->shadow_comparator
) {
2091 /* Slot the shadow value in as the second to last component of the
2094 ir
->shadow_comparator
->accept(this);
2096 tmp_src
= get_temp(glsl_type::vec4_type
);
2097 dst_reg tmp_dst
= dst_reg(tmp_src
);
2099 /* Projective division not allowed for array samplers. */
2100 assert(!sampler_type
->sampler_array
);
2102 tmp_dst
.writemask
= WRITEMASK_Z
;
2103 emit(ir
, OPCODE_MOV
, tmp_dst
, this->result
);
2105 tmp_dst
.writemask
= WRITEMASK_XY
;
2106 emit(ir
, OPCODE_MOV
, tmp_dst
, coord
);
2109 coord_dst
.writemask
= WRITEMASK_XYZ
;
2110 emit(ir
, OPCODE_MUL
, coord_dst
, tmp_src
, coord_w
);
2112 coord_dst
.writemask
= WRITEMASK_XYZW
;
2113 coord
.swizzle
= SWIZZLE_XYZW
;
2117 /* If projection is done and the opcode is not OPCODE_TXP, then the shadow
2118 * comparator was put in the correct place (and projected) by the code,
2119 * above, that handles by-hand projection.
2121 if (ir
->shadow_comparator
&& (!ir
->projector
|| opcode
== OPCODE_TXP
)) {
2122 /* Slot the shadow value in as the second to last component of the
2125 ir
->shadow_comparator
->accept(this);
2127 /* XXX This will need to be updated for cubemap array samplers. */
2128 if (sampler_type
->sampler_dimensionality
== GLSL_SAMPLER_DIM_2D
&&
2129 sampler_type
->sampler_array
) {
2130 coord_dst
.writemask
= WRITEMASK_W
;
2132 coord_dst
.writemask
= WRITEMASK_Z
;
2135 emit(ir
, OPCODE_MOV
, coord_dst
, this->result
);
2136 coord_dst
.writemask
= WRITEMASK_XYZW
;
2139 if (opcode
== OPCODE_TXL
|| opcode
== OPCODE_TXB
) {
2140 /* Mesa IR stores lod or lod bias in the last channel of the coords. */
2141 coord_dst
.writemask
= WRITEMASK_W
;
2142 emit(ir
, OPCODE_MOV
, coord_dst
, lod_info
);
2143 coord_dst
.writemask
= WRITEMASK_XYZW
;
2146 if (opcode
== OPCODE_TXD
)
2147 inst
= emit(ir
, opcode
, result_dst
, coord
, dx
, dy
);
2149 inst
= emit(ir
, opcode
, result_dst
, coord
);
2151 if (ir
->shadow_comparator
)
2152 inst
->tex_shadow
= GL_TRUE
;
2154 inst
->sampler
= get_sampler_uniform_value(ir
->sampler
, shader_program
,
2157 switch (sampler_type
->sampler_dimensionality
) {
2158 case GLSL_SAMPLER_DIM_1D
:
2159 inst
->tex_target
= (sampler_type
->sampler_array
)
2160 ? TEXTURE_1D_ARRAY_INDEX
: TEXTURE_1D_INDEX
;
2162 case GLSL_SAMPLER_DIM_2D
:
2163 inst
->tex_target
= (sampler_type
->sampler_array
)
2164 ? TEXTURE_2D_ARRAY_INDEX
: TEXTURE_2D_INDEX
;
2166 case GLSL_SAMPLER_DIM_3D
:
2167 inst
->tex_target
= TEXTURE_3D_INDEX
;
2169 case GLSL_SAMPLER_DIM_CUBE
:
2170 inst
->tex_target
= TEXTURE_CUBE_INDEX
;
2172 case GLSL_SAMPLER_DIM_RECT
:
2173 inst
->tex_target
= TEXTURE_RECT_INDEX
;
2175 case GLSL_SAMPLER_DIM_BUF
:
2176 assert(!"FINISHME: Implement ARB_texture_buffer_object");
2178 case GLSL_SAMPLER_DIM_EXTERNAL
:
2179 inst
->tex_target
= TEXTURE_EXTERNAL_INDEX
;
2182 assert(!"Should not get here.");
2185 this->result
= result_src
;
2189 ir_to_mesa_visitor::visit(ir_return
*ir
)
2191 /* Non-void functions should have been inlined. We may still emit RETs
2192 * from main() unless the EmitNoMainReturn option is set.
2194 assert(!ir
->get_value());
2195 emit(ir
, OPCODE_RET
);
2199 ir_to_mesa_visitor::visit(ir_discard
*ir
)
2202 ir
->condition
= new(mem_ctx
) ir_constant(true);
2204 ir
->condition
->accept(this);
2205 this->result
.negate
= ~this->result
.negate
;
2206 emit(ir
, OPCODE_KIL
, undef_dst
, this->result
);
2210 ir_to_mesa_visitor::visit(ir_if
*ir
)
2212 ir_to_mesa_instruction
*if_inst
;
2214 ir
->condition
->accept(this);
2215 assert(this->result
.file
!= PROGRAM_UNDEFINED
);
2217 if_inst
= emit(ir
->condition
, OPCODE_IF
, undef_dst
, this->result
);
2219 this->instructions
.push_tail(if_inst
);
2221 visit_exec_list(&ir
->then_instructions
, this);
2223 if (!ir
->else_instructions
.is_empty()) {
2224 emit(ir
->condition
, OPCODE_ELSE
);
2225 visit_exec_list(&ir
->else_instructions
, this);
2228 emit(ir
->condition
, OPCODE_ENDIF
);
2232 ir_to_mesa_visitor::visit(ir_emit_vertex
*)
2234 assert(!"Geometry shaders not supported.");
2238 ir_to_mesa_visitor::visit(ir_end_primitive
*)
2240 assert(!"Geometry shaders not supported.");
2244 ir_to_mesa_visitor::visit(ir_barrier
*)
2246 unreachable("GLSL barrier() not supported.");
2249 ir_to_mesa_visitor::ir_to_mesa_visitor()
2251 result
.file
= PROGRAM_UNDEFINED
;
2253 next_signature_id
= 1;
2254 current_function
= NULL
;
2255 mem_ctx
= ralloc_context(NULL
);
2258 ir_to_mesa_visitor::~ir_to_mesa_visitor()
2260 ralloc_free(mem_ctx
);
2263 static struct prog_src_register
2264 mesa_src_reg_from_ir_src_reg(src_reg reg
)
2266 struct prog_src_register mesa_reg
;
2268 mesa_reg
.File
= reg
.file
;
2269 assert(reg
.index
< (1 << INST_INDEX_BITS
));
2270 mesa_reg
.Index
= reg
.index
;
2271 mesa_reg
.Swizzle
= reg
.swizzle
;
2272 mesa_reg
.RelAddr
= reg
.reladdr
!= NULL
;
2273 mesa_reg
.Negate
= reg
.negate
;
2279 set_branchtargets(ir_to_mesa_visitor
*v
,
2280 struct prog_instruction
*mesa_instructions
,
2281 int num_instructions
)
2283 int if_count
= 0, loop_count
= 0;
2284 int *if_stack
, *loop_stack
;
2285 int if_stack_pos
= 0, loop_stack_pos
= 0;
2288 for (i
= 0; i
< num_instructions
; i
++) {
2289 switch (mesa_instructions
[i
].Opcode
) {
2293 case OPCODE_BGNLOOP
:
2298 mesa_instructions
[i
].BranchTarget
= -1;
2305 if_stack
= rzalloc_array(v
->mem_ctx
, int, if_count
);
2306 loop_stack
= rzalloc_array(v
->mem_ctx
, int, loop_count
);
2308 for (i
= 0; i
< num_instructions
; i
++) {
2309 switch (mesa_instructions
[i
].Opcode
) {
2311 if_stack
[if_stack_pos
] = i
;
2315 mesa_instructions
[if_stack
[if_stack_pos
- 1]].BranchTarget
= i
;
2316 if_stack
[if_stack_pos
- 1] = i
;
2319 mesa_instructions
[if_stack
[if_stack_pos
- 1]].BranchTarget
= i
;
2322 case OPCODE_BGNLOOP
:
2323 loop_stack
[loop_stack_pos
] = i
;
2326 case OPCODE_ENDLOOP
:
2328 /* Rewrite any breaks/conts at this nesting level (haven't
2329 * already had a BranchTarget assigned) to point to the end
2332 for (j
= loop_stack
[loop_stack_pos
]; j
< i
; j
++) {
2333 if (mesa_instructions
[j
].Opcode
== OPCODE_BRK
||
2334 mesa_instructions
[j
].Opcode
== OPCODE_CONT
) {
2335 if (mesa_instructions
[j
].BranchTarget
== -1) {
2336 mesa_instructions
[j
].BranchTarget
= i
;
2340 /* The loop ends point at each other. */
2341 mesa_instructions
[i
].BranchTarget
= loop_stack
[loop_stack_pos
];
2342 mesa_instructions
[loop_stack
[loop_stack_pos
]].BranchTarget
= i
;
2345 foreach_in_list(function_entry
, entry
, &v
->function_signatures
) {
2346 if (entry
->sig_id
== mesa_instructions
[i
].BranchTarget
) {
2347 mesa_instructions
[i
].BranchTarget
= entry
->inst
;
2359 print_program(struct prog_instruction
*mesa_instructions
,
2360 ir_instruction
**mesa_instruction_annotation
,
2361 int num_instructions
)
2363 ir_instruction
*last_ir
= NULL
;
2367 for (i
= 0; i
< num_instructions
; i
++) {
2368 struct prog_instruction
*mesa_inst
= mesa_instructions
+ i
;
2369 ir_instruction
*ir
= mesa_instruction_annotation
[i
];
2371 fprintf(stdout
, "%3d: ", i
);
2373 if (last_ir
!= ir
&& ir
) {
2376 for (j
= 0; j
< indent
; j
++) {
2377 fprintf(stdout
, " ");
2383 fprintf(stdout
, " "); /* line number spacing. */
2386 indent
= _mesa_fprint_instruction_opt(stdout
, mesa_inst
, indent
,
2387 PROG_PRINT_DEBUG
, NULL
);
2393 class add_uniform_to_shader
: public program_resource_visitor
{
2395 add_uniform_to_shader(struct gl_context
*ctx
,
2396 struct gl_shader_program
*shader_program
,
2397 struct gl_program_parameter_list
*params
)
2398 : ctx(ctx
), params(params
), idx(-1)
2403 void process(ir_variable
*var
)
2407 this->program_resource_visitor::process(var
,
2408 ctx
->Const
.UseSTD430AsDefaultPacking
);
2409 var
->data
.param_index
= this->idx
;
2413 virtual void visit_field(const glsl_type
*type
, const char *name
,
2414 bool row_major
, const glsl_type
*record_type
,
2415 const enum glsl_interface_packing packing
,
2418 struct gl_context
*ctx
;
2419 struct gl_program_parameter_list
*params
;
2424 } /* anonymous namespace */
2427 add_uniform_to_shader::visit_field(const glsl_type
*type
, const char *name
,
2428 bool /* row_major */,
2429 const glsl_type
* /* record_type */,
2430 const enum glsl_interface_packing
,
2431 bool /* last_field */)
2433 /* opaque types don't use storage in the param list unless they are
2434 * bindless samplers or images.
2436 if (type
->contains_opaque() && !var
->data
.bindless
)
2439 /* Add the uniform to the param list */
2440 assert(_mesa_lookup_parameter_index(params
, name
) < 0);
2441 int index
= _mesa_lookup_parameter_index(params
, name
);
2443 unsigned num_params
= type
->arrays_of_arrays_size();
2444 num_params
= MAX2(num_params
, 1);
2445 num_params
*= type
->without_array()->matrix_columns
;
2447 bool is_dual_slot
= type
->without_array()->is_dual_slot();
2451 _mesa_reserve_parameter_storage(params
, num_params
);
2452 index
= params
->NumParameters
;
2454 if (ctx
->Const
.PackedDriverUniformStorage
) {
2455 for (unsigned i
= 0; i
< num_params
; i
++) {
2456 unsigned dmul
= type
->without_array()->is_64bit() ? 2 : 1;
2457 unsigned comps
= type
->without_array()->vector_elements
* dmul
;
2465 _mesa_add_parameter(params
, PROGRAM_UNIFORM
, name
, comps
,
2466 type
->gl_type
, NULL
, NULL
, false);
2469 for (unsigned i
= 0; i
< num_params
; i
++) {
2470 _mesa_add_parameter(params
, PROGRAM_UNIFORM
, name
, 4,
2471 type
->gl_type
, NULL
, NULL
, true);
2475 /* The first part of the uniform that's processed determines the base
2476 * location of the whole uniform (for structures).
2483 * Generate the program parameters list for the user uniforms in a shader
2485 * \param shader_program Linked shader program. This is only used to
2486 * emit possible link errors to the info log.
2487 * \param sh Shader whose uniforms are to be processed.
2488 * \param params Parameter list to be filled in.
2491 _mesa_generate_parameters_list_for_uniforms(struct gl_context
*ctx
,
2492 struct gl_shader_program
2494 struct gl_linked_shader
*sh
,
2495 struct gl_program_parameter_list
2498 add_uniform_to_shader
add(ctx
, shader_program
, params
);
2500 foreach_in_list(ir_instruction
, node
, sh
->ir
) {
2501 ir_variable
*var
= node
->as_variable();
2503 if ((var
== NULL
) || (var
->data
.mode
!= ir_var_uniform
)
2504 || var
->is_in_buffer_block() || (strncmp(var
->name
, "gl_", 3) == 0))
2512 _mesa_associate_uniform_storage(struct gl_context
*ctx
,
2513 struct gl_shader_program
*shader_program
,
2514 struct gl_program
*prog
,
2515 bool propagate_to_storage
)
2517 struct gl_program_parameter_list
*params
= prog
->Parameters
;
2518 gl_shader_stage shader_type
= prog
->info
.stage
;
2520 /* After adding each uniform to the parameter list, connect the storage for
2521 * the parameter with the tracking structure used by the API for the
2524 unsigned last_location
= unsigned(~0);
2525 for (unsigned i
= 0; i
< params
->NumParameters
; i
++) {
2526 if (params
->Parameters
[i
].Type
!= PROGRAM_UNIFORM
)
2531 shader_program
->UniformHash
->get(location
, params
->Parameters
[i
].Name
);
2537 struct gl_uniform_storage
*storage
=
2538 &shader_program
->data
->UniformStorage
[location
];
2540 /* Do not associate any uniform storage to built-in uniforms */
2541 if (storage
->builtin
)
2544 if (location
!= last_location
) {
2545 enum gl_uniform_driver_format format
= uniform_native
;
2546 unsigned columns
= 0;
2549 if (ctx
->Const
.PackedDriverUniformStorage
&& !prog
->is_arb_asm
) {
2550 dmul
= storage
->type
->vector_elements
* sizeof(float);
2552 dmul
= 4 * sizeof(float);
2555 switch (storage
->type
->base_type
) {
2556 case GLSL_TYPE_UINT64
:
2557 if (storage
->type
->vector_elements
> 2)
2560 case GLSL_TYPE_UINT
:
2561 case GLSL_TYPE_UINT16
:
2562 case GLSL_TYPE_UINT8
:
2563 assert(ctx
->Const
.NativeIntegers
);
2564 format
= uniform_native
;
2567 case GLSL_TYPE_INT64
:
2568 if (storage
->type
->vector_elements
> 2)
2572 case GLSL_TYPE_INT16
:
2573 case GLSL_TYPE_INT8
:
2575 (ctx
->Const
.NativeIntegers
) ? uniform_native
: uniform_int_float
;
2578 case GLSL_TYPE_DOUBLE
:
2579 if (storage
->type
->vector_elements
> 2)
2582 case GLSL_TYPE_FLOAT
:
2583 case GLSL_TYPE_FLOAT16
:
2584 format
= uniform_native
;
2585 columns
= storage
->type
->matrix_columns
;
2587 case GLSL_TYPE_BOOL
:
2588 format
= uniform_native
;
2591 case GLSL_TYPE_SAMPLER
:
2592 case GLSL_TYPE_IMAGE
:
2593 case GLSL_TYPE_SUBROUTINE
:
2594 format
= uniform_native
;
2597 case GLSL_TYPE_ATOMIC_UINT
:
2598 case GLSL_TYPE_ARRAY
:
2599 case GLSL_TYPE_VOID
:
2600 case GLSL_TYPE_STRUCT
:
2601 case GLSL_TYPE_ERROR
:
2602 case GLSL_TYPE_INTERFACE
:
2603 case GLSL_TYPE_FUNCTION
:
2604 assert(!"Should not get here.");
2608 unsigned pvo
= params
->ParameterValueOffset
[i
];
2609 _mesa_uniform_attach_driver_storage(storage
, dmul
* columns
, dmul
,
2611 ¶ms
->ParameterValues
[pvo
]);
2613 /* When a bindless sampler/image is bound to a texture/image unit, we
2614 * have to overwrite the constant value by the resident handle
2615 * directly in the constant buffer before the next draw. One solution
2616 * is to keep track a pointer to the base of the data.
2618 if (storage
->is_bindless
&& (prog
->sh
.NumBindlessSamplers
||
2619 prog
->sh
.NumBindlessImages
)) {
2620 unsigned array_elements
= MAX2(1, storage
->array_elements
);
2622 for (unsigned j
= 0; j
< array_elements
; ++j
) {
2623 unsigned unit
= storage
->opaque
[shader_type
].index
+ j
;
2625 if (storage
->type
->without_array()->is_sampler()) {
2626 assert(unit
>= 0 && unit
< prog
->sh
.NumBindlessSamplers
);
2627 prog
->sh
.BindlessSamplers
[unit
].data
=
2628 ¶ms
->ParameterValues
[pvo
] + 4 * j
;
2629 } else if (storage
->type
->without_array()->is_image()) {
2630 assert(unit
>= 0 && unit
< prog
->sh
.NumBindlessImages
);
2631 prog
->sh
.BindlessImages
[unit
].data
=
2632 ¶ms
->ParameterValues
[pvo
] + 4 * j
;
2637 /* After attaching the driver's storage to the uniform, propagate any
2638 * data from the linker's backing store. This will cause values from
2639 * initializers in the source code to be copied over.
2641 if (propagate_to_storage
) {
2642 unsigned array_elements
= MAX2(1, storage
->array_elements
);
2643 if (ctx
->Const
.PackedDriverUniformStorage
&& !prog
->is_arb_asm
&&
2644 (storage
->is_bindless
|| !storage
->type
->contains_opaque())) {
2645 const int dmul
= storage
->type
->is_64bit() ? 2 : 1;
2646 const unsigned components
=
2647 storage
->type
->vector_elements
*
2648 storage
->type
->matrix_columns
;
2650 for (unsigned s
= 0; s
< storage
->num_driver_storage
; s
++) {
2651 gl_constant_value
*uni_storage
= (gl_constant_value
*)
2652 storage
->driver_storage
[s
].data
;
2653 memcpy(uni_storage
, storage
->storage
,
2654 sizeof(storage
->storage
[0]) * components
*
2655 array_elements
* dmul
);
2658 _mesa_propagate_uniforms_to_driver_storage(storage
, 0,
2663 last_location
= location
;
2669 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
2670 * channels for copy propagation and updates following instructions to
2671 * use the original versions.
2673 * The ir_to_mesa_visitor lazily produces code assuming that this pass
2674 * will occur. As an example, a TXP production before this pass:
2676 * 0: MOV TEMP[1], INPUT[4].xyyy;
2677 * 1: MOV TEMP[1].w, INPUT[4].wwww;
2678 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
2682 * 0: MOV TEMP[1], INPUT[4].xyyy;
2683 * 1: MOV TEMP[1].w, INPUT[4].wwww;
2684 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
2686 * which allows for dead code elimination on TEMP[1]'s writes.
2689 ir_to_mesa_visitor::copy_propagate(void)
2691 ir_to_mesa_instruction
**acp
= rzalloc_array(mem_ctx
,
2692 ir_to_mesa_instruction
*,
2693 this->next_temp
* 4);
2694 int *acp_level
= rzalloc_array(mem_ctx
, int, this->next_temp
* 4);
2697 foreach_in_list(ir_to_mesa_instruction
, inst
, &this->instructions
) {
2698 assert(inst
->dst
.file
!= PROGRAM_TEMPORARY
2699 || inst
->dst
.index
< this->next_temp
);
2701 /* First, do any copy propagation possible into the src regs. */
2702 for (int r
= 0; r
< 3; r
++) {
2703 ir_to_mesa_instruction
*first
= NULL
;
2705 int acp_base
= inst
->src
[r
].index
* 4;
2707 if (inst
->src
[r
].file
!= PROGRAM_TEMPORARY
||
2708 inst
->src
[r
].reladdr
)
2711 /* See if we can find entries in the ACP consisting of MOVs
2712 * from the same src register for all the swizzled channels
2713 * of this src register reference.
2715 for (int i
= 0; i
< 4; i
++) {
2716 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
2717 ir_to_mesa_instruction
*copy_chan
= acp
[acp_base
+ src_chan
];
2724 assert(acp_level
[acp_base
+ src_chan
] <= level
);
2729 if (first
->src
[0].file
!= copy_chan
->src
[0].file
||
2730 first
->src
[0].index
!= copy_chan
->src
[0].index
) {
2738 /* We've now validated that we can copy-propagate to
2739 * replace this src register reference. Do it.
2741 inst
->src
[r
].file
= first
->src
[0].file
;
2742 inst
->src
[r
].index
= first
->src
[0].index
;
2745 for (int i
= 0; i
< 4; i
++) {
2746 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
2747 ir_to_mesa_instruction
*copy_inst
= acp
[acp_base
+ src_chan
];
2748 swizzle
|= (GET_SWZ(copy_inst
->src
[0].swizzle
, src_chan
) <<
2751 inst
->src
[r
].swizzle
= swizzle
;
2756 case OPCODE_BGNLOOP
:
2757 case OPCODE_ENDLOOP
:
2758 /* End of a basic block, clear the ACP entirely. */
2759 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
2768 /* Clear all channels written inside the block from the ACP, but
2769 * leaving those that were not touched.
2771 for (int r
= 0; r
< this->next_temp
; r
++) {
2772 for (int c
= 0; c
< 4; c
++) {
2773 if (!acp
[4 * r
+ c
])
2776 if (acp_level
[4 * r
+ c
] >= level
)
2777 acp
[4 * r
+ c
] = NULL
;
2780 if (inst
->op
== OPCODE_ENDIF
)
2785 /* Continuing the block, clear any written channels from
2788 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.reladdr
) {
2789 /* Any temporary might be written, so no copy propagation
2790 * across this instruction.
2792 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
2793 } else if (inst
->dst
.file
== PROGRAM_OUTPUT
&&
2794 inst
->dst
.reladdr
) {
2795 /* Any output might be written, so no copy propagation
2796 * from outputs across this instruction.
2798 for (int r
= 0; r
< this->next_temp
; r
++) {
2799 for (int c
= 0; c
< 4; c
++) {
2800 if (!acp
[4 * r
+ c
])
2803 if (acp
[4 * r
+ c
]->src
[0].file
== PROGRAM_OUTPUT
)
2804 acp
[4 * r
+ c
] = NULL
;
2807 } else if (inst
->dst
.file
== PROGRAM_TEMPORARY
||
2808 inst
->dst
.file
== PROGRAM_OUTPUT
) {
2809 /* Clear where it's used as dst. */
2810 if (inst
->dst
.file
== PROGRAM_TEMPORARY
) {
2811 for (int c
= 0; c
< 4; c
++) {
2812 if (inst
->dst
.writemask
& (1 << c
)) {
2813 acp
[4 * inst
->dst
.index
+ c
] = NULL
;
2818 /* Clear where it's used as src. */
2819 for (int r
= 0; r
< this->next_temp
; r
++) {
2820 for (int c
= 0; c
< 4; c
++) {
2821 if (!acp
[4 * r
+ c
])
2824 int src_chan
= GET_SWZ(acp
[4 * r
+ c
]->src
[0].swizzle
, c
);
2826 if (acp
[4 * r
+ c
]->src
[0].file
== inst
->dst
.file
&&
2827 acp
[4 * r
+ c
]->src
[0].index
== inst
->dst
.index
&&
2828 inst
->dst
.writemask
& (1 << src_chan
))
2830 acp
[4 * r
+ c
] = NULL
;
2838 /* If this is a copy, add it to the ACP. */
2839 if (inst
->op
== OPCODE_MOV
&&
2840 inst
->dst
.file
== PROGRAM_TEMPORARY
&&
2841 !(inst
->dst
.file
== inst
->src
[0].file
&&
2842 inst
->dst
.index
== inst
->src
[0].index
) &&
2843 !inst
->dst
.reladdr
&&
2845 !inst
->src
[0].reladdr
&&
2846 !inst
->src
[0].negate
) {
2847 for (int i
= 0; i
< 4; i
++) {
2848 if (inst
->dst
.writemask
& (1 << i
)) {
2849 acp
[4 * inst
->dst
.index
+ i
] = inst
;
2850 acp_level
[4 * inst
->dst
.index
+ i
] = level
;
2856 ralloc_free(acp_level
);
2862 * Convert a shader's GLSL IR into a Mesa gl_program.
2864 static struct gl_program
*
2865 get_mesa_program(struct gl_context
*ctx
,
2866 struct gl_shader_program
*shader_program
,
2867 struct gl_linked_shader
*shader
)
2869 ir_to_mesa_visitor v
;
2870 struct prog_instruction
*mesa_instructions
, *mesa_inst
;
2871 ir_instruction
**mesa_instruction_annotation
;
2873 struct gl_program
*prog
;
2874 GLenum target
= _mesa_shader_stage_to_program(shader
->Stage
);
2875 const char *target_string
= _mesa_shader_stage_to_string(shader
->Stage
);
2876 struct gl_shader_compiler_options
*options
=
2877 &ctx
->Const
.ShaderCompilerOptions
[shader
->Stage
];
2879 validate_ir_tree(shader
->ir
);
2881 prog
= shader
->Program
;
2882 prog
->Parameters
= _mesa_new_parameter_list();
2885 v
.shader_program
= shader_program
;
2886 v
.options
= options
;
2888 _mesa_generate_parameters_list_for_uniforms(ctx
, shader_program
, shader
,
2891 /* Emit Mesa IR for main(). */
2892 visit_exec_list(shader
->ir
, &v
);
2893 v
.emit(NULL
, OPCODE_END
);
2895 prog
->arb
.NumTemporaries
= v
.next_temp
;
2897 unsigned num_instructions
= v
.instructions
.length();
2899 mesa_instructions
= rzalloc_array(prog
, struct prog_instruction
,
2901 mesa_instruction_annotation
= ralloc_array(v
.mem_ctx
, ir_instruction
*,
2906 /* Convert ir_mesa_instructions into prog_instructions.
2908 mesa_inst
= mesa_instructions
;
2910 foreach_in_list(const ir_to_mesa_instruction
, inst
, &v
.instructions
) {
2911 mesa_inst
->Opcode
= inst
->op
;
2913 mesa_inst
->Saturate
= GL_TRUE
;
2914 mesa_inst
->DstReg
.File
= inst
->dst
.file
;
2915 mesa_inst
->DstReg
.Index
= inst
->dst
.index
;
2916 mesa_inst
->DstReg
.WriteMask
= inst
->dst
.writemask
;
2917 mesa_inst
->DstReg
.RelAddr
= inst
->dst
.reladdr
!= NULL
;
2918 mesa_inst
->SrcReg
[0] = mesa_src_reg_from_ir_src_reg(inst
->src
[0]);
2919 mesa_inst
->SrcReg
[1] = mesa_src_reg_from_ir_src_reg(inst
->src
[1]);
2920 mesa_inst
->SrcReg
[2] = mesa_src_reg_from_ir_src_reg(inst
->src
[2]);
2921 mesa_inst
->TexSrcUnit
= inst
->sampler
;
2922 mesa_inst
->TexSrcTarget
= inst
->tex_target
;
2923 mesa_inst
->TexShadow
= inst
->tex_shadow
;
2924 mesa_instruction_annotation
[i
] = inst
->ir
;
2926 /* Set IndirectRegisterFiles. */
2927 if (mesa_inst
->DstReg
.RelAddr
)
2928 prog
->arb
.IndirectRegisterFiles
|= 1 << mesa_inst
->DstReg
.File
;
2930 /* Update program's bitmask of indirectly accessed register files */
2931 for (unsigned src
= 0; src
< 3; src
++)
2932 if (mesa_inst
->SrcReg
[src
].RelAddr
)
2933 prog
->arb
.IndirectRegisterFiles
|= 1 << mesa_inst
->SrcReg
[src
].File
;
2935 switch (mesa_inst
->Opcode
) {
2937 if (options
->MaxIfDepth
== 0) {
2938 linker_warning(shader_program
,
2939 "Couldn't flatten if-statement. "
2940 "This will likely result in software "
2941 "rasterization.\n");
2944 case OPCODE_BGNLOOP
:
2945 if (options
->EmitNoLoops
) {
2946 linker_warning(shader_program
,
2947 "Couldn't unroll loop. "
2948 "This will likely result in software "
2949 "rasterization.\n");
2953 if (options
->EmitNoCont
) {
2954 linker_warning(shader_program
,
2955 "Couldn't lower continue-statement. "
2956 "This will likely result in software "
2957 "rasterization.\n");
2961 prog
->arb
.NumAddressRegs
= 1;
2970 if (!shader_program
->data
->LinkStatus
)
2974 if (!shader_program
->data
->LinkStatus
) {
2978 set_branchtargets(&v
, mesa_instructions
, num_instructions
);
2980 if (ctx
->_Shader
->Flags
& GLSL_DUMP
) {
2981 fprintf(stderr
, "\n");
2982 fprintf(stderr
, "GLSL IR for linked %s program %d:\n", target_string
,
2983 shader_program
->Name
);
2984 _mesa_print_ir(stderr
, shader
->ir
, NULL
);
2985 fprintf(stderr
, "\n");
2986 fprintf(stderr
, "\n");
2987 fprintf(stderr
, "Mesa IR for linked %s program %d:\n", target_string
,
2988 shader_program
->Name
);
2989 print_program(mesa_instructions
, mesa_instruction_annotation
,
2994 prog
->arb
.Instructions
= mesa_instructions
;
2995 prog
->arb
.NumInstructions
= num_instructions
;
2997 /* Setting this to NULL prevents a possible double free in the fail_exit
3000 mesa_instructions
= NULL
;
3002 do_set_program_inouts(shader
->ir
, prog
, shader
->Stage
);
3004 prog
->ShadowSamplers
= shader
->shadow_samplers
;
3005 prog
->ExternalSamplersUsed
= gl_external_samplers(prog
);
3006 _mesa_update_shader_textures_used(shader_program
, prog
);
3008 /* Set the gl_FragDepth layout. */
3009 if (target
== GL_FRAGMENT_PROGRAM_ARB
) {
3010 prog
->info
.fs
.depth_layout
= shader_program
->FragDepthLayout
;
3013 _mesa_optimize_program(prog
, prog
);
3015 /* This has to be done last. Any operation that can cause
3016 * prog->ParameterValues to get reallocated (e.g., anything that adds a
3017 * program constant) has to happen before creating this linkage.
3019 _mesa_associate_uniform_storage(ctx
, shader_program
, prog
, true);
3020 if (!shader_program
->data
->LinkStatus
) {
3027 ralloc_free(mesa_instructions
);
3028 _mesa_reference_program(ctx
, &shader
->Program
, NULL
);
3036 * Called via ctx->Driver.LinkShader()
3037 * This actually involves converting GLSL IR into Mesa gl_programs with
3038 * code lowering and other optimizations.
3041 _mesa_ir_link_shader(struct gl_context
*ctx
, struct gl_shader_program
*prog
)
3043 assert(prog
->data
->LinkStatus
);
3045 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
3046 if (prog
->_LinkedShaders
[i
] == NULL
)
3050 exec_list
*ir
= prog
->_LinkedShaders
[i
]->ir
;
3051 const struct gl_shader_compiler_options
*options
=
3052 &ctx
->Const
.ShaderCompilerOptions
[prog
->_LinkedShaders
[i
]->Stage
];
3058 do_mat_op_to_vec(ir
);
3059 lower_instructions(ir
, (MOD_TO_FLOOR
| DIV_TO_MUL_RCP
| EXP_TO_EXP2
3060 | LOG_TO_LOG2
| INT_DIV_TO_MUL_RCP
3061 | ((options
->EmitNoPow
) ? POW_TO_EXP2
: 0)));
3063 progress
= do_common_optimization(ir
, true, true,
3064 options
, ctx
->Const
.NativeIntegers
)
3067 progress
= lower_quadop_vector(ir
, true) || progress
;
3069 if (options
->MaxIfDepth
== 0)
3070 progress
= lower_discard(ir
) || progress
;
3072 progress
= lower_if_to_cond_assign((gl_shader_stage
)i
, ir
,
3073 options
->MaxIfDepth
) || progress
;
3075 progress
= lower_noise(ir
) || progress
;
3077 /* If there are forms of indirect addressing that the driver
3078 * cannot handle, perform the lowering pass.
3080 if (options
->EmitNoIndirectInput
|| options
->EmitNoIndirectOutput
3081 || options
->EmitNoIndirectTemp
|| options
->EmitNoIndirectUniform
)
3083 lower_variable_index_to_cond_assign(prog
->_LinkedShaders
[i
]->Stage
, ir
,
3084 options
->EmitNoIndirectInput
,
3085 options
->EmitNoIndirectOutput
,
3086 options
->EmitNoIndirectTemp
,
3087 options
->EmitNoIndirectUniform
)
3090 progress
= do_vec_index_to_cond_assign(ir
) || progress
;
3091 progress
= lower_vector_insert(ir
, true) || progress
;
3094 validate_ir_tree(ir
);
3097 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
3098 struct gl_program
*linked_prog
;
3100 if (prog
->_LinkedShaders
[i
] == NULL
)
3103 linked_prog
= get_mesa_program(ctx
, prog
, prog
->_LinkedShaders
[i
]);
3106 _mesa_copy_linked_program_data(prog
, prog
->_LinkedShaders
[i
]);
3108 if (!ctx
->Driver
.ProgramStringNotify(ctx
,
3109 _mesa_shader_stage_to_program(i
),
3111 _mesa_reference_program(ctx
, &prog
->_LinkedShaders
[i
]->Program
,
3118 build_program_resource_list(ctx
, prog
);
3119 return prog
->data
->LinkStatus
;
3123 * Link a GLSL shader program. Called via glLinkProgram().
3126 _mesa_glsl_link_shader(struct gl_context
*ctx
, struct gl_shader_program
*prog
)
3131 _mesa_clear_shader_program_data(ctx
, prog
);
3133 prog
->data
= _mesa_create_shader_program_data();
3135 prog
->data
->LinkStatus
= LINKING_SUCCESS
;
3137 for (i
= 0; i
< prog
->NumShaders
; i
++) {
3138 if (!prog
->Shaders
[i
]->CompileStatus
) {
3139 linker_error(prog
, "linking with uncompiled/unspecialized shader");
3143 spirv
= (prog
->Shaders
[i
]->spirv_data
!= NULL
);
3144 } else if (spirv
&& !prog
->Shaders
[i
]->spirv_data
) {
3145 /* The GL_ARB_gl_spirv spec adds a new bullet point to the list of
3146 * reasons LinkProgram can fail:
3148 * "All the shader objects attached to <program> do not have the
3149 * same value for the SPIR_V_BINARY_ARB state."
3152 "not all attached shaders have the same "
3153 "SPIR_V_BINARY_ARB state");
3156 prog
->data
->spirv
= spirv
;
3158 if (prog
->data
->LinkStatus
) {
3160 link_shaders(ctx
, prog
);
3162 _mesa_spirv_link_shaders(ctx
, prog
);
3165 /* If LinkStatus is LINKING_SUCCESS, then reset sampler validated to true.
3166 * Validation happens via the LinkShader call below. If LinkStatus is
3167 * LINKING_SKIPPED, then SamplersValidated will have been restored from the
3170 if (prog
->data
->LinkStatus
== LINKING_SUCCESS
) {
3171 prog
->SamplersValidated
= GL_TRUE
;
3174 if (prog
->data
->LinkStatus
&& !ctx
->Driver
.LinkShader(ctx
, prog
)) {
3175 prog
->data
->LinkStatus
= LINKING_FAILURE
;
3178 /* Return early if we are loading the shader from on-disk cache */
3179 if (prog
->data
->LinkStatus
== LINKING_SKIPPED
)
3182 if (ctx
->_Shader
->Flags
& GLSL_DUMP
) {
3183 if (!prog
->data
->LinkStatus
) {
3184 fprintf(stderr
, "GLSL shader program %d failed to link\n", prog
->Name
);
3187 if (prog
->data
->InfoLog
&& prog
->data
->InfoLog
[0] != 0) {
3188 fprintf(stderr
, "GLSL shader program %d info log:\n", prog
->Name
);
3189 fprintf(stderr
, "%s\n", prog
->data
->InfoLog
);
3193 #ifdef ENABLE_SHADER_CACHE
3194 if (prog
->data
->LinkStatus
)
3195 shader_cache_write_program_metadata(ctx
, prog
);