2 * Copyright (C) 2005-2007 Brian Paul All Rights Reserved.
3 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
4 * Copyright © 2010 Intel Corporation
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
27 * \file ir_to_mesa.cpp
29 * Translate GLSL IR to Mesa's gl_program representation.
33 #include "main/compiler.h"
35 #include "ir_visitor.h"
36 #include "ir_print_visitor.h"
37 #include "ir_expression_flattening.h"
38 #include "glsl_types.h"
39 #include "glsl_parser_extras.h"
40 #include "../glsl/program.h"
41 #include "ir_optimization.h"
45 #include "main/mtypes.h"
46 #include "main/shaderapi.h"
47 #include "main/shaderobj.h"
48 #include "main/uniforms.h"
49 #include "program/hash_table.h"
50 #include "program/prog_instruction.h"
51 #include "program/prog_optimize.h"
52 #include "program/prog_print.h"
53 #include "program/program.h"
54 #include "program/prog_uniform.h"
55 #include "program/prog_parameter.h"
56 #include "program/sampler.h"
62 static int swizzle_for_size(int size
);
65 * This struct is a corresponding struct to Mesa prog_src_register, with
70 src_reg(gl_register_file file
, int index
, const glsl_type
*type
)
74 if (type
&& (type
->is_scalar() || type
->is_vector() || type
->is_matrix()))
75 this->swizzle
= swizzle_for_size(type
->vector_elements
);
77 this->swizzle
= SWIZZLE_XYZW
;
84 this->file
= PROGRAM_UNDEFINED
;
91 explicit src_reg(dst_reg reg
);
93 gl_register_file file
; /**< PROGRAM_* from Mesa */
94 int index
; /**< temporary index, VERT_ATTRIB_*, FRAG_ATTRIB_*, etc. */
95 GLuint swizzle
; /**< SWIZZLE_XYZWONEZERO swizzles from Mesa. */
96 int negate
; /**< NEGATE_XYZW mask from mesa */
97 /** Register index should be offset by the integer in this reg. */
103 dst_reg(gl_register_file file
, int writemask
)
107 this->writemask
= writemask
;
108 this->cond_mask
= COND_TR
;
109 this->reladdr
= NULL
;
114 this->file
= PROGRAM_UNDEFINED
;
117 this->cond_mask
= COND_TR
;
118 this->reladdr
= NULL
;
121 explicit dst_reg(src_reg reg
);
123 gl_register_file file
; /**< PROGRAM_* from Mesa */
124 int index
; /**< temporary index, VERT_ATTRIB_*, FRAG_ATTRIB_*, etc. */
125 int writemask
; /**< Bitfield of WRITEMASK_[XYZW] */
127 /** Register index should be offset by the integer in this reg. */
131 src_reg::src_reg(dst_reg reg
)
133 this->file
= reg
.file
;
134 this->index
= reg
.index
;
135 this->swizzle
= SWIZZLE_XYZW
;
137 this->reladdr
= reg
.reladdr
;
140 dst_reg::dst_reg(src_reg reg
)
142 this->file
= reg
.file
;
143 this->index
= reg
.index
;
144 this->writemask
= WRITEMASK_XYZW
;
145 this->cond_mask
= COND_TR
;
146 this->reladdr
= reg
.reladdr
;
149 class ir_to_mesa_instruction
: public exec_node
{
151 /* Callers of this ralloc-based new need not call delete. It's
152 * easier to just ralloc_free 'ctx' (or any of its ancestors). */
153 static void* operator new(size_t size
, void *ctx
)
157 node
= rzalloc_size(ctx
, size
);
158 assert(node
!= NULL
);
166 /** Pointer to the ir source this tree came from for debugging */
168 GLboolean cond_update
;
170 int sampler
; /**< sampler index */
171 int tex_target
; /**< One of TEXTURE_*_INDEX */
172 GLboolean tex_shadow
;
174 class function_entry
*function
; /* Set on OPCODE_CAL or OPCODE_BGNSUB */
177 class variable_storage
: public exec_node
{
179 variable_storage(ir_variable
*var
, gl_register_file file
, int index
)
180 : file(file
), index(index
), var(var
)
185 gl_register_file file
;
187 ir_variable
*var
; /* variable that maps to this, if any */
190 class function_entry
: public exec_node
{
192 ir_function_signature
*sig
;
195 * identifier of this function signature used by the program.
197 * At the point that Mesa instructions for function calls are
198 * generated, we don't know the address of the first instruction of
199 * the function body. So we make the BranchTarget that is called a
200 * small integer and rewrite them during set_branchtargets().
205 * Pointer to first instruction of the function body.
207 * Set during function body emits after main() is processed.
209 ir_to_mesa_instruction
*bgn_inst
;
212 * Index of the first instruction of the function body in actual
215 * Set after convertion from ir_to_mesa_instruction to prog_instruction.
219 /** Storage for the return value. */
223 class ir_to_mesa_visitor
: public ir_visitor
{
225 ir_to_mesa_visitor();
226 ~ir_to_mesa_visitor();
228 function_entry
*current_function
;
230 struct gl_context
*ctx
;
231 struct gl_program
*prog
;
232 struct gl_shader_program
*shader_program
;
233 struct gl_shader_compiler_options
*options
;
237 variable_storage
*find_variable_storage(ir_variable
*var
);
239 function_entry
*get_function_signature(ir_function_signature
*sig
);
241 src_reg
get_temp(const glsl_type
*type
);
242 void reladdr_to_temp(ir_instruction
*ir
, src_reg
*reg
, int *num_reladdr
);
244 src_reg
src_reg_for_float(float val
);
247 * \name Visit methods
249 * As typical for the visitor pattern, there must be one \c visit method for
250 * each concrete subclass of \c ir_instruction. Virtual base classes within
251 * the hierarchy should not have \c visit methods.
254 virtual void visit(ir_variable
*);
255 virtual void visit(ir_loop
*);
256 virtual void visit(ir_loop_jump
*);
257 virtual void visit(ir_function_signature
*);
258 virtual void visit(ir_function
*);
259 virtual void visit(ir_expression
*);
260 virtual void visit(ir_swizzle
*);
261 virtual void visit(ir_dereference_variable
*);
262 virtual void visit(ir_dereference_array
*);
263 virtual void visit(ir_dereference_record
*);
264 virtual void visit(ir_assignment
*);
265 virtual void visit(ir_constant
*);
266 virtual void visit(ir_call
*);
267 virtual void visit(ir_return
*);
268 virtual void visit(ir_discard
*);
269 virtual void visit(ir_texture
*);
270 virtual void visit(ir_if
*);
275 /** List of variable_storage */
278 /** List of function_entry */
279 exec_list function_signatures
;
280 int next_signature_id
;
282 /** List of ir_to_mesa_instruction */
283 exec_list instructions
;
285 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
);
287 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
,
288 dst_reg dst
, src_reg src0
);
290 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
,
291 dst_reg dst
, src_reg src0
, src_reg src1
);
293 ir_to_mesa_instruction
*emit(ir_instruction
*ir
, enum prog_opcode op
,
295 src_reg src0
, src_reg src1
, src_reg src2
);
298 * Emit the correct dot-product instruction for the type of arguments
300 ir_to_mesa_instruction
* emit_dp(ir_instruction
*ir
,
306 void emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
307 dst_reg dst
, src_reg src0
);
309 void emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
310 dst_reg dst
, src_reg src0
, src_reg src1
);
312 void emit_scs(ir_instruction
*ir
, enum prog_opcode op
,
313 dst_reg dst
, const src_reg
&src
);
315 bool try_emit_mad(ir_expression
*ir
,
317 bool try_emit_mad_for_and_not(ir_expression
*ir
,
319 bool try_emit_sat(ir_expression
*ir
);
321 void emit_swz(ir_expression
*ir
);
323 bool process_move_condition(ir_rvalue
*ir
);
325 void copy_propagate(void);
330 src_reg undef_src
= src_reg(PROGRAM_UNDEFINED
, 0, NULL
);
332 dst_reg undef_dst
= dst_reg(PROGRAM_UNDEFINED
, SWIZZLE_NOOP
);
334 dst_reg address_reg
= dst_reg(PROGRAM_ADDRESS
, WRITEMASK_X
);
337 swizzle_for_size(int size
)
339 int size_swizzles
[4] = {
340 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
),
341 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Y
, SWIZZLE_Y
),
342 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_Z
),
343 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_W
),
346 assert((size
>= 1) && (size
<= 4));
347 return size_swizzles
[size
- 1];
350 ir_to_mesa_instruction
*
351 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
,
353 src_reg src0
, src_reg src1
, src_reg src2
)
355 ir_to_mesa_instruction
*inst
= new(mem_ctx
) ir_to_mesa_instruction();
358 /* If we have to do relative addressing, we want to load the ARL
359 * reg directly for one of the regs, and preload the other reladdr
360 * sources into temps.
362 num_reladdr
+= dst
.reladdr
!= NULL
;
363 num_reladdr
+= src0
.reladdr
!= NULL
;
364 num_reladdr
+= src1
.reladdr
!= NULL
;
365 num_reladdr
+= src2
.reladdr
!= NULL
;
367 reladdr_to_temp(ir
, &src2
, &num_reladdr
);
368 reladdr_to_temp(ir
, &src1
, &num_reladdr
);
369 reladdr_to_temp(ir
, &src0
, &num_reladdr
);
372 emit(ir
, OPCODE_ARL
, address_reg
, *dst
.reladdr
);
375 assert(num_reladdr
== 0);
384 inst
->function
= NULL
;
386 this->instructions
.push_tail(inst
);
392 ir_to_mesa_instruction
*
393 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
,
394 dst_reg dst
, src_reg src0
, src_reg src1
)
396 return emit(ir
, op
, dst
, src0
, src1
, undef_src
);
399 ir_to_mesa_instruction
*
400 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
,
401 dst_reg dst
, src_reg src0
)
403 assert(dst
.writemask
!= 0);
404 return emit(ir
, op
, dst
, src0
, undef_src
, undef_src
);
407 ir_to_mesa_instruction
*
408 ir_to_mesa_visitor::emit(ir_instruction
*ir
, enum prog_opcode op
)
410 return emit(ir
, op
, undef_dst
, undef_src
, undef_src
, undef_src
);
413 ir_to_mesa_instruction
*
414 ir_to_mesa_visitor::emit_dp(ir_instruction
*ir
,
415 dst_reg dst
, src_reg src0
, src_reg src1
,
418 static const gl_inst_opcode dot_opcodes
[] = {
419 OPCODE_DP2
, OPCODE_DP3
, OPCODE_DP4
422 return emit(ir
, dot_opcodes
[elements
- 2], dst
, src0
, src1
);
426 * Emits Mesa scalar opcodes to produce unique answers across channels.
428 * Some Mesa opcodes are scalar-only, like ARB_fp/vp. The src X
429 * channel determines the result across all channels. So to do a vec4
430 * of this operation, we want to emit a scalar per source channel used
431 * to produce dest channels.
434 ir_to_mesa_visitor::emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
436 src_reg orig_src0
, src_reg orig_src1
)
439 int done_mask
= ~dst
.writemask
;
441 /* Mesa RCP is a scalar operation splatting results to all channels,
442 * like ARB_fp/vp. So emit as many RCPs as necessary to cover our
445 for (i
= 0; i
< 4; i
++) {
446 GLuint this_mask
= (1 << i
);
447 ir_to_mesa_instruction
*inst
;
448 src_reg src0
= orig_src0
;
449 src_reg src1
= orig_src1
;
451 if (done_mask
& this_mask
)
454 GLuint src0_swiz
= GET_SWZ(src0
.swizzle
, i
);
455 GLuint src1_swiz
= GET_SWZ(src1
.swizzle
, i
);
456 for (j
= i
+ 1; j
< 4; j
++) {
457 /* If there is another enabled component in the destination that is
458 * derived from the same inputs, generate its value on this pass as
461 if (!(done_mask
& (1 << j
)) &&
462 GET_SWZ(src0
.swizzle
, j
) == src0_swiz
&&
463 GET_SWZ(src1
.swizzle
, j
) == src1_swiz
) {
464 this_mask
|= (1 << j
);
467 src0
.swizzle
= MAKE_SWIZZLE4(src0_swiz
, src0_swiz
,
468 src0_swiz
, src0_swiz
);
469 src1
.swizzle
= MAKE_SWIZZLE4(src1_swiz
, src1_swiz
,
470 src1_swiz
, src1_swiz
);
472 inst
= emit(ir
, op
, dst
, src0
, src1
);
473 inst
->dst
.writemask
= this_mask
;
474 done_mask
|= this_mask
;
479 ir_to_mesa_visitor::emit_scalar(ir_instruction
*ir
, enum prog_opcode op
,
480 dst_reg dst
, src_reg src0
)
482 src_reg undef
= undef_src
;
484 undef
.swizzle
= SWIZZLE_XXXX
;
486 emit_scalar(ir
, op
, dst
, src0
, undef
);
490 * Emit an OPCODE_SCS instruction
492 * The \c SCS opcode functions a bit differently than the other Mesa (or
493 * ARB_fragment_program) opcodes. Instead of splatting its result across all
494 * four components of the destination, it writes one value to the \c x
495 * component and another value to the \c y component.
497 * \param ir IR instruction being processed
498 * \param op Either \c OPCODE_SIN or \c OPCODE_COS depending on which
500 * \param dst Destination register
501 * \param src Source register
504 ir_to_mesa_visitor::emit_scs(ir_instruction
*ir
, enum prog_opcode op
,
508 /* Vertex programs cannot use the SCS opcode.
510 if (this->prog
->Target
== GL_VERTEX_PROGRAM_ARB
) {
511 emit_scalar(ir
, op
, dst
, src
);
515 const unsigned component
= (op
== OPCODE_SIN
) ? 0 : 1;
516 const unsigned scs_mask
= (1U << component
);
517 int done_mask
= ~dst
.writemask
;
520 assert(op
== OPCODE_SIN
|| op
== OPCODE_COS
);
522 /* If there are compnents in the destination that differ from the component
523 * that will be written by the SCS instrution, we'll need a temporary.
525 if (scs_mask
!= unsigned(dst
.writemask
)) {
526 tmp
= get_temp(glsl_type::vec4_type
);
529 for (unsigned i
= 0; i
< 4; i
++) {
530 unsigned this_mask
= (1U << i
);
533 if ((done_mask
& this_mask
) != 0)
536 /* The source swizzle specified which component of the source generates
537 * sine / cosine for the current component in the destination. The SCS
538 * instruction requires that this value be swizzle to the X component.
539 * Replace the current swizzle with a swizzle that puts the source in
542 unsigned src0_swiz
= GET_SWZ(src
.swizzle
, i
);
544 src0
.swizzle
= MAKE_SWIZZLE4(src0_swiz
, src0_swiz
,
545 src0_swiz
, src0_swiz
);
546 for (unsigned j
= i
+ 1; j
< 4; j
++) {
547 /* If there is another enabled component in the destination that is
548 * derived from the same inputs, generate its value on this pass as
551 if (!(done_mask
& (1 << j
)) &&
552 GET_SWZ(src0
.swizzle
, j
) == src0_swiz
) {
553 this_mask
|= (1 << j
);
557 if (this_mask
!= scs_mask
) {
558 ir_to_mesa_instruction
*inst
;
559 dst_reg tmp_dst
= dst_reg(tmp
);
561 /* Emit the SCS instruction.
563 inst
= emit(ir
, OPCODE_SCS
, tmp_dst
, src0
);
564 inst
->dst
.writemask
= scs_mask
;
566 /* Move the result of the SCS instruction to the desired location in
569 tmp
.swizzle
= MAKE_SWIZZLE4(component
, component
,
570 component
, component
);
571 inst
= emit(ir
, OPCODE_SCS
, dst
, tmp
);
572 inst
->dst
.writemask
= this_mask
;
574 /* Emit the SCS instruction to write directly to the destination.
576 ir_to_mesa_instruction
*inst
= emit(ir
, OPCODE_SCS
, dst
, src0
);
577 inst
->dst
.writemask
= scs_mask
;
580 done_mask
|= this_mask
;
585 ir_to_mesa_visitor::src_reg_for_float(float val
)
587 src_reg
src(PROGRAM_CONSTANT
, -1, NULL
);
589 src
.index
= _mesa_add_unnamed_constant(this->prog
->Parameters
,
590 (const gl_constant_value
*)&val
, 1, &src
.swizzle
);
596 type_size(const struct glsl_type
*type
)
601 switch (type
->base_type
) {
604 case GLSL_TYPE_FLOAT
:
606 if (type
->is_matrix()) {
607 return type
->matrix_columns
;
609 /* Regardless of size of vector, it gets a vec4. This is bad
610 * packing for things like floats, but otherwise arrays become a
611 * mess. Hopefully a later pass over the code can pack scalars
612 * down if appropriate.
616 case GLSL_TYPE_ARRAY
:
617 assert(type
->length
> 0);
618 return type_size(type
->fields
.array
) * type
->length
;
619 case GLSL_TYPE_STRUCT
:
621 for (i
= 0; i
< type
->length
; i
++) {
622 size
+= type_size(type
->fields
.structure
[i
].type
);
625 case GLSL_TYPE_SAMPLER
:
626 /* Samplers take up one slot in UNIFORMS[], but they're baked in
637 * In the initial pass of codegen, we assign temporary numbers to
638 * intermediate results. (not SSA -- variable assignments will reuse
639 * storage). Actual register allocation for the Mesa VM occurs in a
640 * pass over the Mesa IR later.
643 ir_to_mesa_visitor::get_temp(const glsl_type
*type
)
647 src
.file
= PROGRAM_TEMPORARY
;
648 src
.index
= next_temp
;
650 next_temp
+= type_size(type
);
652 if (type
->is_array() || type
->is_record()) {
653 src
.swizzle
= SWIZZLE_NOOP
;
655 src
.swizzle
= swizzle_for_size(type
->vector_elements
);
663 ir_to_mesa_visitor::find_variable_storage(ir_variable
*var
)
666 variable_storage
*entry
;
668 foreach_iter(exec_list_iterator
, iter
, this->variables
) {
669 entry
= (variable_storage
*)iter
.get();
671 if (entry
->var
== var
)
679 ir_to_mesa_visitor::visit(ir_variable
*ir
)
681 if (strcmp(ir
->name
, "gl_FragCoord") == 0) {
682 struct gl_fragment_program
*fp
= (struct gl_fragment_program
*)this->prog
;
684 fp
->OriginUpperLeft
= ir
->origin_upper_left
;
685 fp
->PixelCenterInteger
= ir
->pixel_center_integer
;
687 } else if (strcmp(ir
->name
, "gl_FragDepth") == 0) {
688 struct gl_fragment_program
*fp
= (struct gl_fragment_program
*)this->prog
;
689 switch (ir
->depth_layout
) {
690 case ir_depth_layout_none
:
691 fp
->FragDepthLayout
= FRAG_DEPTH_LAYOUT_NONE
;
693 case ir_depth_layout_any
:
694 fp
->FragDepthLayout
= FRAG_DEPTH_LAYOUT_ANY
;
696 case ir_depth_layout_greater
:
697 fp
->FragDepthLayout
= FRAG_DEPTH_LAYOUT_GREATER
;
699 case ir_depth_layout_less
:
700 fp
->FragDepthLayout
= FRAG_DEPTH_LAYOUT_LESS
;
702 case ir_depth_layout_unchanged
:
703 fp
->FragDepthLayout
= FRAG_DEPTH_LAYOUT_UNCHANGED
;
711 if (ir
->mode
== ir_var_uniform
&& strncmp(ir
->name
, "gl_", 3) == 0) {
713 const ir_state_slot
*const slots
= ir
->state_slots
;
714 assert(ir
->state_slots
!= NULL
);
716 /* Check if this statevar's setup in the STATE file exactly
717 * matches how we'll want to reference it as a
718 * struct/array/whatever. If not, then we need to move it into
719 * temporary storage and hope that it'll get copy-propagated
722 for (i
= 0; i
< ir
->num_state_slots
; i
++) {
723 if (slots
[i
].swizzle
!= SWIZZLE_XYZW
) {
728 variable_storage
*storage
;
730 if (i
== ir
->num_state_slots
) {
731 /* We'll set the index later. */
732 storage
= new(mem_ctx
) variable_storage(ir
, PROGRAM_STATE_VAR
, -1);
733 this->variables
.push_tail(storage
);
737 /* The variable_storage constructor allocates slots based on the size
738 * of the type. However, this had better match the number of state
739 * elements that we're going to copy into the new temporary.
741 assert((int) ir
->num_state_slots
== type_size(ir
->type
));
743 storage
= new(mem_ctx
) variable_storage(ir
, PROGRAM_TEMPORARY
,
745 this->variables
.push_tail(storage
);
746 this->next_temp
+= type_size(ir
->type
);
748 dst
= dst_reg(src_reg(PROGRAM_TEMPORARY
, storage
->index
, NULL
));
752 for (unsigned int i
= 0; i
< ir
->num_state_slots
; i
++) {
753 int index
= _mesa_add_state_reference(this->prog
->Parameters
,
754 (gl_state_index
*)slots
[i
].tokens
);
756 if (storage
->file
== PROGRAM_STATE_VAR
) {
757 if (storage
->index
== -1) {
758 storage
->index
= index
;
760 assert(index
== storage
->index
+ (int)i
);
763 src_reg
src(PROGRAM_STATE_VAR
, index
, NULL
);
764 src
.swizzle
= slots
[i
].swizzle
;
765 emit(ir
, OPCODE_MOV
, dst
, src
);
766 /* even a float takes up a whole vec4 reg in a struct/array. */
771 if (storage
->file
== PROGRAM_TEMPORARY
&&
772 dst
.index
!= storage
->index
+ (int) ir
->num_state_slots
) {
773 linker_error(this->shader_program
,
774 "failed to load builtin uniform `%s' "
775 "(%d/%d regs loaded)\n",
776 ir
->name
, dst
.index
- storage
->index
,
777 type_size(ir
->type
));
783 ir_to_mesa_visitor::visit(ir_loop
*ir
)
785 ir_dereference_variable
*counter
= NULL
;
787 if (ir
->counter
!= NULL
)
788 counter
= new(mem_ctx
) ir_dereference_variable(ir
->counter
);
790 if (ir
->from
!= NULL
) {
791 assert(ir
->counter
!= NULL
);
794 new(mem_ctx
) ir_assignment(counter
, ir
->from
, NULL
);
799 emit(NULL
, OPCODE_BGNLOOP
);
803 new(mem_ctx
) ir_expression(ir
->cmp
, glsl_type::bool_type
,
805 ir_if
*if_stmt
= new(mem_ctx
) ir_if(e
);
808 new(mem_ctx
) ir_loop_jump(ir_loop_jump::jump_break
);
810 if_stmt
->then_instructions
.push_tail(brk
);
812 if_stmt
->accept(this);
815 visit_exec_list(&ir
->body_instructions
, this);
819 new(mem_ctx
) ir_expression(ir_binop_add
, counter
->type
,
820 counter
, ir
->increment
);
823 new(mem_ctx
) ir_assignment(counter
, e
, NULL
);
828 emit(NULL
, OPCODE_ENDLOOP
);
832 ir_to_mesa_visitor::visit(ir_loop_jump
*ir
)
835 case ir_loop_jump::jump_break
:
836 emit(NULL
, OPCODE_BRK
);
838 case ir_loop_jump::jump_continue
:
839 emit(NULL
, OPCODE_CONT
);
846 ir_to_mesa_visitor::visit(ir_function_signature
*ir
)
853 ir_to_mesa_visitor::visit(ir_function
*ir
)
855 /* Ignore function bodies other than main() -- we shouldn't see calls to
856 * them since they should all be inlined before we get to ir_to_mesa.
858 if (strcmp(ir
->name
, "main") == 0) {
859 const ir_function_signature
*sig
;
862 sig
= ir
->matching_signature(&empty
);
866 foreach_iter(exec_list_iterator
, iter
, sig
->body
) {
867 ir_instruction
*ir
= (ir_instruction
*)iter
.get();
875 ir_to_mesa_visitor::try_emit_mad(ir_expression
*ir
, int mul_operand
)
877 int nonmul_operand
= 1 - mul_operand
;
880 ir_expression
*expr
= ir
->operands
[mul_operand
]->as_expression();
881 if (!expr
|| expr
->operation
!= ir_binop_mul
)
884 expr
->operands
[0]->accept(this);
886 expr
->operands
[1]->accept(this);
888 ir
->operands
[nonmul_operand
]->accept(this);
891 this->result
= get_temp(ir
->type
);
892 emit(ir
, OPCODE_MAD
, dst_reg(this->result
), a
, b
, c
);
898 * Emit OPCODE_MAD(a, -b, a) instead of AND(a, NOT(b))
900 * The logic values are 1.0 for true and 0.0 for false. Logical-and is
901 * implemented using multiplication, and logical-or is implemented using
902 * addition. Logical-not can be implemented as (true - x), or (1.0 - x).
903 * As result, the logical expression (a & !b) can be rewritten as:
907 * - (a * 1) - (a * b)
911 * This final expression can be implemented as a single MAD(a, -b, a)
915 ir_to_mesa_visitor::try_emit_mad_for_and_not(ir_expression
*ir
, int try_operand
)
917 const int other_operand
= 1 - try_operand
;
920 ir_expression
*expr
= ir
->operands
[try_operand
]->as_expression();
921 if (!expr
|| expr
->operation
!= ir_unop_logic_not
)
924 ir
->operands
[other_operand
]->accept(this);
926 expr
->operands
[0]->accept(this);
929 b
.negate
= ~b
.negate
;
931 this->result
= get_temp(ir
->type
);
932 emit(ir
, OPCODE_MAD
, dst_reg(this->result
), a
, b
, a
);
938 ir_to_mesa_visitor::try_emit_sat(ir_expression
*ir
)
940 /* Saturates were only introduced to vertex programs in
941 * NV_vertex_program3, so don't give them to drivers in the VP.
943 if (this->prog
->Target
== GL_VERTEX_PROGRAM_ARB
)
946 ir_rvalue
*sat_src
= ir
->as_rvalue_to_saturate();
950 sat_src
->accept(this);
951 src_reg src
= this->result
;
953 /* If we generated an expression instruction into a temporary in
954 * processing the saturate's operand, apply the saturate to that
955 * instruction. Otherwise, generate a MOV to do the saturate.
957 * Note that we have to be careful to only do this optimization if
958 * the instruction in question was what generated src->result. For
959 * example, ir_dereference_array might generate a MUL instruction
960 * to create the reladdr, and return us a src reg using that
961 * reladdr. That MUL result is not the value we're trying to
964 ir_expression
*sat_src_expr
= sat_src
->as_expression();
965 ir_to_mesa_instruction
*new_inst
;
966 new_inst
= (ir_to_mesa_instruction
*)this->instructions
.get_tail();
967 if (sat_src_expr
&& (sat_src_expr
->operation
== ir_binop_mul
||
968 sat_src_expr
->operation
== ir_binop_add
||
969 sat_src_expr
->operation
== ir_binop_dot
)) {
970 new_inst
->saturate
= true;
972 this->result
= get_temp(ir
->type
);
973 ir_to_mesa_instruction
*inst
;
974 inst
= emit(ir
, OPCODE_MOV
, dst_reg(this->result
), src
);
975 inst
->saturate
= true;
982 ir_to_mesa_visitor::reladdr_to_temp(ir_instruction
*ir
,
983 src_reg
*reg
, int *num_reladdr
)
988 emit(ir
, OPCODE_ARL
, address_reg
, *reg
->reladdr
);
990 if (*num_reladdr
!= 1) {
991 src_reg temp
= get_temp(glsl_type::vec4_type
);
993 emit(ir
, OPCODE_MOV
, dst_reg(temp
), *reg
);
1001 ir_to_mesa_visitor::emit_swz(ir_expression
*ir
)
1003 /* Assume that the vector operator is in a form compatible with OPCODE_SWZ.
1004 * This means that each of the operands is either an immediate value of -1,
1005 * 0, or 1, or is a component from one source register (possibly with
1008 uint8_t components
[4] = { 0 };
1009 bool negate
[4] = { false };
1010 ir_variable
*var
= NULL
;
1012 for (unsigned i
= 0; i
< ir
->type
->vector_elements
; i
++) {
1013 ir_rvalue
*op
= ir
->operands
[i
];
1015 assert(op
->type
->is_scalar());
1017 while (op
!= NULL
) {
1018 switch (op
->ir_type
) {
1019 case ir_type_constant
: {
1021 assert(op
->type
->is_scalar());
1023 const ir_constant
*const c
= op
->as_constant();
1025 components
[i
] = SWIZZLE_ONE
;
1026 } else if (c
->is_zero()) {
1027 components
[i
] = SWIZZLE_ZERO
;
1028 } else if (c
->is_negative_one()) {
1029 components
[i
] = SWIZZLE_ONE
;
1032 assert(!"SWZ constant must be 0.0 or 1.0.");
1039 case ir_type_dereference_variable
: {
1040 ir_dereference_variable
*const deref
=
1041 (ir_dereference_variable
*) op
;
1043 assert((var
== NULL
) || (deref
->var
== var
));
1044 components
[i
] = SWIZZLE_X
;
1050 case ir_type_expression
: {
1051 ir_expression
*const expr
= (ir_expression
*) op
;
1053 assert(expr
->operation
== ir_unop_neg
);
1056 op
= expr
->operands
[0];
1060 case ir_type_swizzle
: {
1061 ir_swizzle
*const swiz
= (ir_swizzle
*) op
;
1063 components
[i
] = swiz
->mask
.x
;
1069 assert(!"Should not get here.");
1075 assert(var
!= NULL
);
1077 ir_dereference_variable
*const deref
=
1078 new(mem_ctx
) ir_dereference_variable(var
);
1080 this->result
.file
= PROGRAM_UNDEFINED
;
1081 deref
->accept(this);
1082 if (this->result
.file
== PROGRAM_UNDEFINED
) {
1084 printf("Failed to get tree for expression operand:\n");
1092 src
.swizzle
= MAKE_SWIZZLE4(components
[0],
1096 src
.negate
= ((unsigned(negate
[0]) << 0)
1097 | (unsigned(negate
[1]) << 1)
1098 | (unsigned(negate
[2]) << 2)
1099 | (unsigned(negate
[3]) << 3));
1101 /* Storage for our result. Ideally for an assignment we'd be using the
1102 * actual storage for the result here, instead.
1104 const src_reg result_src
= get_temp(ir
->type
);
1105 dst_reg result_dst
= dst_reg(result_src
);
1107 /* Limit writes to the channels that will be used by result_src later.
1108 * This does limit this temp's use as a temporary for multi-instruction
1111 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1113 emit(ir
, OPCODE_SWZ
, result_dst
, src
);
1114 this->result
= result_src
;
1118 ir_to_mesa_visitor::visit(ir_expression
*ir
)
1120 unsigned int operand
;
1121 src_reg op
[Elements(ir
->operands
)];
1125 /* Quick peephole: Emit OPCODE_MAD(a, b, c) instead of ADD(MUL(a, b), c)
1127 if (ir
->operation
== ir_binop_add
) {
1128 if (try_emit_mad(ir
, 1))
1130 if (try_emit_mad(ir
, 0))
1134 /* Quick peephole: Emit OPCODE_MAD(-a, -b, a) instead of AND(a, NOT(b))
1136 if (ir
->operation
== ir_binop_logic_and
) {
1137 if (try_emit_mad_for_and_not(ir
, 1))
1139 if (try_emit_mad_for_and_not(ir
, 0))
1143 if (try_emit_sat(ir
))
1146 if (ir
->operation
== ir_quadop_vector
) {
1151 for (operand
= 0; operand
< ir
->get_num_operands(); operand
++) {
1152 this->result
.file
= PROGRAM_UNDEFINED
;
1153 ir
->operands
[operand
]->accept(this);
1154 if (this->result
.file
== PROGRAM_UNDEFINED
) {
1156 printf("Failed to get tree for expression operand:\n");
1157 ir
->operands
[operand
]->accept(&v
);
1160 op
[operand
] = this->result
;
1162 /* Matrix expression operands should have been broken down to vector
1163 * operations already.
1165 assert(!ir
->operands
[operand
]->type
->is_matrix());
1168 int vector_elements
= ir
->operands
[0]->type
->vector_elements
;
1169 if (ir
->operands
[1]) {
1170 vector_elements
= MAX2(vector_elements
,
1171 ir
->operands
[1]->type
->vector_elements
);
1174 this->result
.file
= PROGRAM_UNDEFINED
;
1176 /* Storage for our result. Ideally for an assignment we'd be using
1177 * the actual storage for the result here, instead.
1179 result_src
= get_temp(ir
->type
);
1180 /* convenience for the emit functions below. */
1181 result_dst
= dst_reg(result_src
);
1182 /* Limit writes to the channels that will be used by result_src later.
1183 * This does limit this temp's use as a temporary for multi-instruction
1186 result_dst
.writemask
= (1 << ir
->type
->vector_elements
) - 1;
1188 switch (ir
->operation
) {
1189 case ir_unop_logic_not
:
1190 /* Previously 'SEQ dst, src, 0.0' was used for this. However, many
1191 * older GPUs implement SEQ using multiple instructions (i915 uses two
1192 * SGE instructions and a MUL instruction). Since our logic values are
1193 * 0.0 and 1.0, 1-x also implements !x.
1195 op
[0].negate
= ~op
[0].negate
;
1196 emit(ir
, OPCODE_ADD
, result_dst
, op
[0], src_reg_for_float(1.0));
1199 op
[0].negate
= ~op
[0].negate
;
1203 emit(ir
, OPCODE_ABS
, result_dst
, op
[0]);
1206 emit(ir
, OPCODE_SSG
, result_dst
, op
[0]);
1209 emit_scalar(ir
, OPCODE_RCP
, result_dst
, op
[0]);
1213 emit_scalar(ir
, OPCODE_EX2
, result_dst
, op
[0]);
1217 assert(!"not reached: should be handled by ir_explog_to_explog2");
1220 emit_scalar(ir
, OPCODE_LG2
, result_dst
, op
[0]);
1223 emit_scalar(ir
, OPCODE_SIN
, result_dst
, op
[0]);
1226 emit_scalar(ir
, OPCODE_COS
, result_dst
, op
[0]);
1228 case ir_unop_sin_reduced
:
1229 emit_scs(ir
, OPCODE_SIN
, result_dst
, op
[0]);
1231 case ir_unop_cos_reduced
:
1232 emit_scs(ir
, OPCODE_COS
, result_dst
, op
[0]);
1236 emit(ir
, OPCODE_DDX
, result_dst
, op
[0]);
1239 emit(ir
, OPCODE_DDY
, result_dst
, op
[0]);
1242 case ir_unop_noise
: {
1243 const enum prog_opcode opcode
=
1244 prog_opcode(OPCODE_NOISE1
1245 + (ir
->operands
[0]->type
->vector_elements
) - 1);
1246 assert((opcode
>= OPCODE_NOISE1
) && (opcode
<= OPCODE_NOISE4
));
1248 emit(ir
, opcode
, result_dst
, op
[0]);
1253 emit(ir
, OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1256 emit(ir
, OPCODE_SUB
, result_dst
, op
[0], op
[1]);
1260 emit(ir
, OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1263 assert(!"not reached: should be handled by ir_div_to_mul_rcp");
1265 assert(!"ir_binop_mod should have been converted to b * fract(a/b)");
1269 emit(ir
, OPCODE_SLT
, result_dst
, op
[0], op
[1]);
1271 case ir_binop_greater
:
1272 emit(ir
, OPCODE_SGT
, result_dst
, op
[0], op
[1]);
1274 case ir_binop_lequal
:
1275 emit(ir
, OPCODE_SLE
, result_dst
, op
[0], op
[1]);
1277 case ir_binop_gequal
:
1278 emit(ir
, OPCODE_SGE
, result_dst
, op
[0], op
[1]);
1280 case ir_binop_equal
:
1281 emit(ir
, OPCODE_SEQ
, result_dst
, op
[0], op
[1]);
1283 case ir_binop_nequal
:
1284 emit(ir
, OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1286 case ir_binop_all_equal
:
1287 /* "==" operator producing a scalar boolean. */
1288 if (ir
->operands
[0]->type
->is_vector() ||
1289 ir
->operands
[1]->type
->is_vector()) {
1290 src_reg temp
= get_temp(glsl_type::vec4_type
);
1291 emit(ir
, OPCODE_SNE
, dst_reg(temp
), op
[0], op
[1]);
1293 /* After the dot-product, the value will be an integer on the
1294 * range [0,4]. Zero becomes 1.0, and positive values become zero.
1296 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1298 /* Negating the result of the dot-product gives values on the range
1299 * [-4, 0]. Zero becomes 1.0, and negative values become zero. This
1300 * achieved using SGE.
1302 src_reg sge_src
= result_src
;
1303 sge_src
.negate
= ~sge_src
.negate
;
1304 emit(ir
, OPCODE_SGE
, result_dst
, sge_src
, src_reg_for_float(0.0));
1306 emit(ir
, OPCODE_SEQ
, result_dst
, op
[0], op
[1]);
1309 case ir_binop_any_nequal
:
1310 /* "!=" operator producing a scalar boolean. */
1311 if (ir
->operands
[0]->type
->is_vector() ||
1312 ir
->operands
[1]->type
->is_vector()) {
1313 src_reg temp
= get_temp(glsl_type::vec4_type
);
1314 emit(ir
, OPCODE_SNE
, dst_reg(temp
), op
[0], op
[1]);
1316 /* After the dot-product, the value will be an integer on the
1317 * range [0,4]. Zero stays zero, and positive values become 1.0.
1319 ir_to_mesa_instruction
*const dp
=
1320 emit_dp(ir
, result_dst
, temp
, temp
, vector_elements
);
1321 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1322 /* The clamping to [0,1] can be done for free in the fragment
1323 * shader with a saturate.
1325 dp
->saturate
= true;
1327 /* Negating the result of the dot-product gives values on the range
1328 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1329 * achieved using SLT.
1331 src_reg slt_src
= result_src
;
1332 slt_src
.negate
= ~slt_src
.negate
;
1333 emit(ir
, OPCODE_SLT
, result_dst
, slt_src
, src_reg_for_float(0.0));
1336 emit(ir
, OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1341 assert(ir
->operands
[0]->type
->is_vector());
1343 /* After the dot-product, the value will be an integer on the
1344 * range [0,4]. Zero stays zero, and positive values become 1.0.
1346 ir_to_mesa_instruction
*const dp
=
1347 emit_dp(ir
, result_dst
, op
[0], op
[0],
1348 ir
->operands
[0]->type
->vector_elements
);
1349 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1350 /* The clamping to [0,1] can be done for free in the fragment
1351 * shader with a saturate.
1353 dp
->saturate
= true;
1355 /* Negating the result of the dot-product gives values on the range
1356 * [-4, 0]. Zero stays zero, and negative values become 1.0. This
1357 * is achieved using SLT.
1359 src_reg slt_src
= result_src
;
1360 slt_src
.negate
= ~slt_src
.negate
;
1361 emit(ir
, OPCODE_SLT
, result_dst
, slt_src
, src_reg_for_float(0.0));
1366 case ir_binop_logic_xor
:
1367 emit(ir
, OPCODE_SNE
, result_dst
, op
[0], op
[1]);
1370 case ir_binop_logic_or
: {
1371 /* After the addition, the value will be an integer on the
1372 * range [0,2]. Zero stays zero, and positive values become 1.0.
1374 ir_to_mesa_instruction
*add
=
1375 emit(ir
, OPCODE_ADD
, result_dst
, op
[0], op
[1]);
1376 if (this->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
1377 /* The clamping to [0,1] can be done for free in the fragment
1378 * shader with a saturate.
1380 add
->saturate
= true;
1382 /* Negating the result of the addition gives values on the range
1383 * [-2, 0]. Zero stays zero, and negative values become 1.0. This
1384 * is achieved using SLT.
1386 src_reg slt_src
= result_src
;
1387 slt_src
.negate
= ~slt_src
.negate
;
1388 emit(ir
, OPCODE_SLT
, result_dst
, slt_src
, src_reg_for_float(0.0));
1393 case ir_binop_logic_and
:
1394 /* the bool args are stored as float 0.0 or 1.0, so "mul" gives us "and". */
1395 emit(ir
, OPCODE_MUL
, result_dst
, op
[0], op
[1]);
1399 assert(ir
->operands
[0]->type
->is_vector());
1400 assert(ir
->operands
[0]->type
== ir
->operands
[1]->type
);
1401 emit_dp(ir
, result_dst
, op
[0], op
[1],
1402 ir
->operands
[0]->type
->vector_elements
);
1406 /* sqrt(x) = x * rsq(x). */
1407 emit_scalar(ir
, OPCODE_RSQ
, result_dst
, op
[0]);
1408 emit(ir
, OPCODE_MUL
, result_dst
, result_src
, op
[0]);
1409 /* For incoming channels <= 0, set the result to 0. */
1410 op
[0].negate
= ~op
[0].negate
;
1411 emit(ir
, OPCODE_CMP
, result_dst
,
1412 op
[0], result_src
, src_reg_for_float(0.0));
1415 emit_scalar(ir
, OPCODE_RSQ
, result_dst
, op
[0]);
1423 /* Mesa IR lacks types, ints are stored as truncated floats. */
1427 emit(ir
, OPCODE_TRUNC
, result_dst
, op
[0]);
1431 emit(ir
, OPCODE_SNE
, result_dst
,
1432 op
[0], src_reg_for_float(0.0));
1435 emit(ir
, OPCODE_TRUNC
, result_dst
, op
[0]);
1438 op
[0].negate
= ~op
[0].negate
;
1439 emit(ir
, OPCODE_FLR
, result_dst
, op
[0]);
1440 result_src
.negate
= ~result_src
.negate
;
1443 emit(ir
, OPCODE_FLR
, result_dst
, op
[0]);
1446 emit(ir
, OPCODE_FRC
, result_dst
, op
[0]);
1450 emit(ir
, OPCODE_MIN
, result_dst
, op
[0], op
[1]);
1453 emit(ir
, OPCODE_MAX
, result_dst
, op
[0], op
[1]);
1456 emit_scalar(ir
, OPCODE_POW
, result_dst
, op
[0], op
[1]);
1459 case ir_unop_bit_not
:
1460 case ir_binop_lshift
:
1461 case ir_binop_rshift
:
1462 case ir_binop_bit_and
:
1463 case ir_binop_bit_xor
:
1464 case ir_binop_bit_or
:
1465 case ir_unop_round_even
:
1466 assert(!"GLSL 1.30 features unsupported");
1469 case ir_quadop_vector
:
1470 /* This operation should have already been handled.
1472 assert(!"Should not get here.");
1476 this->result
= result_src
;
1481 ir_to_mesa_visitor::visit(ir_swizzle
*ir
)
1487 /* Note that this is only swizzles in expressions, not those on the left
1488 * hand side of an assignment, which do write masking. See ir_assignment
1492 ir
->val
->accept(this);
1494 assert(src
.file
!= PROGRAM_UNDEFINED
);
1496 for (i
= 0; i
< 4; i
++) {
1497 if (i
< ir
->type
->vector_elements
) {
1500 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.x
);
1503 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.y
);
1506 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.z
);
1509 swizzle
[i
] = GET_SWZ(src
.swizzle
, ir
->mask
.w
);
1513 /* If the type is smaller than a vec4, replicate the last
1516 swizzle
[i
] = swizzle
[ir
->type
->vector_elements
- 1];
1520 src
.swizzle
= MAKE_SWIZZLE4(swizzle
[0], swizzle
[1], swizzle
[2], swizzle
[3]);
1526 ir_to_mesa_visitor::visit(ir_dereference_variable
*ir
)
1528 variable_storage
*entry
= find_variable_storage(ir
->var
);
1529 ir_variable
*var
= ir
->var
;
1532 switch (var
->mode
) {
1533 case ir_var_uniform
:
1534 entry
= new(mem_ctx
) variable_storage(var
, PROGRAM_UNIFORM
,
1536 this->variables
.push_tail(entry
);
1540 /* The linker assigns locations for varyings and attributes,
1541 * including deprecated builtins (like gl_Color),
1542 * user-assigned generic attributes (glBindVertexLocation),
1543 * and user-defined varyings.
1545 * FINISHME: We would hit this path for function arguments. Fix!
1547 assert(var
->location
!= -1);
1548 entry
= new(mem_ctx
) variable_storage(var
,
1551 if (this->prog
->Target
== GL_VERTEX_PROGRAM_ARB
&&
1552 var
->location
>= VERT_ATTRIB_GENERIC0
) {
1553 _mesa_add_attribute(this->prog
->Attributes
,
1555 _mesa_sizeof_glsl_type(var
->type
->gl_type
),
1557 var
->location
- VERT_ATTRIB_GENERIC0
);
1561 assert(var
->location
!= -1);
1562 entry
= new(mem_ctx
) variable_storage(var
,
1566 case ir_var_system_value
:
1567 entry
= new(mem_ctx
) variable_storage(var
,
1568 PROGRAM_SYSTEM_VALUE
,
1572 case ir_var_temporary
:
1573 entry
= new(mem_ctx
) variable_storage(var
, PROGRAM_TEMPORARY
,
1575 this->variables
.push_tail(entry
);
1577 next_temp
+= type_size(var
->type
);
1582 printf("Failed to make storage for %s\n", var
->name
);
1587 this->result
= src_reg(entry
->file
, entry
->index
, var
->type
);
1591 ir_to_mesa_visitor::visit(ir_dereference_array
*ir
)
1595 int element_size
= type_size(ir
->type
);
1597 index
= ir
->array_index
->constant_expression_value();
1599 ir
->array
->accept(this);
1603 src
.index
+= index
->value
.i
[0] * element_size
;
1605 /* Variable index array dereference. It eats the "vec4" of the
1606 * base of the array and an index that offsets the Mesa register
1609 ir
->array_index
->accept(this);
1613 if (element_size
== 1) {
1614 index_reg
= this->result
;
1616 index_reg
= get_temp(glsl_type::float_type
);
1618 emit(ir
, OPCODE_MUL
, dst_reg(index_reg
),
1619 this->result
, src_reg_for_float(element_size
));
1622 /* If there was already a relative address register involved, add the
1623 * new and the old together to get the new offset.
1625 if (src
.reladdr
!= NULL
) {
1626 src_reg accum_reg
= get_temp(glsl_type::float_type
);
1628 emit(ir
, OPCODE_ADD
, dst_reg(accum_reg
),
1629 index_reg
, *src
.reladdr
);
1631 index_reg
= accum_reg
;
1634 src
.reladdr
= ralloc(mem_ctx
, src_reg
);
1635 memcpy(src
.reladdr
, &index_reg
, sizeof(index_reg
));
1638 /* If the type is smaller than a vec4, replicate the last channel out. */
1639 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
1640 src
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
1642 src
.swizzle
= SWIZZLE_NOOP
;
1648 ir_to_mesa_visitor::visit(ir_dereference_record
*ir
)
1651 const glsl_type
*struct_type
= ir
->record
->type
;
1654 ir
->record
->accept(this);
1656 for (i
= 0; i
< struct_type
->length
; i
++) {
1657 if (strcmp(struct_type
->fields
.structure
[i
].name
, ir
->field
) == 0)
1659 offset
+= type_size(struct_type
->fields
.structure
[i
].type
);
1662 /* If the type is smaller than a vec4, replicate the last channel out. */
1663 if (ir
->type
->is_scalar() || ir
->type
->is_vector())
1664 this->result
.swizzle
= swizzle_for_size(ir
->type
->vector_elements
);
1666 this->result
.swizzle
= SWIZZLE_NOOP
;
1668 this->result
.index
+= offset
;
1672 * We want to be careful in assignment setup to hit the actual storage
1673 * instead of potentially using a temporary like we might with the
1674 * ir_dereference handler.
1677 get_assignment_lhs(ir_dereference
*ir
, ir_to_mesa_visitor
*v
)
1679 /* The LHS must be a dereference. If the LHS is a variable indexed array
1680 * access of a vector, it must be separated into a series conditional moves
1681 * before reaching this point (see ir_vec_index_to_cond_assign).
1683 assert(ir
->as_dereference());
1684 ir_dereference_array
*deref_array
= ir
->as_dereference_array();
1686 assert(!deref_array
->array
->type
->is_vector());
1689 /* Use the rvalue deref handler for the most part. We'll ignore
1690 * swizzles in it and write swizzles using writemask, though.
1693 return dst_reg(v
->result
);
1697 * Process the condition of a conditional assignment
1699 * Examines the condition of a conditional assignment to generate the optimal
1700 * first operand of a \c CMP instruction. If the condition is a relational
1701 * operator with 0 (e.g., \c ir_binop_less), the value being compared will be
1702 * used as the source for the \c CMP instruction. Otherwise the comparison
1703 * is processed to a boolean result, and the boolean result is used as the
1704 * operand to the CMP instruction.
1707 ir_to_mesa_visitor::process_move_condition(ir_rvalue
*ir
)
1709 ir_rvalue
*src_ir
= ir
;
1711 bool switch_order
= false;
1713 ir_expression
*const expr
= ir
->as_expression();
1714 if ((expr
!= NULL
) && (expr
->get_num_operands() == 2)) {
1715 bool zero_on_left
= false;
1717 if (expr
->operands
[0]->is_zero()) {
1718 src_ir
= expr
->operands
[1];
1719 zero_on_left
= true;
1720 } else if (expr
->operands
[1]->is_zero()) {
1721 src_ir
= expr
->operands
[0];
1722 zero_on_left
= false;
1726 * (a < 0) T F F ( a < 0) T F F
1727 * (0 < a) F F T (-a < 0) F F T
1728 * (a <= 0) T T F (-a < 0) F F T (swap order of other operands)
1729 * (0 <= a) F T T ( a < 0) T F F (swap order of other operands)
1730 * (a > 0) F F T (-a < 0) F F T
1731 * (0 > a) T F F ( a < 0) T F F
1732 * (a >= 0) F T T ( a < 0) T F F (swap order of other operands)
1733 * (0 >= a) T T F (-a < 0) F F T (swap order of other operands)
1735 * Note that exchanging the order of 0 and 'a' in the comparison simply
1736 * means that the value of 'a' should be negated.
1739 switch (expr
->operation
) {
1741 switch_order
= false;
1742 negate
= zero_on_left
;
1745 case ir_binop_greater
:
1746 switch_order
= false;
1747 negate
= !zero_on_left
;
1750 case ir_binop_lequal
:
1751 switch_order
= true;
1752 negate
= !zero_on_left
;
1755 case ir_binop_gequal
:
1756 switch_order
= true;
1757 negate
= zero_on_left
;
1761 /* This isn't the right kind of comparison afterall, so make sure
1762 * the whole condition is visited.
1770 src_ir
->accept(this);
1772 /* We use the OPCODE_CMP (a < 0 ? b : c) for conditional moves, and the
1773 * condition we produced is 0.0 or 1.0. By flipping the sign, we can
1774 * choose which value OPCODE_CMP produces without an extra instruction
1775 * computing the condition.
1778 this->result
.negate
= ~this->result
.negate
;
1780 return switch_order
;
1784 ir_to_mesa_visitor::visit(ir_assignment
*ir
)
1790 ir
->rhs
->accept(this);
1793 l
= get_assignment_lhs(ir
->lhs
, this);
1795 /* FINISHME: This should really set to the correct maximal writemask for each
1796 * FINISHME: component written (in the loops below). This case can only
1797 * FINISHME: occur for matrices, arrays, and structures.
1799 if (ir
->write_mask
== 0) {
1800 assert(!ir
->lhs
->type
->is_scalar() && !ir
->lhs
->type
->is_vector());
1801 l
.writemask
= WRITEMASK_XYZW
;
1802 } else if (ir
->lhs
->type
->is_scalar()) {
1803 /* FINISHME: This hack makes writing to gl_FragDepth, which lives in the
1804 * FINISHME: W component of fragment shader output zero, work correctly.
1806 l
.writemask
= WRITEMASK_XYZW
;
1809 int first_enabled_chan
= 0;
1812 assert(ir
->lhs
->type
->is_vector());
1813 l
.writemask
= ir
->write_mask
;
1815 for (int i
= 0; i
< 4; i
++) {
1816 if (l
.writemask
& (1 << i
)) {
1817 first_enabled_chan
= GET_SWZ(r
.swizzle
, i
);
1822 /* Swizzle a small RHS vector into the channels being written.
1824 * glsl ir treats write_mask as dictating how many channels are
1825 * present on the RHS while Mesa IR treats write_mask as just
1826 * showing which channels of the vec4 RHS get written.
1828 for (int i
= 0; i
< 4; i
++) {
1829 if (l
.writemask
& (1 << i
))
1830 swizzles
[i
] = GET_SWZ(r
.swizzle
, rhs_chan
++);
1832 swizzles
[i
] = first_enabled_chan
;
1834 r
.swizzle
= MAKE_SWIZZLE4(swizzles
[0], swizzles
[1],
1835 swizzles
[2], swizzles
[3]);
1838 assert(l
.file
!= PROGRAM_UNDEFINED
);
1839 assert(r
.file
!= PROGRAM_UNDEFINED
);
1841 if (ir
->condition
) {
1842 const bool switch_order
= this->process_move_condition(ir
->condition
);
1843 src_reg condition
= this->result
;
1845 for (i
= 0; i
< type_size(ir
->lhs
->type
); i
++) {
1847 emit(ir
, OPCODE_CMP
, l
, condition
, src_reg(l
), r
);
1849 emit(ir
, OPCODE_CMP
, l
, condition
, r
, src_reg(l
));
1856 for (i
= 0; i
< type_size(ir
->lhs
->type
); i
++) {
1857 emit(ir
, OPCODE_MOV
, l
, r
);
1866 ir_to_mesa_visitor::visit(ir_constant
*ir
)
1869 GLfloat stack_vals
[4] = { 0 };
1870 GLfloat
*values
= stack_vals
;
1873 /* Unfortunately, 4 floats is all we can get into
1874 * _mesa_add_unnamed_constant. So, make a temp to store an
1875 * aggregate constant and move each constant value into it. If we
1876 * get lucky, copy propagation will eliminate the extra moves.
1879 if (ir
->type
->base_type
== GLSL_TYPE_STRUCT
) {
1880 src_reg temp_base
= get_temp(ir
->type
);
1881 dst_reg temp
= dst_reg(temp_base
);
1883 foreach_iter(exec_list_iterator
, iter
, ir
->components
) {
1884 ir_constant
*field_value
= (ir_constant
*)iter
.get();
1885 int size
= type_size(field_value
->type
);
1889 field_value
->accept(this);
1892 for (i
= 0; i
< (unsigned int)size
; i
++) {
1893 emit(ir
, OPCODE_MOV
, temp
, src
);
1899 this->result
= temp_base
;
1903 if (ir
->type
->is_array()) {
1904 src_reg temp_base
= get_temp(ir
->type
);
1905 dst_reg temp
= dst_reg(temp_base
);
1906 int size
= type_size(ir
->type
->fields
.array
);
1910 for (i
= 0; i
< ir
->type
->length
; i
++) {
1911 ir
->array_elements
[i
]->accept(this);
1913 for (int j
= 0; j
< size
; j
++) {
1914 emit(ir
, OPCODE_MOV
, temp
, src
);
1920 this->result
= temp_base
;
1924 if (ir
->type
->is_matrix()) {
1925 src_reg mat
= get_temp(ir
->type
);
1926 dst_reg mat_column
= dst_reg(mat
);
1928 for (i
= 0; i
< ir
->type
->matrix_columns
; i
++) {
1929 assert(ir
->type
->base_type
== GLSL_TYPE_FLOAT
);
1930 values
= &ir
->value
.f
[i
* ir
->type
->vector_elements
];
1932 src
= src_reg(PROGRAM_CONSTANT
, -1, NULL
);
1933 src
.index
= _mesa_add_unnamed_constant(this->prog
->Parameters
,
1934 (gl_constant_value
*) values
,
1935 ir
->type
->vector_elements
,
1937 emit(ir
, OPCODE_MOV
, mat_column
, src
);
1946 src
.file
= PROGRAM_CONSTANT
;
1947 switch (ir
->type
->base_type
) {
1948 case GLSL_TYPE_FLOAT
:
1949 values
= &ir
->value
.f
[0];
1951 case GLSL_TYPE_UINT
:
1952 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
1953 values
[i
] = ir
->value
.u
[i
];
1957 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
1958 values
[i
] = ir
->value
.i
[i
];
1961 case GLSL_TYPE_BOOL
:
1962 for (i
= 0; i
< ir
->type
->vector_elements
; i
++) {
1963 values
[i
] = ir
->value
.b
[i
];
1967 assert(!"Non-float/uint/int/bool constant");
1970 this->result
= src_reg(PROGRAM_CONSTANT
, -1, ir
->type
);
1971 this->result
.index
= _mesa_add_unnamed_constant(this->prog
->Parameters
,
1972 (gl_constant_value
*) values
,
1973 ir
->type
->vector_elements
,
1974 &this->result
.swizzle
);
1978 ir_to_mesa_visitor::get_function_signature(ir_function_signature
*sig
)
1980 function_entry
*entry
;
1982 foreach_iter(exec_list_iterator
, iter
, this->function_signatures
) {
1983 entry
= (function_entry
*)iter
.get();
1985 if (entry
->sig
== sig
)
1989 entry
= ralloc(mem_ctx
, function_entry
);
1991 entry
->sig_id
= this->next_signature_id
++;
1992 entry
->bgn_inst
= NULL
;
1994 /* Allocate storage for all the parameters. */
1995 foreach_iter(exec_list_iterator
, iter
, sig
->parameters
) {
1996 ir_variable
*param
= (ir_variable
*)iter
.get();
1997 variable_storage
*storage
;
1999 storage
= find_variable_storage(param
);
2002 storage
= new(mem_ctx
) variable_storage(param
, PROGRAM_TEMPORARY
,
2004 this->variables
.push_tail(storage
);
2006 this->next_temp
+= type_size(param
->type
);
2009 if (!sig
->return_type
->is_void()) {
2010 entry
->return_reg
= get_temp(sig
->return_type
);
2012 entry
->return_reg
= undef_src
;
2015 this->function_signatures
.push_tail(entry
);
2020 ir_to_mesa_visitor::visit(ir_call
*ir
)
2022 ir_to_mesa_instruction
*call_inst
;
2023 ir_function_signature
*sig
= ir
->get_callee();
2024 function_entry
*entry
= get_function_signature(sig
);
2027 /* Process in parameters. */
2028 exec_list_iterator sig_iter
= sig
->parameters
.iterator();
2029 foreach_iter(exec_list_iterator
, iter
, *ir
) {
2030 ir_rvalue
*param_rval
= (ir_rvalue
*)iter
.get();
2031 ir_variable
*param
= (ir_variable
*)sig_iter
.get();
2033 if (param
->mode
== ir_var_in
||
2034 param
->mode
== ir_var_inout
) {
2035 variable_storage
*storage
= find_variable_storage(param
);
2038 param_rval
->accept(this);
2039 src_reg r
= this->result
;
2042 l
.file
= storage
->file
;
2043 l
.index
= storage
->index
;
2045 l
.writemask
= WRITEMASK_XYZW
;
2046 l
.cond_mask
= COND_TR
;
2048 for (i
= 0; i
< type_size(param
->type
); i
++) {
2049 emit(ir
, OPCODE_MOV
, l
, r
);
2057 assert(!sig_iter
.has_next());
2059 /* Emit call instruction */
2060 call_inst
= emit(ir
, OPCODE_CAL
);
2061 call_inst
->function
= entry
;
2063 /* Process out parameters. */
2064 sig_iter
= sig
->parameters
.iterator();
2065 foreach_iter(exec_list_iterator
, iter
, *ir
) {
2066 ir_rvalue
*param_rval
= (ir_rvalue
*)iter
.get();
2067 ir_variable
*param
= (ir_variable
*)sig_iter
.get();
2069 if (param
->mode
== ir_var_out
||
2070 param
->mode
== ir_var_inout
) {
2071 variable_storage
*storage
= find_variable_storage(param
);
2075 r
.file
= storage
->file
;
2076 r
.index
= storage
->index
;
2078 r
.swizzle
= SWIZZLE_NOOP
;
2081 param_rval
->accept(this);
2082 dst_reg l
= dst_reg(this->result
);
2084 for (i
= 0; i
< type_size(param
->type
); i
++) {
2085 emit(ir
, OPCODE_MOV
, l
, r
);
2093 assert(!sig_iter
.has_next());
2095 /* Process return value. */
2096 this->result
= entry
->return_reg
;
2100 ir_to_mesa_visitor::visit(ir_texture
*ir
)
2102 src_reg result_src
, coord
, lod_info
, projector
, dx
, dy
;
2103 dst_reg result_dst
, coord_dst
;
2104 ir_to_mesa_instruction
*inst
= NULL
;
2105 prog_opcode opcode
= OPCODE_NOP
;
2107 if (ir
->op
== ir_txs
)
2108 this->result
= src_reg_for_float(0.0);
2110 ir
->coordinate
->accept(this);
2112 /* Put our coords in a temp. We'll need to modify them for shadow,
2113 * projection, or LOD, so the only case we'd use it as is is if
2114 * we're doing plain old texturing. Mesa IR optimization should
2115 * handle cleaning up our mess in that case.
2117 coord
= get_temp(glsl_type::vec4_type
);
2118 coord_dst
= dst_reg(coord
);
2119 emit(ir
, OPCODE_MOV
, coord_dst
, this->result
);
2121 if (ir
->projector
) {
2122 ir
->projector
->accept(this);
2123 projector
= this->result
;
2126 /* Storage for our result. Ideally for an assignment we'd be using
2127 * the actual storage for the result here, instead.
2129 result_src
= get_temp(glsl_type::vec4_type
);
2130 result_dst
= dst_reg(result_src
);
2135 opcode
= OPCODE_TEX
;
2138 opcode
= OPCODE_TXB
;
2139 ir
->lod_info
.bias
->accept(this);
2140 lod_info
= this->result
;
2143 opcode
= OPCODE_TXL
;
2144 ir
->lod_info
.lod
->accept(this);
2145 lod_info
= this->result
;
2148 opcode
= OPCODE_TXD
;
2149 ir
->lod_info
.grad
.dPdx
->accept(this);
2151 ir
->lod_info
.grad
.dPdy
->accept(this);
2155 assert(!"GLSL 1.30 features unsupported");
2159 if (ir
->projector
) {
2160 if (opcode
== OPCODE_TEX
) {
2161 /* Slot the projector in as the last component of the coord. */
2162 coord_dst
.writemask
= WRITEMASK_W
;
2163 emit(ir
, OPCODE_MOV
, coord_dst
, projector
);
2164 coord_dst
.writemask
= WRITEMASK_XYZW
;
2165 opcode
= OPCODE_TXP
;
2167 src_reg coord_w
= coord
;
2168 coord_w
.swizzle
= SWIZZLE_WWWW
;
2170 /* For the other TEX opcodes there's no projective version
2171 * since the last slot is taken up by lod info. Do the
2172 * projective divide now.
2174 coord_dst
.writemask
= WRITEMASK_W
;
2175 emit(ir
, OPCODE_RCP
, coord_dst
, projector
);
2177 /* In the case where we have to project the coordinates "by hand,"
2178 * the shadow comparitor value must also be projected.
2180 src_reg tmp_src
= coord
;
2181 if (ir
->shadow_comparitor
) {
2182 /* Slot the shadow value in as the second to last component of the
2185 ir
->shadow_comparitor
->accept(this);
2187 tmp_src
= get_temp(glsl_type::vec4_type
);
2188 dst_reg tmp_dst
= dst_reg(tmp_src
);
2190 tmp_dst
.writemask
= WRITEMASK_Z
;
2191 emit(ir
, OPCODE_MOV
, tmp_dst
, this->result
);
2193 tmp_dst
.writemask
= WRITEMASK_XY
;
2194 emit(ir
, OPCODE_MOV
, tmp_dst
, coord
);
2197 coord_dst
.writemask
= WRITEMASK_XYZ
;
2198 emit(ir
, OPCODE_MUL
, coord_dst
, tmp_src
, coord_w
);
2200 coord_dst
.writemask
= WRITEMASK_XYZW
;
2201 coord
.swizzle
= SWIZZLE_XYZW
;
2205 /* If projection is done and the opcode is not OPCODE_TXP, then the shadow
2206 * comparitor was put in the correct place (and projected) by the code,
2207 * above, that handles by-hand projection.
2209 if (ir
->shadow_comparitor
&& (!ir
->projector
|| opcode
== OPCODE_TXP
)) {
2210 /* Slot the shadow value in as the second to last component of the
2213 ir
->shadow_comparitor
->accept(this);
2214 coord_dst
.writemask
= WRITEMASK_Z
;
2215 emit(ir
, OPCODE_MOV
, coord_dst
, this->result
);
2216 coord_dst
.writemask
= WRITEMASK_XYZW
;
2219 if (opcode
== OPCODE_TXL
|| opcode
== OPCODE_TXB
) {
2220 /* Mesa IR stores lod or lod bias in the last channel of the coords. */
2221 coord_dst
.writemask
= WRITEMASK_W
;
2222 emit(ir
, OPCODE_MOV
, coord_dst
, lod_info
);
2223 coord_dst
.writemask
= WRITEMASK_XYZW
;
2226 if (opcode
== OPCODE_TXD
)
2227 inst
= emit(ir
, opcode
, result_dst
, coord
, dx
, dy
);
2229 inst
= emit(ir
, opcode
, result_dst
, coord
);
2231 if (ir
->shadow_comparitor
)
2232 inst
->tex_shadow
= GL_TRUE
;
2234 inst
->sampler
= _mesa_get_sampler_uniform_value(ir
->sampler
,
2235 this->shader_program
,
2238 const glsl_type
*sampler_type
= ir
->sampler
->type
;
2240 switch (sampler_type
->sampler_dimensionality
) {
2241 case GLSL_SAMPLER_DIM_1D
:
2242 inst
->tex_target
= (sampler_type
->sampler_array
)
2243 ? TEXTURE_1D_ARRAY_INDEX
: TEXTURE_1D_INDEX
;
2245 case GLSL_SAMPLER_DIM_2D
:
2246 inst
->tex_target
= (sampler_type
->sampler_array
)
2247 ? TEXTURE_2D_ARRAY_INDEX
: TEXTURE_2D_INDEX
;
2249 case GLSL_SAMPLER_DIM_3D
:
2250 inst
->tex_target
= TEXTURE_3D_INDEX
;
2252 case GLSL_SAMPLER_DIM_CUBE
:
2253 inst
->tex_target
= TEXTURE_CUBE_INDEX
;
2255 case GLSL_SAMPLER_DIM_RECT
:
2256 inst
->tex_target
= TEXTURE_RECT_INDEX
;
2258 case GLSL_SAMPLER_DIM_BUF
:
2259 assert(!"FINISHME: Implement ARB_texture_buffer_object");
2262 assert(!"Should not get here.");
2265 this->result
= result_src
;
2269 ir_to_mesa_visitor::visit(ir_return
*ir
)
2271 if (ir
->get_value()) {
2275 assert(current_function
);
2277 ir
->get_value()->accept(this);
2278 src_reg r
= this->result
;
2280 l
= dst_reg(current_function
->return_reg
);
2282 for (i
= 0; i
< type_size(current_function
->sig
->return_type
); i
++) {
2283 emit(ir
, OPCODE_MOV
, l
, r
);
2289 emit(ir
, OPCODE_RET
);
2293 ir_to_mesa_visitor::visit(ir_discard
*ir
)
2295 struct gl_fragment_program
*fp
= (struct gl_fragment_program
*)this->prog
;
2297 if (ir
->condition
) {
2298 ir
->condition
->accept(this);
2299 this->result
.negate
= ~this->result
.negate
;
2300 emit(ir
, OPCODE_KIL
, undef_dst
, this->result
);
2302 emit(ir
, OPCODE_KIL_NV
);
2305 fp
->UsesKill
= GL_TRUE
;
2309 ir_to_mesa_visitor::visit(ir_if
*ir
)
2311 ir_to_mesa_instruction
*cond_inst
, *if_inst
;
2312 ir_to_mesa_instruction
*prev_inst
;
2314 prev_inst
= (ir_to_mesa_instruction
*)this->instructions
.get_tail();
2316 ir
->condition
->accept(this);
2317 assert(this->result
.file
!= PROGRAM_UNDEFINED
);
2319 if (this->options
->EmitCondCodes
) {
2320 cond_inst
= (ir_to_mesa_instruction
*)this->instructions
.get_tail();
2322 /* See if we actually generated any instruction for generating
2323 * the condition. If not, then cook up a move to a temp so we
2324 * have something to set cond_update on.
2326 if (cond_inst
== prev_inst
) {
2327 src_reg temp
= get_temp(glsl_type::bool_type
);
2328 cond_inst
= emit(ir
->condition
, OPCODE_MOV
, dst_reg(temp
), result
);
2330 cond_inst
->cond_update
= GL_TRUE
;
2332 if_inst
= emit(ir
->condition
, OPCODE_IF
);
2333 if_inst
->dst
.cond_mask
= COND_NE
;
2335 if_inst
= emit(ir
->condition
, OPCODE_IF
, undef_dst
, this->result
);
2338 this->instructions
.push_tail(if_inst
);
2340 visit_exec_list(&ir
->then_instructions
, this);
2342 if (!ir
->else_instructions
.is_empty()) {
2343 emit(ir
->condition
, OPCODE_ELSE
);
2344 visit_exec_list(&ir
->else_instructions
, this);
2347 if_inst
= emit(ir
->condition
, OPCODE_ENDIF
);
2350 ir_to_mesa_visitor::ir_to_mesa_visitor()
2352 result
.file
= PROGRAM_UNDEFINED
;
2354 next_signature_id
= 1;
2355 current_function
= NULL
;
2356 mem_ctx
= ralloc_context(NULL
);
2359 ir_to_mesa_visitor::~ir_to_mesa_visitor()
2361 ralloc_free(mem_ctx
);
2364 static struct prog_src_register
2365 mesa_src_reg_from_ir_src_reg(src_reg reg
)
2367 struct prog_src_register mesa_reg
;
2369 mesa_reg
.File
= reg
.file
;
2370 assert(reg
.index
< (1 << INST_INDEX_BITS
));
2371 mesa_reg
.Index
= reg
.index
;
2372 mesa_reg
.Swizzle
= reg
.swizzle
;
2373 mesa_reg
.RelAddr
= reg
.reladdr
!= NULL
;
2374 mesa_reg
.Negate
= reg
.negate
;
2376 mesa_reg
.HasIndex2
= GL_FALSE
;
2377 mesa_reg
.RelAddr2
= 0;
2378 mesa_reg
.Index2
= 0;
2384 set_branchtargets(ir_to_mesa_visitor
*v
,
2385 struct prog_instruction
*mesa_instructions
,
2386 int num_instructions
)
2388 int if_count
= 0, loop_count
= 0;
2389 int *if_stack
, *loop_stack
;
2390 int if_stack_pos
= 0, loop_stack_pos
= 0;
2393 for (i
= 0; i
< num_instructions
; i
++) {
2394 switch (mesa_instructions
[i
].Opcode
) {
2398 case OPCODE_BGNLOOP
:
2403 mesa_instructions
[i
].BranchTarget
= -1;
2410 if_stack
= rzalloc_array(v
->mem_ctx
, int, if_count
);
2411 loop_stack
= rzalloc_array(v
->mem_ctx
, int, loop_count
);
2413 for (i
= 0; i
< num_instructions
; i
++) {
2414 switch (mesa_instructions
[i
].Opcode
) {
2416 if_stack
[if_stack_pos
] = i
;
2420 mesa_instructions
[if_stack
[if_stack_pos
- 1]].BranchTarget
= i
;
2421 if_stack
[if_stack_pos
- 1] = i
;
2424 mesa_instructions
[if_stack
[if_stack_pos
- 1]].BranchTarget
= i
;
2427 case OPCODE_BGNLOOP
:
2428 loop_stack
[loop_stack_pos
] = i
;
2431 case OPCODE_ENDLOOP
:
2433 /* Rewrite any breaks/conts at this nesting level (haven't
2434 * already had a BranchTarget assigned) to point to the end
2437 for (j
= loop_stack
[loop_stack_pos
]; j
< i
; j
++) {
2438 if (mesa_instructions
[j
].Opcode
== OPCODE_BRK
||
2439 mesa_instructions
[j
].Opcode
== OPCODE_CONT
) {
2440 if (mesa_instructions
[j
].BranchTarget
== -1) {
2441 mesa_instructions
[j
].BranchTarget
= i
;
2445 /* The loop ends point at each other. */
2446 mesa_instructions
[i
].BranchTarget
= loop_stack
[loop_stack_pos
];
2447 mesa_instructions
[loop_stack
[loop_stack_pos
]].BranchTarget
= i
;
2450 foreach_iter(exec_list_iterator
, iter
, v
->function_signatures
) {
2451 function_entry
*entry
= (function_entry
*)iter
.get();
2453 if (entry
->sig_id
== mesa_instructions
[i
].BranchTarget
) {
2454 mesa_instructions
[i
].BranchTarget
= entry
->inst
;
2466 print_program(struct prog_instruction
*mesa_instructions
,
2467 ir_instruction
**mesa_instruction_annotation
,
2468 int num_instructions
)
2470 ir_instruction
*last_ir
= NULL
;
2474 for (i
= 0; i
< num_instructions
; i
++) {
2475 struct prog_instruction
*mesa_inst
= mesa_instructions
+ i
;
2476 ir_instruction
*ir
= mesa_instruction_annotation
[i
];
2478 fprintf(stdout
, "%3d: ", i
);
2480 if (last_ir
!= ir
&& ir
) {
2483 for (j
= 0; j
< indent
; j
++) {
2484 fprintf(stdout
, " ");
2490 fprintf(stdout
, " "); /* line number spacing. */
2493 indent
= _mesa_fprint_instruction_opt(stdout
, mesa_inst
, indent
,
2494 PROG_PRINT_DEBUG
, NULL
);
2500 * Count resources used by the given gpu program (number of texture
2504 count_resources(struct gl_program
*prog
)
2508 prog
->SamplersUsed
= 0;
2510 for (i
= 0; i
< prog
->NumInstructions
; i
++) {
2511 struct prog_instruction
*inst
= &prog
->Instructions
[i
];
2513 if (_mesa_is_tex_instruction(inst
->Opcode
)) {
2514 prog
->SamplerTargets
[inst
->TexSrcUnit
] =
2515 (gl_texture_index
)inst
->TexSrcTarget
;
2516 prog
->SamplersUsed
|= 1 << inst
->TexSrcUnit
;
2517 if (inst
->TexShadow
) {
2518 prog
->ShadowSamplers
|= 1 << inst
->TexSrcUnit
;
2523 _mesa_update_shader_textures_used(prog
);
2528 * Check if the given vertex/fragment/shader program is within the
2529 * resource limits of the context (number of texture units, etc).
2530 * If any of those checks fail, record a linker error.
2532 * XXX more checks are needed...
2535 check_resources(const struct gl_context
*ctx
,
2536 struct gl_shader_program
*shader_program
,
2537 struct gl_program
*prog
)
2539 switch (prog
->Target
) {
2540 case GL_VERTEX_PROGRAM_ARB
:
2541 if (_mesa_bitcount(prog
->SamplersUsed
) >
2542 ctx
->Const
.MaxVertexTextureImageUnits
) {
2543 linker_error(shader_program
,
2544 "Too many vertex shader texture samplers");
2546 if (prog
->Parameters
->NumParameters
> MAX_UNIFORMS
) {
2547 linker_error(shader_program
, "Too many vertex shader constants");
2550 case MESA_GEOMETRY_PROGRAM
:
2551 if (_mesa_bitcount(prog
->SamplersUsed
) >
2552 ctx
->Const
.MaxGeometryTextureImageUnits
) {
2553 linker_error(shader_program
,
2554 "Too many geometry shader texture samplers");
2556 if (prog
->Parameters
->NumParameters
>
2557 MAX_GEOMETRY_UNIFORM_COMPONENTS
/ 4) {
2558 linker_error(shader_program
, "Too many geometry shader constants");
2561 case GL_FRAGMENT_PROGRAM_ARB
:
2562 if (_mesa_bitcount(prog
->SamplersUsed
) >
2563 ctx
->Const
.MaxTextureImageUnits
) {
2564 linker_error(shader_program
,
2565 "Too many fragment shader texture samplers");
2567 if (prog
->Parameters
->NumParameters
> MAX_UNIFORMS
) {
2568 linker_error(shader_program
, "Too many fragment shader constants");
2572 _mesa_problem(ctx
, "unexpected program type in check_resources()");
2578 struct uniform_sort
{
2579 struct gl_uniform
*u
;
2583 /* The shader_program->Uniforms list is almost sorted in increasing
2584 * uniform->{Frag,Vert}Pos locations, but not quite when there are
2585 * uniforms shared between targets. We need to add parameters in
2586 * increasing order for the targets.
2589 sort_uniforms(const void *a
, const void *b
)
2591 struct uniform_sort
*u1
= (struct uniform_sort
*)a
;
2592 struct uniform_sort
*u2
= (struct uniform_sort
*)b
;
2594 return u1
->pos
- u2
->pos
;
2597 /* Add the uniforms to the parameters. The linker chose locations
2598 * in our parameters lists (which weren't created yet), which the
2599 * uniforms code will use to poke values into our parameters list
2600 * when uniforms are updated.
2603 add_uniforms_to_parameters_list(struct gl_shader_program
*shader_program
,
2604 struct gl_shader
*shader
,
2605 struct gl_program
*prog
)
2608 unsigned int next_sampler
= 0, num_uniforms
= 0;
2609 struct uniform_sort
*sorted_uniforms
;
2611 sorted_uniforms
= ralloc_array(NULL
, struct uniform_sort
,
2612 shader_program
->Uniforms
->NumUniforms
);
2614 for (i
= 0; i
< shader_program
->Uniforms
->NumUniforms
; i
++) {
2615 struct gl_uniform
*uniform
= shader_program
->Uniforms
->Uniforms
+ i
;
2616 int parameter_index
= -1;
2618 switch (shader
->Type
) {
2619 case GL_VERTEX_SHADER
:
2620 parameter_index
= uniform
->VertPos
;
2622 case GL_FRAGMENT_SHADER
:
2623 parameter_index
= uniform
->FragPos
;
2625 case GL_GEOMETRY_SHADER
:
2626 parameter_index
= uniform
->GeomPos
;
2630 /* Only add uniforms used in our target. */
2631 if (parameter_index
!= -1) {
2632 sorted_uniforms
[num_uniforms
].pos
= parameter_index
;
2633 sorted_uniforms
[num_uniforms
].u
= uniform
;
2638 qsort(sorted_uniforms
, num_uniforms
, sizeof(struct uniform_sort
),
2641 for (i
= 0; i
< num_uniforms
; i
++) {
2642 struct gl_uniform
*uniform
= sorted_uniforms
[i
].u
;
2643 int parameter_index
= sorted_uniforms
[i
].pos
;
2644 const glsl_type
*type
= uniform
->Type
;
2647 if (type
->is_vector() ||
2648 type
->is_scalar()) {
2649 size
= type
->vector_elements
;
2651 size
= type_size(type
) * 4;
2654 gl_register_file file
;
2655 if (type
->is_sampler() ||
2656 (type
->is_array() && type
->fields
.array
->is_sampler())) {
2657 file
= PROGRAM_SAMPLER
;
2659 file
= PROGRAM_UNIFORM
;
2662 GLint index
= _mesa_lookup_parameter_index(prog
->Parameters
, -1,
2666 index
= _mesa_add_parameter(prog
->Parameters
, file
,
2667 uniform
->Name
, size
, type
->gl_type
,
2670 /* Sampler uniform values are stored in prog->SamplerUnits,
2671 * and the entry in that array is selected by this index we
2672 * store in ParameterValues[].
2674 if (file
== PROGRAM_SAMPLER
) {
2675 for (unsigned int j
= 0; j
< size
/ 4; j
++)
2676 prog
->Parameters
->ParameterValues
[index
+ j
][0].f
= next_sampler
++;
2679 /* The location chosen in the Parameters list here (returned
2680 * from _mesa_add_uniform) has to match what the linker chose.
2682 if (index
!= parameter_index
) {
2683 linker_error(shader_program
,
2684 "Allocation of uniform `%s' to target failed "
2686 uniform
->Name
, index
, parameter_index
);
2691 ralloc_free(sorted_uniforms
);
2695 set_uniform_initializer(struct gl_context
*ctx
, void *mem_ctx
,
2696 struct gl_shader_program
*shader_program
,
2697 const char *name
, const glsl_type
*type
,
2700 if (type
->is_record()) {
2701 ir_constant
*field_constant
;
2703 field_constant
= (ir_constant
*)val
->components
.get_head();
2705 for (unsigned int i
= 0; i
< type
->length
; i
++) {
2706 const glsl_type
*field_type
= type
->fields
.structure
[i
].type
;
2707 const char *field_name
= ralloc_asprintf(mem_ctx
, "%s.%s", name
,
2708 type
->fields
.structure
[i
].name
);
2709 set_uniform_initializer(ctx
, mem_ctx
, shader_program
, field_name
,
2710 field_type
, field_constant
);
2711 field_constant
= (ir_constant
*)field_constant
->next
;
2716 int loc
= _mesa_get_uniform_location(ctx
, shader_program
, name
);
2719 linker_error(shader_program
,
2720 "Couldn't find uniform for initializer %s\n", name
);
2724 for (unsigned int i
= 0; i
< (type
->is_array() ? type
->length
: 1); i
++) {
2725 ir_constant
*element
;
2726 const glsl_type
*element_type
;
2727 if (type
->is_array()) {
2728 element
= val
->array_elements
[i
];
2729 element_type
= type
->fields
.array
;
2732 element_type
= type
;
2737 if (element_type
->base_type
== GLSL_TYPE_BOOL
) {
2738 int *conv
= ralloc_array(mem_ctx
, int, element_type
->components());
2739 for (unsigned int j
= 0; j
< element_type
->components(); j
++) {
2740 conv
[j
] = element
->value
.b
[j
];
2742 values
= (void *)conv
;
2743 element_type
= glsl_type::get_instance(GLSL_TYPE_INT
,
2744 element_type
->vector_elements
,
2747 values
= &element
->value
;
2750 if (element_type
->is_matrix()) {
2751 _mesa_uniform_matrix(ctx
, shader_program
,
2752 element_type
->matrix_columns
,
2753 element_type
->vector_elements
,
2754 loc
, 1, GL_FALSE
, (GLfloat
*)values
);
2755 loc
+= element_type
->matrix_columns
;
2757 _mesa_uniform(ctx
, shader_program
, loc
, element_type
->matrix_columns
,
2758 values
, element_type
->gl_type
);
2759 loc
+= type_size(element_type
);
2765 set_uniform_initializers(struct gl_context
*ctx
,
2766 struct gl_shader_program
*shader_program
)
2768 void *mem_ctx
= NULL
;
2770 for (unsigned int i
= 0; i
< MESA_SHADER_TYPES
; i
++) {
2771 struct gl_shader
*shader
= shader_program
->_LinkedShaders
[i
];
2776 foreach_iter(exec_list_iterator
, iter
, *shader
->ir
) {
2777 ir_instruction
*ir
= (ir_instruction
*)iter
.get();
2778 ir_variable
*var
= ir
->as_variable();
2780 if (!var
|| var
->mode
!= ir_var_uniform
|| !var
->constant_value
)
2784 mem_ctx
= ralloc_context(NULL
);
2786 set_uniform_initializer(ctx
, mem_ctx
, shader_program
, var
->name
,
2787 var
->type
, var
->constant_value
);
2791 ralloc_free(mem_ctx
);
2795 * On a basic block basis, tracks available PROGRAM_TEMPORARY register
2796 * channels for copy propagation and updates following instructions to
2797 * use the original versions.
2799 * The ir_to_mesa_visitor lazily produces code assuming that this pass
2800 * will occur. As an example, a TXP production before this pass:
2802 * 0: MOV TEMP[1], INPUT[4].xyyy;
2803 * 1: MOV TEMP[1].w, INPUT[4].wwww;
2804 * 2: TXP TEMP[2], TEMP[1], texture[0], 2D;
2808 * 0: MOV TEMP[1], INPUT[4].xyyy;
2809 * 1: MOV TEMP[1].w, INPUT[4].wwww;
2810 * 2: TXP TEMP[2], INPUT[4].xyyw, texture[0], 2D;
2812 * which allows for dead code elimination on TEMP[1]'s writes.
2815 ir_to_mesa_visitor::copy_propagate(void)
2817 ir_to_mesa_instruction
**acp
= rzalloc_array(mem_ctx
,
2818 ir_to_mesa_instruction
*,
2819 this->next_temp
* 4);
2820 int *acp_level
= rzalloc_array(mem_ctx
, int, this->next_temp
* 4);
2823 foreach_iter(exec_list_iterator
, iter
, this->instructions
) {
2824 ir_to_mesa_instruction
*inst
= (ir_to_mesa_instruction
*)iter
.get();
2826 assert(inst
->dst
.file
!= PROGRAM_TEMPORARY
2827 || inst
->dst
.index
< this->next_temp
);
2829 /* First, do any copy propagation possible into the src regs. */
2830 for (int r
= 0; r
< 3; r
++) {
2831 ir_to_mesa_instruction
*first
= NULL
;
2833 int acp_base
= inst
->src
[r
].index
* 4;
2835 if (inst
->src
[r
].file
!= PROGRAM_TEMPORARY
||
2836 inst
->src
[r
].reladdr
)
2839 /* See if we can find entries in the ACP consisting of MOVs
2840 * from the same src register for all the swizzled channels
2841 * of this src register reference.
2843 for (int i
= 0; i
< 4; i
++) {
2844 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
2845 ir_to_mesa_instruction
*copy_chan
= acp
[acp_base
+ src_chan
];
2852 assert(acp_level
[acp_base
+ src_chan
] <= level
);
2857 if (first
->src
[0].file
!= copy_chan
->src
[0].file
||
2858 first
->src
[0].index
!= copy_chan
->src
[0].index
) {
2866 /* We've now validated that we can copy-propagate to
2867 * replace this src register reference. Do it.
2869 inst
->src
[r
].file
= first
->src
[0].file
;
2870 inst
->src
[r
].index
= first
->src
[0].index
;
2873 for (int i
= 0; i
< 4; i
++) {
2874 int src_chan
= GET_SWZ(inst
->src
[r
].swizzle
, i
);
2875 ir_to_mesa_instruction
*copy_inst
= acp
[acp_base
+ src_chan
];
2876 swizzle
|= (GET_SWZ(copy_inst
->src
[0].swizzle
, src_chan
) <<
2879 inst
->src
[r
].swizzle
= swizzle
;
2884 case OPCODE_BGNLOOP
:
2885 case OPCODE_ENDLOOP
:
2886 /* End of a basic block, clear the ACP entirely. */
2887 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
2896 /* Clear all channels written inside the block from the ACP, but
2897 * leaving those that were not touched.
2899 for (int r
= 0; r
< this->next_temp
; r
++) {
2900 for (int c
= 0; c
< 4; c
++) {
2901 if (!acp
[4 * r
+ c
])
2904 if (acp_level
[4 * r
+ c
] >= level
)
2905 acp
[4 * r
+ c
] = NULL
;
2908 if (inst
->op
== OPCODE_ENDIF
)
2913 /* Continuing the block, clear any written channels from
2916 if (inst
->dst
.file
== PROGRAM_TEMPORARY
&& inst
->dst
.reladdr
) {
2917 /* Any temporary might be written, so no copy propagation
2918 * across this instruction.
2920 memset(acp
, 0, sizeof(*acp
) * this->next_temp
* 4);
2921 } else if (inst
->dst
.file
== PROGRAM_OUTPUT
&&
2922 inst
->dst
.reladdr
) {
2923 /* Any output might be written, so no copy propagation
2924 * from outputs across this instruction.
2926 for (int r
= 0; r
< this->next_temp
; r
++) {
2927 for (int c
= 0; c
< 4; c
++) {
2928 if (!acp
[4 * r
+ c
])
2931 if (acp
[4 * r
+ c
]->src
[0].file
== PROGRAM_OUTPUT
)
2932 acp
[4 * r
+ c
] = NULL
;
2935 } else if (inst
->dst
.file
== PROGRAM_TEMPORARY
||
2936 inst
->dst
.file
== PROGRAM_OUTPUT
) {
2937 /* Clear where it's used as dst. */
2938 if (inst
->dst
.file
== PROGRAM_TEMPORARY
) {
2939 for (int c
= 0; c
< 4; c
++) {
2940 if (inst
->dst
.writemask
& (1 << c
)) {
2941 acp
[4 * inst
->dst
.index
+ c
] = NULL
;
2946 /* Clear where it's used as src. */
2947 for (int r
= 0; r
< this->next_temp
; r
++) {
2948 for (int c
= 0; c
< 4; c
++) {
2949 if (!acp
[4 * r
+ c
])
2952 int src_chan
= GET_SWZ(acp
[4 * r
+ c
]->src
[0].swizzle
, c
);
2954 if (acp
[4 * r
+ c
]->src
[0].file
== inst
->dst
.file
&&
2955 acp
[4 * r
+ c
]->src
[0].index
== inst
->dst
.index
&&
2956 inst
->dst
.writemask
& (1 << src_chan
))
2958 acp
[4 * r
+ c
] = NULL
;
2966 /* If this is a copy, add it to the ACP. */
2967 if (inst
->op
== OPCODE_MOV
&&
2968 inst
->dst
.file
== PROGRAM_TEMPORARY
&&
2969 !inst
->dst
.reladdr
&&
2971 !inst
->src
[0].reladdr
&&
2972 !inst
->src
[0].negate
) {
2973 for (int i
= 0; i
< 4; i
++) {
2974 if (inst
->dst
.writemask
& (1 << i
)) {
2975 acp
[4 * inst
->dst
.index
+ i
] = inst
;
2976 acp_level
[4 * inst
->dst
.index
+ i
] = level
;
2982 ralloc_free(acp_level
);
2988 * Convert a shader's GLSL IR into a Mesa gl_program.
2990 static struct gl_program
*
2991 get_mesa_program(struct gl_context
*ctx
,
2992 struct gl_shader_program
*shader_program
,
2993 struct gl_shader
*shader
)
2995 ir_to_mesa_visitor v
;
2996 struct prog_instruction
*mesa_instructions
, *mesa_inst
;
2997 ir_instruction
**mesa_instruction_annotation
;
2999 struct gl_program
*prog
;
3001 const char *target_string
;
3003 struct gl_shader_compiler_options
*options
=
3004 &ctx
->ShaderCompilerOptions
[_mesa_shader_type_to_index(shader
->Type
)];
3006 switch (shader
->Type
) {
3007 case GL_VERTEX_SHADER
:
3008 target
= GL_VERTEX_PROGRAM_ARB
;
3009 target_string
= "vertex";
3011 case GL_FRAGMENT_SHADER
:
3012 target
= GL_FRAGMENT_PROGRAM_ARB
;
3013 target_string
= "fragment";
3015 case GL_GEOMETRY_SHADER
:
3016 target
= GL_GEOMETRY_PROGRAM_NV
;
3017 target_string
= "geometry";
3020 assert(!"should not be reached");
3024 validate_ir_tree(shader
->ir
);
3026 prog
= ctx
->Driver
.NewProgram(ctx
, target
, shader_program
->Name
);
3029 prog
->Parameters
= _mesa_new_parameter_list();
3030 prog
->Varying
= _mesa_new_parameter_list();
3031 prog
->Attributes
= _mesa_new_parameter_list();
3034 v
.shader_program
= shader_program
;
3035 v
.options
= options
;
3037 add_uniforms_to_parameters_list(shader_program
, shader
, prog
);
3039 /* Emit Mesa IR for main(). */
3040 visit_exec_list(shader
->ir
, &v
);
3041 v
.emit(NULL
, OPCODE_END
);
3043 /* Now emit bodies for any functions that were used. */
3045 progress
= GL_FALSE
;
3047 foreach_iter(exec_list_iterator
, iter
, v
.function_signatures
) {
3048 function_entry
*entry
= (function_entry
*)iter
.get();
3050 if (!entry
->bgn_inst
) {
3051 v
.current_function
= entry
;
3053 entry
->bgn_inst
= v
.emit(NULL
, OPCODE_BGNSUB
);
3054 entry
->bgn_inst
->function
= entry
;
3056 visit_exec_list(&entry
->sig
->body
, &v
);
3058 ir_to_mesa_instruction
*last
;
3059 last
= (ir_to_mesa_instruction
*)v
.instructions
.get_tail();
3060 if (last
->op
!= OPCODE_RET
)
3061 v
.emit(NULL
, OPCODE_RET
);
3063 ir_to_mesa_instruction
*end
;
3064 end
= v
.emit(NULL
, OPCODE_ENDSUB
);
3065 end
->function
= entry
;
3072 prog
->NumTemporaries
= v
.next_temp
;
3074 int num_instructions
= 0;
3075 foreach_iter(exec_list_iterator
, iter
, v
.instructions
) {
3080 (struct prog_instruction
*)calloc(num_instructions
,
3081 sizeof(*mesa_instructions
));
3082 mesa_instruction_annotation
= ralloc_array(v
.mem_ctx
, ir_instruction
*,
3087 /* Convert ir_mesa_instructions into prog_instructions.
3089 mesa_inst
= mesa_instructions
;
3091 foreach_iter(exec_list_iterator
, iter
, v
.instructions
) {
3092 const ir_to_mesa_instruction
*inst
= (ir_to_mesa_instruction
*)iter
.get();
3094 mesa_inst
->Opcode
= inst
->op
;
3095 mesa_inst
->CondUpdate
= inst
->cond_update
;
3097 mesa_inst
->SaturateMode
= SATURATE_ZERO_ONE
;
3098 mesa_inst
->DstReg
.File
= inst
->dst
.file
;
3099 mesa_inst
->DstReg
.Index
= inst
->dst
.index
;
3100 mesa_inst
->DstReg
.CondMask
= inst
->dst
.cond_mask
;
3101 mesa_inst
->DstReg
.WriteMask
= inst
->dst
.writemask
;
3102 mesa_inst
->DstReg
.RelAddr
= inst
->dst
.reladdr
!= NULL
;
3103 mesa_inst
->SrcReg
[0] = mesa_src_reg_from_ir_src_reg(inst
->src
[0]);
3104 mesa_inst
->SrcReg
[1] = mesa_src_reg_from_ir_src_reg(inst
->src
[1]);
3105 mesa_inst
->SrcReg
[2] = mesa_src_reg_from_ir_src_reg(inst
->src
[2]);
3106 mesa_inst
->TexSrcUnit
= inst
->sampler
;
3107 mesa_inst
->TexSrcTarget
= inst
->tex_target
;
3108 mesa_inst
->TexShadow
= inst
->tex_shadow
;
3109 mesa_instruction_annotation
[i
] = inst
->ir
;
3111 /* Set IndirectRegisterFiles. */
3112 if (mesa_inst
->DstReg
.RelAddr
)
3113 prog
->IndirectRegisterFiles
|= 1 << mesa_inst
->DstReg
.File
;
3115 /* Update program's bitmask of indirectly accessed register files */
3116 for (unsigned src
= 0; src
< 3; src
++)
3117 if (mesa_inst
->SrcReg
[src
].RelAddr
)
3118 prog
->IndirectRegisterFiles
|= 1 << mesa_inst
->SrcReg
[src
].File
;
3120 switch (mesa_inst
->Opcode
) {
3122 if (options
->EmitNoIfs
) {
3123 linker_warning(shader_program
,
3124 "Couldn't flatten if-statement. "
3125 "This will likely result in software "
3126 "rasterization.\n");
3129 case OPCODE_BGNLOOP
:
3130 if (options
->EmitNoLoops
) {
3131 linker_warning(shader_program
,
3132 "Couldn't unroll loop. "
3133 "This will likely result in software "
3134 "rasterization.\n");
3138 if (options
->EmitNoCont
) {
3139 linker_warning(shader_program
,
3140 "Couldn't lower continue-statement. "
3141 "This will likely result in software "
3142 "rasterization.\n");
3146 inst
->function
->inst
= i
;
3147 mesa_inst
->Comment
= strdup(inst
->function
->sig
->function_name());
3150 mesa_inst
->Comment
= strdup(inst
->function
->sig
->function_name());
3153 mesa_inst
->BranchTarget
= inst
->function
->sig_id
; /* rewritten later */
3156 prog
->NumAddressRegs
= 1;
3165 if (!shader_program
->LinkStatus
)
3169 if (!shader_program
->LinkStatus
) {
3170 free(mesa_instructions
);
3171 _mesa_reference_program(ctx
, &shader
->Program
, NULL
);
3175 set_branchtargets(&v
, mesa_instructions
, num_instructions
);
3177 if (ctx
->Shader
.Flags
& GLSL_DUMP
) {
3179 printf("GLSL IR for linked %s program %d:\n", target_string
,
3180 shader_program
->Name
);
3181 _mesa_print_ir(shader
->ir
, NULL
);
3184 printf("Mesa IR for linked %s program %d:\n", target_string
,
3185 shader_program
->Name
);
3186 print_program(mesa_instructions
, mesa_instruction_annotation
,
3190 prog
->Instructions
= mesa_instructions
;
3191 prog
->NumInstructions
= num_instructions
;
3193 do_set_program_inouts(shader
->ir
, prog
);
3194 count_resources(prog
);
3196 check_resources(ctx
, shader_program
, prog
);
3198 _mesa_reference_program(ctx
, &shader
->Program
, prog
);
3200 if ((ctx
->Shader
.Flags
& GLSL_NO_OPT
) == 0) {
3201 _mesa_optimize_program(ctx
, prog
);
3211 * Called via ctx->Driver.LinkShader()
3212 * This actually involves converting GLSL IR into Mesa gl_programs with
3213 * code lowering and other optimizations.
3216 _mesa_ir_link_shader(struct gl_context
*ctx
, struct gl_shader_program
*prog
)
3218 assert(prog
->LinkStatus
);
3220 for (unsigned i
= 0; i
< MESA_SHADER_TYPES
; i
++) {
3221 if (prog
->_LinkedShaders
[i
] == NULL
)
3225 exec_list
*ir
= prog
->_LinkedShaders
[i
]->ir
;
3226 const struct gl_shader_compiler_options
*options
=
3227 &ctx
->ShaderCompilerOptions
[_mesa_shader_type_to_index(prog
->_LinkedShaders
[i
]->Type
)];
3233 do_mat_op_to_vec(ir
);
3234 lower_instructions(ir
, (MOD_TO_FRACT
| DIV_TO_MUL_RCP
| EXP_TO_EXP2
3235 | LOG_TO_LOG2
| INT_DIV_TO_MUL_RCP
3236 | ((options
->EmitNoPow
) ? POW_TO_EXP2
: 0)));
3238 progress
= do_lower_jumps(ir
, true, true, options
->EmitNoMainReturn
, options
->EmitNoCont
, options
->EmitNoLoops
) || progress
;
3240 progress
= do_common_optimization(ir
, true, options
->MaxUnrollIterations
) || progress
;
3242 progress
= lower_quadop_vector(ir
, true) || progress
;
3244 if (options
->EmitNoIfs
) {
3245 progress
= lower_discard(ir
) || progress
;
3246 progress
= lower_if_to_cond_assign(ir
) || progress
;
3249 if (options
->EmitNoNoise
)
3250 progress
= lower_noise(ir
) || progress
;
3252 /* If there are forms of indirect addressing that the driver
3253 * cannot handle, perform the lowering pass.
3255 if (options
->EmitNoIndirectInput
|| options
->EmitNoIndirectOutput
3256 || options
->EmitNoIndirectTemp
|| options
->EmitNoIndirectUniform
)
3258 lower_variable_index_to_cond_assign(ir
,
3259 options
->EmitNoIndirectInput
,
3260 options
->EmitNoIndirectOutput
,
3261 options
->EmitNoIndirectTemp
,
3262 options
->EmitNoIndirectUniform
)
3265 progress
= do_vec_index_to_cond_assign(ir
) || progress
;
3268 validate_ir_tree(ir
);
3271 for (unsigned i
= 0; i
< MESA_SHADER_TYPES
; i
++) {
3272 struct gl_program
*linked_prog
;
3274 if (prog
->_LinkedShaders
[i
] == NULL
)
3277 linked_prog
= get_mesa_program(ctx
, prog
, prog
->_LinkedShaders
[i
]);
3282 switch (prog
->_LinkedShaders
[i
]->Type
) {
3283 case GL_VERTEX_SHADER
:
3284 _mesa_reference_vertprog(ctx
, &prog
->VertexProgram
,
3285 (struct gl_vertex_program
*)linked_prog
);
3286 ok
= ctx
->Driver
.ProgramStringNotify(ctx
, GL_VERTEX_PROGRAM_ARB
,
3289 case GL_FRAGMENT_SHADER
:
3290 _mesa_reference_fragprog(ctx
, &prog
->FragmentProgram
,
3291 (struct gl_fragment_program
*)linked_prog
);
3292 ok
= ctx
->Driver
.ProgramStringNotify(ctx
, GL_FRAGMENT_PROGRAM_ARB
,
3295 case GL_GEOMETRY_SHADER
:
3296 _mesa_reference_geomprog(ctx
, &prog
->GeometryProgram
,
3297 (struct gl_geometry_program
*)linked_prog
);
3298 ok
= ctx
->Driver
.ProgramStringNotify(ctx
, GL_GEOMETRY_PROGRAM_NV
,
3307 _mesa_reference_program(ctx
, &linked_prog
, NULL
);
3315 * Compile a GLSL shader. Called via glCompileShader().
3318 _mesa_glsl_compile_shader(struct gl_context
*ctx
, struct gl_shader
*shader
)
3320 struct _mesa_glsl_parse_state
*state
=
3321 new(shader
) _mesa_glsl_parse_state(ctx
, shader
->Type
, shader
);
3323 const char *source
= shader
->Source
;
3324 /* Check if the user called glCompileShader without first calling
3325 * glShaderSource. This should fail to compile, but not raise a GL_ERROR.
3327 if (source
== NULL
) {
3328 shader
->CompileStatus
= GL_FALSE
;
3332 state
->error
= preprocess(state
, &source
, &state
->info_log
,
3333 &ctx
->Extensions
, ctx
->API
);
3335 if (ctx
->Shader
.Flags
& GLSL_DUMP
) {
3336 printf("GLSL source for %s shader %d:\n",
3337 _mesa_glsl_shader_target_name(state
->target
), shader
->Name
);
3338 printf("%s\n", shader
->Source
);
3341 if (!state
->error
) {
3342 _mesa_glsl_lexer_ctor(state
, source
);
3343 _mesa_glsl_parse(state
);
3344 _mesa_glsl_lexer_dtor(state
);
3347 ralloc_free(shader
->ir
);
3348 shader
->ir
= new(shader
) exec_list
;
3349 if (!state
->error
&& !state
->translation_unit
.is_empty())
3350 _mesa_ast_to_hir(shader
->ir
, state
);
3352 if (!state
->error
&& !shader
->ir
->is_empty()) {
3353 validate_ir_tree(shader
->ir
);
3355 /* Do some optimization at compile time to reduce shader IR size
3356 * and reduce later work if the same shader is linked multiple times
3358 while (do_common_optimization(shader
->ir
, false, 32))
3361 validate_ir_tree(shader
->ir
);
3364 shader
->symbols
= state
->symbols
;
3366 shader
->CompileStatus
= !state
->error
;
3367 shader
->InfoLog
= state
->info_log
;
3368 shader
->Version
= state
->language_version
;
3369 memcpy(shader
->builtins_to_link
, state
->builtins_to_link
,
3370 sizeof(shader
->builtins_to_link
[0]) * state
->num_builtins_to_link
);
3371 shader
->num_builtins_to_link
= state
->num_builtins_to_link
;
3373 if (ctx
->Shader
.Flags
& GLSL_LOG
) {
3374 _mesa_write_shader_to_file(shader
);
3377 if (ctx
->Shader
.Flags
& GLSL_DUMP
) {
3378 if (shader
->CompileStatus
) {
3379 printf("GLSL IR for shader %d:\n", shader
->Name
);
3380 _mesa_print_ir(shader
->ir
, NULL
);
3383 printf("GLSL shader %d failed to compile.\n", shader
->Name
);
3385 if (shader
->InfoLog
&& shader
->InfoLog
[0] != 0) {
3386 printf("GLSL shader %d info log:\n", shader
->Name
);
3387 printf("%s\n", shader
->InfoLog
);
3391 /* Retain any live IR, but trash the rest. */
3392 reparent_ir(shader
->ir
, shader
->ir
);
3399 * Link a GLSL shader program. Called via glLinkProgram().
3402 _mesa_glsl_link_shader(struct gl_context
*ctx
, struct gl_shader_program
*prog
)
3406 _mesa_clear_shader_program_data(ctx
, prog
);
3408 prog
->LinkStatus
= GL_TRUE
;
3410 for (i
= 0; i
< prog
->NumShaders
; i
++) {
3411 if (!prog
->Shaders
[i
]->CompileStatus
) {
3412 linker_error(prog
, "linking with uncompiled shader");
3413 prog
->LinkStatus
= GL_FALSE
;
3417 prog
->Varying
= _mesa_new_parameter_list();
3418 _mesa_reference_vertprog(ctx
, &prog
->VertexProgram
, NULL
);
3419 _mesa_reference_fragprog(ctx
, &prog
->FragmentProgram
, NULL
);
3420 _mesa_reference_geomprog(ctx
, &prog
->GeometryProgram
, NULL
);
3422 if (prog
->LinkStatus
) {
3423 link_shaders(ctx
, prog
);
3426 if (prog
->LinkStatus
) {
3427 if (!ctx
->Driver
.LinkShader(ctx
, prog
)) {
3428 prog
->LinkStatus
= GL_FALSE
;
3432 set_uniform_initializers(ctx
, prog
);
3434 if (ctx
->Shader
.Flags
& GLSL_DUMP
) {
3435 if (!prog
->LinkStatus
) {
3436 printf("GLSL shader program %d failed to link\n", prog
->Name
);
3439 if (prog
->InfoLog
&& prog
->InfoLog
[0] != 0) {
3440 printf("GLSL shader program %d info log:\n", prog
->Name
);
3441 printf("%s\n", prog
->InfoLog
);