2 * Mesa 3-D graphics library
4 * Copyright (C) 2005-2008 Brian Paul All Rights Reserved.
5 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included
15 * in all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
18 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * BRIAN PAUL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
21 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 * Emit program instructions (PI code) from IR trees.
34 *** To emit GPU instructions, we basically just do an in-order traversal
39 #include "main/imports.h"
40 #include "main/context.h"
41 #include "main/macros.h"
42 #include "shader/program.h"
43 #include "shader/prog_instruction.h"
44 #include "shader/prog_parameter.h"
45 #include "shader/prog_print.h"
46 #include "slang_builtin.h"
47 #include "slang_emit.h"
48 #include "slang_mem.h"
51 #define PEEPHOLE_OPTIMIZATIONS 1
59 struct gl_program
*prog
;
60 struct gl_program
**Subroutines
;
61 GLuint NumSubroutines
;
63 GLuint MaxInstructions
; /**< size of prog->Instructions[] buffer */
65 GLboolean UnresolvedFunctions
;
67 /* code-gen options */
68 GLboolean EmitHighLevelInstructions
;
69 GLboolean EmitCondCodes
;
70 GLboolean EmitComments
;
71 GLboolean EmitBeginEndSub
; /* XXX TEMPORARY */
76 static struct gl_program
*
77 new_subroutine(slang_emit_info
*emitInfo
, GLuint
*id
)
79 GET_CURRENT_CONTEXT(ctx
);
80 const GLuint n
= emitInfo
->NumSubroutines
;
82 emitInfo
->Subroutines
= (struct gl_program
**)
83 _mesa_realloc(emitInfo
->Subroutines
,
84 n
* sizeof(struct gl_program
),
85 (n
+ 1) * sizeof(struct gl_program
));
86 emitInfo
->Subroutines
[n
] = ctx
->Driver
.NewProgram(ctx
, emitInfo
->prog
->Target
, 0);
87 emitInfo
->Subroutines
[n
]->Parameters
= emitInfo
->prog
->Parameters
;
88 emitInfo
->NumSubroutines
++;
90 return emitInfo
->Subroutines
[n
];
95 * Convert a writemask to a swizzle. Used for testing cond codes because
96 * we only want to test the cond code component(s) that was set by the
97 * previous instruction.
100 writemask_to_swizzle(GLuint writemask
)
102 if (writemask
== WRITEMASK_X
)
104 if (writemask
== WRITEMASK_Y
)
106 if (writemask
== WRITEMASK_Z
)
108 if (writemask
== WRITEMASK_W
)
110 return SWIZZLE_XYZW
; /* shouldn't be hit */
115 * Convert a swizzle mask to a writemask.
116 * Note that the slang_ir_storage->Swizzle field can represent either a
117 * swizzle mask or a writemask, depending on how it's used. For example,
118 * when we parse "direction.yz" alone, we don't know whether .yz is a
119 * writemask or a swizzle. In this case, we encode ".yz" in store->Swizzle
120 * as a swizzle mask (.yz?? actually). Later, if direction.yz is used as
121 * an R-value, we use store->Swizzle as-is. Otherwise, if direction.yz is
122 * used as an L-value, we convert it to a writemask.
125 swizzle_to_writemask(GLuint swizzle
)
127 GLuint i
, writemask
= 0x0;
128 for (i
= 0; i
< 4; i
++) {
129 GLuint swz
= GET_SWZ(swizzle
, i
);
130 if (swz
<= SWIZZLE_W
) {
131 writemask
|= (1 << swz
);
139 * Swizzle a swizzle (function composition).
140 * That is, return swz2(swz1), or said another way: swz1.szw2
141 * Example: swizzle_swizzle(".zwxx", ".xxyw") yields ".zzwx"
144 _slang_swizzle_swizzle(GLuint swz1
, GLuint swz2
)
147 for (i
= 0; i
< 4; i
++) {
148 GLuint c
= GET_SWZ(swz2
, i
);
150 s
[i
] = GET_SWZ(swz1
, c
);
154 swz
= MAKE_SWIZZLE4(s
[0], s
[1], s
[2], s
[3]);
160 * Return the default swizzle mask for accessing a variable of the
161 * given size (in floats). If size = 1, comp is used to identify
162 * which component [0..3] of the register holds the variable.
165 _slang_var_swizzle(GLint size
, GLint comp
)
169 return MAKE_SWIZZLE4(comp
, SWIZZLE_NIL
, SWIZZLE_NIL
, SWIZZLE_NIL
);
171 return MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_NIL
, SWIZZLE_NIL
);
173 return MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_NIL
);
182 * Allocate storage for the given node (if it hasn't already been allocated).
184 * Typically this is temporary storage for an intermediate result (such as
185 * for a multiply or add, etc).
187 * If n->Store does not exist it will be created and will be of the size
188 * specified by defaultSize.
191 alloc_node_storage(slang_emit_info
*emitInfo
, slang_ir_node
*n
,
196 assert(defaultSize
> 0);
197 n
->Store
= _slang_new_ir_storage(PROGRAM_TEMPORARY
, -1, defaultSize
);
200 /* now allocate actual register(s). I.e. set n->Store->Index >= 0 */
201 if (n
->Store
->Index
< 0) {
202 if (!_slang_alloc_temp(emitInfo
->vt
, n
->Store
)) {
203 slang_info_log_error(emitInfo
->log
,
204 "Ran out of registers, too many temporaries");
205 _slang_free(n
->Store
);
215 * Free temporary storage, if n->Store is, in fact, temp storage.
219 free_node_storage(slang_var_table
*vt
, slang_ir_node
*n
)
221 if (n
->Store
->File
== PROGRAM_TEMPORARY
&&
222 n
->Store
->Index
>= 0 &&
223 n
->Opcode
!= IR_SWIZZLE
) {
224 if (_slang_is_temp(vt
, n
->Store
)) {
225 _slang_free_temp(vt
, n
->Store
);
226 n
->Store
->Index
= -1;
227 n
->Store
= NULL
; /* XXX this may not be needed */
234 * Helper function to allocate a short-term temporary.
235 * Free it with _slang_free_temp().
238 alloc_local_temp(slang_emit_info
*emitInfo
, slang_ir_storage
*temp
, GLint size
)
242 _mesa_bzero(temp
, sizeof(*temp
));
244 temp
->File
= PROGRAM_TEMPORARY
;
246 return _slang_alloc_temp(emitInfo
->vt
, temp
);
251 * Remove any SWIZZLE_NIL terms from given swizzle mask.
252 * For a swizzle like .z??? generate .zzzz (replicate single component).
253 * Else, for .wx?? generate .wxzw (insert default component for the position).
256 fix_swizzle(GLuint swizzle
)
258 GLuint c0
= GET_SWZ(swizzle
, 0),
259 c1
= GET_SWZ(swizzle
, 1),
260 c2
= GET_SWZ(swizzle
, 2),
261 c3
= GET_SWZ(swizzle
, 3);
262 if (c1
== SWIZZLE_NIL
&& c2
== SWIZZLE_NIL
&& c3
== SWIZZLE_NIL
) {
263 /* smear first component across all positions */
267 /* insert default swizzle components */
268 if (c0
== SWIZZLE_NIL
)
270 if (c1
== SWIZZLE_NIL
)
272 if (c2
== SWIZZLE_NIL
)
274 if (c3
== SWIZZLE_NIL
)
277 return MAKE_SWIZZLE4(c0
, c1
, c2
, c3
);
283 * Convert IR storage to an instruction dst register.
286 storage_to_dst_reg(struct prog_dst_register
*dst
, const slang_ir_storage
*st
)
288 const GLboolean relAddr
= st
->RelAddr
;
289 const GLint size
= st
->Size
;
290 GLint index
= st
->Index
;
291 GLuint swizzle
= st
->Swizzle
;
294 /* if this is storage relative to some parent storage, walk up the tree */
297 assert(st
->Index
>= 0);
299 swizzle
= _slang_swizzle_swizzle(st
->Swizzle
, swizzle
);
302 assert(st
->File
!= PROGRAM_UNDEFINED
);
303 dst
->File
= st
->File
;
311 if (swizzle
!= SWIZZLE_XYZW
) {
312 dst
->WriteMask
= swizzle_to_writemask(swizzle
);
317 dst
->WriteMask
= WRITEMASK_X
<< GET_SWZ(st
->Swizzle
, 0);
320 dst
->WriteMask
= WRITEMASK_XY
;
323 dst
->WriteMask
= WRITEMASK_XYZ
;
326 dst
->WriteMask
= WRITEMASK_XYZW
;
329 ; /* error would have been caught above */
333 dst
->RelAddr
= relAddr
;
338 * Convert IR storage to an instruction src register.
341 storage_to_src_reg(struct prog_src_register
*src
, const slang_ir_storage
*st
)
343 const GLboolean relAddr
= st
->RelAddr
;
344 GLint index
= st
->Index
;
345 GLuint swizzle
= st
->Swizzle
;
347 /* if this is storage relative to some parent storage, walk up the tree */
352 /* an error should have been reported already */
355 assert(st
->Index
>= 0);
357 swizzle
= _slang_swizzle_swizzle(fix_swizzle(st
->Swizzle
), swizzle
);
360 assert(st
->File
>= 0);
361 #if 1 /* XXX temporary */
362 if (st
->File
== PROGRAM_UNDEFINED
) {
363 slang_ir_storage
*st0
= (slang_ir_storage
*) st
;
364 st0
->File
= PROGRAM_TEMPORARY
;
367 assert(st
->File
< PROGRAM_UNDEFINED
);
368 src
->File
= st
->File
;
373 swizzle
= fix_swizzle(swizzle
);
374 assert(GET_SWZ(swizzle
, 0) <= SWIZZLE_W
);
375 assert(GET_SWZ(swizzle
, 1) <= SWIZZLE_W
);
376 assert(GET_SWZ(swizzle
, 2) <= SWIZZLE_W
);
377 assert(GET_SWZ(swizzle
, 3) <= SWIZZLE_W
);
378 src
->Swizzle
= swizzle
;
380 src
->RelAddr
= relAddr
;
385 * Setup storage pointing to a scalar constant/literal.
388 constant_to_storage(slang_emit_info
*emitInfo
,
390 slang_ir_storage
*store
)
397 reg
= _mesa_add_unnamed_constant(emitInfo
->prog
->Parameters
,
400 memset(store
, 0, sizeof(*store
));
401 store
->File
= PROGRAM_CONSTANT
;
403 store
->Swizzle
= swizzle
;
408 * Add new instruction at end of given program.
409 * \param prog the program to append instruction onto
410 * \param opcode opcode for the new instruction
411 * \return pointer to the new instruction
413 static struct prog_instruction
*
414 new_instruction(slang_emit_info
*emitInfo
, gl_inst_opcode opcode
)
416 struct gl_program
*prog
= emitInfo
->prog
;
417 struct prog_instruction
*inst
;
420 /* print prev inst */
421 if (prog
->NumInstructions
> 0) {
422 _mesa_print_instruction(prog
->Instructions
+ prog
->NumInstructions
- 1);
425 assert(prog
->NumInstructions
<= emitInfo
->MaxInstructions
);
427 if (prog
->NumInstructions
== emitInfo
->MaxInstructions
) {
428 /* grow the instruction buffer */
429 emitInfo
->MaxInstructions
+= 20;
431 _mesa_realloc_instructions(prog
->Instructions
,
432 prog
->NumInstructions
,
433 emitInfo
->MaxInstructions
);
436 inst
= prog
->Instructions
+ prog
->NumInstructions
;
437 prog
->NumInstructions
++;
438 _mesa_init_instructions(inst
, 1);
439 inst
->Opcode
= opcode
;
440 inst
->BranchTarget
= -1; /* invalid */
442 printf("New inst %d: %p %s\n", prog->NumInstructions-1,(void*)inst,
443 _mesa_opcode_string(inst->Opcode));
449 static struct prog_instruction
*
450 emit_arl_load(slang_emit_info
*emitInfo
,
451 gl_register_file file
, GLint index
, GLuint swizzle
)
453 struct prog_instruction
*inst
= new_instruction(emitInfo
, OPCODE_ARL
);
454 inst
->SrcReg
[0].File
= file
;
455 inst
->SrcReg
[0].Index
= index
;
456 inst
->SrcReg
[0].Swizzle
= fix_swizzle(swizzle
);
457 inst
->DstReg
.File
= PROGRAM_ADDRESS
;
458 inst
->DstReg
.Index
= 0;
459 inst
->DstReg
.WriteMask
= WRITEMASK_X
;
465 * Emit a new instruction with given opcode, operands.
466 * At this point the instruction may have multiple indirect register
467 * loads/stores. We convert those into ARL loads and address-relative
468 * operands. See comments inside.
469 * At some point in the future we could directly emit indirectly addressed
470 * registers in Mesa GPU instructions.
472 static struct prog_instruction
*
473 emit_instruction(slang_emit_info
*emitInfo
,
474 gl_inst_opcode opcode
,
475 const slang_ir_storage
*dst
,
476 const slang_ir_storage
*src0
,
477 const slang_ir_storage
*src1
,
478 const slang_ir_storage
*src2
)
480 struct prog_instruction
*inst
;
481 GLuint numIndirect
= 0;
482 const slang_ir_storage
*src
[3];
483 slang_ir_storage newSrc
[3], newDst
;
487 isTemp
[0] = isTemp
[1] = isTemp
[2] = GL_FALSE
;
493 /* count up how many operands are indirect loads */
494 for (i
= 0; i
< 3; i
++) {
495 if (src
[i
] && src
[i
]->IsIndirect
)
498 if (dst
&& dst
->IsIndirect
)
501 /* Take special steps for indirect register loads.
502 * If we had multiple address registers this would be simpler.
503 * For example, this GLSL code:
504 * x[i] = y[j] + z[k];
505 * would translate into something like:
509 * ADD TEMP[ADDR.x+5], TEMP[ADDR.y+9], TEMP[ADDR.z+4];
510 * But since we currently only have one address register we have to do this:
512 * MOV t1, TEMP[ADDR.x+9];
514 * MOV t2, TEMP[ADDR.x+4];
516 * ADD TEMP[ADDR.x+5], t1, t2;
517 * The code here figures this out...
519 if (numIndirect
> 0) {
520 for (i
= 0; i
< 3; i
++) {
521 if (src
[i
] && src
[i
]->IsIndirect
) {
522 /* load the ARL register with the indirect register */
523 emit_arl_load(emitInfo
,
524 src
[i
]->IndirectFile
,
525 src
[i
]->IndirectIndex
,
526 src
[i
]->IndirectSwizzle
);
528 if (numIndirect
> 1) {
529 /* Need to load src[i] into a temporary register */
530 slang_ir_storage srcRelAddr
;
531 alloc_local_temp(emitInfo
, &newSrc
[i
], src
[i
]->Size
);
534 /* set RelAddr flag on src register */
535 srcRelAddr
= *src
[i
];
536 srcRelAddr
.RelAddr
= GL_TRUE
;
537 srcRelAddr
.IsIndirect
= GL_FALSE
; /* not really needed */
539 /* MOV newSrc, srcRelAddr; */
540 inst
= emit_instruction(emitInfo
,
550 /* just rewrite the src[i] storage to be ARL-relative */
552 newSrc
[i
].RelAddr
= GL_TRUE
;
553 newSrc
[i
].IsIndirect
= GL_FALSE
; /* not really needed */
560 /* Take special steps for indirect dest register write */
561 if (dst
&& dst
->IsIndirect
) {
562 /* load the ARL register with the indirect register */
563 emit_arl_load(emitInfo
,
566 dst
->IndirectSwizzle
);
568 newDst
.RelAddr
= GL_TRUE
;
569 newDst
.IsIndirect
= GL_FALSE
;
573 /* OK, emit the instruction and its dst, src regs */
574 inst
= new_instruction(emitInfo
, opcode
);
579 storage_to_dst_reg(&inst
->DstReg
, dst
);
581 for (i
= 0; i
< 3; i
++) {
583 storage_to_src_reg(&inst
->SrcReg
[i
], src
[i
]);
586 /* Free any temp registers that we allocated above */
587 for (i
= 0; i
< 3; i
++) {
589 _slang_free_temp(emitInfo
->vt
, &newSrc
[i
]);
598 * Put a comment on the given instruction.
601 inst_comment(struct prog_instruction
*inst
, const char *comment
)
604 inst
->Comment
= _mesa_strdup(comment
);
610 * Return pointer to last instruction in program.
612 static struct prog_instruction
*
613 prev_instruction(slang_emit_info
*emitInfo
)
615 struct gl_program
*prog
= emitInfo
->prog
;
616 if (prog
->NumInstructions
== 0)
619 return prog
->Instructions
+ prog
->NumInstructions
- 1;
623 static struct prog_instruction
*
624 emit(slang_emit_info
*emitInfo
, slang_ir_node
*n
);
628 * Return an annotation string for given node's storage.
631 storage_annotation(const slang_ir_node
*n
, const struct gl_program
*prog
)
634 const slang_ir_storage
*st
= n
->Store
;
635 static char s
[100] = "";
638 return _mesa_strdup("");
641 case PROGRAM_CONSTANT
:
642 if (st
->Index
>= 0) {
643 const GLfloat
*val
= prog
->Parameters
->ParameterValues
[st
->Index
];
644 if (st
->Swizzle
== SWIZZLE_NOOP
)
645 sprintf(s
, "{%g, %g, %g, %g}", val
[0], val
[1], val
[2], val
[3]);
647 sprintf(s
, "%g", val
[GET_SWZ(st
->Swizzle
, 0)]);
651 case PROGRAM_TEMPORARY
:
653 sprintf(s
, "%s", (char *) n
->Var
->a_name
);
655 sprintf(s
, "t[%d]", st
->Index
);
657 case PROGRAM_STATE_VAR
:
658 case PROGRAM_UNIFORM
:
659 sprintf(s
, "%s", prog
->Parameters
->Parameters
[st
->Index
].Name
);
661 case PROGRAM_VARYING
:
662 sprintf(s
, "%s", prog
->Varying
->Parameters
[st
->Index
].Name
);
665 sprintf(s
, "input[%d]", st
->Index
);
668 sprintf(s
, "output[%d]", st
->Index
);
673 return _mesa_strdup(s
);
681 * Return an annotation string for an instruction.
684 instruction_annotation(gl_inst_opcode opcode
, char *dstAnnot
,
685 char *srcAnnot0
, char *srcAnnot1
, char *srcAnnot2
)
688 const char *operator;
693 len
+= strlen(dstAnnot
);
695 dstAnnot
= _mesa_strdup("");
698 len
+= strlen(srcAnnot0
);
700 srcAnnot0
= _mesa_strdup("");
703 len
+= strlen(srcAnnot1
);
705 srcAnnot1
= _mesa_strdup("");
708 len
+= strlen(srcAnnot2
);
710 srcAnnot2
= _mesa_strdup("");
744 s
= (char *) malloc(len
);
745 sprintf(s
, "%s = %s %s %s %s", dstAnnot
,
746 srcAnnot0
, operator, srcAnnot1
, srcAnnot2
);
747 assert(_mesa_strlen(s
) < len
);
762 * Emit an instruction that's just a comment.
764 static struct prog_instruction
*
765 emit_comment(slang_emit_info
*emitInfo
, const char *comment
)
767 struct prog_instruction
*inst
= new_instruction(emitInfo
, OPCODE_NOP
);
768 inst_comment(inst
, comment
);
774 * Generate code for a simple arithmetic instruction.
775 * Either 1, 2 or 3 operands.
777 static struct prog_instruction
*
778 emit_arith(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
780 const slang_ir_info
*info
= _slang_ir_info(n
->Opcode
);
781 struct prog_instruction
*inst
;
785 assert(info
->InstOpcode
!= OPCODE_NOP
);
787 #if PEEPHOLE_OPTIMIZATIONS
788 /* Look for MAD opportunity */
789 if (info
->NumParams
== 2 &&
790 n
->Opcode
== IR_ADD
&& n
->Children
[0]->Opcode
== IR_MUL
) {
791 /* found pattern IR_ADD(IR_MUL(A, B), C) */
792 emit(emitInfo
, n
->Children
[0]->Children
[0]); /* A */
793 emit(emitInfo
, n
->Children
[0]->Children
[1]); /* B */
794 emit(emitInfo
, n
->Children
[1]); /* C */
795 alloc_node_storage(emitInfo
, n
, -1); /* dest */
797 inst
= emit_instruction(emitInfo
,
800 n
->Children
[0]->Children
[0]->Store
,
801 n
->Children
[0]->Children
[1]->Store
,
802 n
->Children
[1]->Store
);
804 free_node_storage(emitInfo
->vt
, n
->Children
[0]->Children
[0]);
805 free_node_storage(emitInfo
->vt
, n
->Children
[0]->Children
[1]);
806 free_node_storage(emitInfo
->vt
, n
->Children
[1]);
810 if (info
->NumParams
== 2 &&
811 n
->Opcode
== IR_ADD
&& n
->Children
[1]->Opcode
== IR_MUL
) {
812 /* found pattern IR_ADD(A, IR_MUL(B, C)) */
813 emit(emitInfo
, n
->Children
[0]); /* A */
814 emit(emitInfo
, n
->Children
[1]->Children
[0]); /* B */
815 emit(emitInfo
, n
->Children
[1]->Children
[1]); /* C */
816 alloc_node_storage(emitInfo
, n
, -1); /* dest */
818 inst
= emit_instruction(emitInfo
,
821 n
->Children
[1]->Children
[0]->Store
,
822 n
->Children
[1]->Children
[1]->Store
,
823 n
->Children
[0]->Store
);
825 free_node_storage(emitInfo
->vt
, n
->Children
[1]->Children
[0]);
826 free_node_storage(emitInfo
->vt
, n
->Children
[1]->Children
[1]);
827 free_node_storage(emitInfo
->vt
, n
->Children
[0]);
832 /* gen code for children, may involve temp allocation */
833 for (i
= 0; i
< info
->NumParams
; i
++) {
834 emit(emitInfo
, n
->Children
[i
]);
835 if (!n
->Children
[i
] || !n
->Children
[i
]->Store
) {
842 alloc_node_storage(emitInfo
, n
, -1);
844 inst
= emit_instruction(emitInfo
,
847 (info
->NumParams
> 0 ? n
->Children
[0]->Store
: NULL
),
848 (info
->NumParams
> 1 ? n
->Children
[1]->Store
: NULL
),
849 (info
->NumParams
> 2 ? n
->Children
[2]->Store
: NULL
)
853 for (i
= 0; i
< info
->NumParams
; i
++)
854 free_node_storage(emitInfo
->vt
, n
->Children
[i
]);
861 * Emit code for == and != operators. These could normally be handled
862 * by emit_arith() except we need to be able to handle structure comparisons.
864 static struct prog_instruction
*
865 emit_compare(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
867 struct prog_instruction
*inst
= NULL
;
870 assert(n
->Opcode
== IR_EQUAL
|| n
->Opcode
== IR_NOTEQUAL
);
872 /* gen code for children */
873 emit(emitInfo
, n
->Children
[0]);
874 emit(emitInfo
, n
->Children
[1]);
876 if (n
->Children
[0]->Store
->Size
!= n
->Children
[1]->Store
->Size
) {
877 /* XXX this error should have been caught in slang_codegen.c */
878 slang_info_log_error(emitInfo
->log
, "invalid operands to == or !=");
883 /* final result is 1 bool */
884 if (!alloc_node_storage(emitInfo
, n
, 1))
887 size
= n
->Children
[0]->Store
->Size
;
890 gl_inst_opcode opcode
= n
->Opcode
== IR_EQUAL
? OPCODE_SEQ
: OPCODE_SNE
;
891 inst
= emit_instruction(emitInfo
,
894 n
->Children
[0]->Store
,
895 n
->Children
[1]->Store
,
898 else if (size
<= 4) {
899 /* compare two vectors.
900 * Unfortunately, there's no instruction to compare vectors and
901 * return a scalar result. Do it with some compare and dot product
905 gl_inst_opcode dotOp
;
906 slang_ir_storage tempStore
;
908 if (!alloc_local_temp(emitInfo
, &tempStore
, 4)) {
916 swizzle
= SWIZZLE_XYZW
;
918 else if (size
== 3) {
920 swizzle
= SWIZZLE_XYZW
;
924 dotOp
= OPCODE_DP3
; /* XXX use OPCODE_DP2 eventually */
925 swizzle
= MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Y
, SWIZZLE_Y
);
928 /* Compute inequality (temp = (A != B)) */
929 inst
= emit_instruction(emitInfo
,
932 n
->Children
[0]->Store
,
933 n
->Children
[1]->Store
,
935 inst_comment(inst
, "Compare values");
937 /* Compute val = DOT(temp, temp) (reduction) */
938 inst
= emit_instruction(emitInfo
,
944 inst
->SrcReg
[0].Swizzle
= inst
->SrcReg
[1].Swizzle
= swizzle
; /*override*/
945 inst_comment(inst
, "Reduce vec to bool");
947 _slang_free_temp(emitInfo
->vt
, &tempStore
); /* free temp */
949 if (n
->Opcode
== IR_EQUAL
) {
950 /* compute val = !val.x with SEQ val, val, 0; */
951 slang_ir_storage zero
;
952 constant_to_storage(emitInfo
, 0.0, &zero
);
953 inst
= emit_instruction(emitInfo
,
959 inst_comment(inst
, "Invert true/false");
963 /* size > 4, struct or array compare.
964 * XXX this won't work reliably for structs with padding!!
966 GLint i
, num
= (n
->Children
[0]->Store
->Size
+ 3) / 4;
967 slang_ir_storage accTemp
, sneTemp
;
969 if (!alloc_local_temp(emitInfo
, &accTemp
, 4))
972 if (!alloc_local_temp(emitInfo
, &sneTemp
, 4))
975 for (i
= 0; i
< num
; i
++) {
976 slang_ir_storage srcStore0
= *n
->Children
[0]->Store
;
977 slang_ir_storage srcStore1
= *n
->Children
[1]->Store
;
978 srcStore0
.Index
+= i
;
979 srcStore1
.Index
+= i
;
982 /* SNE accTemp, left[i], right[i] */
983 inst
= emit_instruction(emitInfo
, OPCODE_SNE
,
988 inst_comment(inst
, "Begin struct/array comparison");
991 /* SNE sneTemp, left[i], right[i] */
992 inst
= emit_instruction(emitInfo
, OPCODE_SNE
,
997 /* ADD accTemp, accTemp, sneTemp; # like logical-OR */
998 inst
= emit_instruction(emitInfo
, OPCODE_ADD
,
1006 /* compute accTemp.x || accTemp.y || accTemp.z || accTemp.w with DOT4 */
1007 inst
= emit_instruction(emitInfo
, OPCODE_DP4
,
1012 inst_comment(inst
, "End struct/array comparison");
1014 if (n
->Opcode
== IR_EQUAL
) {
1015 /* compute tmp.x = !tmp.x via tmp.x = (tmp.x == 0) */
1016 slang_ir_storage zero
;
1017 constant_to_storage(emitInfo
, 0.0, &zero
);
1018 inst
= emit_instruction(emitInfo
, OPCODE_SEQ
,
1019 n
->Store
, /* dest */
1023 inst_comment(inst
, "Invert true/false");
1026 _slang_free_temp(emitInfo
->vt
, &accTemp
);
1027 _slang_free_temp(emitInfo
->vt
, &sneTemp
);
1031 free_node_storage(emitInfo
->vt
, n
->Children
[0]);
1032 free_node_storage(emitInfo
->vt
, n
->Children
[1]);
1040 * Generate code for an IR_CLAMP instruction.
1042 static struct prog_instruction
*
1043 emit_clamp(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1045 struct prog_instruction
*inst
;
1046 slang_ir_node tmpNode
;
1048 assert(n
->Opcode
== IR_CLAMP
);
1054 inst
= emit(emitInfo
, n
->Children
[0]);
1056 /* If lower limit == 0.0 and upper limit == 1.0,
1057 * set prev instruction's SaturateMode field to SATURATE_ZERO_ONE.
1059 * emit OPCODE_MIN, OPCODE_MAX sequence.
1062 /* XXX this isn't quite finished yet */
1063 if (n
->Children
[1]->Opcode
== IR_FLOAT
&&
1064 n
->Children
[1]->Value
[0] == 0.0 &&
1065 n
->Children
[1]->Value
[1] == 0.0 &&
1066 n
->Children
[1]->Value
[2] == 0.0 &&
1067 n
->Children
[1]->Value
[3] == 0.0 &&
1068 n
->Children
[2]->Opcode
== IR_FLOAT
&&
1069 n
->Children
[2]->Value
[0] == 1.0 &&
1070 n
->Children
[2]->Value
[1] == 1.0 &&
1071 n
->Children
[2]->Value
[2] == 1.0 &&
1072 n
->Children
[2]->Value
[3] == 1.0) {
1074 inst
= prev_instruction(prog
);
1076 if (inst
&& inst
->Opcode
!= OPCODE_NOP
) {
1077 /* and prev instruction's DstReg matches n->Children[0]->Store */
1078 inst
->SaturateMode
= SATURATE_ZERO_ONE
;
1079 n
->Store
= n
->Children
[0]->Store
;
1085 if (!alloc_node_storage(emitInfo
, n
, n
->Children
[0]->Store
->Size
))
1088 emit(emitInfo
, n
->Children
[1]);
1089 emit(emitInfo
, n
->Children
[2]);
1091 /* Some GPUs don't allow reading from output registers. So if the
1092 * dest for this clamp() is an output reg, we can't use that reg for
1093 * the intermediate result. Use a temp register instead.
1095 _mesa_bzero(&tmpNode
, sizeof(tmpNode
));
1096 alloc_node_storage(emitInfo
, &tmpNode
, n
->Store
->Size
);
1098 /* tmp = max(ch[0], ch[1]) */
1099 inst
= emit_instruction(emitInfo
, OPCODE_MAX
,
1100 tmpNode
.Store
, /* dest */
1101 n
->Children
[0]->Store
,
1102 n
->Children
[1]->Store
,
1105 /* n->dest = min(tmp, ch[2]) */
1106 inst
= emit_instruction(emitInfo
, OPCODE_MIN
,
1107 n
->Store
, /* dest */
1109 n
->Children
[2]->Store
,
1112 free_node_storage(emitInfo
->vt
, &tmpNode
);
1118 static struct prog_instruction
*
1119 emit_negation(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1121 /* Implement as MOV dst, -src; */
1122 /* XXX we could look at the previous instruction and in some circumstances
1123 * modify it to accomplish the negation.
1125 struct prog_instruction
*inst
;
1127 emit(emitInfo
, n
->Children
[0]);
1129 if (!alloc_node_storage(emitInfo
, n
, n
->Children
[0]->Store
->Size
))
1132 inst
= emit_instruction(emitInfo
,
1134 n
->Store
, /* dest */
1135 n
->Children
[0]->Store
,
1138 inst
->SrcReg
[0].Negate
= NEGATE_XYZW
;
1143 static struct prog_instruction
*
1144 emit_label(slang_emit_info
*emitInfo
, const slang_ir_node
*n
)
1148 /* XXX this fails in loop tail code - investigate someday */
1149 assert(_slang_label_get_location(n
->Label
) < 0);
1150 _slang_label_set_location(n
->Label
, emitInfo
->prog
->NumInstructions
,
1153 if (_slang_label_get_location(n
->Label
) < 0)
1154 _slang_label_set_location(n
->Label
, emitInfo
->prog
->NumInstructions
,
1162 * Emit code for a function call.
1163 * Note that for each time a function is called, we emit the function's
1164 * body code again because the set of available registers may be different.
1166 static struct prog_instruction
*
1167 emit_fcall(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1169 struct gl_program
*progSave
;
1170 struct prog_instruction
*inst
;
1171 GLuint subroutineId
;
1174 assert(n
->Opcode
== IR_CALL
);
1177 /* save/push cur program */
1178 maxInstSave
= emitInfo
->MaxInstructions
;
1179 progSave
= emitInfo
->prog
;
1181 emitInfo
->prog
= new_subroutine(emitInfo
, &subroutineId
);
1182 emitInfo
->MaxInstructions
= emitInfo
->prog
->NumInstructions
;
1184 _slang_label_set_location(n
->Label
, emitInfo
->prog
->NumInstructions
,
1187 if (emitInfo
->EmitBeginEndSub
) {
1188 /* BGNSUB isn't a real instruction.
1189 * We require a label (i.e. "foobar:") though, if we're going to
1190 * print the program in the NV format. The BNGSUB instruction is
1191 * really just a NOP to attach the label to.
1193 inst
= new_instruction(emitInfo
, OPCODE_BGNSUB
);
1194 inst_comment(inst
, n
->Label
->Name
);
1197 /* body of function: */
1198 emit(emitInfo
, n
->Children
[0]);
1199 n
->Store
= n
->Children
[0]->Store
;
1201 /* add RET instruction now, if needed */
1202 inst
= prev_instruction(emitInfo
);
1203 if (inst
&& inst
->Opcode
!= OPCODE_RET
) {
1204 inst
= new_instruction(emitInfo
, OPCODE_RET
);
1207 if (emitInfo
->EmitBeginEndSub
) {
1208 inst
= new_instruction(emitInfo
, OPCODE_ENDSUB
);
1209 inst_comment(inst
, n
->Label
->Name
);
1212 /* pop/restore cur program */
1213 emitInfo
->prog
= progSave
;
1214 emitInfo
->MaxInstructions
= maxInstSave
;
1216 /* emit the function call */
1217 inst
= new_instruction(emitInfo
, OPCODE_CAL
);
1218 /* The branch target is just the subroutine number (changed later) */
1219 inst
->BranchTarget
= subroutineId
;
1220 inst_comment(inst
, n
->Label
->Name
);
1221 assert(inst
->BranchTarget
>= 0);
1228 * Emit code for a 'return' statement.
1230 static struct prog_instruction
*
1231 emit_return(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1233 struct prog_instruction
*inst
;
1235 assert(n
->Opcode
== IR_RETURN
);
1237 inst
= new_instruction(emitInfo
, OPCODE_RET
);
1238 inst
->DstReg
.CondMask
= COND_TR
; /* always return */
1243 static struct prog_instruction
*
1244 emit_kill(slang_emit_info
*emitInfo
)
1246 struct gl_fragment_program
*fp
;
1247 struct prog_instruction
*inst
;
1248 /* NV-KILL - discard fragment depending on condition code.
1249 * Note that ARB-KILL depends on sign of vector operand.
1251 inst
= new_instruction(emitInfo
, OPCODE_KIL_NV
);
1252 inst
->DstReg
.CondMask
= COND_TR
; /* always kill */
1254 assert(emitInfo
->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
);
1255 fp
= (struct gl_fragment_program
*) emitInfo
->prog
;
1256 fp
->UsesKill
= GL_TRUE
;
1262 static struct prog_instruction
*
1263 emit_tex(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1265 struct prog_instruction
*inst
;
1266 gl_inst_opcode opcode
;
1267 GLboolean shadow
= GL_FALSE
;
1269 switch (n
->Opcode
) {
1271 opcode
= OPCODE_TEX
;
1274 opcode
= OPCODE_TEX
;
1278 opcode
= OPCODE_TXB
;
1281 opcode
= OPCODE_TXB
;
1285 opcode
= OPCODE_TXP
;
1288 opcode
= OPCODE_TXP
;
1292 _mesa_problem(NULL
, "Bad IR TEX code");
1296 if (n
->Children
[0]->Opcode
== IR_ELEMENT
) {
1297 /* array is the sampler (a uniform which'll indicate the texture unit) */
1298 assert(n
->Children
[0]->Children
[0]->Store
);
1299 assert(n
->Children
[0]->Children
[0]->Store
->File
== PROGRAM_SAMPLER
);
1301 emit(emitInfo
, n
->Children
[0]);
1303 n
->Children
[0]->Var
= n
->Children
[0]->Children
[0]->Var
;
1305 /* this is the sampler (a uniform which'll indicate the texture unit) */
1306 assert(n
->Children
[0]->Store
);
1307 assert(n
->Children
[0]->Store
->File
== PROGRAM_SAMPLER
);
1310 /* emit code for the texcoord operand */
1311 (void) emit(emitInfo
, n
->Children
[1]);
1313 /* alloc storage for result of texture fetch */
1314 if (!alloc_node_storage(emitInfo
, n
, 4))
1317 /* emit TEX instruction; Child[1] is the texcoord */
1318 inst
= emit_instruction(emitInfo
,
1321 n
->Children
[1]->Store
,
1325 inst
->TexShadow
= shadow
;
1327 /* Store->Index is the uniform/sampler index */
1328 assert(n
->Children
[0]->Store
->Index
>= 0);
1329 inst
->TexSrcUnit
= n
->Children
[0]->Store
->Index
;
1330 inst
->TexSrcTarget
= n
->Children
[0]->Store
->TexTarget
;
1332 /* mark the sampler as being used */
1333 _mesa_use_uniform(emitInfo
->prog
->Parameters
,
1334 (char *) n
->Children
[0]->Var
->a_name
);
1343 static struct prog_instruction
*
1344 emit_copy(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1346 struct prog_instruction
*inst
;
1348 assert(n
->Opcode
== IR_COPY
);
1351 emit(emitInfo
, n
->Children
[0]);
1352 if (!n
->Children
[0]->Store
|| n
->Children
[0]->Store
->Index
< 0) {
1353 /* an error should have been already recorded */
1358 assert(n
->Children
[1]);
1359 inst
= emit(emitInfo
, n
->Children
[1]);
1361 if (!n
->Children
[1]->Store
|| n
->Children
[1]->Store
->Index
< 0) {
1362 if (!emitInfo
->log
->text
&& !emitInfo
->UnresolvedFunctions
) {
1363 /* XXX this error should have been caught in slang_codegen.c */
1364 slang_info_log_error(emitInfo
->log
, "invalid assignment");
1369 assert(n
->Children
[1]->Store
->Index
>= 0);
1371 /*assert(n->Children[0]->Store->Size == n->Children[1]->Store->Size);*/
1373 n
->Store
= n
->Children
[0]->Store
;
1375 if (n
->Store
->File
== PROGRAM_SAMPLER
) {
1376 /* no code generated for sampler assignments,
1377 * just copy the sampler index/target at compile time.
1379 n
->Store
->Index
= n
->Children
[1]->Store
->Index
;
1380 n
->Store
->TexTarget
= n
->Children
[1]->Store
->TexTarget
;
1384 #if PEEPHOLE_OPTIMIZATIONS
1386 (n
->Children
[1]->Opcode
!= IR_SWIZZLE
) &&
1387 _slang_is_temp(emitInfo
->vt
, n
->Children
[1]->Store
) &&
1388 (inst
->DstReg
.File
== n
->Children
[1]->Store
->File
) &&
1389 (inst
->DstReg
.Index
== n
->Children
[1]->Store
->Index
) &&
1390 !n
->Children
[0]->Store
->IsIndirect
&&
1391 n
->Children
[0]->Store
->Size
<= 4) {
1392 /* Peephole optimization:
1393 * The Right-Hand-Side has its results in a temporary place.
1394 * Modify the RHS (and the prev instruction) to store its results
1395 * in the destination specified by n->Children[0].
1396 * Then, this MOVE is a no-op.
1404 /* fixup the previous instruction (which stored the RHS result) */
1405 assert(n
->Children
[0]->Store
->Index
>= 0);
1406 storage_to_dst_reg(&inst
->DstReg
, n
->Children
[0]->Store
);
1412 if (n
->Children
[0]->Store
->Size
> 4) {
1413 /* move matrix/struct etc (block of registers) */
1414 slang_ir_storage dstStore
= *n
->Children
[0]->Store
;
1415 slang_ir_storage srcStore
= *n
->Children
[1]->Store
;
1416 GLint size
= srcStore
.Size
;
1417 ASSERT(n
->Children
[1]->Store
->Swizzle
== SWIZZLE_NOOP
);
1421 inst
= emit_instruction(emitInfo
, OPCODE_MOV
,
1426 inst_comment(inst
, "IR_COPY block");
1433 /* single register move */
1434 char *srcAnnot
, *dstAnnot
;
1435 assert(n
->Children
[0]->Store
->Index
>= 0);
1436 inst
= emit_instruction(emitInfo
, OPCODE_MOV
,
1437 n
->Children
[0]->Store
, /* dest */
1438 n
->Children
[1]->Store
,
1441 dstAnnot
= storage_annotation(n
->Children
[0], emitInfo
->prog
);
1442 srcAnnot
= storage_annotation(n
->Children
[1], emitInfo
->prog
);
1443 inst
->Comment
= instruction_annotation(inst
->Opcode
, dstAnnot
,
1444 srcAnnot
, NULL
, NULL
);
1446 free_node_storage(emitInfo
->vt
, n
->Children
[1]);
1453 * An IR_COND node wraps a boolean expression which is used by an
1454 * IF or WHILE test. This is where we'll set condition codes, if needed.
1456 static struct prog_instruction
*
1457 emit_cond(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1459 struct prog_instruction
*inst
;
1461 assert(n
->Opcode
== IR_COND
);
1463 if (!n
->Children
[0])
1466 /* emit code for the expression */
1467 inst
= emit(emitInfo
, n
->Children
[0]);
1469 if (!n
->Children
[0]->Store
) {
1470 /* error recovery */
1474 assert(n
->Children
[0]->Store
);
1475 /*assert(n->Children[0]->Store->Size == 1);*/
1477 if (emitInfo
->EmitCondCodes
) {
1479 n
->Children
[0]->Store
&&
1480 inst
->DstReg
.File
== n
->Children
[0]->Store
->File
&&
1481 inst
->DstReg
.Index
== n
->Children
[0]->Store
->Index
) {
1482 /* The previous instruction wrote to the register who's value
1483 * we're testing. Just fix that instruction so that the
1484 * condition codes are computed.
1486 inst
->CondUpdate
= GL_TRUE
;
1487 n
->Store
= n
->Children
[0]->Store
;
1491 /* This'll happen for things like "if (i) ..." where no code
1492 * is normally generated for the expression "i".
1493 * Generate a move instruction just to set condition codes.
1495 if (!alloc_node_storage(emitInfo
, n
, 1))
1497 inst
= emit_instruction(emitInfo
, OPCODE_MOV
,
1498 n
->Store
, /* dest */
1499 n
->Children
[0]->Store
,
1502 inst
->CondUpdate
= GL_TRUE
;
1503 inst_comment(inst
, "COND expr");
1504 _slang_free_temp(emitInfo
->vt
, n
->Store
);
1509 /* No-op: the boolean result of the expression is in a regular reg */
1510 n
->Store
= n
->Children
[0]->Store
;
1519 static struct prog_instruction
*
1520 emit_not(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1522 static const struct {
1523 gl_inst_opcode op
, opNot
;
1525 { OPCODE_SLT
, OPCODE_SGE
},
1526 { OPCODE_SLE
, OPCODE_SGT
},
1527 { OPCODE_SGT
, OPCODE_SLE
},
1528 { OPCODE_SGE
, OPCODE_SLT
},
1529 { OPCODE_SEQ
, OPCODE_SNE
},
1530 { OPCODE_SNE
, OPCODE_SEQ
},
1533 struct prog_instruction
*inst
;
1534 slang_ir_storage zero
;
1538 inst
= emit(emitInfo
, n
->Children
[0]);
1540 #if PEEPHOLE_OPTIMIZATIONS
1542 /* if the prev instruction was a comparison instruction, invert it */
1543 for (i
= 0; operators
[i
].op
; i
++) {
1544 if (inst
->Opcode
== operators
[i
].op
) {
1545 inst
->Opcode
= operators
[i
].opNot
;
1546 n
->Store
= n
->Children
[0]->Store
;
1553 /* else, invert using SEQ (v = v == 0) */
1554 if (!alloc_node_storage(emitInfo
, n
, n
->Children
[0]->Store
->Size
))
1557 constant_to_storage(emitInfo
, 0.0, &zero
);
1558 inst
= emit_instruction(emitInfo
,
1561 n
->Children
[0]->Store
,
1564 inst_comment(inst
, "NOT");
1566 free_node_storage(emitInfo
->vt
, n
->Children
[0]);
1572 static struct prog_instruction
*
1573 emit_if(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1575 struct gl_program
*prog
= emitInfo
->prog
;
1576 GLuint ifInstLoc
, elseInstLoc
= 0;
1577 GLuint condWritemask
= 0;
1579 /* emit condition expression code */
1581 struct prog_instruction
*inst
;
1582 inst
= emit(emitInfo
, n
->Children
[0]);
1583 if (emitInfo
->EmitCondCodes
) {
1585 /* error recovery */
1588 condWritemask
= inst
->DstReg
.WriteMask
;
1592 if (!n
->Children
[0]->Store
)
1596 assert(n
->Children
[0]->Store
->Size
== 1); /* a bool! */
1599 ifInstLoc
= prog
->NumInstructions
;
1600 if (emitInfo
->EmitHighLevelInstructions
) {
1601 if (emitInfo
->EmitCondCodes
) {
1602 /* IF condcode THEN ... */
1603 struct prog_instruction
*ifInst
;
1604 ifInst
= new_instruction(emitInfo
, OPCODE_IF
);
1605 ifInst
->DstReg
.CondMask
= COND_NE
; /* if cond is non-zero */
1606 /* only test the cond code (1 of 4) that was updated by the
1607 * previous instruction.
1609 ifInst
->DstReg
.CondSwizzle
= writemask_to_swizzle(condWritemask
);
1612 /* IF src[0] THEN ... */
1613 emit_instruction(emitInfo
, OPCODE_IF
,
1615 n
->Children
[0]->Store
, /* op0 */
1621 /* conditional jump to else, or endif */
1622 struct prog_instruction
*ifInst
= new_instruction(emitInfo
, OPCODE_BRA
);
1623 ifInst
->DstReg
.CondMask
= COND_EQ
; /* BRA if cond is zero */
1624 inst_comment(ifInst
, "if zero");
1625 ifInst
->DstReg
.CondSwizzle
= writemask_to_swizzle(condWritemask
);
1629 emit(emitInfo
, n
->Children
[1]);
1631 if (n
->Children
[2]) {
1632 /* have else body */
1633 elseInstLoc
= prog
->NumInstructions
;
1634 if (emitInfo
->EmitHighLevelInstructions
) {
1635 (void) new_instruction(emitInfo
, OPCODE_ELSE
);
1638 /* jump to endif instruction */
1639 struct prog_instruction
*inst
;
1640 inst
= new_instruction(emitInfo
, OPCODE_BRA
);
1641 inst_comment(inst
, "else");
1642 inst
->DstReg
.CondMask
= COND_TR
; /* always branch */
1644 prog
->Instructions
[ifInstLoc
].BranchTarget
= prog
->NumInstructions
;
1645 emit(emitInfo
, n
->Children
[2]);
1649 prog
->Instructions
[ifInstLoc
].BranchTarget
= prog
->NumInstructions
;
1652 if (emitInfo
->EmitHighLevelInstructions
) {
1653 (void) new_instruction(emitInfo
, OPCODE_ENDIF
);
1656 if (n
->Children
[2]) {
1657 prog
->Instructions
[elseInstLoc
].BranchTarget
= prog
->NumInstructions
;
1663 static struct prog_instruction
*
1664 emit_loop(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1666 struct gl_program
*prog
= emitInfo
->prog
;
1667 struct prog_instruction
*endInst
;
1668 GLuint beginInstLoc
, tailInstLoc
, endInstLoc
;
1671 /* emit OPCODE_BGNLOOP */
1672 beginInstLoc
= prog
->NumInstructions
;
1673 if (emitInfo
->EmitHighLevelInstructions
) {
1674 (void) new_instruction(emitInfo
, OPCODE_BGNLOOP
);
1678 emit(emitInfo
, n
->Children
[0]);
1681 tailInstLoc
= prog
->NumInstructions
;
1682 if (n
->Children
[1]) {
1683 if (emitInfo
->EmitComments
)
1684 emit_comment(emitInfo
, "Loop tail code:");
1685 emit(emitInfo
, n
->Children
[1]);
1688 endInstLoc
= prog
->NumInstructions
;
1689 if (emitInfo
->EmitHighLevelInstructions
) {
1690 /* emit OPCODE_ENDLOOP */
1691 endInst
= new_instruction(emitInfo
, OPCODE_ENDLOOP
);
1694 /* emit unconditional BRA-nch */
1695 endInst
= new_instruction(emitInfo
, OPCODE_BRA
);
1696 endInst
->DstReg
.CondMask
= COND_TR
; /* always true */
1698 /* ENDLOOP's BranchTarget points to the BGNLOOP inst */
1699 endInst
->BranchTarget
= beginInstLoc
;
1701 if (emitInfo
->EmitHighLevelInstructions
) {
1702 /* BGNLOOP's BranchTarget points to the ENDLOOP inst */
1703 prog
->Instructions
[beginInstLoc
].BranchTarget
= prog
->NumInstructions
-1;
1706 /* Done emitting loop code. Now walk over the loop's linked list of
1707 * BREAK and CONT nodes, filling in their BranchTarget fields (which
1708 * will point to the ENDLOOP+1 or BGNLOOP instructions, respectively).
1710 for (ir
= n
->List
; ir
; ir
= ir
->List
) {
1711 struct prog_instruction
*inst
= prog
->Instructions
+ ir
->InstLocation
;
1712 assert(inst
->BranchTarget
< 0);
1713 if (ir
->Opcode
== IR_BREAK
||
1714 ir
->Opcode
== IR_BREAK_IF_TRUE
) {
1715 assert(inst
->Opcode
== OPCODE_BRK
||
1716 inst
->Opcode
== OPCODE_BRA
);
1717 /* go to instruction after end of loop */
1718 inst
->BranchTarget
= endInstLoc
+ 1;
1721 assert(ir
->Opcode
== IR_CONT
||
1722 ir
->Opcode
== IR_CONT_IF_TRUE
);
1723 assert(inst
->Opcode
== OPCODE_CONT
||
1724 inst
->Opcode
== OPCODE_BRA
);
1725 /* go to instruction at tail of loop */
1726 inst
->BranchTarget
= endInstLoc
;
1734 * Unconditional "continue" or "break" statement.
1735 * Either OPCODE_CONT, OPCODE_BRK or OPCODE_BRA will be emitted.
1737 static struct prog_instruction
*
1738 emit_cont_break(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1740 gl_inst_opcode opcode
;
1741 struct prog_instruction
*inst
;
1743 if (n
->Opcode
== IR_CONT
) {
1744 /* we need to execute the loop's tail code before doing CONT */
1746 assert(n
->Parent
->Opcode
== IR_LOOP
);
1747 if (n
->Parent
->Children
[1]) {
1748 /* emit tail code */
1749 if (emitInfo
->EmitComments
) {
1750 emit_comment(emitInfo
, "continue - tail code:");
1752 emit(emitInfo
, n
->Parent
->Children
[1]);
1756 /* opcode selection */
1757 if (emitInfo
->EmitHighLevelInstructions
) {
1758 opcode
= (n
->Opcode
== IR_CONT
) ? OPCODE_CONT
: OPCODE_BRK
;
1761 opcode
= OPCODE_BRA
;
1763 n
->InstLocation
= emitInfo
->prog
->NumInstructions
;
1764 inst
= new_instruction(emitInfo
, opcode
);
1765 inst
->DstReg
.CondMask
= COND_TR
; /* always true */
1771 * Conditional "continue" or "break" statement.
1772 * Either OPCODE_CONT, OPCODE_BRK or OPCODE_BRA will be emitted.
1774 static struct prog_instruction
*
1775 emit_cont_break_if_true(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1777 struct prog_instruction
*inst
;
1779 assert(n
->Opcode
== IR_CONT_IF_TRUE
||
1780 n
->Opcode
== IR_BREAK_IF_TRUE
);
1782 /* evaluate condition expr, setting cond codes */
1783 inst
= emit(emitInfo
, n
->Children
[0]);
1784 if (emitInfo
->EmitCondCodes
) {
1786 inst
->CondUpdate
= GL_TRUE
;
1789 n
->InstLocation
= emitInfo
->prog
->NumInstructions
;
1791 /* opcode selection */
1792 if (emitInfo
->EmitHighLevelInstructions
) {
1793 const gl_inst_opcode opcode
1794 = (n
->Opcode
== IR_CONT_IF_TRUE
) ? OPCODE_CONT
: OPCODE_BRK
;
1795 if (emitInfo
->EmitCondCodes
) {
1796 /* Get the writemask from the previous instruction which set
1797 * the condcodes. Use that writemask as the CondSwizzle.
1799 const GLuint condWritemask
= inst
->DstReg
.WriteMask
;
1800 inst
= new_instruction(emitInfo
, opcode
);
1801 inst
->DstReg
.CondMask
= COND_NE
;
1802 inst
->DstReg
.CondSwizzle
= writemask_to_swizzle(condWritemask
);
1811 ifInstLoc
= emitInfo
->prog
->NumInstructions
;
1812 inst
= emit_instruction(emitInfo
, OPCODE_IF
,
1814 n
->Children
[0]->Store
,
1817 n
->InstLocation
= emitInfo
->prog
->NumInstructions
;
1819 inst
= new_instruction(emitInfo
, opcode
);
1820 inst
= new_instruction(emitInfo
, OPCODE_ENDIF
);
1822 emitInfo
->prog
->Instructions
[ifInstLoc
].BranchTarget
1823 = emitInfo
->prog
->NumInstructions
;
1828 const GLuint condWritemask
= inst
->DstReg
.WriteMask
;
1829 assert(emitInfo
->EmitCondCodes
);
1830 inst
= new_instruction(emitInfo
, OPCODE_BRA
);
1831 inst
->DstReg
.CondMask
= COND_NE
;
1832 inst
->DstReg
.CondSwizzle
= writemask_to_swizzle(condWritemask
);
1839 * Return the size of a swizzle mask given that some swizzle components
1840 * may be NIL/undefined. For example:
1841 * swizzle_size(".zzxx") = 4
1842 * swizzle_size(".xy??") = 2
1843 * swizzle_size(".w???") = 1
1846 swizzle_size(GLuint swizzle
)
1849 for (i
= 0; i
< 4; i
++) {
1850 if (GET_SWZ(swizzle
, i
) == SWIZZLE_NIL
)
1857 static struct prog_instruction
*
1858 emit_swizzle(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1860 struct prog_instruction
*inst
;
1862 inst
= emit(emitInfo
, n
->Children
[0]);
1864 if (!n
->Store
->Parent
) {
1865 /* this covers a case such as "(b ? p : q).x" */
1866 n
->Store
->Parent
= n
->Children
[0]->Store
;
1867 assert(n
->Store
->Parent
);
1871 const GLuint swizzle
= n
->Store
->Swizzle
;
1872 /* new storage is parent storage with updated Swizzle + Size fields */
1873 _slang_copy_ir_storage(n
->Store
, n
->Store
->Parent
);
1874 /* Apply this node's swizzle to parent's storage */
1875 n
->Store
->Swizzle
= _slang_swizzle_swizzle(n
->Store
->Swizzle
, swizzle
);
1877 n
->Store
->Size
= swizzle_size(n
->Store
->Swizzle
);
1880 assert(!n
->Store
->Parent
);
1881 assert(n
->Store
->Index
>= 0);
1888 * Dereference array element: element == array[index]
1889 * This basically involves emitting code for computing the array index
1890 * and updating the node/element's storage info.
1892 static struct prog_instruction
*
1893 emit_array_element(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1895 slang_ir_storage
*arrayStore
, *indexStore
;
1896 const int elemSize
= n
->Store
->Size
; /* number of floats */
1897 const GLint elemSizeVec
= (elemSize
+ 3) / 4; /* number of vec4 */
1898 struct prog_instruction
*inst
;
1900 assert(n
->Opcode
== IR_ELEMENT
);
1901 assert(elemSize
> 0);
1903 /* special case for built-in state variables, like light state */
1905 slang_ir_storage
*root
= n
->Store
;
1906 assert(!root
->Parent
);
1907 while (root
->Parent
)
1908 root
= root
->Parent
;
1910 if (root
->File
== PROGRAM_STATE_VAR
) {
1913 _slang_alloc_statevar(n
, emitInfo
->prog
->Parameters
, &direct
);
1919 n
->Store
->Index
= index
;
1920 return NULL
; /* all done */
1925 /* do codegen for array itself */
1926 emit(emitInfo
, n
->Children
[0]);
1927 arrayStore
= n
->Children
[0]->Store
;
1929 /* The initial array element storage is the array's storage,
1930 * then modified below.
1932 _slang_copy_ir_storage(n
->Store
, arrayStore
);
1935 if (n
->Children
[1]->Opcode
== IR_FLOAT
) {
1936 /* Constant array index */
1937 const GLint element
= (GLint
) n
->Children
[1]->Value
[0];
1939 /* this element's storage is the array's storage, plus constant offset */
1940 n
->Store
->Index
+= elemSizeVec
* element
;
1943 /* Variable array index */
1945 /* do codegen for array index expression */
1946 emit(emitInfo
, n
->Children
[1]);
1947 indexStore
= n
->Children
[1]->Store
;
1949 if (indexStore
->IsIndirect
) {
1950 /* need to put the array index into a temporary since we can't
1951 * directly support a[b[i]] constructs.
1955 /*indexStore = tempstore();*/
1960 /* need to multiply array index by array element size */
1961 struct prog_instruction
*inst
;
1962 slang_ir_storage
*indexTemp
;
1963 slang_ir_storage elemSizeStore
;
1965 /* allocate 1 float indexTemp */
1966 indexTemp
= _slang_new_ir_storage(PROGRAM_TEMPORARY
, -1, 1);
1967 _slang_alloc_temp(emitInfo
->vt
, indexTemp
);
1969 /* allocate a constant containing the element size */
1970 constant_to_storage(emitInfo
, (float) elemSizeVec
, &elemSizeStore
);
1972 /* multiply array index by element size */
1973 inst
= emit_instruction(emitInfo
,
1975 indexTemp
, /* dest */
1976 indexStore
, /* the index */
1980 indexStore
= indexTemp
;
1983 if (arrayStore
->IsIndirect
) {
1984 /* ex: in a[i][j], a[i] (the arrayStore) is indirect */
1985 /* Need to add indexStore to arrayStore->Indirect store */
1986 slang_ir_storage indirectArray
;
1987 slang_ir_storage
*indexTemp
;
1989 _slang_init_ir_storage(&indirectArray
,
1990 arrayStore
->IndirectFile
,
1991 arrayStore
->IndirectIndex
,
1993 arrayStore
->IndirectSwizzle
);
1995 /* allocate 1 float indexTemp */
1996 indexTemp
= _slang_new_ir_storage(PROGRAM_TEMPORARY
, -1, 1);
1997 _slang_alloc_temp(emitInfo
->vt
, indexTemp
);
1999 inst
= emit_instruction(emitInfo
,
2001 indexTemp
, /* dest */
2002 indexStore
, /* the index */
2003 &indirectArray
, /* indirect array base */
2006 indexStore
= indexTemp
;
2009 /* update the array element storage info */
2010 n
->Store
->IsIndirect
= GL_TRUE
;
2011 n
->Store
->IndirectFile
= indexStore
->File
;
2012 n
->Store
->IndirectIndex
= indexStore
->Index
;
2013 n
->Store
->IndirectSwizzle
= indexStore
->Swizzle
;
2016 n
->Store
->Size
= elemSize
;
2017 n
->Store
->Swizzle
= _slang_var_swizzle(elemSize
, 0);
2019 return NULL
; /* no instruction */
2024 * Resolve storage for accessing a structure field.
2026 static struct prog_instruction
*
2027 emit_struct_field(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
2029 slang_ir_storage
*root
= n
->Store
;
2030 GLint fieldOffset
, fieldSize
;
2032 assert(n
->Opcode
== IR_FIELD
);
2034 assert(!root
->Parent
);
2035 while (root
->Parent
)
2036 root
= root
->Parent
;
2038 /* If this is the field of a state var, allocate constant/uniform
2039 * storage for it now if we haven't already.
2040 * Note that we allocate storage (uniform/constant slots) for state
2041 * variables here rather than at declaration time so we only allocate
2042 * space for the ones that we actually use!
2044 if (root
->File
== PROGRAM_STATE_VAR
) {
2046 GLint index
= _slang_alloc_statevar(n
, emitInfo
->prog
->Parameters
, &direct
);
2048 slang_info_log_error(emitInfo
->log
, "Error parsing state variable");
2052 root
->Index
= index
;
2053 return NULL
; /* all done */
2057 /* do codegen for struct */
2058 emit(emitInfo
, n
->Children
[0]);
2059 assert(n
->Children
[0]->Store
->Index
>= 0);
2062 fieldOffset
= n
->Store
->Index
;
2063 fieldSize
= n
->Store
->Size
;
2065 _slang_copy_ir_storage(n
->Store
, n
->Children
[0]->Store
);
2067 n
->Store
->Index
= n
->Children
[0]->Store
->Index
+ fieldOffset
/ 4;
2068 n
->Store
->Size
= fieldSize
;
2070 switch (fieldSize
) {
2073 GLint swz
= fieldOffset
% 4;
2074 n
->Store
->Swizzle
= MAKE_SWIZZLE4(swz
, swz
, swz
, swz
);
2078 n
->Store
->Swizzle
= MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
,
2079 SWIZZLE_NIL
, SWIZZLE_NIL
);
2082 n
->Store
->Swizzle
= MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
,
2083 SWIZZLE_Z
, SWIZZLE_NIL
);
2086 n
->Store
->Swizzle
= SWIZZLE_XYZW
;
2089 assert(n
->Store
->Index
>= 0);
2091 return NULL
; /* no instruction */
2096 * Emit code for a variable declaration.
2097 * This usually doesn't result in any code generation, but just
2098 * memory allocation.
2100 static struct prog_instruction
*
2101 emit_var_decl(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
2104 assert(n
->Store
->File
!= PROGRAM_UNDEFINED
);
2105 assert(n
->Store
->Size
> 0);
2106 /*assert(n->Store->Index < 0);*/
2108 if (!n
->Var
|| n
->Var
->isTemp
) {
2109 /* a nameless/temporary variable, will be freed after first use */
2111 if (n
->Store
->Index
< 0 && !_slang_alloc_temp(emitInfo
->vt
, n
->Store
)) {
2112 slang_info_log_error(emitInfo
->log
,
2113 "Ran out of registers, too many temporaries");
2118 /* a regular variable */
2119 _slang_add_variable(emitInfo
->vt
, n
->Var
);
2120 if (!_slang_alloc_var(emitInfo
->vt
, n
->Store
)) {
2121 slang_info_log_error(emitInfo
->log
,
2122 "Ran out of registers, too many variables");
2126 printf("IR_VAR_DECL %s %d store %p\n",
2127 (char*) n->Var->a_name, n->Store->Index, (void*) n->Store);
2129 assert(n
->Var
->store
== n
->Store
);
2131 if (emitInfo
->EmitComments
) {
2132 /* emit NOP with comment describing the variable's storage location */
2134 sprintf(s
, "TEMP[%d]%s = variable %s (size %d)",
2136 _mesa_swizzle_string(n
->Store
->Swizzle
, 0, GL_FALSE
),
2137 (n
->Var
? (char *) n
->Var
->a_name
: "anonymous"),
2139 emit_comment(emitInfo
, s
);
2146 * Emit code for a reference to a variable.
2147 * Actually, no code is generated but we may do some memory allocation.
2148 * In particular, state vars (uniforms) are allocated on an as-needed basis.
2150 static struct prog_instruction
*
2151 emit_var_ref(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
2154 assert(n
->Store
->File
!= PROGRAM_UNDEFINED
);
2156 if (n
->Store
->File
== PROGRAM_STATE_VAR
&& n
->Store
->Index
< 0) {
2158 GLint index
= _slang_alloc_statevar(n
, emitInfo
->prog
->Parameters
, &direct
);
2162 /* XXX isn't this really an out of memory/resources error? */
2163 _mesa_snprintf(s
, sizeof(s
), "Undefined variable '%s'",
2164 (char *) n
->Var
->a_name
);
2165 slang_info_log_error(emitInfo
->log
, s
);
2169 n
->Store
->Index
= index
;
2171 else if (n
->Store
->File
== PROGRAM_UNIFORM
||
2172 n
->Store
->File
== PROGRAM_SAMPLER
) {
2173 /* mark var as used */
2174 _mesa_use_uniform(emitInfo
->prog
->Parameters
, (char *) n
->Var
->a_name
);
2176 else if (n
->Store
->File
== PROGRAM_INPUT
) {
2177 assert(n
->Store
->Index
>= 0);
2178 emitInfo
->prog
->InputsRead
|= (1 << n
->Store
->Index
);
2181 if (n
->Store
->Index
< 0) {
2182 /* probably ran out of registers */
2185 assert(n
->Store
->Size
> 0);
2191 static struct prog_instruction
*
2192 emit(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
2194 struct prog_instruction
*inst
;
2198 if (emitInfo
->log
->error_flag
) {
2203 inst
= new_instruction(emitInfo
, OPCODE_NOP
);
2204 inst
->Comment
= _mesa_strdup(n
->Comment
);
2208 switch (n
->Opcode
) {
2210 /* sequence of two sub-trees */
2211 assert(n
->Children
[0]);
2212 assert(n
->Children
[1]);
2213 emit(emitInfo
, n
->Children
[0]);
2214 if (emitInfo
->log
->error_flag
)
2216 inst
= emit(emitInfo
, n
->Children
[1]);
2220 n
->Store
= n
->Children
[1]->Store
;
2224 /* new variable scope */
2225 _slang_push_var_table(emitInfo
->vt
);
2226 inst
= emit(emitInfo
, n
->Children
[0]);
2227 _slang_pop_var_table(emitInfo
->vt
);
2231 /* Variable declaration - allocate a register for it */
2232 inst
= emit_var_decl(emitInfo
, n
);
2236 /* Reference to a variable
2237 * Storage should have already been resolved/allocated.
2239 return emit_var_ref(emitInfo
, n
);
2242 return emit_array_element(emitInfo
, n
);
2244 return emit_struct_field(emitInfo
, n
);
2246 return emit_swizzle(emitInfo
, n
);
2248 /* Simple arithmetic */
2288 /* trinary operators */
2290 return emit_arith(emitInfo
, n
);
2294 return emit_compare(emitInfo
, n
);
2297 return emit_clamp(emitInfo
, n
);
2304 return emit_tex(emitInfo
, n
);
2306 return emit_negation(emitInfo
, n
);
2308 /* find storage location for this float constant */
2309 n
->Store
->Index
= _mesa_add_unnamed_constant(emitInfo
->prog
->Parameters
,
2312 &n
->Store
->Swizzle
);
2313 if (n
->Store
->Index
< 0) {
2314 slang_info_log_error(emitInfo
->log
, "Ran out of space for constants");
2320 return emit_copy(emitInfo
, n
);
2323 return emit_cond(emitInfo
, n
);
2326 return emit_not(emitInfo
, n
);
2329 return emit_label(emitInfo
, n
);
2332 return emit_kill(emitInfo
);
2335 /* new variable scope for subroutines/function calls */
2336 _slang_push_var_table(emitInfo
->vt
);
2337 inst
= emit_fcall(emitInfo
, n
);
2338 _slang_pop_var_table(emitInfo
->vt
);
2342 return emit_if(emitInfo
, n
);
2345 return emit_loop(emitInfo
, n
);
2346 case IR_BREAK_IF_TRUE
:
2347 case IR_CONT_IF_TRUE
:
2348 return emit_cont_break_if_true(emitInfo
, n
);
2352 return emit_cont_break(emitInfo
, n
);
2355 return new_instruction(emitInfo
, OPCODE_BGNSUB
);
2357 return new_instruction(emitInfo
, OPCODE_ENDSUB
);
2359 return emit_return(emitInfo
, n
);
2365 _mesa_problem(NULL
, "Unexpected IR opcode in emit()\n");
2372 * After code generation, any subroutines will be in separate program
2373 * objects. This function appends all the subroutines onto the main
2374 * program and resolves the linking of all the branch/call instructions.
2375 * XXX this logic should really be part of the linking process...
2378 _slang_resolve_subroutines(slang_emit_info
*emitInfo
)
2380 GET_CURRENT_CONTEXT(ctx
);
2381 struct gl_program
*mainP
= emitInfo
->prog
;
2382 GLuint
*subroutineLoc
, i
, total
;
2385 = (GLuint
*) _mesa_malloc(emitInfo
->NumSubroutines
* sizeof(GLuint
));
2387 /* total number of instructions */
2388 total
= mainP
->NumInstructions
;
2389 for (i
= 0; i
< emitInfo
->NumSubroutines
; i
++) {
2390 subroutineLoc
[i
] = total
;
2391 total
+= emitInfo
->Subroutines
[i
]->NumInstructions
;
2394 /* adjust BranchTargets within the functions */
2395 for (i
= 0; i
< emitInfo
->NumSubroutines
; i
++) {
2396 struct gl_program
*sub
= emitInfo
->Subroutines
[i
];
2398 for (j
= 0; j
< sub
->NumInstructions
; j
++) {
2399 struct prog_instruction
*inst
= sub
->Instructions
+ j
;
2400 if (inst
->Opcode
!= OPCODE_CAL
&& inst
->BranchTarget
>= 0) {
2401 inst
->BranchTarget
+= subroutineLoc
[i
];
2406 /* append subroutines' instructions after main's instructions */
2407 mainP
->Instructions
= _mesa_realloc_instructions(mainP
->Instructions
,
2408 mainP
->NumInstructions
,
2410 mainP
->NumInstructions
= total
;
2411 for (i
= 0; i
< emitInfo
->NumSubroutines
; i
++) {
2412 struct gl_program
*sub
= emitInfo
->Subroutines
[i
];
2413 _mesa_copy_instructions(mainP
->Instructions
+ subroutineLoc
[i
],
2415 sub
->NumInstructions
);
2416 /* delete subroutine code */
2417 sub
->Parameters
= NULL
; /* prevent double-free */
2418 _mesa_reference_program(ctx
, &emitInfo
->Subroutines
[i
], NULL
);
2421 /* free subroutine list */
2422 if (emitInfo
->Subroutines
) {
2423 _mesa_free(emitInfo
->Subroutines
);
2424 emitInfo
->Subroutines
= NULL
;
2426 emitInfo
->NumSubroutines
= 0;
2428 /* Examine CAL instructions.
2429 * At this point, the BranchTarget field of the CAL instruction is
2430 * the number/id of the subroutine to call (an index into the
2431 * emitInfo->Subroutines list).
2432 * Translate that into an actual instruction location now.
2434 for (i
= 0; i
< mainP
->NumInstructions
; i
++) {
2435 struct prog_instruction
*inst
= mainP
->Instructions
+ i
;
2436 if (inst
->Opcode
== OPCODE_CAL
) {
2437 const GLuint f
= inst
->BranchTarget
;
2438 inst
->BranchTarget
= subroutineLoc
[f
];
2442 _mesa_free(subroutineLoc
);
2448 * Convert the IR tree into GPU instructions.
2449 * \param n root of IR tree
2450 * \param vt variable table
2451 * \param prog program to put GPU instructions into
2452 * \param pragmas controls codegen options
2453 * \param withEnd if true, emit END opcode at end
2454 * \param log log for emitting errors/warnings/info
2457 _slang_emit_code(slang_ir_node
*n
, slang_var_table
*vt
,
2458 struct gl_program
*prog
,
2459 const struct gl_sl_pragmas
*pragmas
,
2461 slang_info_log
*log
)
2463 GET_CURRENT_CONTEXT(ctx
);
2465 slang_emit_info emitInfo
;
2470 emitInfo
.prog
= prog
;
2471 emitInfo
.Subroutines
= NULL
;
2472 emitInfo
.NumSubroutines
= 0;
2473 emitInfo
.MaxInstructions
= prog
->NumInstructions
;
2475 emitInfo
.EmitHighLevelInstructions
= ctx
->Shader
.EmitHighLevelInstructions
;
2476 emitInfo
.EmitCondCodes
= ctx
->Shader
.EmitCondCodes
;
2477 emitInfo
.EmitComments
= ctx
->Shader
.EmitComments
|| pragmas
->Debug
;
2478 emitInfo
.EmitBeginEndSub
= GL_TRUE
;
2480 if (!emitInfo
.EmitCondCodes
) {
2481 emitInfo
.EmitHighLevelInstructions
= GL_TRUE
;
2484 /* Check uniform/constant limits */
2485 if (prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
2486 maxUniforms
= ctx
->Const
.FragmentProgram
.MaxUniformComponents
/ 4;
2489 assert(prog
->Target
== GL_VERTEX_PROGRAM_ARB
);
2490 maxUniforms
= ctx
->Const
.VertexProgram
.MaxUniformComponents
/ 4;
2492 if (prog
->Parameters
->NumParameters
> maxUniforms
) {
2493 slang_info_log_error(log
, "Constant/uniform register limit exceeded "
2494 "(max=%u vec4)", maxUniforms
);
2499 (void) emit(&emitInfo
, n
);
2501 /* finish up by adding the END opcode to program */
2503 struct prog_instruction
*inst
;
2504 inst
= new_instruction(&emitInfo
, OPCODE_END
);
2507 _slang_resolve_subroutines(&emitInfo
);
2512 printf("*********** End emit code (%u inst):\n", prog
->NumInstructions
);
2513 _mesa_print_program(prog
);
2514 _mesa_print_program_parameters(ctx
,prog
);