2 * Mesa 3-D graphics library
4 * Copyright (C) 2005-2008 Brian Paul All Rights Reserved.
5 * Copyright (C) 2008 VMware, Inc. All Rights Reserved.
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
11 * and/or sell copies of the Software, and to permit persons to whom the
12 * Software is furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included
15 * in all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
18 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * BRIAN PAUL BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
21 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
22 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 * Emit program instructions (PI code) from IR trees.
34 *** To emit GPU instructions, we basically just do an in-order traversal
39 #include "main/imports.h"
40 #include "main/context.h"
41 #include "main/macros.h"
42 #include "shader/program.h"
43 #include "shader/prog_instruction.h"
44 #include "shader/prog_parameter.h"
45 #include "shader/prog_print.h"
46 #include "slang_builtin.h"
47 #include "slang_emit.h"
48 #include "slang_mem.h"
51 #define PEEPHOLE_OPTIMIZATIONS 1
59 struct gl_program
*prog
;
60 struct gl_program
**Subroutines
;
61 GLuint NumSubroutines
;
63 GLuint MaxInstructions
; /**< size of prog->Instructions[] buffer */
65 GLboolean UnresolvedFunctions
;
67 /* code-gen options */
68 GLboolean EmitHighLevelInstructions
;
69 GLboolean EmitCondCodes
;
70 GLboolean EmitComments
;
71 GLboolean EmitBeginEndSub
; /* XXX TEMPORARY */
76 static struct gl_program
*
77 new_subroutine(slang_emit_info
*emitInfo
, GLuint
*id
)
79 GET_CURRENT_CONTEXT(ctx
);
80 const GLuint n
= emitInfo
->NumSubroutines
;
82 emitInfo
->Subroutines
= (struct gl_program
**)
83 _mesa_realloc(emitInfo
->Subroutines
,
84 n
* sizeof(struct gl_program
),
85 (n
+ 1) * sizeof(struct gl_program
));
86 emitInfo
->Subroutines
[n
] = ctx
->Driver
.NewProgram(ctx
, emitInfo
->prog
->Target
, 0);
87 emitInfo
->Subroutines
[n
]->Parameters
= emitInfo
->prog
->Parameters
;
88 emitInfo
->NumSubroutines
++;
90 return emitInfo
->Subroutines
[n
];
95 * Convert a writemask to a swizzle. Used for testing cond codes because
96 * we only want to test the cond code component(s) that was set by the
97 * previous instruction.
100 writemask_to_swizzle(GLuint writemask
)
102 if (writemask
== WRITEMASK_X
)
104 if (writemask
== WRITEMASK_Y
)
106 if (writemask
== WRITEMASK_Z
)
108 if (writemask
== WRITEMASK_W
)
110 return SWIZZLE_XYZW
; /* shouldn't be hit */
115 * Convert a swizzle mask to a writemask.
116 * Note that the slang_ir_storage->Swizzle field can represent either a
117 * swizzle mask or a writemask, depending on how it's used. For example,
118 * when we parse "direction.yz" alone, we don't know whether .yz is a
119 * writemask or a swizzle. In this case, we encode ".yz" in store->Swizzle
120 * as a swizzle mask (.yz?? actually). Later, if direction.yz is used as
121 * an R-value, we use store->Swizzle as-is. Otherwise, if direction.yz is
122 * used as an L-value, we convert it to a writemask.
125 swizzle_to_writemask(GLuint swizzle
)
127 GLuint i
, writemask
= 0x0;
128 for (i
= 0; i
< 4; i
++) {
129 GLuint swz
= GET_SWZ(swizzle
, i
);
130 if (swz
<= SWIZZLE_W
) {
131 writemask
|= (1 << swz
);
139 * Swizzle a swizzle (function composition).
140 * That is, return swz2(swz1), or said another way: swz1.szw2
141 * Example: swizzle_swizzle(".zwxx", ".xxyw") yields ".zzwx"
144 _slang_swizzle_swizzle(GLuint swz1
, GLuint swz2
)
147 for (i
= 0; i
< 4; i
++) {
148 GLuint c
= GET_SWZ(swz2
, i
);
150 s
[i
] = GET_SWZ(swz1
, c
);
154 swz
= MAKE_SWIZZLE4(s
[0], s
[1], s
[2], s
[3]);
160 * Return the default swizzle mask for accessing a variable of the
161 * given size (in floats). If size = 1, comp is used to identify
162 * which component [0..3] of the register holds the variable.
165 _slang_var_swizzle(GLint size
, GLint comp
)
169 return MAKE_SWIZZLE4(comp
, SWIZZLE_NIL
, SWIZZLE_NIL
, SWIZZLE_NIL
);
171 return MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_NIL
, SWIZZLE_NIL
);
173 return MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Z
, SWIZZLE_NIL
);
182 * Allocate storage for the given node (if it hasn't already been allocated).
184 * Typically this is temporary storage for an intermediate result (such as
185 * for a multiply or add, etc).
187 * If n->Store does not exist it will be created and will be of the size
188 * specified by defaultSize.
191 alloc_node_storage(slang_emit_info
*emitInfo
, slang_ir_node
*n
,
196 assert(defaultSize
> 0);
197 n
->Store
= _slang_new_ir_storage(PROGRAM_TEMPORARY
, -1, defaultSize
);
200 /* now allocate actual register(s). I.e. set n->Store->Index >= 0 */
201 if (n
->Store
->Index
< 0) {
202 if (!_slang_alloc_temp(emitInfo
->vt
, n
->Store
)) {
203 slang_info_log_error(emitInfo
->log
,
204 "Ran out of registers, too many temporaries");
205 _slang_free(n
->Store
);
215 * Free temporary storage, if n->Store is, in fact, temp storage.
219 free_node_storage(slang_var_table
*vt
, slang_ir_node
*n
)
221 if (n
->Store
->File
== PROGRAM_TEMPORARY
&&
222 n
->Store
->Index
>= 0 &&
223 n
->Opcode
!= IR_SWIZZLE
) {
224 if (_slang_is_temp(vt
, n
->Store
)) {
225 _slang_free_temp(vt
, n
->Store
);
226 n
->Store
->Index
= -1;
227 n
->Store
= NULL
; /* XXX this may not be needed */
234 * Helper function to allocate a short-term temporary.
235 * Free it with _slang_free_temp().
238 alloc_local_temp(slang_emit_info
*emitInfo
, slang_ir_storage
*temp
, GLint size
)
242 _mesa_bzero(temp
, sizeof(*temp
));
244 temp
->File
= PROGRAM_TEMPORARY
;
246 return _slang_alloc_temp(emitInfo
->vt
, temp
);
251 * Remove any SWIZZLE_NIL terms from given swizzle mask.
252 * For a swizzle like .z??? generate .zzzz (replicate single component).
253 * Else, for .wx?? generate .wxzw (insert default component for the position).
256 fix_swizzle(GLuint swizzle
)
258 GLuint c0
= GET_SWZ(swizzle
, 0),
259 c1
= GET_SWZ(swizzle
, 1),
260 c2
= GET_SWZ(swizzle
, 2),
261 c3
= GET_SWZ(swizzle
, 3);
262 if (c1
== SWIZZLE_NIL
&& c2
== SWIZZLE_NIL
&& c3
== SWIZZLE_NIL
) {
263 /* smear first component across all positions */
267 /* insert default swizzle components */
268 if (c0
== SWIZZLE_NIL
)
270 if (c1
== SWIZZLE_NIL
)
272 if (c2
== SWIZZLE_NIL
)
274 if (c3
== SWIZZLE_NIL
)
277 return MAKE_SWIZZLE4(c0
, c1
, c2
, c3
);
283 * Convert IR storage to an instruction dst register.
286 storage_to_dst_reg(struct prog_dst_register
*dst
, const slang_ir_storage
*st
)
288 const GLboolean relAddr
= st
->RelAddr
;
289 const GLint size
= st
->Size
;
290 GLint index
= st
->Index
;
291 GLuint swizzle
= st
->Swizzle
;
294 /* if this is storage relative to some parent storage, walk up the tree */
297 assert(st
->Index
>= 0);
299 swizzle
= _slang_swizzle_swizzle(st
->Swizzle
, swizzle
);
302 assert(st
->File
!= PROGRAM_UNDEFINED
);
303 dst
->File
= st
->File
;
311 if (swizzle
!= SWIZZLE_XYZW
) {
312 dst
->WriteMask
= swizzle_to_writemask(swizzle
);
317 dst
->WriteMask
= WRITEMASK_X
<< GET_SWZ(st
->Swizzle
, 0);
320 dst
->WriteMask
= WRITEMASK_XY
;
323 dst
->WriteMask
= WRITEMASK_XYZ
;
326 dst
->WriteMask
= WRITEMASK_XYZW
;
329 ; /* error would have been caught above */
333 dst
->RelAddr
= relAddr
;
338 * Convert IR storage to an instruction src register.
341 storage_to_src_reg(struct prog_src_register
*src
, const slang_ir_storage
*st
)
343 const GLboolean relAddr
= st
->RelAddr
;
344 GLint index
= st
->Index
;
345 GLuint swizzle
= st
->Swizzle
;
347 /* if this is storage relative to some parent storage, walk up the tree */
352 /* an error should have been reported already */
355 assert(st
->Index
>= 0);
357 swizzle
= _slang_swizzle_swizzle(fix_swizzle(st
->Swizzle
), swizzle
);
360 assert(st
->File
>= 0);
361 #if 1 /* XXX temporary */
362 if (st
->File
== PROGRAM_UNDEFINED
) {
363 slang_ir_storage
*st0
= (slang_ir_storage
*) st
;
364 st0
->File
= PROGRAM_TEMPORARY
;
367 assert(st
->File
< PROGRAM_UNDEFINED
);
368 src
->File
= st
->File
;
373 swizzle
= fix_swizzle(swizzle
);
374 assert(GET_SWZ(swizzle
, 0) <= SWIZZLE_W
);
375 assert(GET_SWZ(swizzle
, 1) <= SWIZZLE_W
);
376 assert(GET_SWZ(swizzle
, 2) <= SWIZZLE_W
);
377 assert(GET_SWZ(swizzle
, 3) <= SWIZZLE_W
);
378 src
->Swizzle
= swizzle
;
380 src
->RelAddr
= relAddr
;
385 * Setup storage pointing to a scalar constant/literal.
388 constant_to_storage(slang_emit_info
*emitInfo
,
390 slang_ir_storage
*store
)
397 reg
= _mesa_add_unnamed_constant(emitInfo
->prog
->Parameters
,
400 memset(store
, 0, sizeof(*store
));
401 store
->File
= PROGRAM_CONSTANT
;
403 store
->Swizzle
= swizzle
;
408 * Add new instruction at end of given program.
409 * \param prog the program to append instruction onto
410 * \param opcode opcode for the new instruction
411 * \return pointer to the new instruction
413 static struct prog_instruction
*
414 new_instruction(slang_emit_info
*emitInfo
, gl_inst_opcode opcode
)
416 struct gl_program
*prog
= emitInfo
->prog
;
417 struct prog_instruction
*inst
;
420 /* print prev inst */
421 if (prog
->NumInstructions
> 0) {
422 _mesa_print_instruction(prog
->Instructions
+ prog
->NumInstructions
- 1);
425 assert(prog
->NumInstructions
<= emitInfo
->MaxInstructions
);
427 if (prog
->NumInstructions
== emitInfo
->MaxInstructions
) {
428 /* grow the instruction buffer */
429 emitInfo
->MaxInstructions
+= 20;
431 _mesa_realloc_instructions(prog
->Instructions
,
432 prog
->NumInstructions
,
433 emitInfo
->MaxInstructions
);
434 if (!prog
->Instructions
) {
439 inst
= prog
->Instructions
+ prog
->NumInstructions
;
440 prog
->NumInstructions
++;
441 _mesa_init_instructions(inst
, 1);
442 inst
->Opcode
= opcode
;
443 inst
->BranchTarget
= -1; /* invalid */
445 printf("New inst %d: %p %s\n", prog->NumInstructions-1,(void*)inst,
446 _mesa_opcode_string(inst->Opcode));
452 static struct prog_instruction
*
453 emit_arl_load(slang_emit_info
*emitInfo
,
454 gl_register_file file
, GLint index
, GLuint swizzle
)
456 struct prog_instruction
*inst
= new_instruction(emitInfo
, OPCODE_ARL
);
458 inst
->SrcReg
[0].File
= file
;
459 inst
->SrcReg
[0].Index
= index
;
460 inst
->SrcReg
[0].Swizzle
= fix_swizzle(swizzle
);
461 inst
->DstReg
.File
= PROGRAM_ADDRESS
;
462 inst
->DstReg
.Index
= 0;
463 inst
->DstReg
.WriteMask
= WRITEMASK_X
;
470 * Emit a new instruction with given opcode, operands.
471 * At this point the instruction may have multiple indirect register
472 * loads/stores. We convert those into ARL loads and address-relative
473 * operands. See comments inside.
474 * At some point in the future we could directly emit indirectly addressed
475 * registers in Mesa GPU instructions.
477 static struct prog_instruction
*
478 emit_instruction(slang_emit_info
*emitInfo
,
479 gl_inst_opcode opcode
,
480 const slang_ir_storage
*dst
,
481 const slang_ir_storage
*src0
,
482 const slang_ir_storage
*src1
,
483 const slang_ir_storage
*src2
)
485 struct prog_instruction
*inst
;
486 GLuint numIndirect
= 0;
487 const slang_ir_storage
*src
[3];
488 slang_ir_storage newSrc
[3], newDst
;
492 isTemp
[0] = isTemp
[1] = isTemp
[2] = GL_FALSE
;
498 /* count up how many operands are indirect loads */
499 for (i
= 0; i
< 3; i
++) {
500 if (src
[i
] && src
[i
]->IsIndirect
)
503 if (dst
&& dst
->IsIndirect
)
506 /* Take special steps for indirect register loads.
507 * If we had multiple address registers this would be simpler.
508 * For example, this GLSL code:
509 * x[i] = y[j] + z[k];
510 * would translate into something like:
514 * ADD TEMP[ADDR.x+5], TEMP[ADDR.y+9], TEMP[ADDR.z+4];
515 * But since we currently only have one address register we have to do this:
517 * MOV t1, TEMP[ADDR.x+9];
519 * MOV t2, TEMP[ADDR.x+4];
521 * ADD TEMP[ADDR.x+5], t1, t2;
522 * The code here figures this out...
524 if (numIndirect
> 0) {
525 for (i
= 0; i
< 3; i
++) {
526 if (src
[i
] && src
[i
]->IsIndirect
) {
527 /* load the ARL register with the indirect register */
528 emit_arl_load(emitInfo
,
529 src
[i
]->IndirectFile
,
530 src
[i
]->IndirectIndex
,
531 src
[i
]->IndirectSwizzle
);
533 if (numIndirect
> 1) {
534 /* Need to load src[i] into a temporary register */
535 slang_ir_storage srcRelAddr
;
536 alloc_local_temp(emitInfo
, &newSrc
[i
], src
[i
]->Size
);
539 /* set RelAddr flag on src register */
540 srcRelAddr
= *src
[i
];
541 srcRelAddr
.RelAddr
= GL_TRUE
;
542 srcRelAddr
.IsIndirect
= GL_FALSE
; /* not really needed */
544 /* MOV newSrc, srcRelAddr; */
545 inst
= emit_instruction(emitInfo
,
555 /* just rewrite the src[i] storage to be ARL-relative */
557 newSrc
[i
].RelAddr
= GL_TRUE
;
558 newSrc
[i
].IsIndirect
= GL_FALSE
; /* not really needed */
565 /* Take special steps for indirect dest register write */
566 if (dst
&& dst
->IsIndirect
) {
567 /* load the ARL register with the indirect register */
568 emit_arl_load(emitInfo
,
571 dst
->IndirectSwizzle
);
573 newDst
.RelAddr
= GL_TRUE
;
574 newDst
.IsIndirect
= GL_FALSE
;
578 /* OK, emit the instruction and its dst, src regs */
579 inst
= new_instruction(emitInfo
, opcode
);
584 storage_to_dst_reg(&inst
->DstReg
, dst
);
586 for (i
= 0; i
< 3; i
++) {
588 storage_to_src_reg(&inst
->SrcReg
[i
], src
[i
]);
591 /* Free any temp registers that we allocated above */
592 for (i
= 0; i
< 3; i
++) {
594 _slang_free_temp(emitInfo
->vt
, &newSrc
[i
]);
603 * Put a comment on the given instruction.
606 inst_comment(struct prog_instruction
*inst
, const char *comment
)
609 inst
->Comment
= _mesa_strdup(comment
);
615 * Return pointer to last instruction in program.
617 static struct prog_instruction
*
618 prev_instruction(slang_emit_info
*emitInfo
)
620 struct gl_program
*prog
= emitInfo
->prog
;
621 if (prog
->NumInstructions
== 0)
624 return prog
->Instructions
+ prog
->NumInstructions
- 1;
628 static struct prog_instruction
*
629 emit(slang_emit_info
*emitInfo
, slang_ir_node
*n
);
633 * Return an annotation string for given node's storage.
636 storage_annotation(const slang_ir_node
*n
, const struct gl_program
*prog
)
639 const slang_ir_storage
*st
= n
->Store
;
640 static char s
[100] = "";
643 return _mesa_strdup("");
646 case PROGRAM_CONSTANT
:
647 if (st
->Index
>= 0) {
648 const GLfloat
*val
= prog
->Parameters
->ParameterValues
[st
->Index
];
649 if (st
->Swizzle
== SWIZZLE_NOOP
)
650 sprintf(s
, "{%g, %g, %g, %g}", val
[0], val
[1], val
[2], val
[3]);
652 sprintf(s
, "%g", val
[GET_SWZ(st
->Swizzle
, 0)]);
656 case PROGRAM_TEMPORARY
:
658 sprintf(s
, "%s", (char *) n
->Var
->a_name
);
660 sprintf(s
, "t[%d]", st
->Index
);
662 case PROGRAM_STATE_VAR
:
663 case PROGRAM_UNIFORM
:
664 sprintf(s
, "%s", prog
->Parameters
->Parameters
[st
->Index
].Name
);
666 case PROGRAM_VARYING
:
667 sprintf(s
, "%s", prog
->Varying
->Parameters
[st
->Index
].Name
);
670 sprintf(s
, "input[%d]", st
->Index
);
673 sprintf(s
, "output[%d]", st
->Index
);
678 return _mesa_strdup(s
);
686 * Return an annotation string for an instruction.
689 instruction_annotation(gl_inst_opcode opcode
, char *dstAnnot
,
690 char *srcAnnot0
, char *srcAnnot1
, char *srcAnnot2
)
693 const char *operator;
698 len
+= strlen(dstAnnot
);
700 dstAnnot
= _mesa_strdup("");
703 len
+= strlen(srcAnnot0
);
705 srcAnnot0
= _mesa_strdup("");
708 len
+= strlen(srcAnnot1
);
710 srcAnnot1
= _mesa_strdup("");
713 len
+= strlen(srcAnnot2
);
715 srcAnnot2
= _mesa_strdup("");
749 s
= (char *) malloc(len
);
750 sprintf(s
, "%s = %s %s %s %s", dstAnnot
,
751 srcAnnot0
, operator, srcAnnot1
, srcAnnot2
);
752 assert(_mesa_strlen(s
) < len
);
767 * Emit an instruction that's just a comment.
769 static struct prog_instruction
*
770 emit_comment(slang_emit_info
*emitInfo
, const char *comment
)
772 struct prog_instruction
*inst
= new_instruction(emitInfo
, OPCODE_NOP
);
774 inst_comment(inst
, comment
);
781 * Generate code for a simple arithmetic instruction.
782 * Either 1, 2 or 3 operands.
784 static struct prog_instruction
*
785 emit_arith(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
787 const slang_ir_info
*info
= _slang_ir_info(n
->Opcode
);
788 struct prog_instruction
*inst
;
792 assert(info
->InstOpcode
!= OPCODE_NOP
);
794 #if PEEPHOLE_OPTIMIZATIONS
795 /* Look for MAD opportunity */
796 if (info
->NumParams
== 2 &&
797 n
->Opcode
== IR_ADD
&& n
->Children
[0]->Opcode
== IR_MUL
) {
798 /* found pattern IR_ADD(IR_MUL(A, B), C) */
799 emit(emitInfo
, n
->Children
[0]->Children
[0]); /* A */
800 emit(emitInfo
, n
->Children
[0]->Children
[1]); /* B */
801 emit(emitInfo
, n
->Children
[1]); /* C */
802 alloc_node_storage(emitInfo
, n
, -1); /* dest */
804 inst
= emit_instruction(emitInfo
,
807 n
->Children
[0]->Children
[0]->Store
,
808 n
->Children
[0]->Children
[1]->Store
,
809 n
->Children
[1]->Store
);
811 free_node_storage(emitInfo
->vt
, n
->Children
[0]->Children
[0]);
812 free_node_storage(emitInfo
->vt
, n
->Children
[0]->Children
[1]);
813 free_node_storage(emitInfo
->vt
, n
->Children
[1]);
817 if (info
->NumParams
== 2 &&
818 n
->Opcode
== IR_ADD
&& n
->Children
[1]->Opcode
== IR_MUL
) {
819 /* found pattern IR_ADD(A, IR_MUL(B, C)) */
820 emit(emitInfo
, n
->Children
[0]); /* A */
821 emit(emitInfo
, n
->Children
[1]->Children
[0]); /* B */
822 emit(emitInfo
, n
->Children
[1]->Children
[1]); /* C */
823 alloc_node_storage(emitInfo
, n
, -1); /* dest */
825 inst
= emit_instruction(emitInfo
,
828 n
->Children
[1]->Children
[0]->Store
,
829 n
->Children
[1]->Children
[1]->Store
,
830 n
->Children
[0]->Store
);
832 free_node_storage(emitInfo
->vt
, n
->Children
[1]->Children
[0]);
833 free_node_storage(emitInfo
->vt
, n
->Children
[1]->Children
[1]);
834 free_node_storage(emitInfo
->vt
, n
->Children
[0]);
839 /* gen code for children, may involve temp allocation */
840 for (i
= 0; i
< info
->NumParams
; i
++) {
841 emit(emitInfo
, n
->Children
[i
]);
842 if (!n
->Children
[i
] || !n
->Children
[i
]->Store
) {
849 alloc_node_storage(emitInfo
, n
, -1);
851 inst
= emit_instruction(emitInfo
,
854 (info
->NumParams
> 0 ? n
->Children
[0]->Store
: NULL
),
855 (info
->NumParams
> 1 ? n
->Children
[1]->Store
: NULL
),
856 (info
->NumParams
> 2 ? n
->Children
[2]->Store
: NULL
)
860 for (i
= 0; i
< info
->NumParams
; i
++)
861 free_node_storage(emitInfo
->vt
, n
->Children
[i
]);
868 * Emit code for == and != operators. These could normally be handled
869 * by emit_arith() except we need to be able to handle structure comparisons.
871 static struct prog_instruction
*
872 emit_compare(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
874 struct prog_instruction
*inst
= NULL
;
877 assert(n
->Opcode
== IR_EQUAL
|| n
->Opcode
== IR_NOTEQUAL
);
879 /* gen code for children */
880 emit(emitInfo
, n
->Children
[0]);
881 emit(emitInfo
, n
->Children
[1]);
883 if (n
->Children
[0]->Store
->Size
!= n
->Children
[1]->Store
->Size
) {
884 /* XXX this error should have been caught in slang_codegen.c */
885 slang_info_log_error(emitInfo
->log
, "invalid operands to == or !=");
890 /* final result is 1 bool */
891 if (!alloc_node_storage(emitInfo
, n
, 1))
894 size
= n
->Children
[0]->Store
->Size
;
897 gl_inst_opcode opcode
= n
->Opcode
== IR_EQUAL
? OPCODE_SEQ
: OPCODE_SNE
;
898 inst
= emit_instruction(emitInfo
,
901 n
->Children
[0]->Store
,
902 n
->Children
[1]->Store
,
905 else if (size
<= 4) {
906 /* compare two vectors.
907 * Unfortunately, there's no instruction to compare vectors and
908 * return a scalar result. Do it with some compare and dot product
912 gl_inst_opcode dotOp
;
913 slang_ir_storage tempStore
;
915 if (!alloc_local_temp(emitInfo
, &tempStore
, 4)) {
923 swizzle
= SWIZZLE_XYZW
;
925 else if (size
== 3) {
927 swizzle
= SWIZZLE_XYZW
;
931 dotOp
= OPCODE_DP3
; /* XXX use OPCODE_DP2 eventually */
932 swizzle
= MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
, SWIZZLE_Y
, SWIZZLE_Y
);
935 /* Compute inequality (temp = (A != B)) */
936 inst
= emit_instruction(emitInfo
,
939 n
->Children
[0]->Store
,
940 n
->Children
[1]->Store
,
942 inst_comment(inst
, "Compare values");
944 /* Compute val = DOT(temp, temp) (reduction) */
945 inst
= emit_instruction(emitInfo
,
951 inst
->SrcReg
[0].Swizzle
= inst
->SrcReg
[1].Swizzle
= swizzle
; /*override*/
952 inst_comment(inst
, "Reduce vec to bool");
954 _slang_free_temp(emitInfo
->vt
, &tempStore
); /* free temp */
956 if (n
->Opcode
== IR_EQUAL
) {
957 /* compute val = !val.x with SEQ val, val, 0; */
958 slang_ir_storage zero
;
959 constant_to_storage(emitInfo
, 0.0, &zero
);
960 inst
= emit_instruction(emitInfo
,
966 inst_comment(inst
, "Invert true/false");
970 /* size > 4, struct or array compare.
971 * XXX this won't work reliably for structs with padding!!
973 GLint i
, num
= (n
->Children
[0]->Store
->Size
+ 3) / 4;
974 slang_ir_storage accTemp
, sneTemp
;
976 if (!alloc_local_temp(emitInfo
, &accTemp
, 4))
979 if (!alloc_local_temp(emitInfo
, &sneTemp
, 4))
982 for (i
= 0; i
< num
; i
++) {
983 slang_ir_storage srcStore0
= *n
->Children
[0]->Store
;
984 slang_ir_storage srcStore1
= *n
->Children
[1]->Store
;
985 srcStore0
.Index
+= i
;
986 srcStore1
.Index
+= i
;
989 /* SNE accTemp, left[i], right[i] */
990 inst
= emit_instruction(emitInfo
, OPCODE_SNE
,
995 inst_comment(inst
, "Begin struct/array comparison");
998 /* SNE sneTemp, left[i], right[i] */
999 inst
= emit_instruction(emitInfo
, OPCODE_SNE
,
1000 &sneTemp
, /* dest */
1004 /* ADD accTemp, accTemp, sneTemp; # like logical-OR */
1005 inst
= emit_instruction(emitInfo
, OPCODE_ADD
,
1006 &accTemp
, /* dest */
1013 /* compute accTemp.x || accTemp.y || accTemp.z || accTemp.w with DOT4 */
1014 inst
= emit_instruction(emitInfo
, OPCODE_DP4
,
1019 inst_comment(inst
, "End struct/array comparison");
1021 if (n
->Opcode
== IR_EQUAL
) {
1022 /* compute tmp.x = !tmp.x via tmp.x = (tmp.x == 0) */
1023 slang_ir_storage zero
;
1024 constant_to_storage(emitInfo
, 0.0, &zero
);
1025 inst
= emit_instruction(emitInfo
, OPCODE_SEQ
,
1026 n
->Store
, /* dest */
1030 inst_comment(inst
, "Invert true/false");
1033 _slang_free_temp(emitInfo
->vt
, &accTemp
);
1034 _slang_free_temp(emitInfo
->vt
, &sneTemp
);
1038 free_node_storage(emitInfo
->vt
, n
->Children
[0]);
1039 free_node_storage(emitInfo
->vt
, n
->Children
[1]);
1047 * Generate code for an IR_CLAMP instruction.
1049 static struct prog_instruction
*
1050 emit_clamp(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1052 struct prog_instruction
*inst
;
1053 slang_ir_node tmpNode
;
1055 assert(n
->Opcode
== IR_CLAMP
);
1061 inst
= emit(emitInfo
, n
->Children
[0]);
1063 /* If lower limit == 0.0 and upper limit == 1.0,
1064 * set prev instruction's SaturateMode field to SATURATE_ZERO_ONE.
1066 * emit OPCODE_MIN, OPCODE_MAX sequence.
1069 /* XXX this isn't quite finished yet */
1070 if (n
->Children
[1]->Opcode
== IR_FLOAT
&&
1071 n
->Children
[1]->Value
[0] == 0.0 &&
1072 n
->Children
[1]->Value
[1] == 0.0 &&
1073 n
->Children
[1]->Value
[2] == 0.0 &&
1074 n
->Children
[1]->Value
[3] == 0.0 &&
1075 n
->Children
[2]->Opcode
== IR_FLOAT
&&
1076 n
->Children
[2]->Value
[0] == 1.0 &&
1077 n
->Children
[2]->Value
[1] == 1.0 &&
1078 n
->Children
[2]->Value
[2] == 1.0 &&
1079 n
->Children
[2]->Value
[3] == 1.0) {
1081 inst
= prev_instruction(prog
);
1083 if (inst
&& inst
->Opcode
!= OPCODE_NOP
) {
1084 /* and prev instruction's DstReg matches n->Children[0]->Store */
1085 inst
->SaturateMode
= SATURATE_ZERO_ONE
;
1086 n
->Store
= n
->Children
[0]->Store
;
1092 if (!alloc_node_storage(emitInfo
, n
, n
->Children
[0]->Store
->Size
))
1095 emit(emitInfo
, n
->Children
[1]);
1096 emit(emitInfo
, n
->Children
[2]);
1098 /* Some GPUs don't allow reading from output registers. So if the
1099 * dest for this clamp() is an output reg, we can't use that reg for
1100 * the intermediate result. Use a temp register instead.
1102 _mesa_bzero(&tmpNode
, sizeof(tmpNode
));
1103 alloc_node_storage(emitInfo
, &tmpNode
, n
->Store
->Size
);
1105 /* tmp = max(ch[0], ch[1]) */
1106 inst
= emit_instruction(emitInfo
, OPCODE_MAX
,
1107 tmpNode
.Store
, /* dest */
1108 n
->Children
[0]->Store
,
1109 n
->Children
[1]->Store
,
1112 /* n->dest = min(tmp, ch[2]) */
1113 inst
= emit_instruction(emitInfo
, OPCODE_MIN
,
1114 n
->Store
, /* dest */
1116 n
->Children
[2]->Store
,
1119 free_node_storage(emitInfo
->vt
, &tmpNode
);
1125 static struct prog_instruction
*
1126 emit_negation(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1128 /* Implement as MOV dst, -src; */
1129 /* XXX we could look at the previous instruction and in some circumstances
1130 * modify it to accomplish the negation.
1132 struct prog_instruction
*inst
;
1134 emit(emitInfo
, n
->Children
[0]);
1136 if (!alloc_node_storage(emitInfo
, n
, n
->Children
[0]->Store
->Size
))
1139 inst
= emit_instruction(emitInfo
,
1141 n
->Store
, /* dest */
1142 n
->Children
[0]->Store
,
1145 inst
->SrcReg
[0].Negate
= NEGATE_XYZW
;
1150 static struct prog_instruction
*
1151 emit_label(slang_emit_info
*emitInfo
, const slang_ir_node
*n
)
1155 /* XXX this fails in loop tail code - investigate someday */
1156 assert(_slang_label_get_location(n
->Label
) < 0);
1157 _slang_label_set_location(n
->Label
, emitInfo
->prog
->NumInstructions
,
1160 if (_slang_label_get_location(n
->Label
) < 0)
1161 _slang_label_set_location(n
->Label
, emitInfo
->prog
->NumInstructions
,
1169 * Emit code for a function call.
1170 * Note that for each time a function is called, we emit the function's
1171 * body code again because the set of available registers may be different.
1173 static struct prog_instruction
*
1174 emit_fcall(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1176 struct gl_program
*progSave
;
1177 struct prog_instruction
*inst
;
1178 GLuint subroutineId
;
1181 assert(n
->Opcode
== IR_CALL
);
1184 /* save/push cur program */
1185 maxInstSave
= emitInfo
->MaxInstructions
;
1186 progSave
= emitInfo
->prog
;
1188 emitInfo
->prog
= new_subroutine(emitInfo
, &subroutineId
);
1189 emitInfo
->MaxInstructions
= emitInfo
->prog
->NumInstructions
;
1191 _slang_label_set_location(n
->Label
, emitInfo
->prog
->NumInstructions
,
1194 if (emitInfo
->EmitBeginEndSub
) {
1195 /* BGNSUB isn't a real instruction.
1196 * We require a label (i.e. "foobar:") though, if we're going to
1197 * print the program in the NV format. The BNGSUB instruction is
1198 * really just a NOP to attach the label to.
1200 inst
= new_instruction(emitInfo
, OPCODE_BGNSUB
);
1204 inst_comment(inst
, n
->Label
->Name
);
1207 /* body of function: */
1208 emit(emitInfo
, n
->Children
[0]);
1209 n
->Store
= n
->Children
[0]->Store
;
1211 /* add RET instruction now, if needed */
1212 inst
= prev_instruction(emitInfo
);
1213 if (inst
&& inst
->Opcode
!= OPCODE_RET
) {
1214 inst
= new_instruction(emitInfo
, OPCODE_RET
);
1220 if (emitInfo
->EmitBeginEndSub
) {
1221 inst
= new_instruction(emitInfo
, OPCODE_ENDSUB
);
1225 inst_comment(inst
, n
->Label
->Name
);
1228 /* pop/restore cur program */
1229 emitInfo
->prog
= progSave
;
1230 emitInfo
->MaxInstructions
= maxInstSave
;
1232 /* emit the function call */
1233 inst
= new_instruction(emitInfo
, OPCODE_CAL
);
1237 /* The branch target is just the subroutine number (changed later) */
1238 inst
->BranchTarget
= subroutineId
;
1239 inst_comment(inst
, n
->Label
->Name
);
1240 assert(inst
->BranchTarget
>= 0);
1247 * Emit code for a 'return' statement.
1249 static struct prog_instruction
*
1250 emit_return(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1252 struct prog_instruction
*inst
;
1254 assert(n
->Opcode
== IR_RETURN
);
1256 inst
= new_instruction(emitInfo
, OPCODE_RET
);
1258 inst
->DstReg
.CondMask
= COND_TR
; /* always return */
1264 static struct prog_instruction
*
1265 emit_kill(slang_emit_info
*emitInfo
)
1267 struct gl_fragment_program
*fp
;
1268 struct prog_instruction
*inst
;
1269 /* NV-KILL - discard fragment depending on condition code.
1270 * Note that ARB-KILL depends on sign of vector operand.
1272 inst
= new_instruction(emitInfo
, OPCODE_KIL_NV
);
1276 inst
->DstReg
.CondMask
= COND_TR
; /* always kill */
1278 assert(emitInfo
->prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
);
1279 fp
= (struct gl_fragment_program
*) emitInfo
->prog
;
1280 fp
->UsesKill
= GL_TRUE
;
1286 static struct prog_instruction
*
1287 emit_tex(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1289 struct prog_instruction
*inst
;
1290 gl_inst_opcode opcode
;
1291 GLboolean shadow
= GL_FALSE
;
1293 switch (n
->Opcode
) {
1295 opcode
= OPCODE_TEX
;
1298 opcode
= OPCODE_TEX
;
1302 opcode
= OPCODE_TXB
;
1305 opcode
= OPCODE_TXB
;
1309 opcode
= OPCODE_TXP
;
1312 opcode
= OPCODE_TXP
;
1316 _mesa_problem(NULL
, "Bad IR TEX code");
1320 if (n
->Children
[0]->Opcode
== IR_ELEMENT
) {
1321 /* array is the sampler (a uniform which'll indicate the texture unit) */
1322 assert(n
->Children
[0]->Children
[0]->Store
);
1323 assert(n
->Children
[0]->Children
[0]->Store
->File
== PROGRAM_SAMPLER
);
1325 emit(emitInfo
, n
->Children
[0]);
1327 n
->Children
[0]->Var
= n
->Children
[0]->Children
[0]->Var
;
1329 /* this is the sampler (a uniform which'll indicate the texture unit) */
1330 assert(n
->Children
[0]->Store
);
1331 assert(n
->Children
[0]->Store
->File
== PROGRAM_SAMPLER
);
1334 /* emit code for the texcoord operand */
1335 (void) emit(emitInfo
, n
->Children
[1]);
1337 /* alloc storage for result of texture fetch */
1338 if (!alloc_node_storage(emitInfo
, n
, 4))
1341 /* emit TEX instruction; Child[1] is the texcoord */
1342 inst
= emit_instruction(emitInfo
,
1345 n
->Children
[1]->Store
,
1349 inst
->TexShadow
= shadow
;
1351 /* Store->Index is the uniform/sampler index */
1352 assert(n
->Children
[0]->Store
->Index
>= 0);
1353 inst
->TexSrcUnit
= n
->Children
[0]->Store
->Index
;
1354 inst
->TexSrcTarget
= n
->Children
[0]->Store
->TexTarget
;
1356 /* mark the sampler as being used */
1357 _mesa_use_uniform(emitInfo
->prog
->Parameters
,
1358 (char *) n
->Children
[0]->Var
->a_name
);
1367 static struct prog_instruction
*
1368 emit_copy(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1370 struct prog_instruction
*inst
;
1372 assert(n
->Opcode
== IR_COPY
);
1375 emit(emitInfo
, n
->Children
[0]);
1376 if (!n
->Children
[0]->Store
|| n
->Children
[0]->Store
->Index
< 0) {
1377 /* an error should have been already recorded */
1382 assert(n
->Children
[1]);
1383 inst
= emit(emitInfo
, n
->Children
[1]);
1385 if (!n
->Children
[1]->Store
|| n
->Children
[1]->Store
->Index
< 0) {
1386 if (!emitInfo
->log
->text
&& !emitInfo
->UnresolvedFunctions
) {
1387 /* XXX this error should have been caught in slang_codegen.c */
1388 slang_info_log_error(emitInfo
->log
, "invalid assignment");
1393 assert(n
->Children
[1]->Store
->Index
>= 0);
1395 /*assert(n->Children[0]->Store->Size == n->Children[1]->Store->Size);*/
1397 n
->Store
= n
->Children
[0]->Store
;
1399 if (n
->Store
->File
== PROGRAM_SAMPLER
) {
1400 /* no code generated for sampler assignments,
1401 * just copy the sampler index/target at compile time.
1403 n
->Store
->Index
= n
->Children
[1]->Store
->Index
;
1404 n
->Store
->TexTarget
= n
->Children
[1]->Store
->TexTarget
;
1408 #if PEEPHOLE_OPTIMIZATIONS
1410 (n
->Children
[1]->Opcode
!= IR_SWIZZLE
) &&
1411 _slang_is_temp(emitInfo
->vt
, n
->Children
[1]->Store
) &&
1412 (inst
->DstReg
.File
== n
->Children
[1]->Store
->File
) &&
1413 (inst
->DstReg
.Index
== n
->Children
[1]->Store
->Index
) &&
1414 !n
->Children
[0]->Store
->IsIndirect
&&
1415 n
->Children
[0]->Store
->Size
<= 4) {
1416 /* Peephole optimization:
1417 * The Right-Hand-Side has its results in a temporary place.
1418 * Modify the RHS (and the prev instruction) to store its results
1419 * in the destination specified by n->Children[0].
1420 * Then, this MOVE is a no-op.
1428 /* fixup the previous instruction (which stored the RHS result) */
1429 assert(n
->Children
[0]->Store
->Index
>= 0);
1430 storage_to_dst_reg(&inst
->DstReg
, n
->Children
[0]->Store
);
1436 if (n
->Children
[0]->Store
->Size
> 4) {
1437 /* move matrix/struct etc (block of registers) */
1438 slang_ir_storage dstStore
= *n
->Children
[0]->Store
;
1439 slang_ir_storage srcStore
= *n
->Children
[1]->Store
;
1440 GLint size
= srcStore
.Size
;
1441 ASSERT(n
->Children
[1]->Store
->Swizzle
== SWIZZLE_NOOP
);
1445 inst
= emit_instruction(emitInfo
, OPCODE_MOV
,
1450 inst_comment(inst
, "IR_COPY block");
1457 /* single register move */
1458 char *srcAnnot
, *dstAnnot
;
1459 assert(n
->Children
[0]->Store
->Index
>= 0);
1460 inst
= emit_instruction(emitInfo
, OPCODE_MOV
,
1461 n
->Children
[0]->Store
, /* dest */
1462 n
->Children
[1]->Store
,
1465 dstAnnot
= storage_annotation(n
->Children
[0], emitInfo
->prog
);
1466 srcAnnot
= storage_annotation(n
->Children
[1], emitInfo
->prog
);
1467 inst
->Comment
= instruction_annotation(inst
->Opcode
, dstAnnot
,
1468 srcAnnot
, NULL
, NULL
);
1470 free_node_storage(emitInfo
->vt
, n
->Children
[1]);
1477 * An IR_COND node wraps a boolean expression which is used by an
1478 * IF or WHILE test. This is where we'll set condition codes, if needed.
1480 static struct prog_instruction
*
1481 emit_cond(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1483 struct prog_instruction
*inst
;
1485 assert(n
->Opcode
== IR_COND
);
1487 if (!n
->Children
[0])
1490 /* emit code for the expression */
1491 inst
= emit(emitInfo
, n
->Children
[0]);
1493 if (!n
->Children
[0]->Store
) {
1494 /* error recovery */
1498 assert(n
->Children
[0]->Store
);
1499 /*assert(n->Children[0]->Store->Size == 1);*/
1501 if (emitInfo
->EmitCondCodes
) {
1503 n
->Children
[0]->Store
&&
1504 inst
->DstReg
.File
== n
->Children
[0]->Store
->File
&&
1505 inst
->DstReg
.Index
== n
->Children
[0]->Store
->Index
) {
1506 /* The previous instruction wrote to the register who's value
1507 * we're testing. Just fix that instruction so that the
1508 * condition codes are computed.
1510 inst
->CondUpdate
= GL_TRUE
;
1511 n
->Store
= n
->Children
[0]->Store
;
1515 /* This'll happen for things like "if (i) ..." where no code
1516 * is normally generated for the expression "i".
1517 * Generate a move instruction just to set condition codes.
1519 if (!alloc_node_storage(emitInfo
, n
, 1))
1521 inst
= emit_instruction(emitInfo
, OPCODE_MOV
,
1522 n
->Store
, /* dest */
1523 n
->Children
[0]->Store
,
1526 inst
->CondUpdate
= GL_TRUE
;
1527 inst_comment(inst
, "COND expr");
1528 _slang_free_temp(emitInfo
->vt
, n
->Store
);
1533 /* No-op: the boolean result of the expression is in a regular reg */
1534 n
->Store
= n
->Children
[0]->Store
;
1543 static struct prog_instruction
*
1544 emit_not(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1546 static const struct {
1547 gl_inst_opcode op
, opNot
;
1549 { OPCODE_SLT
, OPCODE_SGE
},
1550 { OPCODE_SLE
, OPCODE_SGT
},
1551 { OPCODE_SGT
, OPCODE_SLE
},
1552 { OPCODE_SGE
, OPCODE_SLT
},
1553 { OPCODE_SEQ
, OPCODE_SNE
},
1554 { OPCODE_SNE
, OPCODE_SEQ
},
1557 struct prog_instruction
*inst
;
1558 slang_ir_storage zero
;
1562 inst
= emit(emitInfo
, n
->Children
[0]);
1564 #if PEEPHOLE_OPTIMIZATIONS
1566 /* if the prev instruction was a comparison instruction, invert it */
1567 for (i
= 0; operators
[i
].op
; i
++) {
1568 if (inst
->Opcode
== operators
[i
].op
) {
1569 inst
->Opcode
= operators
[i
].opNot
;
1570 n
->Store
= n
->Children
[0]->Store
;
1577 /* else, invert using SEQ (v = v == 0) */
1578 if (!alloc_node_storage(emitInfo
, n
, n
->Children
[0]->Store
->Size
))
1581 constant_to_storage(emitInfo
, 0.0, &zero
);
1582 inst
= emit_instruction(emitInfo
,
1585 n
->Children
[0]->Store
,
1588 inst_comment(inst
, "NOT");
1590 free_node_storage(emitInfo
->vt
, n
->Children
[0]);
1596 static struct prog_instruction
*
1597 emit_if(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1599 struct gl_program
*prog
= emitInfo
->prog
;
1600 GLuint ifInstLoc
, elseInstLoc
= 0;
1601 GLuint condWritemask
= 0;
1603 /* emit condition expression code */
1605 struct prog_instruction
*inst
;
1606 inst
= emit(emitInfo
, n
->Children
[0]);
1607 if (emitInfo
->EmitCondCodes
) {
1609 /* error recovery */
1612 condWritemask
= inst
->DstReg
.WriteMask
;
1616 if (!n
->Children
[0]->Store
)
1620 assert(n
->Children
[0]->Store
->Size
== 1); /* a bool! */
1623 ifInstLoc
= prog
->NumInstructions
;
1624 if (emitInfo
->EmitHighLevelInstructions
) {
1625 if (emitInfo
->EmitCondCodes
) {
1626 /* IF condcode THEN ... */
1627 struct prog_instruction
*ifInst
= new_instruction(emitInfo
, OPCODE_IF
);
1631 ifInst
->DstReg
.CondMask
= COND_NE
; /* if cond is non-zero */
1632 /* only test the cond code (1 of 4) that was updated by the
1633 * previous instruction.
1635 ifInst
->DstReg
.CondSwizzle
= writemask_to_swizzle(condWritemask
);
1638 /* IF src[0] THEN ... */
1639 emit_instruction(emitInfo
, OPCODE_IF
,
1641 n
->Children
[0]->Store
, /* op0 */
1647 /* conditional jump to else, or endif */
1648 struct prog_instruction
*ifInst
= new_instruction(emitInfo
, OPCODE_BRA
);
1652 ifInst
->DstReg
.CondMask
= COND_EQ
; /* BRA if cond is zero */
1653 inst_comment(ifInst
, "if zero");
1654 ifInst
->DstReg
.CondSwizzle
= writemask_to_swizzle(condWritemask
);
1658 emit(emitInfo
, n
->Children
[1]);
1660 if (n
->Children
[2]) {
1661 /* have else body */
1662 elseInstLoc
= prog
->NumInstructions
;
1663 if (emitInfo
->EmitHighLevelInstructions
) {
1664 struct prog_instruction
*inst
= new_instruction(emitInfo
, OPCODE_ELSE
);
1670 /* jump to endif instruction */
1671 struct prog_instruction
*inst
= new_instruction(emitInfo
, OPCODE_BRA
);
1675 inst_comment(inst
, "else");
1676 inst
->DstReg
.CondMask
= COND_TR
; /* always branch */
1678 prog
->Instructions
[ifInstLoc
].BranchTarget
= prog
->NumInstructions
;
1679 emit(emitInfo
, n
->Children
[2]);
1683 prog
->Instructions
[ifInstLoc
].BranchTarget
= prog
->NumInstructions
;
1686 if (emitInfo
->EmitHighLevelInstructions
) {
1687 struct prog_instruction
*inst
= new_instruction(emitInfo
, OPCODE_ENDIF
);
1693 if (n
->Children
[2]) {
1694 prog
->Instructions
[elseInstLoc
].BranchTarget
= prog
->NumInstructions
;
1700 static struct prog_instruction
*
1701 emit_loop(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1703 struct gl_program
*prog
= emitInfo
->prog
;
1704 struct prog_instruction
*endInst
;
1705 GLuint beginInstLoc
, tailInstLoc
, endInstLoc
;
1708 /* emit OPCODE_BGNLOOP */
1709 beginInstLoc
= prog
->NumInstructions
;
1710 if (emitInfo
->EmitHighLevelInstructions
) {
1711 struct prog_instruction
*inst
= new_instruction(emitInfo
, OPCODE_BGNLOOP
);
1718 emit(emitInfo
, n
->Children
[0]);
1721 tailInstLoc
= prog
->NumInstructions
;
1722 if (n
->Children
[1]) {
1723 if (emitInfo
->EmitComments
)
1724 emit_comment(emitInfo
, "Loop tail code:");
1725 emit(emitInfo
, n
->Children
[1]);
1728 endInstLoc
= prog
->NumInstructions
;
1729 if (emitInfo
->EmitHighLevelInstructions
) {
1730 /* emit OPCODE_ENDLOOP */
1731 endInst
= new_instruction(emitInfo
, OPCODE_ENDLOOP
);
1737 /* emit unconditional BRA-nch */
1738 endInst
= new_instruction(emitInfo
, OPCODE_BRA
);
1742 endInst
->DstReg
.CondMask
= COND_TR
; /* always true */
1744 /* ENDLOOP's BranchTarget points to the BGNLOOP inst */
1745 endInst
->BranchTarget
= beginInstLoc
;
1747 if (emitInfo
->EmitHighLevelInstructions
) {
1748 /* BGNLOOP's BranchTarget points to the ENDLOOP inst */
1749 prog
->Instructions
[beginInstLoc
].BranchTarget
= prog
->NumInstructions
-1;
1752 /* Done emitting loop code. Now walk over the loop's linked list of
1753 * BREAK and CONT nodes, filling in their BranchTarget fields (which
1754 * will point to the ENDLOOP+1 or BGNLOOP instructions, respectively).
1756 for (ir
= n
->List
; ir
; ir
= ir
->List
) {
1757 struct prog_instruction
*inst
= prog
->Instructions
+ ir
->InstLocation
;
1758 assert(inst
->BranchTarget
< 0);
1759 if (ir
->Opcode
== IR_BREAK
||
1760 ir
->Opcode
== IR_BREAK_IF_TRUE
) {
1761 assert(inst
->Opcode
== OPCODE_BRK
||
1762 inst
->Opcode
== OPCODE_BRA
);
1763 /* go to instruction after end of loop */
1764 inst
->BranchTarget
= endInstLoc
+ 1;
1767 assert(ir
->Opcode
== IR_CONT
||
1768 ir
->Opcode
== IR_CONT_IF_TRUE
);
1769 assert(inst
->Opcode
== OPCODE_CONT
||
1770 inst
->Opcode
== OPCODE_BRA
);
1771 /* go to instruction at tail of loop */
1772 inst
->BranchTarget
= endInstLoc
;
1780 * Unconditional "continue" or "break" statement.
1781 * Either OPCODE_CONT, OPCODE_BRK or OPCODE_BRA will be emitted.
1783 static struct prog_instruction
*
1784 emit_cont_break(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1786 gl_inst_opcode opcode
;
1787 struct prog_instruction
*inst
;
1789 if (n
->Opcode
== IR_CONT
) {
1790 /* we need to execute the loop's tail code before doing CONT */
1792 assert(n
->Parent
->Opcode
== IR_LOOP
);
1793 if (n
->Parent
->Children
[1]) {
1794 /* emit tail code */
1795 if (emitInfo
->EmitComments
) {
1796 emit_comment(emitInfo
, "continue - tail code:");
1798 emit(emitInfo
, n
->Parent
->Children
[1]);
1802 /* opcode selection */
1803 if (emitInfo
->EmitHighLevelInstructions
) {
1804 opcode
= (n
->Opcode
== IR_CONT
) ? OPCODE_CONT
: OPCODE_BRK
;
1807 opcode
= OPCODE_BRA
;
1809 n
->InstLocation
= emitInfo
->prog
->NumInstructions
;
1810 inst
= new_instruction(emitInfo
, opcode
);
1812 inst
->DstReg
.CondMask
= COND_TR
; /* always true */
1819 * Conditional "continue" or "break" statement.
1820 * Either OPCODE_CONT, OPCODE_BRK or OPCODE_BRA will be emitted.
1822 static struct prog_instruction
*
1823 emit_cont_break_if_true(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1825 struct prog_instruction
*inst
;
1827 assert(n
->Opcode
== IR_CONT_IF_TRUE
||
1828 n
->Opcode
== IR_BREAK_IF_TRUE
);
1830 /* evaluate condition expr, setting cond codes */
1831 inst
= emit(emitInfo
, n
->Children
[0]);
1832 if (emitInfo
->EmitCondCodes
) {
1834 inst
->CondUpdate
= GL_TRUE
;
1837 n
->InstLocation
= emitInfo
->prog
->NumInstructions
;
1839 /* opcode selection */
1840 if (emitInfo
->EmitHighLevelInstructions
) {
1841 const gl_inst_opcode opcode
1842 = (n
->Opcode
== IR_CONT_IF_TRUE
) ? OPCODE_CONT
: OPCODE_BRK
;
1843 if (emitInfo
->EmitCondCodes
) {
1844 /* Get the writemask from the previous instruction which set
1845 * the condcodes. Use that writemask as the CondSwizzle.
1847 const GLuint condWritemask
= inst
->DstReg
.WriteMask
;
1848 inst
= new_instruction(emitInfo
, opcode
);
1850 inst
->DstReg
.CondMask
= COND_NE
;
1851 inst
->DstReg
.CondSwizzle
= writemask_to_swizzle(condWritemask
);
1861 ifInstLoc
= emitInfo
->prog
->NumInstructions
;
1862 inst
= emit_instruction(emitInfo
, OPCODE_IF
,
1864 n
->Children
[0]->Store
,
1867 n
->InstLocation
= emitInfo
->prog
->NumInstructions
;
1869 inst
= new_instruction(emitInfo
, opcode
);
1873 inst
= new_instruction(emitInfo
, OPCODE_ENDIF
);
1878 emitInfo
->prog
->Instructions
[ifInstLoc
].BranchTarget
1879 = emitInfo
->prog
->NumInstructions
;
1884 const GLuint condWritemask
= inst
->DstReg
.WriteMask
;
1885 assert(emitInfo
->EmitCondCodes
);
1886 inst
= new_instruction(emitInfo
, OPCODE_BRA
);
1888 inst
->DstReg
.CondMask
= COND_NE
;
1889 inst
->DstReg
.CondSwizzle
= writemask_to_swizzle(condWritemask
);
1897 * Return the size of a swizzle mask given that some swizzle components
1898 * may be NIL/undefined. For example:
1899 * swizzle_size(".zzxx") = 4
1900 * swizzle_size(".xy??") = 2
1901 * swizzle_size(".w???") = 1
1904 swizzle_size(GLuint swizzle
)
1907 for (i
= 0; i
< 4; i
++) {
1908 if (GET_SWZ(swizzle
, i
) == SWIZZLE_NIL
)
1915 static struct prog_instruction
*
1916 emit_swizzle(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1918 struct prog_instruction
*inst
;
1920 inst
= emit(emitInfo
, n
->Children
[0]);
1922 if (!n
->Store
->Parent
) {
1923 /* this covers a case such as "(b ? p : q).x" */
1924 n
->Store
->Parent
= n
->Children
[0]->Store
;
1925 assert(n
->Store
->Parent
);
1929 const GLuint swizzle
= n
->Store
->Swizzle
;
1930 /* new storage is parent storage with updated Swizzle + Size fields */
1931 _slang_copy_ir_storage(n
->Store
, n
->Store
->Parent
);
1932 /* Apply this node's swizzle to parent's storage */
1933 n
->Store
->Swizzle
= _slang_swizzle_swizzle(n
->Store
->Swizzle
, swizzle
);
1935 n
->Store
->Size
= swizzle_size(n
->Store
->Swizzle
);
1938 assert(!n
->Store
->Parent
);
1939 assert(n
->Store
->Index
>= 0);
1946 * Dereference array element: element == array[index]
1947 * This basically involves emitting code for computing the array index
1948 * and updating the node/element's storage info.
1950 static struct prog_instruction
*
1951 emit_array_element(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
1953 slang_ir_storage
*arrayStore
, *indexStore
;
1954 const int elemSize
= n
->Store
->Size
; /* number of floats */
1955 const GLint elemSizeVec
= (elemSize
+ 3) / 4; /* number of vec4 */
1956 struct prog_instruction
*inst
;
1958 assert(n
->Opcode
== IR_ELEMENT
);
1959 assert(elemSize
> 0);
1961 /* special case for built-in state variables, like light state */
1963 slang_ir_storage
*root
= n
->Store
;
1964 assert(!root
->Parent
);
1965 while (root
->Parent
)
1966 root
= root
->Parent
;
1968 if (root
->File
== PROGRAM_STATE_VAR
) {
1971 _slang_alloc_statevar(n
, emitInfo
->prog
->Parameters
, &direct
);
1977 n
->Store
->Index
= index
;
1978 return NULL
; /* all done */
1983 /* do codegen for array itself */
1984 emit(emitInfo
, n
->Children
[0]);
1985 arrayStore
= n
->Children
[0]->Store
;
1987 /* The initial array element storage is the array's storage,
1988 * then modified below.
1990 _slang_copy_ir_storage(n
->Store
, arrayStore
);
1993 if (n
->Children
[1]->Opcode
== IR_FLOAT
) {
1994 /* Constant array index */
1995 const GLint element
= (GLint
) n
->Children
[1]->Value
[0];
1997 /* this element's storage is the array's storage, plus constant offset */
1998 n
->Store
->Index
+= elemSizeVec
* element
;
2001 /* Variable array index */
2003 /* do codegen for array index expression */
2004 emit(emitInfo
, n
->Children
[1]);
2005 indexStore
= n
->Children
[1]->Store
;
2007 if (indexStore
->IsIndirect
) {
2008 /* need to put the array index into a temporary since we can't
2009 * directly support a[b[i]] constructs.
2013 /*indexStore = tempstore();*/
2018 /* need to multiply array index by array element size */
2019 struct prog_instruction
*inst
;
2020 slang_ir_storage
*indexTemp
;
2021 slang_ir_storage elemSizeStore
;
2023 /* allocate 1 float indexTemp */
2024 indexTemp
= _slang_new_ir_storage(PROGRAM_TEMPORARY
, -1, 1);
2025 _slang_alloc_temp(emitInfo
->vt
, indexTemp
);
2027 /* allocate a constant containing the element size */
2028 constant_to_storage(emitInfo
, (float) elemSizeVec
, &elemSizeStore
);
2030 /* multiply array index by element size */
2031 inst
= emit_instruction(emitInfo
,
2033 indexTemp
, /* dest */
2034 indexStore
, /* the index */
2038 indexStore
= indexTemp
;
2041 if (arrayStore
->IsIndirect
) {
2042 /* ex: in a[i][j], a[i] (the arrayStore) is indirect */
2043 /* Need to add indexStore to arrayStore->Indirect store */
2044 slang_ir_storage indirectArray
;
2045 slang_ir_storage
*indexTemp
;
2047 _slang_init_ir_storage(&indirectArray
,
2048 arrayStore
->IndirectFile
,
2049 arrayStore
->IndirectIndex
,
2051 arrayStore
->IndirectSwizzle
);
2053 /* allocate 1 float indexTemp */
2054 indexTemp
= _slang_new_ir_storage(PROGRAM_TEMPORARY
, -1, 1);
2055 _slang_alloc_temp(emitInfo
->vt
, indexTemp
);
2057 inst
= emit_instruction(emitInfo
,
2059 indexTemp
, /* dest */
2060 indexStore
, /* the index */
2061 &indirectArray
, /* indirect array base */
2064 indexStore
= indexTemp
;
2067 /* update the array element storage info */
2068 n
->Store
->IsIndirect
= GL_TRUE
;
2069 n
->Store
->IndirectFile
= indexStore
->File
;
2070 n
->Store
->IndirectIndex
= indexStore
->Index
;
2071 n
->Store
->IndirectSwizzle
= indexStore
->Swizzle
;
2074 n
->Store
->Size
= elemSize
;
2075 n
->Store
->Swizzle
= _slang_var_swizzle(elemSize
, 0);
2077 return NULL
; /* no instruction */
2082 * Resolve storage for accessing a structure field.
2084 static struct prog_instruction
*
2085 emit_struct_field(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
2087 slang_ir_storage
*root
= n
->Store
;
2088 GLint fieldOffset
, fieldSize
;
2090 assert(n
->Opcode
== IR_FIELD
);
2092 assert(!root
->Parent
);
2093 while (root
->Parent
)
2094 root
= root
->Parent
;
2096 /* If this is the field of a state var, allocate constant/uniform
2097 * storage for it now if we haven't already.
2098 * Note that we allocate storage (uniform/constant slots) for state
2099 * variables here rather than at declaration time so we only allocate
2100 * space for the ones that we actually use!
2102 if (root
->File
== PROGRAM_STATE_VAR
) {
2104 GLint index
= _slang_alloc_statevar(n
, emitInfo
->prog
->Parameters
, &direct
);
2106 slang_info_log_error(emitInfo
->log
, "Error parsing state variable");
2110 root
->Index
= index
;
2111 return NULL
; /* all done */
2115 /* do codegen for struct */
2116 emit(emitInfo
, n
->Children
[0]);
2117 assert(n
->Children
[0]->Store
->Index
>= 0);
2120 fieldOffset
= n
->Store
->Index
;
2121 fieldSize
= n
->Store
->Size
;
2123 _slang_copy_ir_storage(n
->Store
, n
->Children
[0]->Store
);
2125 n
->Store
->Index
= n
->Children
[0]->Store
->Index
+ fieldOffset
/ 4;
2126 n
->Store
->Size
= fieldSize
;
2128 switch (fieldSize
) {
2131 GLint swz
= fieldOffset
% 4;
2132 n
->Store
->Swizzle
= MAKE_SWIZZLE4(swz
, swz
, swz
, swz
);
2136 n
->Store
->Swizzle
= MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
,
2137 SWIZZLE_NIL
, SWIZZLE_NIL
);
2140 n
->Store
->Swizzle
= MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_Y
,
2141 SWIZZLE_Z
, SWIZZLE_NIL
);
2144 n
->Store
->Swizzle
= SWIZZLE_XYZW
;
2147 assert(n
->Store
->Index
>= 0);
2149 return NULL
; /* no instruction */
2154 * Emit code for a variable declaration.
2155 * This usually doesn't result in any code generation, but just
2156 * memory allocation.
2158 static struct prog_instruction
*
2159 emit_var_decl(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
2162 assert(n
->Store
->File
!= PROGRAM_UNDEFINED
);
2163 assert(n
->Store
->Size
> 0);
2164 /*assert(n->Store->Index < 0);*/
2166 if (!n
->Var
|| n
->Var
->isTemp
) {
2167 /* a nameless/temporary variable, will be freed after first use */
2169 if (n
->Store
->Index
< 0 && !_slang_alloc_temp(emitInfo
->vt
, n
->Store
)) {
2170 slang_info_log_error(emitInfo
->log
,
2171 "Ran out of registers, too many temporaries");
2176 /* a regular variable */
2177 _slang_add_variable(emitInfo
->vt
, n
->Var
);
2178 if (!_slang_alloc_var(emitInfo
->vt
, n
->Store
)) {
2179 slang_info_log_error(emitInfo
->log
,
2180 "Ran out of registers, too many variables");
2184 printf("IR_VAR_DECL %s %d store %p\n",
2185 (char*) n->Var->a_name, n->Store->Index, (void*) n->Store);
2187 assert(n
->Var
->store
== n
->Store
);
2189 if (emitInfo
->EmitComments
) {
2190 /* emit NOP with comment describing the variable's storage location */
2192 sprintf(s
, "TEMP[%d]%s = variable %s (size %d)",
2194 _mesa_swizzle_string(n
->Store
->Swizzle
, 0, GL_FALSE
),
2195 (n
->Var
? (char *) n
->Var
->a_name
: "anonymous"),
2197 emit_comment(emitInfo
, s
);
2204 * Emit code for a reference to a variable.
2205 * Actually, no code is generated but we may do some memory allocation.
2206 * In particular, state vars (uniforms) are allocated on an as-needed basis.
2208 static struct prog_instruction
*
2209 emit_var_ref(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
2212 assert(n
->Store
->File
!= PROGRAM_UNDEFINED
);
2214 if (n
->Store
->File
== PROGRAM_STATE_VAR
&& n
->Store
->Index
< 0) {
2216 GLint index
= _slang_alloc_statevar(n
, emitInfo
->prog
->Parameters
, &direct
);
2220 /* XXX isn't this really an out of memory/resources error? */
2221 _mesa_snprintf(s
, sizeof(s
), "Undefined variable '%s'",
2222 (char *) n
->Var
->a_name
);
2223 slang_info_log_error(emitInfo
->log
, s
);
2227 n
->Store
->Index
= index
;
2229 else if (n
->Store
->File
== PROGRAM_UNIFORM
||
2230 n
->Store
->File
== PROGRAM_SAMPLER
) {
2231 /* mark var as used */
2232 _mesa_use_uniform(emitInfo
->prog
->Parameters
, (char *) n
->Var
->a_name
);
2234 else if (n
->Store
->File
== PROGRAM_INPUT
) {
2235 assert(n
->Store
->Index
>= 0);
2236 emitInfo
->prog
->InputsRead
|= (1 << n
->Store
->Index
);
2239 if (n
->Store
->Index
< 0) {
2240 /* probably ran out of registers */
2243 assert(n
->Store
->Size
> 0);
2249 static struct prog_instruction
*
2250 emit(slang_emit_info
*emitInfo
, slang_ir_node
*n
)
2252 struct prog_instruction
*inst
;
2256 if (emitInfo
->log
->error_flag
) {
2261 inst
= new_instruction(emitInfo
, OPCODE_NOP
);
2263 inst
->Comment
= _mesa_strdup(n
->Comment
);
2268 switch (n
->Opcode
) {
2270 /* sequence of two sub-trees */
2271 assert(n
->Children
[0]);
2272 assert(n
->Children
[1]);
2273 emit(emitInfo
, n
->Children
[0]);
2274 if (emitInfo
->log
->error_flag
)
2276 inst
= emit(emitInfo
, n
->Children
[1]);
2280 n
->Store
= n
->Children
[1]->Store
;
2284 /* new variable scope */
2285 _slang_push_var_table(emitInfo
->vt
);
2286 inst
= emit(emitInfo
, n
->Children
[0]);
2287 _slang_pop_var_table(emitInfo
->vt
);
2291 /* Variable declaration - allocate a register for it */
2292 inst
= emit_var_decl(emitInfo
, n
);
2296 /* Reference to a variable
2297 * Storage should have already been resolved/allocated.
2299 return emit_var_ref(emitInfo
, n
);
2302 return emit_array_element(emitInfo
, n
);
2304 return emit_struct_field(emitInfo
, n
);
2306 return emit_swizzle(emitInfo
, n
);
2308 /* Simple arithmetic */
2348 /* trinary operators */
2351 return emit_arith(emitInfo
, n
);
2355 return emit_compare(emitInfo
, n
);
2358 return emit_clamp(emitInfo
, n
);
2365 return emit_tex(emitInfo
, n
);
2367 return emit_negation(emitInfo
, n
);
2369 /* find storage location for this float constant */
2370 n
->Store
->Index
= _mesa_add_unnamed_constant(emitInfo
->prog
->Parameters
,
2373 &n
->Store
->Swizzle
);
2374 if (n
->Store
->Index
< 0) {
2375 slang_info_log_error(emitInfo
->log
, "Ran out of space for constants");
2381 return emit_copy(emitInfo
, n
);
2384 return emit_cond(emitInfo
, n
);
2387 return emit_not(emitInfo
, n
);
2390 return emit_label(emitInfo
, n
);
2393 return emit_kill(emitInfo
);
2396 /* new variable scope for subroutines/function calls */
2397 _slang_push_var_table(emitInfo
->vt
);
2398 inst
= emit_fcall(emitInfo
, n
);
2399 _slang_pop_var_table(emitInfo
->vt
);
2403 return emit_if(emitInfo
, n
);
2406 return emit_loop(emitInfo
, n
);
2407 case IR_BREAK_IF_TRUE
:
2408 case IR_CONT_IF_TRUE
:
2409 return emit_cont_break_if_true(emitInfo
, n
);
2413 return emit_cont_break(emitInfo
, n
);
2416 return new_instruction(emitInfo
, OPCODE_BGNSUB
);
2418 return new_instruction(emitInfo
, OPCODE_ENDSUB
);
2420 return emit_return(emitInfo
, n
);
2426 _mesa_problem(NULL
, "Unexpected IR opcode in emit()\n");
2433 * After code generation, any subroutines will be in separate program
2434 * objects. This function appends all the subroutines onto the main
2435 * program and resolves the linking of all the branch/call instructions.
2436 * XXX this logic should really be part of the linking process...
2439 _slang_resolve_subroutines(slang_emit_info
*emitInfo
)
2441 GET_CURRENT_CONTEXT(ctx
);
2442 struct gl_program
*mainP
= emitInfo
->prog
;
2443 GLuint
*subroutineLoc
, i
, total
;
2446 = (GLuint
*) _mesa_malloc(emitInfo
->NumSubroutines
* sizeof(GLuint
));
2448 /* total number of instructions */
2449 total
= mainP
->NumInstructions
;
2450 for (i
= 0; i
< emitInfo
->NumSubroutines
; i
++) {
2451 subroutineLoc
[i
] = total
;
2452 total
+= emitInfo
->Subroutines
[i
]->NumInstructions
;
2455 /* adjust BranchTargets within the functions */
2456 for (i
= 0; i
< emitInfo
->NumSubroutines
; i
++) {
2457 struct gl_program
*sub
= emitInfo
->Subroutines
[i
];
2459 for (j
= 0; j
< sub
->NumInstructions
; j
++) {
2460 struct prog_instruction
*inst
= sub
->Instructions
+ j
;
2461 if (inst
->Opcode
!= OPCODE_CAL
&& inst
->BranchTarget
>= 0) {
2462 inst
->BranchTarget
+= subroutineLoc
[i
];
2467 /* append subroutines' instructions after main's instructions */
2468 mainP
->Instructions
= _mesa_realloc_instructions(mainP
->Instructions
,
2469 mainP
->NumInstructions
,
2471 mainP
->NumInstructions
= total
;
2472 for (i
= 0; i
< emitInfo
->NumSubroutines
; i
++) {
2473 struct gl_program
*sub
= emitInfo
->Subroutines
[i
];
2474 _mesa_copy_instructions(mainP
->Instructions
+ subroutineLoc
[i
],
2476 sub
->NumInstructions
);
2477 /* delete subroutine code */
2478 sub
->Parameters
= NULL
; /* prevent double-free */
2479 _mesa_reference_program(ctx
, &emitInfo
->Subroutines
[i
], NULL
);
2482 /* free subroutine list */
2483 if (emitInfo
->Subroutines
) {
2484 _mesa_free(emitInfo
->Subroutines
);
2485 emitInfo
->Subroutines
= NULL
;
2487 emitInfo
->NumSubroutines
= 0;
2489 /* Examine CAL instructions.
2490 * At this point, the BranchTarget field of the CAL instruction is
2491 * the number/id of the subroutine to call (an index into the
2492 * emitInfo->Subroutines list).
2493 * Translate that into an actual instruction location now.
2495 for (i
= 0; i
< mainP
->NumInstructions
; i
++) {
2496 struct prog_instruction
*inst
= mainP
->Instructions
+ i
;
2497 if (inst
->Opcode
== OPCODE_CAL
) {
2498 const GLuint f
= inst
->BranchTarget
;
2499 inst
->BranchTarget
= subroutineLoc
[f
];
2503 _mesa_free(subroutineLoc
);
2509 * Convert the IR tree into GPU instructions.
2510 * \param n root of IR tree
2511 * \param vt variable table
2512 * \param prog program to put GPU instructions into
2513 * \param pragmas controls codegen options
2514 * \param withEnd if true, emit END opcode at end
2515 * \param log log for emitting errors/warnings/info
2518 _slang_emit_code(slang_ir_node
*n
, slang_var_table
*vt
,
2519 struct gl_program
*prog
,
2520 const struct gl_sl_pragmas
*pragmas
,
2522 slang_info_log
*log
)
2524 GET_CURRENT_CONTEXT(ctx
);
2526 slang_emit_info emitInfo
;
2531 emitInfo
.prog
= prog
;
2532 emitInfo
.Subroutines
= NULL
;
2533 emitInfo
.NumSubroutines
= 0;
2534 emitInfo
.MaxInstructions
= prog
->NumInstructions
;
2536 emitInfo
.EmitHighLevelInstructions
= ctx
->Shader
.EmitHighLevelInstructions
;
2537 emitInfo
.EmitCondCodes
= ctx
->Shader
.EmitCondCodes
;
2538 emitInfo
.EmitComments
= ctx
->Shader
.EmitComments
|| pragmas
->Debug
;
2539 emitInfo
.EmitBeginEndSub
= GL_TRUE
;
2541 if (!emitInfo
.EmitCondCodes
) {
2542 emitInfo
.EmitHighLevelInstructions
= GL_TRUE
;
2545 /* Check uniform/constant limits */
2546 if (prog
->Target
== GL_FRAGMENT_PROGRAM_ARB
) {
2547 maxUniforms
= ctx
->Const
.FragmentProgram
.MaxUniformComponents
/ 4;
2550 assert(prog
->Target
== GL_VERTEX_PROGRAM_ARB
);
2551 maxUniforms
= ctx
->Const
.VertexProgram
.MaxUniformComponents
/ 4;
2553 if (prog
->Parameters
->NumParameters
> maxUniforms
) {
2554 slang_info_log_error(log
, "Constant/uniform register limit exceeded "
2555 "(max=%u vec4)", maxUniforms
);
2560 (void) emit(&emitInfo
, n
);
2562 /* finish up by adding the END opcode to program */
2564 struct prog_instruction
*inst
;
2565 inst
= new_instruction(&emitInfo
, OPCODE_END
);
2571 _slang_resolve_subroutines(&emitInfo
);
2576 printf("*********** End emit code (%u inst):\n", prog
->NumInstructions
);
2577 _mesa_print_program(prog
);
2578 _mesa_print_program_parameters(ctx
,prog
);