e6d5c86bfbc32ce3dc10a88746c28cdc8fe1b2ba
[mesa.git] / src / mesa / state_tracker / st_glsl_to_nir.cpp
1 /*
2 * Copyright © 2015 Red Hat
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 */
23
24 #include "st_nir.h"
25
26 #include "pipe/p_defines.h"
27 #include "pipe/p_screen.h"
28 #include "pipe/p_context.h"
29
30 #include "program/program.h"
31 #include "program/prog_statevars.h"
32 #include "program/prog_parameter.h"
33 #include "program/ir_to_mesa.h"
34 #include "main/mtypes.h"
35 #include "main/errors.h"
36 #include "main/shaderapi.h"
37 #include "main/uniforms.h"
38
39 #include "st_context.h"
40 #include "st_glsl_types.h"
41 #include "st_program.h"
42
43 #include "compiler/nir/nir.h"
44 #include "compiler/glsl_types.h"
45 #include "compiler/glsl/glsl_to_nir.h"
46 #include "compiler/glsl/gl_nir.h"
47 #include "compiler/glsl/ir.h"
48 #include "compiler/glsl/ir_optimization.h"
49 #include "compiler/glsl/string_to_uint_map.h"
50
51
52 static int
53 type_size(const struct glsl_type *type)
54 {
55 return type->count_attribute_slots(false);
56 }
57
58 /* Depending on PIPE_CAP_TGSI_TEXCOORD (st->needs_texcoord_semantic) we
59 * may need to fix up varying slots so the glsl->nir path is aligned
60 * with the anything->tgsi->nir path.
61 */
62 static void
63 st_nir_fixup_varying_slots(struct st_context *st, struct exec_list *var_list)
64 {
65 if (st->needs_texcoord_semantic)
66 return;
67
68 nir_foreach_variable(var, var_list) {
69 if (var->data.location >= VARYING_SLOT_VAR0) {
70 var->data.location += 9;
71 } else if ((var->data.location >= VARYING_SLOT_TEX0) &&
72 (var->data.location <= VARYING_SLOT_TEX7)) {
73 var->data.location += VARYING_SLOT_VAR0 - VARYING_SLOT_TEX0;
74 }
75 }
76 }
77
78 /* input location assignment for VS inputs must be handled specially, so
79 * that it is aligned w/ st's vbo state.
80 * (This isn't the case with, for ex, FS inputs, which only need to agree
81 * on varying-slot w/ the VS outputs)
82 */
83 static void
84 st_nir_assign_vs_in_locations(struct gl_program *prog, nir_shader *nir)
85 {
86 nir->num_inputs = 0;
87 nir_foreach_variable_safe(var, &nir->inputs) {
88 /* NIR already assigns dual-slot inputs to two locations so all we have
89 * to do is compact everything down.
90 */
91 if (var->data.location == VERT_ATTRIB_EDGEFLAG) {
92 /* bit of a hack, mirroring st_translate_vertex_program */
93 var->data.driver_location = util_bitcount64(nir->info.inputs_read);
94 } else if (nir->info.inputs_read & BITFIELD64_BIT(var->data.location)) {
95 var->data.driver_location =
96 util_bitcount64(nir->info.inputs_read &
97 BITFIELD64_MASK(var->data.location));
98 nir->num_inputs++;
99 } else {
100 /* Move unused input variables to the globals list (with no
101 * initialization), to avoid confusing drivers looking through the
102 * inputs array and expecting to find inputs with a driver_location
103 * set.
104 */
105 exec_node_remove(&var->node);
106 var->data.mode = nir_var_global;
107 exec_list_push_tail(&nir->globals, &var->node);
108 }
109 }
110 }
111
112 static void
113 st_nir_assign_var_locations(struct exec_list *var_list, unsigned *size,
114 gl_shader_stage stage)
115 {
116 unsigned location = 0;
117 unsigned assigned_locations[VARYING_SLOT_TESS_MAX];
118 uint64_t processed_locs[2] = {0};
119
120 const int base = stage == MESA_SHADER_FRAGMENT ?
121 (int) FRAG_RESULT_DATA0 : (int) VARYING_SLOT_VAR0;
122
123 int UNUSED last_loc = 0;
124 nir_foreach_variable(var, var_list) {
125
126 const struct glsl_type *type = var->type;
127 if (nir_is_per_vertex_io(var, stage)) {
128 assert(glsl_type_is_array(type));
129 type = glsl_get_array_element(type);
130 }
131
132 unsigned var_size = type_size(type);
133
134 /* Builtins don't allow component packing so we only need to worry about
135 * user defined varyings sharing the same location.
136 */
137 bool processed = false;
138 if (var->data.location >= base) {
139 unsigned glsl_location = var->data.location - base;
140
141 for (unsigned i = 0; i < var_size; i++) {
142 if (processed_locs[var->data.index] &
143 ((uint64_t)1 << (glsl_location + i)))
144 processed = true;
145 else
146 processed_locs[var->data.index] |=
147 ((uint64_t)1 << (glsl_location + i));
148 }
149 }
150
151 /* Because component packing allows varyings to share the same location
152 * we may have already have processed this location.
153 */
154 if (processed) {
155 unsigned driver_location = assigned_locations[var->data.location];
156 var->data.driver_location = driver_location;
157 *size += type_size(type);
158
159 /* An array may be packed such that is crosses multiple other arrays
160 * or variables, we need to make sure we have allocated the elements
161 * consecutively if the previously proccessed var was shorter than
162 * the current array we are processing.
163 *
164 * NOTE: The code below assumes the var list is ordered in ascending
165 * location order.
166 */
167 assert(last_loc <= var->data.location);
168 last_loc = var->data.location;
169 unsigned last_slot_location = driver_location + var_size;
170 if (last_slot_location > location) {
171 unsigned num_unallocated_slots = last_slot_location - location;
172 unsigned first_unallocated_slot = var_size - num_unallocated_slots;
173 for (unsigned i = first_unallocated_slot; i < num_unallocated_slots; i++) {
174 assigned_locations[var->data.location + i] = location;
175 location++;
176 }
177 }
178 continue;
179 }
180
181 for (unsigned i = 0; i < var_size; i++) {
182 assigned_locations[var->data.location + i] = location + i;
183 }
184
185 var->data.driver_location = location;
186 location += var_size;
187 }
188
189 *size += location;
190 }
191
192 static int
193 st_nir_lookup_parameter_index(const struct gl_program_parameter_list *params,
194 const char *name)
195 {
196 int loc = _mesa_lookup_parameter_index(params, name);
197
198 /* is there a better way to do this? If we have something like:
199 *
200 * struct S {
201 * float f;
202 * vec4 v;
203 * };
204 * uniform S color;
205 *
206 * Then what we get in prog->Parameters looks like:
207 *
208 * 0: Name=color.f, Type=6, DataType=1406, Size=1
209 * 1: Name=color.v, Type=6, DataType=8b52, Size=4
210 *
211 * So the name doesn't match up and _mesa_lookup_parameter_index()
212 * fails. In this case just find the first matching "color.*"..
213 *
214 * Note for arrays you could end up w/ color[n].f, for example.
215 *
216 * glsl_to_tgsi works slightly differently in this regard. It is
217 * emitting something more low level, so it just translates the
218 * params list 1:1 to CONST[] regs. Going from GLSL IR to TGSI,
219 * it just calculates the additional offset of struct field members
220 * in glsl_to_tgsi_visitor::visit(ir_dereference_record *ir) or
221 * glsl_to_tgsi_visitor::visit(ir_dereference_array *ir). It never
222 * needs to work backwards to get base var loc from the param-list
223 * which already has them separated out.
224 */
225 if (loc < 0) {
226 int namelen = strlen(name);
227 for (unsigned i = 0; i < params->NumParameters; i++) {
228 struct gl_program_parameter *p = &params->Parameters[i];
229 if ((strncmp(p->Name, name, namelen) == 0) &&
230 ((p->Name[namelen] == '.') || (p->Name[namelen] == '['))) {
231 loc = i;
232 break;
233 }
234 }
235 }
236
237 return loc;
238 }
239
240 static void
241 st_nir_assign_uniform_locations(struct gl_context *ctx,
242 struct gl_program *prog,
243 struct exec_list *uniform_list, unsigned *size)
244 {
245 int max = 0;
246 int shaderidx = 0;
247 int imageidx = 0;
248
249 nir_foreach_variable(uniform, uniform_list) {
250 int loc;
251
252 /*
253 * UBO's have their own address spaces, so don't count them towards the
254 * number of global uniforms
255 */
256 if ((uniform->data.mode == nir_var_uniform || uniform->data.mode == nir_var_shader_storage) &&
257 uniform->interface_type != NULL)
258 continue;
259
260 const struct glsl_type *type = glsl_without_array(uniform->type);
261 if (!uniform->data.bindless && (type->is_sampler() || type->is_image())) {
262 if (type->is_sampler()) {
263 loc = shaderidx;
264 shaderidx += type_size(uniform->type);
265 } else {
266 loc = imageidx;
267 imageidx += type_size(uniform->type);
268 }
269 } else if (strncmp(uniform->name, "gl_", 3) == 0) {
270 const gl_state_index16 *const stateTokens = uniform->state_slots[0].tokens;
271 /* This state reference has already been setup by ir_to_mesa, but we'll
272 * get the same index back here.
273 */
274
275 unsigned comps;
276 if (glsl_type_is_struct(type)) {
277 comps = 4;
278 } else {
279 comps = glsl_get_vector_elements(type);
280 }
281
282 if (ctx->Const.PackedDriverUniformStorage) {
283 loc = _mesa_add_sized_state_reference(prog->Parameters,
284 stateTokens, comps, false);
285 loc = prog->Parameters->ParameterValueOffset[loc];
286 } else {
287 loc = _mesa_add_state_reference(prog->Parameters, stateTokens);
288 }
289 } else {
290 loc = st_nir_lookup_parameter_index(prog->Parameters, uniform->name);
291
292 if (ctx->Const.PackedDriverUniformStorage) {
293 loc = prog->Parameters->ParameterValueOffset[loc];
294 }
295 }
296
297 uniform->data.driver_location = loc;
298
299 max = MAX2(max, loc + type_size(uniform->type));
300 }
301 *size = max;
302 }
303
304 void
305 st_nir_opts(nir_shader *nir, bool scalar)
306 {
307 bool progress;
308 do {
309 progress = false;
310
311 NIR_PASS_V(nir, nir_lower_vars_to_ssa);
312
313 if (scalar) {
314 NIR_PASS_V(nir, nir_lower_alu_to_scalar);
315 NIR_PASS_V(nir, nir_lower_phis_to_scalar);
316 }
317
318 NIR_PASS_V(nir, nir_lower_alu);
319 NIR_PASS_V(nir, nir_lower_pack);
320 NIR_PASS(progress, nir, nir_copy_prop);
321 NIR_PASS(progress, nir, nir_opt_remove_phis);
322 NIR_PASS(progress, nir, nir_opt_dce);
323 if (nir_opt_trivial_continues(nir)) {
324 progress = true;
325 NIR_PASS(progress, nir, nir_copy_prop);
326 NIR_PASS(progress, nir, nir_opt_dce);
327 }
328 NIR_PASS(progress, nir, nir_opt_if);
329 NIR_PASS(progress, nir, nir_opt_dead_cf);
330 NIR_PASS(progress, nir, nir_opt_cse);
331 NIR_PASS(progress, nir, nir_opt_peephole_select, 8, true);
332
333 NIR_PASS(progress, nir, nir_opt_algebraic);
334 NIR_PASS(progress, nir, nir_opt_constant_folding);
335
336 NIR_PASS(progress, nir, nir_opt_undef);
337 NIR_PASS(progress, nir, nir_opt_conditional_discard);
338 if (nir->options->max_unroll_iterations) {
339 NIR_PASS(progress, nir, nir_opt_loop_unroll, (nir_variable_mode)0);
340 }
341 } while (progress);
342 }
343
344 /* First third of converting glsl_to_nir.. this leaves things in a pre-
345 * nir_lower_io state, so that shader variants can more easily insert/
346 * replace variables, etc.
347 */
348 static nir_shader *
349 st_glsl_to_nir(struct st_context *st, struct gl_program *prog,
350 struct gl_shader_program *shader_program,
351 gl_shader_stage stage)
352 {
353 const nir_shader_compiler_options *options =
354 st->ctx->Const.ShaderCompilerOptions[prog->info.stage].NirOptions;
355 enum pipe_shader_type type = pipe_shader_type_from_mesa(stage);
356 struct pipe_screen *screen = st->pipe->screen;
357 bool is_scalar = screen->get_shader_param(screen, type, PIPE_SHADER_CAP_SCALAR_ISA);
358 assert(options);
359
360 if (prog->nir)
361 return prog->nir;
362
363 nir_shader *nir = glsl_to_nir(shader_program, stage, options);
364
365 /* Set the next shader stage hint for VS and TES. */
366 if (!nir->info.separate_shader &&
367 (nir->info.stage == MESA_SHADER_VERTEX ||
368 nir->info.stage == MESA_SHADER_TESS_EVAL)) {
369
370 unsigned prev_stages = (1 << (prog->info.stage + 1)) - 1;
371 unsigned stages_mask =
372 ~prev_stages & shader_program->data->linked_stages;
373
374 nir->info.next_stage = stages_mask ?
375 (gl_shader_stage) u_bit_scan(&stages_mask) : MESA_SHADER_FRAGMENT;
376 } else {
377 nir->info.next_stage = MESA_SHADER_FRAGMENT;
378 }
379
380 nir_variable_mode mask =
381 (nir_variable_mode) (nir_var_shader_in | nir_var_shader_out);
382 nir_remove_dead_variables(nir, mask);
383
384 if (options->lower_all_io_to_temps ||
385 nir->info.stage == MESA_SHADER_VERTEX ||
386 nir->info.stage == MESA_SHADER_GEOMETRY) {
387 NIR_PASS_V(nir, nir_lower_io_to_temporaries,
388 nir_shader_get_entrypoint(nir),
389 true, true);
390 } else if (nir->info.stage == MESA_SHADER_FRAGMENT) {
391 NIR_PASS_V(nir, nir_lower_io_to_temporaries,
392 nir_shader_get_entrypoint(nir),
393 true, false);
394 }
395
396 NIR_PASS_V(nir, nir_lower_global_vars_to_local);
397 NIR_PASS_V(nir, nir_split_var_copies);
398 NIR_PASS_V(nir, nir_lower_var_copies);
399
400 st_nir_opts(nir, is_scalar);
401
402 return nir;
403 }
404
405 /* Second third of converting glsl_to_nir. This creates uniforms, gathers
406 * info on varyings, etc after NIR link time opts have been applied.
407 */
408 static void
409 st_glsl_to_nir_post_opts(struct st_context *st, struct gl_program *prog,
410 struct gl_shader_program *shader_program)
411 {
412 nir_shader *nir = prog->nir;
413
414 /* Make a pass over the IR to add state references for any built-in
415 * uniforms that are used. This has to be done now (during linking).
416 * Code generation doesn't happen until the first time this shader is
417 * used for rendering. Waiting until then to generate the parameters is
418 * too late. At that point, the values for the built-in uniforms won't
419 * get sent to the shader.
420 */
421 nir_foreach_variable(var, &nir->uniforms) {
422 if (strncmp(var->name, "gl_", 3) == 0) {
423 const nir_state_slot *const slots = var->state_slots;
424 assert(var->state_slots != NULL);
425
426 const struct glsl_type *type = glsl_without_array(var->type);
427 for (unsigned int i = 0; i < var->num_state_slots; i++) {
428 unsigned comps;
429 if (glsl_type_is_struct(type)) {
430 /* Builtin struct require specical handling for now we just
431 * make all members vec4. See st_nir_lower_builtin.
432 */
433 comps = 4;
434 } else {
435 comps = glsl_get_vector_elements(type);
436 }
437
438 if (st->ctx->Const.PackedDriverUniformStorage) {
439 _mesa_add_sized_state_reference(prog->Parameters,
440 slots[i].tokens,
441 comps, false);
442 } else {
443 _mesa_add_state_reference(prog->Parameters,
444 slots[i].tokens);
445 }
446 }
447 }
448 }
449
450 /* Avoid reallocation of the program parameter list, because the uniform
451 * storage is only associated with the original parameter list.
452 * This should be enough for Bitmap and DrawPixels constants.
453 */
454 _mesa_reserve_parameter_storage(prog->Parameters, 8);
455
456 /* This has to be done last. Any operation the can cause
457 * prog->ParameterValues to get reallocated (e.g., anything that adds a
458 * program constant) has to happen before creating this linkage.
459 */
460 _mesa_associate_uniform_storage(st->ctx, shader_program, prog, true);
461
462 st_set_prog_affected_state_flags(prog);
463
464 NIR_PASS_V(nir, st_nir_lower_builtin);
465 NIR_PASS_V(nir, gl_nir_lower_atomics, shader_program, true);
466
467 if (st->ctx->_Shader->Flags & GLSL_DUMP) {
468 _mesa_log("\n");
469 _mesa_log("NIR IR for linked %s program %d:\n",
470 _mesa_shader_stage_to_string(prog->info.stage),
471 shader_program->Name);
472 nir_print_shader(nir, _mesa_get_log_file());
473 _mesa_log("\n\n");
474 }
475 }
476
477 /* TODO any better helper somewhere to sort a list? */
478
479 static void
480 insert_sorted(struct exec_list *var_list, nir_variable *new_var)
481 {
482 nir_foreach_variable(var, var_list) {
483 if (var->data.location > new_var->data.location) {
484 exec_node_insert_node_before(&var->node, &new_var->node);
485 return;
486 }
487 }
488 exec_list_push_tail(var_list, &new_var->node);
489 }
490
491 static void
492 sort_varyings(struct exec_list *var_list)
493 {
494 struct exec_list new_list;
495 exec_list_make_empty(&new_list);
496 nir_foreach_variable_safe(var, var_list) {
497 exec_node_remove(&var->node);
498 insert_sorted(&new_list, var);
499 }
500 exec_list_move_nodes_to(&new_list, var_list);
501 }
502
503 static void
504 set_st_program(struct gl_program *prog,
505 struct gl_shader_program *shader_program,
506 nir_shader *nir)
507 {
508 struct st_vertex_program *stvp;
509 struct st_common_program *stp;
510 struct st_fragment_program *stfp;
511 struct st_compute_program *stcp;
512
513 switch (prog->info.stage) {
514 case MESA_SHADER_VERTEX:
515 stvp = (struct st_vertex_program *)prog;
516 stvp->shader_program = shader_program;
517 stvp->tgsi.type = PIPE_SHADER_IR_NIR;
518 stvp->tgsi.ir.nir = nir;
519 break;
520 case MESA_SHADER_GEOMETRY:
521 case MESA_SHADER_TESS_CTRL:
522 case MESA_SHADER_TESS_EVAL:
523 stp = (struct st_common_program *)prog;
524 stp->shader_program = shader_program;
525 stp->tgsi.type = PIPE_SHADER_IR_NIR;
526 stp->tgsi.ir.nir = nir;
527 break;
528 case MESA_SHADER_FRAGMENT:
529 stfp = (struct st_fragment_program *)prog;
530 stfp->shader_program = shader_program;
531 stfp->tgsi.type = PIPE_SHADER_IR_NIR;
532 stfp->tgsi.ir.nir = nir;
533 break;
534 case MESA_SHADER_COMPUTE:
535 stcp = (struct st_compute_program *)prog;
536 stcp->shader_program = shader_program;
537 stcp->tgsi.ir_type = PIPE_SHADER_IR_NIR;
538 stcp->tgsi.prog = nir;
539 break;
540 default:
541 unreachable("unknown shader stage");
542 }
543 }
544
545 static void
546 st_nir_get_mesa_program(struct gl_context *ctx,
547 struct gl_shader_program *shader_program,
548 struct gl_linked_shader *shader)
549 {
550 struct st_context *st = st_context(ctx);
551 struct pipe_screen *pscreen = ctx->st->pipe->screen;
552 struct gl_program *prog;
553
554 validate_ir_tree(shader->ir);
555
556 prog = shader->Program;
557
558 prog->Parameters = _mesa_new_parameter_list();
559
560 _mesa_copy_linked_program_data(shader_program, shader);
561 _mesa_generate_parameters_list_for_uniforms(ctx, shader_program, shader,
562 prog->Parameters);
563
564 /* Remove reads from output registers. */
565 if (!pscreen->get_param(pscreen, PIPE_CAP_TGSI_CAN_READ_OUTPUTS))
566 lower_output_reads(shader->Stage, shader->ir);
567
568 if (ctx->_Shader->Flags & GLSL_DUMP) {
569 _mesa_log("\n");
570 _mesa_log("GLSL IR for linked %s program %d:\n",
571 _mesa_shader_stage_to_string(shader->Stage),
572 shader_program->Name);
573 _mesa_print_ir(_mesa_get_log_file(), shader->ir, NULL);
574 _mesa_log("\n\n");
575 }
576
577 prog->ExternalSamplersUsed = gl_external_samplers(prog);
578 _mesa_update_shader_textures_used(shader_program, prog);
579
580 nir_shader *nir = st_glsl_to_nir(st, prog, shader_program, shader->Stage);
581
582 set_st_program(prog, shader_program, nir);
583 prog->nir = nir;
584 }
585
586 static void
587 st_nir_link_shaders(nir_shader **producer, nir_shader **consumer, bool scalar)
588 {
589 nir_lower_io_arrays_to_elements(*producer, *consumer);
590
591 if (nir_link_constant_varyings(*producer, *consumer))
592 st_nir_opts(*consumer, scalar);
593
594 NIR_PASS_V(*producer, nir_remove_dead_variables, nir_var_shader_out);
595 NIR_PASS_V(*consumer, nir_remove_dead_variables, nir_var_shader_in);
596
597 if (nir_remove_unused_varyings(*producer, *consumer)) {
598 NIR_PASS_V(*producer, nir_lower_global_vars_to_local);
599 NIR_PASS_V(*consumer, nir_lower_global_vars_to_local);
600
601 /* The backend might not be able to handle indirects on
602 * temporaries so we need to lower indirects on any of the
603 * varyings we have demoted here.
604 *
605 * TODO: radeonsi shouldn't need to do this, however LLVM isn't
606 * currently smart enough to handle indirects without causing excess
607 * spilling causing the gpu to hang.
608 *
609 * See the following thread for more details of the problem:
610 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
611 */
612 nir_variable_mode indirect_mask = nir_var_local;
613
614 NIR_PASS_V(*producer, nir_lower_indirect_derefs, indirect_mask);
615 NIR_PASS_V(*consumer, nir_lower_indirect_derefs, indirect_mask);
616
617 st_nir_opts(*producer, scalar);
618 st_nir_opts(*consumer, scalar);
619 }
620 }
621
622 extern "C" {
623
624 void
625 st_nir_lower_wpos_ytransform(struct nir_shader *nir,
626 struct gl_program *prog,
627 struct pipe_screen *pscreen)
628 {
629 if (nir->info.stage != MESA_SHADER_FRAGMENT)
630 return;
631
632 static const gl_state_index16 wposTransformState[STATE_LENGTH] = {
633 STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM
634 };
635 nir_lower_wpos_ytransform_options wpos_options = { { 0 } };
636
637 memcpy(wpos_options.state_tokens, wposTransformState,
638 sizeof(wpos_options.state_tokens));
639 wpos_options.fs_coord_origin_upper_left =
640 pscreen->get_param(pscreen,
641 PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT);
642 wpos_options.fs_coord_origin_lower_left =
643 pscreen->get_param(pscreen,
644 PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
645 wpos_options.fs_coord_pixel_center_integer =
646 pscreen->get_param(pscreen,
647 PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
648 wpos_options.fs_coord_pixel_center_half_integer =
649 pscreen->get_param(pscreen,
650 PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER);
651
652 if (nir_lower_wpos_ytransform(nir, &wpos_options)) {
653 nir_validate_shader(nir, "after nir_lower_wpos_ytransform");
654 _mesa_add_state_reference(prog->Parameters, wposTransformState);
655 }
656 }
657
658 bool
659 st_link_nir(struct gl_context *ctx,
660 struct gl_shader_program *shader_program)
661 {
662 struct st_context *st = st_context(ctx);
663 struct pipe_screen *screen = st->pipe->screen;
664 bool is_scalar[MESA_SHADER_STAGES];
665
666 /* Determine scalar property of each shader stage */
667 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
668 struct gl_linked_shader *shader = shader_program->_LinkedShaders[i];
669 enum pipe_shader_type type;
670
671 if (shader == NULL)
672 continue;
673
674 type = pipe_shader_type_from_mesa(shader->Stage);
675 is_scalar[i] = screen->get_shader_param(screen, type, PIPE_SHADER_CAP_SCALAR_ISA);
676 }
677
678 /* Determine first and last stage. */
679 unsigned first = MESA_SHADER_STAGES;
680 unsigned last = 0;
681 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
682 if (!shader_program->_LinkedShaders[i])
683 continue;
684 if (first == MESA_SHADER_STAGES)
685 first = i;
686 last = i;
687 }
688
689 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
690 struct gl_linked_shader *shader = shader_program->_LinkedShaders[i];
691 if (shader == NULL)
692 continue;
693
694 st_nir_get_mesa_program(ctx, shader_program, shader);
695
696 nir_variable_mode mask = (nir_variable_mode) 0;
697 if (i != first)
698 mask = (nir_variable_mode)(mask | nir_var_shader_in);
699
700 if (i != last)
701 mask = (nir_variable_mode)(mask | nir_var_shader_out);
702
703 nir_shader *nir = shader->Program->nir;
704
705 if (is_scalar[i])
706 NIR_PASS_V(nir, nir_lower_io_to_scalar_early, mask);
707
708 st_nir_opts(nir, is_scalar[i]);
709 }
710
711 /* Linking the stages in the opposite order (from fragment to vertex)
712 * ensures that inter-shader outputs written to in an earlier stage
713 * are eliminated if they are (transitively) not used in a later
714 * stage.
715 */
716 int next = last;
717 for (int i = next - 1; i >= 0; i--) {
718 struct gl_linked_shader *shader = shader_program->_LinkedShaders[i];
719 if (shader == NULL)
720 continue;
721
722 st_nir_link_shaders(&shader->Program->nir,
723 &shader_program->_LinkedShaders[next]->Program->nir,
724 is_scalar[i]);
725 next = i;
726 }
727
728 int prev = -1;
729 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
730 struct gl_linked_shader *shader = shader_program->_LinkedShaders[i];
731 if (shader == NULL)
732 continue;
733
734 nir_shader *nir = shader->Program->nir;
735
736 NIR_PASS_V(nir, st_nir_lower_wpos_ytransform, shader->Program,
737 st->pipe->screen);
738
739 NIR_PASS_V(nir, nir_lower_system_values);
740
741 nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir));
742 shader->Program->info = nir->info;
743 if (i == MESA_SHADER_VERTEX) {
744 /* NIR expands dual-slot inputs out to two locations. We need to
745 * compact things back down GL-style single-slot inputs to avoid
746 * confusing the state tracker.
747 */
748 shader->Program->info.inputs_read =
749 nir_get_single_slot_attribs_mask(nir->info.inputs_read,
750 shader->Program->DualSlotInputs);
751 }
752
753 if (prev != -1) {
754 struct gl_program *prev_shader =
755 shader_program->_LinkedShaders[prev]->Program;
756
757 /* We can't use nir_compact_varyings with transform feedback, since
758 * the pipe_stream_output->output_register field is based on the
759 * pre-compacted driver_locations.
760 */
761 if (!(prev_shader->sh.LinkedTransformFeedback &&
762 prev_shader->sh.LinkedTransformFeedback->NumVarying > 0))
763 nir_compact_varyings(shader_program->_LinkedShaders[prev]->Program->nir,
764 nir, ctx->API != API_OPENGL_COMPAT);
765 }
766 prev = i;
767 }
768
769 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
770 struct gl_linked_shader *shader = shader_program->_LinkedShaders[i];
771 if (shader == NULL)
772 continue;
773
774 st_glsl_to_nir_post_opts(st, shader->Program, shader_program);
775
776 assert(shader->Program);
777 if (!ctx->Driver.ProgramStringNotify(ctx,
778 _mesa_shader_stage_to_program(i),
779 shader->Program)) {
780 _mesa_reference_program(ctx, &shader->Program, NULL);
781 return false;
782 }
783
784 nir_sweep(shader->Program->nir);
785 }
786
787 return true;
788 }
789
790 /* Last third of preparing nir from glsl, which happens after shader
791 * variant lowering.
792 */
793 void
794 st_finalize_nir(struct st_context *st, struct gl_program *prog,
795 struct gl_shader_program *shader_program, nir_shader *nir)
796 {
797 struct pipe_screen *screen = st->pipe->screen;
798 const nir_shader_compiler_options *options =
799 st->ctx->Const.ShaderCompilerOptions[prog->info.stage].NirOptions;
800
801 NIR_PASS_V(nir, nir_split_var_copies);
802 NIR_PASS_V(nir, nir_lower_var_copies);
803 if (options->lower_all_io_to_temps ||
804 nir->info.stage == MESA_SHADER_VERTEX ||
805 nir->info.stage == MESA_SHADER_GEOMETRY) {
806 NIR_PASS_V(nir, nir_lower_io_arrays_to_elements_no_indirects, false);
807 } else if (nir->info.stage == MESA_SHADER_FRAGMENT) {
808 NIR_PASS_V(nir, nir_lower_io_arrays_to_elements_no_indirects, true);
809 }
810
811 if (nir->info.stage == MESA_SHADER_VERTEX) {
812 /* Needs special handling so drvloc matches the vbo state: */
813 st_nir_assign_vs_in_locations(prog, nir);
814 /* Re-lower global vars, to deal with any dead VS inputs. */
815 NIR_PASS_V(nir, nir_lower_global_vars_to_local);
816
817 sort_varyings(&nir->outputs);
818 st_nir_assign_var_locations(&nir->outputs,
819 &nir->num_outputs,
820 nir->info.stage);
821 st_nir_fixup_varying_slots(st, &nir->outputs);
822 } else if (nir->info.stage == MESA_SHADER_GEOMETRY ||
823 nir->info.stage == MESA_SHADER_TESS_CTRL ||
824 nir->info.stage == MESA_SHADER_TESS_EVAL) {
825 sort_varyings(&nir->inputs);
826 st_nir_assign_var_locations(&nir->inputs,
827 &nir->num_inputs,
828 nir->info.stage);
829 st_nir_fixup_varying_slots(st, &nir->inputs);
830
831 sort_varyings(&nir->outputs);
832 st_nir_assign_var_locations(&nir->outputs,
833 &nir->num_outputs,
834 nir->info.stage);
835 st_nir_fixup_varying_slots(st, &nir->outputs);
836 } else if (nir->info.stage == MESA_SHADER_FRAGMENT) {
837 sort_varyings(&nir->inputs);
838 st_nir_assign_var_locations(&nir->inputs,
839 &nir->num_inputs,
840 nir->info.stage);
841 st_nir_fixup_varying_slots(st, &nir->inputs);
842 st_nir_assign_var_locations(&nir->outputs,
843 &nir->num_outputs,
844 nir->info.stage);
845 } else if (nir->info.stage == MESA_SHADER_COMPUTE) {
846 /* TODO? */
847 } else {
848 unreachable("invalid shader type for tgsi bypass\n");
849 }
850
851 NIR_PASS_V(nir, nir_lower_atomics_to_ssbo,
852 st->ctx->Const.Program[nir->info.stage].MaxAtomicBuffers);
853
854 st_nir_assign_uniform_locations(st->ctx, prog,
855 &nir->uniforms, &nir->num_uniforms);
856
857 if (st->ctx->Const.PackedDriverUniformStorage) {
858 NIR_PASS_V(nir, nir_lower_io, nir_var_uniform, st_glsl_type_dword_size,
859 (nir_lower_io_options)0);
860 NIR_PASS_V(nir, st_nir_lower_uniforms_to_ubo);
861 }
862
863 if (screen->get_param(screen, PIPE_CAP_NIR_SAMPLERS_AS_DEREF))
864 NIR_PASS_V(nir, gl_nir_lower_samplers_as_deref, shader_program);
865 else
866 NIR_PASS_V(nir, gl_nir_lower_samplers, shader_program);
867 }
868
869 } /* extern "C" */