2 * Copyright © 2015 Red Hat
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
26 #include "pipe/p_defines.h"
27 #include "pipe/p_screen.h"
28 #include "pipe/p_context.h"
30 #include "program/program.h"
31 #include "program/prog_statevars.h"
32 #include "program/prog_parameter.h"
33 #include "program/ir_to_mesa.h"
34 #include "main/mtypes.h"
35 #include "main/errors.h"
36 #include "main/shaderapi.h"
37 #include "main/uniforms.h"
39 #include "st_context.h"
40 #include "st_program.h"
42 #include "compiler/nir/nir.h"
43 #include "compiler/glsl_types.h"
44 #include "compiler/glsl/glsl_to_nir.h"
45 #include "compiler/glsl/ir.h"
46 #include "compiler/glsl/string_to_uint_map.h"
50 type_size(const struct glsl_type
*type
)
52 return type
->count_attribute_slots(false);
55 /* Depending on PIPE_CAP_TGSI_TEXCOORD (st->needs_texcoord_semantic) we
56 * may need to fix up varying slots so the glsl->nir path is aligned
57 * with the anything->tgsi->nir path.
60 st_nir_fixup_varying_slots(struct st_context
*st
, struct exec_list
*var_list
)
62 if (st
->needs_texcoord_semantic
)
65 nir_foreach_variable(var
, var_list
) {
66 if (var
->data
.location
>= VARYING_SLOT_VAR0
) {
67 var
->data
.location
+= 9;
68 } else if ((var
->data
.location
>= VARYING_SLOT_TEX0
) &&
69 (var
->data
.location
<= VARYING_SLOT_TEX7
)) {
70 var
->data
.location
+= VARYING_SLOT_VAR0
- VARYING_SLOT_TEX0
;
75 /* input location assignment for VS inputs must be handled specially, so
76 * that it is aligned w/ st's vbo state.
77 * (This isn't the case with, for ex, FS inputs, which only need to agree
78 * on varying-slot w/ the VS outputs)
81 st_nir_assign_vs_in_locations(struct gl_program
*prog
, nir_shader
*nir
)
83 unsigned attr
, num_inputs
= 0;
84 unsigned input_to_index
[VERT_ATTRIB_MAX
] = {0};
86 /* TODO de-duplicate w/ similar code in st_translate_vertex_program()? */
87 for (attr
= 0; attr
< VERT_ATTRIB_MAX
; attr
++) {
88 if ((prog
->info
.inputs_read
& BITFIELD64_BIT(attr
)) != 0) {
89 input_to_index
[attr
] = num_inputs
;
91 if ((prog
->info
.double_inputs_read
& BITFIELD64_BIT(attr
)) != 0) {
92 /* add placeholder for second part of a double attribute */
96 input_to_index
[attr
] = ~0;
100 /* bit of a hack, mirroring st_translate_vertex_program */
101 input_to_index
[VERT_ATTRIB_EDGEFLAG
] = num_inputs
;
104 nir_foreach_variable_safe(var
, &nir
->inputs
) {
105 attr
= var
->data
.location
;
106 assert(attr
< ARRAY_SIZE(input_to_index
));
108 if (input_to_index
[attr
] != ~0u) {
109 var
->data
.driver_location
= input_to_index
[attr
];
112 /* Move unused input variables to the globals list (with no
113 * initialization), to avoid confusing drivers looking through the
114 * inputs array and expecting to find inputs with a driver_location
117 exec_node_remove(&var
->node
);
118 var
->data
.mode
= nir_var_global
;
119 exec_list_push_tail(&nir
->globals
, &var
->node
);
125 st_nir_assign_var_locations(struct exec_list
*var_list
, unsigned *size
,
126 gl_shader_stage stage
)
128 unsigned location
= 0;
129 unsigned assigned_locations
[VARYING_SLOT_TESS_MAX
];
130 uint64_t processed_locs
= 0;
131 uint32_t processed_patch_locs
= 0;
133 nir_foreach_variable(var
, var_list
) {
135 const struct glsl_type
*type
= var
->type
;
136 if (nir_is_per_vertex_io(var
, stage
)) {
137 assert(glsl_type_is_array(type
));
138 type
= glsl_get_array_element(type
);
141 bool processed
= false;
142 if (var
->data
.patch
&&
143 var
->data
.location
!= VARYING_SLOT_TESS_LEVEL_INNER
&&
144 var
->data
.location
!= VARYING_SLOT_TESS_LEVEL_OUTER
&&
145 var
->data
.location
!= VARYING_SLOT_BOUNDING_BOX0
&&
146 var
->data
.location
!= VARYING_SLOT_BOUNDING_BOX1
) {
147 unsigned patch_loc
= var
->data
.location
- VARYING_SLOT_PATCH0
;
148 if (processed_patch_locs
& (1 << patch_loc
))
151 processed_patch_locs
|= (1 << patch_loc
);
153 if (processed_locs
& ((uint64_t)1 << var
->data
.location
))
156 processed_locs
|= ((uint64_t)1 << var
->data
.location
);
159 /* Because component packing allows varyings to share the same location
160 * we may have already have processed this location.
162 if (processed
&& var
->data
.location
>= VARYING_SLOT_VAR0
) {
163 var
->data
.driver_location
= assigned_locations
[var
->data
.location
];
164 *size
+= type_size(type
);
168 assigned_locations
[var
->data
.location
] = location
;
169 var
->data
.driver_location
= location
;
170 location
+= type_size(type
);
177 st_nir_lookup_parameter_index(const struct gl_program_parameter_list
*params
,
180 int loc
= _mesa_lookup_parameter_index(params
, name
);
182 /* is there a better way to do this? If we have something like:
190 * Then what we get in prog->Parameters looks like:
192 * 0: Name=color.f, Type=6, DataType=1406, Size=1
193 * 1: Name=color.v, Type=6, DataType=8b52, Size=4
195 * So the name doesn't match up and _mesa_lookup_parameter_index()
196 * fails. In this case just find the first matching "color.*"..
198 * Note for arrays you could end up w/ color[n].f, for example.
200 * glsl_to_tgsi works slightly differently in this regard. It is
201 * emitting something more low level, so it just translates the
202 * params list 1:1 to CONST[] regs. Going from GLSL IR to TGSI,
203 * it just calculates the additional offset of struct field members
204 * in glsl_to_tgsi_visitor::visit(ir_dereference_record *ir) or
205 * glsl_to_tgsi_visitor::visit(ir_dereference_array *ir). It never
206 * needs to work backwards to get base var loc from the param-list
207 * which already has them separated out.
210 int namelen
= strlen(name
);
211 for (unsigned i
= 0; i
< params
->NumParameters
; i
++) {
212 struct gl_program_parameter
*p
= ¶ms
->Parameters
[i
];
213 if ((strncmp(p
->Name
, name
, namelen
) == 0) &&
214 ((p
->Name
[namelen
] == '.') || (p
->Name
[namelen
] == '['))) {
225 st_nir_assign_uniform_locations(struct gl_program
*prog
,
226 struct gl_shader_program
*shader_program
,
227 struct exec_list
*uniform_list
, unsigned *size
)
233 nir_foreach_variable(uniform
, uniform_list
) {
237 * UBO's have their own address spaces, so don't count them towards the
238 * number of global uniforms
240 if ((uniform
->data
.mode
== nir_var_uniform
|| uniform
->data
.mode
== nir_var_shader_storage
) &&
241 uniform
->interface_type
!= NULL
)
244 if (uniform
->type
->is_sampler() || uniform
->type
->is_image()) {
246 bool found
= shader_program
->UniformHash
->get(val
, uniform
->name
);
247 if (uniform
->type
->is_sampler())
252 (void) found
; /* silence unused var warning */
253 /* this ensure that nir_lower_samplers looks at the correct
254 * shader_program->UniformStorage[location]:
256 uniform
->data
.location
= val
;
257 } else if (strncmp(uniform
->name
, "gl_", 3) == 0) {
258 const gl_state_index
*const stateTokens
= (gl_state_index
*)uniform
->state_slots
[0].tokens
;
259 /* This state reference has already been setup by ir_to_mesa, but we'll
260 * get the same index back here.
262 loc
= _mesa_add_state_reference(prog
->Parameters
, stateTokens
);
264 loc
= st_nir_lookup_parameter_index(prog
->Parameters
, uniform
->name
);
267 uniform
->data
.driver_location
= loc
;
269 max
= MAX2(max
, loc
+ type_size(uniform
->type
));
275 st_nir_opts(nir_shader
*nir
)
281 NIR_PASS_V(nir
, nir_lower_64bit_pack
);
282 NIR_PASS(progress
, nir
, nir_copy_prop
);
283 NIR_PASS(progress
, nir
, nir_opt_remove_phis
);
284 NIR_PASS(progress
, nir
, nir_opt_dce
);
285 if (nir_opt_trivial_continues(nir
)) {
287 NIR_PASS(progress
, nir
, nir_copy_prop
);
288 NIR_PASS(progress
, nir
, nir_opt_dce
);
290 NIR_PASS(progress
, nir
, nir_opt_if
);
291 NIR_PASS(progress
, nir
, nir_opt_dead_cf
);
292 NIR_PASS(progress
, nir
, nir_opt_cse
);
293 NIR_PASS(progress
, nir
, nir_opt_peephole_select
, 8);
295 NIR_PASS(progress
, nir
, nir_opt_algebraic
);
296 NIR_PASS(progress
, nir
, nir_opt_constant_folding
);
298 NIR_PASS(progress
, nir
, nir_opt_undef
);
299 NIR_PASS(progress
, nir
, nir_opt_conditional_discard
);
300 if (nir
->options
->max_unroll_iterations
) {
301 NIR_PASS(progress
, nir
, nir_opt_loop_unroll
, (nir_variable_mode
)0);
306 /* First third of converting glsl_to_nir.. this leaves things in a pre-
307 * nir_lower_io state, so that shader variants can more easily insert/
308 * replace variables, etc.
311 st_glsl_to_nir(struct st_context
*st
, struct gl_program
*prog
,
312 struct gl_shader_program
*shader_program
,
313 gl_shader_stage stage
)
315 struct pipe_screen
*pscreen
= st
->pipe
->screen
;
316 enum pipe_shader_type ptarget
= pipe_shader_type_from_mesa(stage
);
317 const nir_shader_compiler_options
*options
;
319 assert(pscreen
->get_compiler_options
); /* drivers using NIR must implement this */
321 options
= (const nir_shader_compiler_options
*)
322 pscreen
->get_compiler_options(pscreen
, PIPE_SHADER_IR_NIR
, ptarget
);
328 nir_shader
*nir
= glsl_to_nir(shader_program
, stage
, options
);
335 /* Second third of converting glsl_to_nir. This creates uniforms, gathers
336 * info on varyings, etc after NIR link time opts have been applied.
339 st_glsl_to_nir_post_opts(struct st_context
*st
, struct gl_program
*prog
,
340 struct gl_shader_program
*shader_program
)
342 nir_shader
*nir
= prog
->nir
;
344 /* Make a pass over the IR to add state references for any built-in
345 * uniforms that are used. This has to be done now (during linking).
346 * Code generation doesn't happen until the first time this shader is
347 * used for rendering. Waiting until then to generate the parameters is
348 * too late. At that point, the values for the built-in uniforms won't
349 * get sent to the shader.
351 nir_foreach_variable(var
, &nir
->uniforms
) {
352 if (strncmp(var
->name
, "gl_", 3) == 0) {
353 const nir_state_slot
*const slots
= var
->state_slots
;
354 assert(var
->state_slots
!= NULL
);
356 for (unsigned int i
= 0; i
< var
->num_state_slots
; i
++) {
357 _mesa_add_state_reference(prog
->Parameters
,
358 (gl_state_index
*)slots
[i
].tokens
);
363 /* Avoid reallocation of the program parameter list, because the uniform
364 * storage is only associated with the original parameter list.
365 * This should be enough for Bitmap and DrawPixels constants.
367 _mesa_reserve_parameter_storage(prog
->Parameters
, 8);
369 /* This has to be done last. Any operation the can cause
370 * prog->ParameterValues to get reallocated (e.g., anything that adds a
371 * program constant) has to happen before creating this linkage.
373 _mesa_associate_uniform_storage(st
->ctx
, shader_program
, prog
, true);
375 st_set_prog_affected_state_flags(prog
);
377 NIR_PASS_V(nir
, st_nir_lower_builtin
);
378 NIR_PASS_V(nir
, nir_lower_atomics
, shader_program
);
380 if (st
->ctx
->_Shader
->Flags
& GLSL_DUMP
) {
382 _mesa_log("NIR IR for linked %s program %d:\n",
383 _mesa_shader_stage_to_string(prog
->info
.stage
),
384 shader_program
->Name
);
385 nir_print_shader(nir
, _mesa_get_log_file());
390 /* TODO any better helper somewhere to sort a list? */
393 insert_sorted(struct exec_list
*var_list
, nir_variable
*new_var
)
395 nir_foreach_variable(var
, var_list
) {
396 if (var
->data
.location
> new_var
->data
.location
) {
397 exec_node_insert_node_before(&var
->node
, &new_var
->node
);
401 exec_list_push_tail(var_list
, &new_var
->node
);
405 sort_varyings(struct exec_list
*var_list
)
407 struct exec_list new_list
;
408 exec_list_make_empty(&new_list
);
409 nir_foreach_variable_safe(var
, var_list
) {
410 exec_node_remove(&var
->node
);
411 insert_sorted(&new_list
, var
);
413 exec_list_move_nodes_to(&new_list
, var_list
);
417 set_st_program(struct gl_program
*prog
,
418 struct gl_shader_program
*shader_program
,
421 struct st_vertex_program
*stvp
;
422 struct st_common_program
*stp
;
423 struct st_fragment_program
*stfp
;
424 struct st_compute_program
*stcp
;
426 switch (prog
->info
.stage
) {
427 case MESA_SHADER_VERTEX
:
428 stvp
= (struct st_vertex_program
*)prog
;
429 stvp
->shader_program
= shader_program
;
430 stvp
->tgsi
.type
= PIPE_SHADER_IR_NIR
;
431 stvp
->tgsi
.ir
.nir
= nir
;
433 case MESA_SHADER_GEOMETRY
:
434 case MESA_SHADER_TESS_CTRL
:
435 case MESA_SHADER_TESS_EVAL
:
436 stp
= (struct st_common_program
*)prog
;
437 stp
->shader_program
= shader_program
;
438 stp
->tgsi
.type
= PIPE_SHADER_IR_NIR
;
439 stp
->tgsi
.ir
.nir
= nir
;
441 case MESA_SHADER_FRAGMENT
:
442 stfp
= (struct st_fragment_program
*)prog
;
443 stfp
->shader_program
= shader_program
;
444 stfp
->tgsi
.type
= PIPE_SHADER_IR_NIR
;
445 stfp
->tgsi
.ir
.nir
= nir
;
447 case MESA_SHADER_COMPUTE
:
448 stcp
= (struct st_compute_program
*)prog
;
449 stcp
->shader_program
= shader_program
;
450 stcp
->tgsi
.ir_type
= PIPE_SHADER_IR_NIR
;
451 stcp
->tgsi
.prog
= nir
;
454 unreachable("unknown shader stage");
459 st_nir_get_mesa_program(struct gl_context
*ctx
,
460 struct gl_shader_program
*shader_program
,
461 struct gl_linked_shader
*shader
)
463 struct st_context
*st
= st_context(ctx
);
464 struct gl_program
*prog
;
466 validate_ir_tree(shader
->ir
);
468 prog
= shader
->Program
;
470 prog
->Parameters
= _mesa_new_parameter_list();
472 _mesa_copy_linked_program_data(shader_program
, shader
);
473 _mesa_generate_parameters_list_for_uniforms(ctx
, shader_program
, shader
,
476 if (ctx
->_Shader
->Flags
& GLSL_DUMP
) {
478 _mesa_log("GLSL IR for linked %s program %d:\n",
479 _mesa_shader_stage_to_string(shader
->Stage
),
480 shader_program
->Name
);
481 _mesa_print_ir(_mesa_get_log_file(), shader
->ir
, NULL
);
485 prog
->ExternalSamplersUsed
= gl_external_samplers(prog
);
486 _mesa_update_shader_textures_used(shader_program
, prog
);
488 nir_shader
*nir
= st_glsl_to_nir(st
, prog
, shader_program
, shader
->Stage
);
490 set_st_program(prog
, shader_program
, nir
);
493 NIR_PASS_V(nir
, nir_lower_io_to_temporaries
,
494 nir_shader_get_entrypoint(nir
),
496 NIR_PASS_V(nir
, nir_lower_global_vars_to_local
);
497 NIR_PASS_V(nir
, nir_split_var_copies
);
498 NIR_PASS_V(nir
, nir_lower_var_copies
);
502 st_nir_link_shaders(nir_shader
**producer
, nir_shader
**consumer
)
504 nir_lower_io_arrays_to_elements(*producer
, *consumer
);
506 NIR_PASS_V(*producer
, nir_remove_dead_variables
, nir_var_shader_out
);
507 NIR_PASS_V(*consumer
, nir_remove_dead_variables
, nir_var_shader_in
);
509 if (nir_remove_unused_varyings(*producer
, *consumer
)) {
510 NIR_PASS_V(*producer
, nir_lower_global_vars_to_local
);
511 NIR_PASS_V(*consumer
, nir_lower_global_vars_to_local
);
513 /* The backend might not be able to handle indirects on
514 * temporaries so we need to lower indirects on any of the
515 * varyings we have demoted here.
517 * TODO: radeonsi shouldn't need to do this, however LLVM isn't
518 * currently smart enough to handle indirects without causing excess
519 * spilling causing the gpu to hang.
521 * See the following thread for more details of the problem:
522 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
524 nir_variable_mode indirect_mask
= nir_var_local
;
526 NIR_PASS_V(*producer
, nir_lower_indirect_derefs
, indirect_mask
);
527 NIR_PASS_V(*consumer
, nir_lower_indirect_derefs
, indirect_mask
);
529 st_nir_opts(*producer
);
530 st_nir_opts(*consumer
);
537 st_link_nir(struct gl_context
*ctx
,
538 struct gl_shader_program
*shader_program
)
540 struct st_context
*st
= st_context(ctx
);
542 /* Determine first and last stage. */
543 unsigned first
= MESA_SHADER_STAGES
;
545 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
546 if (!shader_program
->_LinkedShaders
[i
])
548 if (first
== MESA_SHADER_STAGES
)
553 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
554 struct gl_linked_shader
*shader
= shader_program
->_LinkedShaders
[i
];
558 st_nir_get_mesa_program(ctx
, shader_program
, shader
);
560 nir_variable_mode mask
= (nir_variable_mode
) 0;
562 mask
= (nir_variable_mode
)(mask
| nir_var_shader_in
);
565 mask
= (nir_variable_mode
)(mask
| nir_var_shader_out
);
567 nir_shader
*nir
= shader
->Program
->nir
;
568 nir_lower_io_to_scalar_early(nir
, mask
);
572 /* Linking the stages in the opposite order (from fragment to vertex)
573 * ensures that inter-shader outputs written to in an earlier stage
574 * are eliminated if they are (transitively) not used in a later
578 for (int i
= next
- 1; i
>= 0; i
--) {
579 struct gl_linked_shader
*shader
= shader_program
->_LinkedShaders
[i
];
583 st_nir_link_shaders(&shader
->Program
->nir
,
584 &shader_program
->_LinkedShaders
[next
]->Program
->nir
);
589 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
590 struct gl_linked_shader
*shader
= shader_program
->_LinkedShaders
[i
];
594 nir_shader
*nir
= shader
->Program
->nir
;
596 /* fragment shaders may need : */
597 if (nir
->info
.stage
== MESA_SHADER_FRAGMENT
) {
598 static const gl_state_index wposTransformState
[STATE_LENGTH
] = {
599 STATE_INTERNAL
, STATE_FB_WPOS_Y_TRANSFORM
601 nir_lower_wpos_ytransform_options wpos_options
= { { 0 } };
602 struct pipe_screen
*pscreen
= st
->pipe
->screen
;
604 memcpy(wpos_options
.state_tokens
, wposTransformState
,
605 sizeof(wpos_options
.state_tokens
));
606 wpos_options
.fs_coord_origin_upper_left
=
607 pscreen
->get_param(pscreen
,
608 PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
);
609 wpos_options
.fs_coord_origin_lower_left
=
610 pscreen
->get_param(pscreen
,
611 PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
);
612 wpos_options
.fs_coord_pixel_center_integer
=
613 pscreen
->get_param(pscreen
,
614 PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
);
615 wpos_options
.fs_coord_pixel_center_half_integer
=
616 pscreen
->get_param(pscreen
,
617 PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
);
619 if (nir_lower_wpos_ytransform(nir
, &wpos_options
)) {
620 nir_validate_shader(nir
);
621 _mesa_add_state_reference(shader
->Program
->Parameters
,
626 NIR_PASS_V(nir
, nir_lower_system_values
);
628 nir_shader_gather_info(nir
, nir_shader_get_entrypoint(nir
));
629 shader
->Program
->info
= nir
->info
;
632 nir_compact_varyings(shader_program
->_LinkedShaders
[prev
]->Program
->nir
,
633 nir
, ctx
->API
!= API_OPENGL_COMPAT
);
638 for (unsigned i
= 0; i
< MESA_SHADER_STAGES
; i
++) {
639 struct gl_linked_shader
*shader
= shader_program
->_LinkedShaders
[i
];
643 st_glsl_to_nir_post_opts(st
, shader
->Program
, shader_program
);
645 assert(shader
->Program
);
646 if (!ctx
->Driver
.ProgramStringNotify(ctx
,
647 _mesa_shader_stage_to_program(i
),
649 _mesa_reference_program(ctx
, &shader
->Program
, NULL
);
657 /* Last third of preparing nir from glsl, which happens after shader
661 st_finalize_nir(struct st_context
*st
, struct gl_program
*prog
,
662 struct gl_shader_program
*shader_program
, nir_shader
*nir
)
664 struct pipe_screen
*screen
= st
->pipe
->screen
;
666 NIR_PASS_V(nir
, nir_split_var_copies
);
667 NIR_PASS_V(nir
, nir_lower_var_copies
);
668 if (nir
->info
.stage
!= MESA_SHADER_TESS_CTRL
)
669 NIR_PASS_V(nir
, nir_lower_io_arrays_to_elements_no_indirects
);
671 if (nir
->info
.stage
== MESA_SHADER_VERTEX
) {
672 /* Needs special handling so drvloc matches the vbo state: */
673 st_nir_assign_vs_in_locations(prog
, nir
);
674 /* Re-lower global vars, to deal with any dead VS inputs. */
675 NIR_PASS_V(nir
, nir_lower_global_vars_to_local
);
677 sort_varyings(&nir
->outputs
);
678 st_nir_assign_var_locations(&nir
->outputs
,
681 st_nir_fixup_varying_slots(st
, &nir
->outputs
);
682 } else if (nir
->info
.stage
== MESA_SHADER_GEOMETRY
||
683 nir
->info
.stage
== MESA_SHADER_TESS_CTRL
||
684 nir
->info
.stage
== MESA_SHADER_TESS_EVAL
) {
685 sort_varyings(&nir
->inputs
);
686 st_nir_assign_var_locations(&nir
->inputs
,
689 st_nir_fixup_varying_slots(st
, &nir
->inputs
);
691 sort_varyings(&nir
->outputs
);
692 st_nir_assign_var_locations(&nir
->outputs
,
695 st_nir_fixup_varying_slots(st
, &nir
->outputs
);
696 } else if (nir
->info
.stage
== MESA_SHADER_FRAGMENT
) {
697 sort_varyings(&nir
->inputs
);
698 st_nir_assign_var_locations(&nir
->inputs
,
701 st_nir_fixup_varying_slots(st
, &nir
->inputs
);
702 st_nir_assign_var_locations(&nir
->outputs
,
705 } else if (nir
->info
.stage
== MESA_SHADER_COMPUTE
) {
708 unreachable("invalid shader type for tgsi bypass\n");
711 NIR_PASS_V(nir
, nir_lower_atomics_to_ssbo
,
712 st
->ctx
->Const
.Program
[nir
->info
.stage
].MaxAtomicBuffers
);
714 st_nir_assign_uniform_locations(prog
, shader_program
,
715 &nir
->uniforms
, &nir
->num_uniforms
);
717 if (screen
->get_param(screen
, PIPE_CAP_NIR_SAMPLERS_AS_DEREF
))
718 NIR_PASS_V(nir
, nir_lower_samplers_as_deref
, shader_program
);
720 NIR_PASS_V(nir
, nir_lower_samplers
, shader_program
);