st/nir/radeonsi: move nir_lower_uniforms_to_ubo() to the state tracker
[mesa.git] / src / mesa / state_tracker / st_glsl_to_nir.cpp
1 /*
2 * Copyright © 2015 Red Hat
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 */
23
24 #include "st_nir.h"
25
26 #include "pipe/p_defines.h"
27 #include "pipe/p_screen.h"
28 #include "pipe/p_context.h"
29
30 #include "program/program.h"
31 #include "program/prog_statevars.h"
32 #include "program/prog_parameter.h"
33 #include "program/ir_to_mesa.h"
34 #include "main/mtypes.h"
35 #include "main/errors.h"
36 #include "main/shaderapi.h"
37 #include "main/uniforms.h"
38
39 #include "st_context.h"
40 #include "st_glsl_types.h"
41 #include "st_program.h"
42
43 #include "compiler/nir/nir.h"
44 #include "compiler/glsl_types.h"
45 #include "compiler/glsl/glsl_to_nir.h"
46 #include "compiler/glsl/ir.h"
47 #include "compiler/glsl/string_to_uint_map.h"
48
49
50 static int
51 type_size(const struct glsl_type *type)
52 {
53 return type->count_attribute_slots(false);
54 }
55
56 /* Depending on PIPE_CAP_TGSI_TEXCOORD (st->needs_texcoord_semantic) we
57 * may need to fix up varying slots so the glsl->nir path is aligned
58 * with the anything->tgsi->nir path.
59 */
60 static void
61 st_nir_fixup_varying_slots(struct st_context *st, struct exec_list *var_list)
62 {
63 if (st->needs_texcoord_semantic)
64 return;
65
66 nir_foreach_variable(var, var_list) {
67 if (var->data.location >= VARYING_SLOT_VAR0) {
68 var->data.location += 9;
69 } else if ((var->data.location >= VARYING_SLOT_TEX0) &&
70 (var->data.location <= VARYING_SLOT_TEX7)) {
71 var->data.location += VARYING_SLOT_VAR0 - VARYING_SLOT_TEX0;
72 }
73 }
74 }
75
76 /* input location assignment for VS inputs must be handled specially, so
77 * that it is aligned w/ st's vbo state.
78 * (This isn't the case with, for ex, FS inputs, which only need to agree
79 * on varying-slot w/ the VS outputs)
80 */
81 static void
82 st_nir_assign_vs_in_locations(struct gl_program *prog, nir_shader *nir)
83 {
84 unsigned attr, num_inputs = 0;
85 unsigned input_to_index[VERT_ATTRIB_MAX] = {0};
86
87 /* TODO de-duplicate w/ similar code in st_translate_vertex_program()? */
88 for (attr = 0; attr < VERT_ATTRIB_MAX; attr++) {
89 if ((prog->info.inputs_read & BITFIELD64_BIT(attr)) != 0) {
90 input_to_index[attr] = num_inputs;
91 num_inputs++;
92 if ((prog->info.vs.double_inputs_read & BITFIELD64_BIT(attr)) != 0) {
93 /* add placeholder for second part of a double attribute */
94 num_inputs++;
95 }
96 } else {
97 input_to_index[attr] = ~0;
98 }
99 }
100
101 /* bit of a hack, mirroring st_translate_vertex_program */
102 input_to_index[VERT_ATTRIB_EDGEFLAG] = num_inputs;
103
104 nir->num_inputs = 0;
105 nir_foreach_variable_safe(var, &nir->inputs) {
106 attr = var->data.location;
107 assert(attr < ARRAY_SIZE(input_to_index));
108
109 if (input_to_index[attr] != ~0u) {
110 var->data.driver_location = input_to_index[attr];
111 nir->num_inputs++;
112 } else {
113 /* Move unused input variables to the globals list (with no
114 * initialization), to avoid confusing drivers looking through the
115 * inputs array and expecting to find inputs with a driver_location
116 * set.
117 */
118 exec_node_remove(&var->node);
119 var->data.mode = nir_var_global;
120 exec_list_push_tail(&nir->globals, &var->node);
121 }
122 }
123 }
124
125 static void
126 st_nir_assign_var_locations(struct exec_list *var_list, unsigned *size,
127 gl_shader_stage stage)
128 {
129 unsigned location = 0;
130 unsigned assigned_locations[VARYING_SLOT_TESS_MAX];
131 uint64_t processed_locs[2] = {0};
132
133 const int base = stage == MESA_SHADER_FRAGMENT ?
134 (int) FRAG_RESULT_DATA0 : (int) VARYING_SLOT_VAR0;
135
136 nir_foreach_variable(var, var_list) {
137
138 const struct glsl_type *type = var->type;
139 if (nir_is_per_vertex_io(var, stage)) {
140 assert(glsl_type_is_array(type));
141 type = glsl_get_array_element(type);
142 }
143
144 /* Builtins don't allow component packing so we only need to worry about
145 * user defined varyings sharing the same location.
146 */
147 bool processed = false;
148 if (var->data.location >= base) {
149 unsigned glsl_location = var->data.location - base;
150 if (processed_locs[var->data.index] & ((uint64_t)1 << glsl_location))
151 processed = true;
152 else
153 processed_locs[var->data.index] |= ((uint64_t)1 << glsl_location);
154 }
155
156 /* Because component packing allows varyings to share the same location
157 * we may have already have processed this location.
158 */
159 if (processed) {
160 var->data.driver_location = assigned_locations[var->data.location];
161 *size += type_size(type);
162 continue;
163 }
164
165 assigned_locations[var->data.location] = location;
166 var->data.driver_location = location;
167 location += type_size(type);
168 }
169
170 *size += location;
171 }
172
173 static int
174 st_nir_lookup_parameter_index(const struct gl_program_parameter_list *params,
175 const char *name)
176 {
177 int loc = _mesa_lookup_parameter_index(params, name);
178
179 /* is there a better way to do this? If we have something like:
180 *
181 * struct S {
182 * float f;
183 * vec4 v;
184 * };
185 * uniform S color;
186 *
187 * Then what we get in prog->Parameters looks like:
188 *
189 * 0: Name=color.f, Type=6, DataType=1406, Size=1
190 * 1: Name=color.v, Type=6, DataType=8b52, Size=4
191 *
192 * So the name doesn't match up and _mesa_lookup_parameter_index()
193 * fails. In this case just find the first matching "color.*"..
194 *
195 * Note for arrays you could end up w/ color[n].f, for example.
196 *
197 * glsl_to_tgsi works slightly differently in this regard. It is
198 * emitting something more low level, so it just translates the
199 * params list 1:1 to CONST[] regs. Going from GLSL IR to TGSI,
200 * it just calculates the additional offset of struct field members
201 * in glsl_to_tgsi_visitor::visit(ir_dereference_record *ir) or
202 * glsl_to_tgsi_visitor::visit(ir_dereference_array *ir). It never
203 * needs to work backwards to get base var loc from the param-list
204 * which already has them separated out.
205 */
206 if (loc < 0) {
207 int namelen = strlen(name);
208 for (unsigned i = 0; i < params->NumParameters; i++) {
209 struct gl_program_parameter *p = &params->Parameters[i];
210 if ((strncmp(p->Name, name, namelen) == 0) &&
211 ((p->Name[namelen] == '.') || (p->Name[namelen] == '['))) {
212 loc = i;
213 break;
214 }
215 }
216 }
217
218 return loc;
219 }
220
221 static void
222 st_nir_assign_uniform_locations(struct gl_context *ctx,
223 struct gl_program *prog,
224 struct gl_shader_program *shader_program,
225 struct exec_list *uniform_list, unsigned *size)
226 {
227 int max = 0;
228 int shaderidx = 0;
229 int imageidx = 0;
230
231 nir_foreach_variable(uniform, uniform_list) {
232 int loc;
233
234 /*
235 * UBO's have their own address spaces, so don't count them towards the
236 * number of global uniforms
237 */
238 if ((uniform->data.mode == nir_var_uniform || uniform->data.mode == nir_var_shader_storage) &&
239 uniform->interface_type != NULL)
240 continue;
241
242 if (uniform->type->is_sampler() || uniform->type->is_image()) {
243 if (uniform->type->is_sampler())
244 loc = shaderidx++;
245 else
246 loc = imageidx++;
247 } else if (strncmp(uniform->name, "gl_", 3) == 0) {
248 const gl_state_index16 *const stateTokens = uniform->state_slots[0].tokens;
249 /* This state reference has already been setup by ir_to_mesa, but we'll
250 * get the same index back here.
251 */
252
253 unsigned comps;
254 const struct glsl_type *type = glsl_without_array(uniform->type);
255 if (glsl_type_is_struct(type)) {
256 comps = 4;
257 } else {
258 comps = glsl_get_vector_elements(type);
259 }
260
261 if (ctx->Const.PackedDriverUniformStorage) {
262 loc = _mesa_add_sized_state_reference(prog->Parameters,
263 stateTokens, comps, false);
264 } else {
265 loc = _mesa_add_state_reference(prog->Parameters, stateTokens);
266 }
267 } else {
268 loc = st_nir_lookup_parameter_index(prog->Parameters, uniform->name);
269 }
270
271 uniform->data.driver_location = loc;
272
273 max = MAX2(max, loc + type_size(uniform->type));
274 }
275 *size = max;
276 }
277
278 static void
279 st_nir_opts(nir_shader *nir)
280 {
281 bool progress;
282 do {
283 progress = false;
284
285 NIR_PASS_V(nir, nir_lower_vars_to_ssa);
286 NIR_PASS_V(nir, nir_lower_alu_to_scalar);
287 NIR_PASS_V(nir, nir_lower_phis_to_scalar);
288
289 NIR_PASS_V(nir, nir_lower_64bit_pack);
290 NIR_PASS(progress, nir, nir_copy_prop);
291 NIR_PASS(progress, nir, nir_opt_remove_phis);
292 NIR_PASS(progress, nir, nir_opt_dce);
293 if (nir_opt_trivial_continues(nir)) {
294 progress = true;
295 NIR_PASS(progress, nir, nir_copy_prop);
296 NIR_PASS(progress, nir, nir_opt_dce);
297 }
298 NIR_PASS(progress, nir, nir_opt_if);
299 NIR_PASS(progress, nir, nir_opt_dead_cf);
300 NIR_PASS(progress, nir, nir_opt_cse);
301 NIR_PASS(progress, nir, nir_opt_peephole_select, 8);
302
303 NIR_PASS(progress, nir, nir_opt_algebraic);
304 NIR_PASS(progress, nir, nir_opt_constant_folding);
305
306 NIR_PASS(progress, nir, nir_opt_undef);
307 NIR_PASS(progress, nir, nir_opt_conditional_discard);
308 if (nir->options->max_unroll_iterations) {
309 NIR_PASS(progress, nir, nir_opt_loop_unroll, (nir_variable_mode)0);
310 }
311 } while (progress);
312 }
313
314 /* First third of converting glsl_to_nir.. this leaves things in a pre-
315 * nir_lower_io state, so that shader variants can more easily insert/
316 * replace variables, etc.
317 */
318 static nir_shader *
319 st_glsl_to_nir(struct st_context *st, struct gl_program *prog,
320 struct gl_shader_program *shader_program,
321 gl_shader_stage stage)
322 {
323 const nir_shader_compiler_options *options =
324 st->ctx->Const.ShaderCompilerOptions[prog->info.stage].NirOptions;
325 assert(options);
326
327 if (prog->nir)
328 return prog->nir;
329
330 nir_shader *nir = glsl_to_nir(shader_program, stage, options);
331
332 nir_variable_mode mask =
333 (nir_variable_mode) (nir_var_shader_in | nir_var_shader_out);
334 nir_remove_dead_variables(nir, mask);
335
336 if (options->lower_all_io_to_temps ||
337 nir->info.stage == MESA_SHADER_VERTEX ||
338 nir->info.stage == MESA_SHADER_GEOMETRY) {
339 NIR_PASS_V(nir, nir_lower_io_to_temporaries,
340 nir_shader_get_entrypoint(nir),
341 true, true);
342 } else if (nir->info.stage == MESA_SHADER_FRAGMENT) {
343 NIR_PASS_V(nir, nir_lower_io_to_temporaries,
344 nir_shader_get_entrypoint(nir),
345 true, false);
346 }
347
348 NIR_PASS_V(nir, nir_lower_global_vars_to_local);
349 NIR_PASS_V(nir, nir_split_var_copies);
350 NIR_PASS_V(nir, nir_lower_var_copies);
351
352 st_nir_opts(nir);
353
354 return nir;
355 }
356
357 /* Second third of converting glsl_to_nir. This creates uniforms, gathers
358 * info on varyings, etc after NIR link time opts have been applied.
359 */
360 static void
361 st_glsl_to_nir_post_opts(struct st_context *st, struct gl_program *prog,
362 struct gl_shader_program *shader_program)
363 {
364 nir_shader *nir = prog->nir;
365
366 /* Make a pass over the IR to add state references for any built-in
367 * uniforms that are used. This has to be done now (during linking).
368 * Code generation doesn't happen until the first time this shader is
369 * used for rendering. Waiting until then to generate the parameters is
370 * too late. At that point, the values for the built-in uniforms won't
371 * get sent to the shader.
372 */
373 nir_foreach_variable(var, &nir->uniforms) {
374 if (strncmp(var->name, "gl_", 3) == 0) {
375 const nir_state_slot *const slots = var->state_slots;
376 assert(var->state_slots != NULL);
377
378 const struct glsl_type *type = glsl_without_array(var->type);
379 for (unsigned int i = 0; i < var->num_state_slots; i++) {
380 unsigned comps;
381 if (glsl_type_is_struct(type)) {
382 /* Builtin struct require specical handling for now we just
383 * make all members vec4. See st_nir_lower_builtin.
384 */
385 comps = 4;
386 } else {
387 comps = glsl_get_vector_elements(type);
388 }
389
390 if (st->ctx->Const.PackedDriverUniformStorage) {
391 _mesa_add_sized_state_reference(prog->Parameters,
392 slots[i].tokens,
393 comps, false);
394 } else {
395 _mesa_add_state_reference(prog->Parameters,
396 slots[i].tokens);
397 }
398 }
399 }
400 }
401
402 /* Avoid reallocation of the program parameter list, because the uniform
403 * storage is only associated with the original parameter list.
404 * This should be enough for Bitmap and DrawPixels constants.
405 */
406 _mesa_reserve_parameter_storage(prog->Parameters, 8);
407
408 /* This has to be done last. Any operation the can cause
409 * prog->ParameterValues to get reallocated (e.g., anything that adds a
410 * program constant) has to happen before creating this linkage.
411 */
412 _mesa_associate_uniform_storage(st->ctx, shader_program, prog, true);
413
414 st_set_prog_affected_state_flags(prog);
415
416 NIR_PASS_V(nir, st_nir_lower_builtin);
417 NIR_PASS_V(nir, nir_lower_atomics, shader_program);
418
419 if (st->ctx->_Shader->Flags & GLSL_DUMP) {
420 _mesa_log("\n");
421 _mesa_log("NIR IR for linked %s program %d:\n",
422 _mesa_shader_stage_to_string(prog->info.stage),
423 shader_program->Name);
424 nir_print_shader(nir, _mesa_get_log_file());
425 _mesa_log("\n\n");
426 }
427 }
428
429 /* TODO any better helper somewhere to sort a list? */
430
431 static void
432 insert_sorted(struct exec_list *var_list, nir_variable *new_var)
433 {
434 nir_foreach_variable(var, var_list) {
435 if (var->data.location > new_var->data.location) {
436 exec_node_insert_node_before(&var->node, &new_var->node);
437 return;
438 }
439 }
440 exec_list_push_tail(var_list, &new_var->node);
441 }
442
443 static void
444 sort_varyings(struct exec_list *var_list)
445 {
446 struct exec_list new_list;
447 exec_list_make_empty(&new_list);
448 nir_foreach_variable_safe(var, var_list) {
449 exec_node_remove(&var->node);
450 insert_sorted(&new_list, var);
451 }
452 exec_list_move_nodes_to(&new_list, var_list);
453 }
454
455 static void
456 set_st_program(struct gl_program *prog,
457 struct gl_shader_program *shader_program,
458 nir_shader *nir)
459 {
460 struct st_vertex_program *stvp;
461 struct st_common_program *stp;
462 struct st_fragment_program *stfp;
463 struct st_compute_program *stcp;
464
465 switch (prog->info.stage) {
466 case MESA_SHADER_VERTEX:
467 stvp = (struct st_vertex_program *)prog;
468 stvp->shader_program = shader_program;
469 stvp->tgsi.type = PIPE_SHADER_IR_NIR;
470 stvp->tgsi.ir.nir = nir;
471 break;
472 case MESA_SHADER_GEOMETRY:
473 case MESA_SHADER_TESS_CTRL:
474 case MESA_SHADER_TESS_EVAL:
475 stp = (struct st_common_program *)prog;
476 stp->shader_program = shader_program;
477 stp->tgsi.type = PIPE_SHADER_IR_NIR;
478 stp->tgsi.ir.nir = nir;
479 break;
480 case MESA_SHADER_FRAGMENT:
481 stfp = (struct st_fragment_program *)prog;
482 stfp->shader_program = shader_program;
483 stfp->tgsi.type = PIPE_SHADER_IR_NIR;
484 stfp->tgsi.ir.nir = nir;
485 break;
486 case MESA_SHADER_COMPUTE:
487 stcp = (struct st_compute_program *)prog;
488 stcp->shader_program = shader_program;
489 stcp->tgsi.ir_type = PIPE_SHADER_IR_NIR;
490 stcp->tgsi.prog = nir;
491 break;
492 default:
493 unreachable("unknown shader stage");
494 }
495 }
496
497 static void
498 st_nir_get_mesa_program(struct gl_context *ctx,
499 struct gl_shader_program *shader_program,
500 struct gl_linked_shader *shader)
501 {
502 struct st_context *st = st_context(ctx);
503 struct gl_program *prog;
504
505 validate_ir_tree(shader->ir);
506
507 prog = shader->Program;
508
509 prog->Parameters = _mesa_new_parameter_list();
510
511 _mesa_copy_linked_program_data(shader_program, shader);
512 _mesa_generate_parameters_list_for_uniforms(ctx, shader_program, shader,
513 prog->Parameters);
514
515 if (ctx->_Shader->Flags & GLSL_DUMP) {
516 _mesa_log("\n");
517 _mesa_log("GLSL IR for linked %s program %d:\n",
518 _mesa_shader_stage_to_string(shader->Stage),
519 shader_program->Name);
520 _mesa_print_ir(_mesa_get_log_file(), shader->ir, NULL);
521 _mesa_log("\n\n");
522 }
523
524 prog->ExternalSamplersUsed = gl_external_samplers(prog);
525 _mesa_update_shader_textures_used(shader_program, prog);
526
527 nir_shader *nir = st_glsl_to_nir(st, prog, shader_program, shader->Stage);
528
529 set_st_program(prog, shader_program, nir);
530 prog->nir = nir;
531 }
532
533 static void
534 st_nir_link_shaders(nir_shader **producer, nir_shader **consumer)
535 {
536 nir_lower_io_arrays_to_elements(*producer, *consumer);
537
538 NIR_PASS_V(*producer, nir_remove_dead_variables, nir_var_shader_out);
539 NIR_PASS_V(*consumer, nir_remove_dead_variables, nir_var_shader_in);
540
541 if (nir_remove_unused_varyings(*producer, *consumer)) {
542 NIR_PASS_V(*producer, nir_lower_global_vars_to_local);
543 NIR_PASS_V(*consumer, nir_lower_global_vars_to_local);
544
545 /* The backend might not be able to handle indirects on
546 * temporaries so we need to lower indirects on any of the
547 * varyings we have demoted here.
548 *
549 * TODO: radeonsi shouldn't need to do this, however LLVM isn't
550 * currently smart enough to handle indirects without causing excess
551 * spilling causing the gpu to hang.
552 *
553 * See the following thread for more details of the problem:
554 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
555 */
556 nir_variable_mode indirect_mask = nir_var_local;
557
558 NIR_PASS_V(*producer, nir_lower_indirect_derefs, indirect_mask);
559 NIR_PASS_V(*consumer, nir_lower_indirect_derefs, indirect_mask);
560
561 st_nir_opts(*producer);
562 st_nir_opts(*consumer);
563 }
564 }
565
566 extern "C" {
567
568 bool
569 st_link_nir(struct gl_context *ctx,
570 struct gl_shader_program *shader_program)
571 {
572 struct st_context *st = st_context(ctx);
573
574 /* Determine first and last stage. */
575 unsigned first = MESA_SHADER_STAGES;
576 unsigned last = 0;
577 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
578 if (!shader_program->_LinkedShaders[i])
579 continue;
580 if (first == MESA_SHADER_STAGES)
581 first = i;
582 last = i;
583 }
584
585 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
586 struct gl_linked_shader *shader = shader_program->_LinkedShaders[i];
587 if (shader == NULL)
588 continue;
589
590 st_nir_get_mesa_program(ctx, shader_program, shader);
591
592 nir_variable_mode mask = (nir_variable_mode) 0;
593 if (i != first)
594 mask = (nir_variable_mode)(mask | nir_var_shader_in);
595
596 if (i != last)
597 mask = (nir_variable_mode)(mask | nir_var_shader_out);
598
599 nir_shader *nir = shader->Program->nir;
600 nir_lower_io_to_scalar_early(nir, mask);
601 st_nir_opts(nir);
602 }
603
604 /* Linking the stages in the opposite order (from fragment to vertex)
605 * ensures that inter-shader outputs written to in an earlier stage
606 * are eliminated if they are (transitively) not used in a later
607 * stage.
608 */
609 int next = last;
610 for (int i = next - 1; i >= 0; i--) {
611 struct gl_linked_shader *shader = shader_program->_LinkedShaders[i];
612 if (shader == NULL)
613 continue;
614
615 st_nir_link_shaders(&shader->Program->nir,
616 &shader_program->_LinkedShaders[next]->Program->nir);
617 next = i;
618 }
619
620 int prev = -1;
621 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
622 struct gl_linked_shader *shader = shader_program->_LinkedShaders[i];
623 if (shader == NULL)
624 continue;
625
626 nir_shader *nir = shader->Program->nir;
627
628 /* fragment shaders may need : */
629 if (nir->info.stage == MESA_SHADER_FRAGMENT) {
630 static const gl_state_index16 wposTransformState[STATE_LENGTH] = {
631 STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM
632 };
633 nir_lower_wpos_ytransform_options wpos_options = { { 0 } };
634 struct pipe_screen *pscreen = st->pipe->screen;
635
636 memcpy(wpos_options.state_tokens, wposTransformState,
637 sizeof(wpos_options.state_tokens));
638 wpos_options.fs_coord_origin_upper_left =
639 pscreen->get_param(pscreen,
640 PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT);
641 wpos_options.fs_coord_origin_lower_left =
642 pscreen->get_param(pscreen,
643 PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
644 wpos_options.fs_coord_pixel_center_integer =
645 pscreen->get_param(pscreen,
646 PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
647 wpos_options.fs_coord_pixel_center_half_integer =
648 pscreen->get_param(pscreen,
649 PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER);
650
651 if (nir_lower_wpos_ytransform(nir, &wpos_options)) {
652 nir_validate_shader(nir);
653 _mesa_add_state_reference(shader->Program->Parameters,
654 wposTransformState);
655 }
656 }
657
658 NIR_PASS_V(nir, nir_lower_system_values);
659
660 nir_shader_gather_info(nir, nir_shader_get_entrypoint(nir));
661 shader->Program->info = nir->info;
662
663 if (prev != -1) {
664 nir_compact_varyings(shader_program->_LinkedShaders[prev]->Program->nir,
665 nir, ctx->API != API_OPENGL_COMPAT);
666 }
667 prev = i;
668 }
669
670 for (unsigned i = 0; i < MESA_SHADER_STAGES; i++) {
671 struct gl_linked_shader *shader = shader_program->_LinkedShaders[i];
672 if (shader == NULL)
673 continue;
674
675 st_glsl_to_nir_post_opts(st, shader->Program, shader_program);
676
677 assert(shader->Program);
678 if (!ctx->Driver.ProgramStringNotify(ctx,
679 _mesa_shader_stage_to_program(i),
680 shader->Program)) {
681 _mesa_reference_program(ctx, &shader->Program, NULL);
682 return false;
683 }
684 }
685
686 return true;
687 }
688
689 /* Last third of preparing nir from glsl, which happens after shader
690 * variant lowering.
691 */
692 void
693 st_finalize_nir(struct st_context *st, struct gl_program *prog,
694 struct gl_shader_program *shader_program, nir_shader *nir)
695 {
696 struct pipe_screen *screen = st->pipe->screen;
697 const nir_shader_compiler_options *options =
698 st->ctx->Const.ShaderCompilerOptions[prog->info.stage].NirOptions;
699
700 NIR_PASS_V(nir, nir_split_var_copies);
701 NIR_PASS_V(nir, nir_lower_var_copies);
702 if (options->lower_all_io_to_temps ||
703 nir->info.stage == MESA_SHADER_VERTEX ||
704 nir->info.stage == MESA_SHADER_GEOMETRY) {
705 NIR_PASS_V(nir, nir_lower_io_arrays_to_elements_no_indirects, false);
706 } else if (nir->info.stage == MESA_SHADER_FRAGMENT) {
707 NIR_PASS_V(nir, nir_lower_io_arrays_to_elements_no_indirects, true);
708 }
709
710 if (nir->info.stage == MESA_SHADER_VERTEX) {
711 /* Needs special handling so drvloc matches the vbo state: */
712 st_nir_assign_vs_in_locations(prog, nir);
713 /* Re-lower global vars, to deal with any dead VS inputs. */
714 NIR_PASS_V(nir, nir_lower_global_vars_to_local);
715
716 sort_varyings(&nir->outputs);
717 st_nir_assign_var_locations(&nir->outputs,
718 &nir->num_outputs,
719 nir->info.stage);
720 st_nir_fixup_varying_slots(st, &nir->outputs);
721 } else if (nir->info.stage == MESA_SHADER_GEOMETRY ||
722 nir->info.stage == MESA_SHADER_TESS_CTRL ||
723 nir->info.stage == MESA_SHADER_TESS_EVAL) {
724 sort_varyings(&nir->inputs);
725 st_nir_assign_var_locations(&nir->inputs,
726 &nir->num_inputs,
727 nir->info.stage);
728 st_nir_fixup_varying_slots(st, &nir->inputs);
729
730 sort_varyings(&nir->outputs);
731 st_nir_assign_var_locations(&nir->outputs,
732 &nir->num_outputs,
733 nir->info.stage);
734 st_nir_fixup_varying_slots(st, &nir->outputs);
735 } else if (nir->info.stage == MESA_SHADER_FRAGMENT) {
736 sort_varyings(&nir->inputs);
737 st_nir_assign_var_locations(&nir->inputs,
738 &nir->num_inputs,
739 nir->info.stage);
740 st_nir_fixup_varying_slots(st, &nir->inputs);
741 st_nir_assign_var_locations(&nir->outputs,
742 &nir->num_outputs,
743 nir->info.stage);
744 } else if (nir->info.stage == MESA_SHADER_COMPUTE) {
745 /* TODO? */
746 } else {
747 unreachable("invalid shader type for tgsi bypass\n");
748 }
749
750 NIR_PASS_V(nir, nir_lower_atomics_to_ssbo,
751 st->ctx->Const.Program[nir->info.stage].MaxAtomicBuffers);
752
753 st_nir_assign_uniform_locations(st->ctx, prog, shader_program,
754 &nir->uniforms, &nir->num_uniforms);
755
756 /* Below is a quick hack so that uniform lowering only runs on radeonsi
757 * (the only NIR backend that currently supports tess) once we enable
758 * uniform packing support we will just use
759 * ctx->Const.PackedDriverUniformStorage for this check.
760 */
761 if (screen->get_shader_param(screen, PIPE_SHADER_TESS_CTRL,
762 PIPE_SHADER_CAP_MAX_INSTRUCTIONS) > 0) {
763 NIR_PASS_V(nir, nir_lower_io, nir_var_uniform, type_size,
764 (nir_lower_io_options)0);
765 NIR_PASS_V(nir, st_nir_lower_uniforms_to_ubo);
766 }
767
768 if (screen->get_param(screen, PIPE_CAP_NIR_SAMPLERS_AS_DEREF))
769 NIR_PASS_V(nir, nir_lower_samplers_as_deref, shader_program);
770 else
771 NIR_PASS_V(nir, nir_lower_samplers, shader_program);
772 }
773
774 } /* extern "C" */