Merge branch 'softpipe-opt'
[mesa.git] / src / mesa / state_tracker / st_mesa_to_tgsi.c
1 /**************************************************************************
2 *
3 * Copyright 2007-2008 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 /*
29 * \author
30 * Michal Krol,
31 * Keith Whitwell
32 */
33
34 #include "pipe/p_compiler.h"
35 #include "pipe/p_shader_tokens.h"
36 #include "pipe/p_state.h"
37 #include "tgsi/tgsi_ureg.h"
38 #include "st_mesa_to_tgsi.h"
39 #include "shader/prog_instruction.h"
40 #include "shader/prog_parameter.h"
41 #include "shader/prog_print.h"
42 #include "util/u_debug.h"
43 #include "util/u_math.h"
44 #include "util/u_memory.h"
45
46 struct label {
47 unsigned branch_target;
48 unsigned token;
49 };
50
51 struct st_translate {
52 struct ureg_program *ureg;
53
54 struct ureg_dst temps[MAX_PROGRAM_TEMPS];
55 struct ureg_src *constants;
56 struct ureg_dst outputs[PIPE_MAX_SHADER_OUTPUTS];
57 struct ureg_src inputs[PIPE_MAX_SHADER_INPUTS];
58 struct ureg_dst address[1];
59 struct ureg_src samplers[PIPE_MAX_SAMPLERS];
60
61 const GLuint *inputMapping;
62 const GLuint *outputMapping;
63
64 /* For every instruction that contains a label (eg CALL), keep
65 * details so that we can go back afterwards and emit the correct
66 * tgsi instruction number for each label.
67 */
68 struct label *labels;
69 unsigned labels_size;
70 unsigned labels_count;
71
72 /* Keep a record of the tgsi instruction number that each mesa
73 * instruction starts at, will be used to fix up labels after
74 * translation.
75 */
76 unsigned *insn;
77 unsigned insn_size;
78 unsigned insn_count;
79
80 unsigned procType; /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
81
82 boolean error;
83 };
84
85
86 static unsigned *get_label( struct st_translate *t,
87 unsigned branch_target )
88 {
89 unsigned i;
90
91 if (t->labels_count + 1 >= t->labels_size) {
92 unsigned old_size = t->labels_size;
93 t->labels_size = 1 << (util_logbase2(t->labels_size) + 1);
94 t->labels = REALLOC( t->labels,
95 old_size * sizeof t->labels[0],
96 t->labels_size * sizeof t->labels[0] );
97 if (t->labels == NULL) {
98 static unsigned dummy;
99 t->error = TRUE;
100 return &dummy;
101 }
102 }
103
104 i = t->labels_count++;
105 t->labels[i].branch_target = branch_target;
106 return &t->labels[i].token;
107 }
108
109
110 static void set_insn_start( struct st_translate *t,
111 unsigned start )
112 {
113 if (t->insn_count + 1 >= t->insn_size) {
114 unsigned old_size = t->insn_size;
115 t->insn_size = 1 << (util_logbase2(t->insn_size) + 1);
116 t->insn = REALLOC( t->insn,
117 old_size * sizeof t->insn[0],
118 t->insn_size * sizeof t->insn[0] );
119 if (t->insn == NULL) {
120 t->error = TRUE;
121 return;
122 }
123 }
124
125 t->insn[t->insn_count++] = start;
126 }
127
128
129 /*
130 * Map mesa register file to TGSI register file.
131 */
132 static struct ureg_dst
133 dst_register( struct st_translate *t,
134 gl_register_file file,
135 GLuint index )
136 {
137 switch( file ) {
138 case PROGRAM_UNDEFINED:
139 return ureg_dst_undef();
140
141 case PROGRAM_TEMPORARY:
142 if (ureg_dst_is_undef(t->temps[index]))
143 t->temps[index] = ureg_DECL_temporary( t->ureg );
144
145 return t->temps[index];
146
147 case PROGRAM_OUTPUT:
148 return t->outputs[t->outputMapping[index]];
149
150 case PROGRAM_ADDRESS:
151 return t->address[index];
152
153 default:
154 assert( 0 );
155 return ureg_dst_undef();
156 }
157 }
158
159
160 static struct ureg_src
161 src_register( struct st_translate *t,
162 gl_register_file file,
163 GLuint index )
164 {
165 switch( file ) {
166 case PROGRAM_UNDEFINED:
167 return ureg_src_undef();
168
169 case PROGRAM_TEMPORARY:
170 if (ureg_dst_is_undef(t->temps[index]))
171 t->temps[index] = ureg_DECL_temporary( t->ureg );
172 return ureg_src(t->temps[index]);
173
174 case PROGRAM_STATE_VAR:
175 case PROGRAM_NAMED_PARAM:
176 case PROGRAM_UNIFORM:
177 case PROGRAM_CONSTANT:
178 return t->constants[index];
179
180 case PROGRAM_INPUT:
181 return t->inputs[t->inputMapping[index]];
182
183 case PROGRAM_OUTPUT:
184 return ureg_src(t->outputs[t->outputMapping[index]]); /* not needed? */
185
186 case PROGRAM_ADDRESS:
187 return ureg_src(t->address[index]);
188
189 default:
190 assert( 0 );
191 return ureg_src_undef();
192 }
193 }
194
195
196 /**
197 * Map mesa texture target to TGSI texture target.
198 */
199 static unsigned
200 translate_texture_target( GLuint textarget,
201 GLboolean shadow )
202 {
203 if (shadow) {
204 switch( textarget ) {
205 case TEXTURE_1D_INDEX: return TGSI_TEXTURE_SHADOW1D;
206 case TEXTURE_2D_INDEX: return TGSI_TEXTURE_SHADOW2D;
207 case TEXTURE_RECT_INDEX: return TGSI_TEXTURE_SHADOWRECT;
208 default: break;
209 }
210 }
211
212 switch( textarget ) {
213 case TEXTURE_1D_INDEX: return TGSI_TEXTURE_1D;
214 case TEXTURE_2D_INDEX: return TGSI_TEXTURE_2D;
215 case TEXTURE_3D_INDEX: return TGSI_TEXTURE_3D;
216 case TEXTURE_CUBE_INDEX: return TGSI_TEXTURE_CUBE;
217 case TEXTURE_RECT_INDEX: return TGSI_TEXTURE_RECT;
218 default:
219 assert( 0 );
220 return TGSI_TEXTURE_1D;
221 }
222 }
223
224
225 static struct ureg_dst
226 translate_dst( struct st_translate *t,
227 const struct prog_dst_register *DstReg,
228 boolean saturate )
229 {
230 struct ureg_dst dst = dst_register( t,
231 DstReg->File,
232 DstReg->Index );
233
234 dst = ureg_writemask( dst,
235 DstReg->WriteMask );
236
237 if (saturate)
238 dst = ureg_saturate( dst );
239
240 if (DstReg->RelAddr)
241 dst = ureg_dst_indirect( dst, ureg_src(t->address[0]) );
242
243 return dst;
244 }
245
246
247 static struct ureg_src
248 translate_src( struct st_translate *t,
249 const struct prog_src_register *SrcReg )
250 {
251 struct ureg_src src = src_register( t, SrcReg->File, SrcReg->Index );
252
253 src = ureg_swizzle( src,
254 GET_SWZ( SrcReg->Swizzle, 0 ) & 0x3,
255 GET_SWZ( SrcReg->Swizzle, 1 ) & 0x3,
256 GET_SWZ( SrcReg->Swizzle, 2 ) & 0x3,
257 GET_SWZ( SrcReg->Swizzle, 3 ) & 0x3);
258
259 if (SrcReg->Negate == NEGATE_XYZW)
260 src = ureg_negate(src);
261
262 if (SrcReg->Abs)
263 src = ureg_abs(src);
264
265 if (SrcReg->RelAddr)
266 src = ureg_src_indirect( src, ureg_src(t->address[0]));
267
268 return src;
269 }
270
271
272 static struct ureg_src swizzle_4v( struct ureg_src src,
273 const unsigned *swz )
274 {
275 return ureg_swizzle( src, swz[0], swz[1], swz[2], swz[3] );
276 }
277
278
279 /**
280 * Translate SWZ instructions into a single MAD. EG:
281 *
282 * SWZ dst, src.x-y10
283 *
284 * becomes:
285 *
286 * MAD dst {1,-1,0,0}, src.xyxx, {0,0,1,0}
287 */
288 static void emit_swz( struct st_translate *t,
289 struct ureg_dst dst,
290 const struct prog_src_register *SrcReg )
291 {
292 struct ureg_program *ureg = t->ureg;
293 struct ureg_src src = src_register( t, SrcReg->File, SrcReg->Index );
294
295 unsigned negate_mask = SrcReg->Negate;
296
297 unsigned one_mask = ((GET_SWZ(SrcReg->Swizzle, 0) == SWIZZLE_ONE) << 0 |
298 (GET_SWZ(SrcReg->Swizzle, 1) == SWIZZLE_ONE) << 1 |
299 (GET_SWZ(SrcReg->Swizzle, 2) == SWIZZLE_ONE) << 2 |
300 (GET_SWZ(SrcReg->Swizzle, 3) == SWIZZLE_ONE) << 3);
301
302 unsigned zero_mask = ((GET_SWZ(SrcReg->Swizzle, 0) == SWIZZLE_ZERO) << 0 |
303 (GET_SWZ(SrcReg->Swizzle, 1) == SWIZZLE_ZERO) << 1 |
304 (GET_SWZ(SrcReg->Swizzle, 2) == SWIZZLE_ZERO) << 2 |
305 (GET_SWZ(SrcReg->Swizzle, 3) == SWIZZLE_ZERO) << 3);
306
307 unsigned negative_one_mask = one_mask & negate_mask;
308 unsigned positive_one_mask = one_mask & ~negate_mask;
309
310 struct ureg_src imm;
311 unsigned i;
312 unsigned mul_swizzle[4] = {0,0,0,0};
313 unsigned add_swizzle[4] = {0,0,0,0};
314 unsigned src_swizzle[4] = {0,0,0,0};
315 boolean need_add = FALSE;
316 boolean need_mul = FALSE;
317
318 if (dst.WriteMask == 0)
319 return;
320
321 /* Is this just a MOV?
322 */
323 if (zero_mask == 0 &&
324 one_mask == 0 &&
325 (negate_mask == 0 || negate_mask == TGSI_WRITEMASK_XYZW))
326 {
327 ureg_MOV( ureg, dst, translate_src( t, SrcReg ));
328 return;
329 }
330
331 #define IMM_ZERO 0
332 #define IMM_ONE 1
333 #define IMM_NEG_ONE 2
334
335 imm = ureg_imm3f( ureg, 0, 1, -1 );
336
337 for (i = 0; i < 4; i++) {
338 unsigned bit = 1 << i;
339
340 if (dst.WriteMask & bit) {
341 if (positive_one_mask & bit) {
342 mul_swizzle[i] = IMM_ZERO;
343 add_swizzle[i] = IMM_ONE;
344 need_add = TRUE;
345 }
346 else if (negative_one_mask & bit) {
347 mul_swizzle[i] = IMM_ZERO;
348 add_swizzle[i] = IMM_NEG_ONE;
349 need_add = TRUE;
350 }
351 else if (zero_mask & bit) {
352 mul_swizzle[i] = IMM_ZERO;
353 add_swizzle[i] = IMM_ZERO;
354 need_add = TRUE;
355 }
356 else {
357 add_swizzle[i] = IMM_ZERO;
358 src_swizzle[i] = GET_SWZ(SrcReg->Swizzle, i);
359 need_mul = TRUE;
360 if (negate_mask & bit) {
361 mul_swizzle[i] = IMM_NEG_ONE;
362 }
363 else {
364 mul_swizzle[i] = IMM_ONE;
365 }
366 }
367 }
368 }
369
370 if (need_mul && need_add) {
371 ureg_MAD( ureg,
372 dst,
373 swizzle_4v( src, src_swizzle ),
374 swizzle_4v( imm, mul_swizzle ),
375 swizzle_4v( imm, add_swizzle ) );
376 }
377 else if (need_mul) {
378 ureg_MUL( ureg,
379 dst,
380 swizzle_4v( src, src_swizzle ),
381 swizzle_4v( imm, mul_swizzle ) );
382 }
383 else if (need_add) {
384 ureg_MOV( ureg,
385 dst,
386 swizzle_4v( imm, add_swizzle ) );
387 }
388 else {
389 assert(0);
390 }
391
392 #undef IMM_ZERO
393 #undef IMM_ONE
394 #undef IMM_NEG_ONE
395 }
396
397
398
399 static unsigned
400 translate_opcode( unsigned op )
401 {
402 switch( op ) {
403 case OPCODE_ARL:
404 return TGSI_OPCODE_ARL;
405 case OPCODE_ABS:
406 return TGSI_OPCODE_ABS;
407 case OPCODE_ADD:
408 return TGSI_OPCODE_ADD;
409 case OPCODE_BGNLOOP:
410 return TGSI_OPCODE_BGNLOOP;
411 case OPCODE_BGNSUB:
412 return TGSI_OPCODE_BGNSUB;
413 case OPCODE_BRA:
414 return TGSI_OPCODE_BRA;
415 case OPCODE_BRK:
416 return TGSI_OPCODE_BRK;
417 case OPCODE_CAL:
418 return TGSI_OPCODE_CAL;
419 case OPCODE_CMP:
420 return TGSI_OPCODE_CMP;
421 case OPCODE_CONT:
422 return TGSI_OPCODE_CONT;
423 case OPCODE_COS:
424 return TGSI_OPCODE_COS;
425 case OPCODE_DDX:
426 return TGSI_OPCODE_DDX;
427 case OPCODE_DDY:
428 return TGSI_OPCODE_DDY;
429 case OPCODE_DP2:
430 return TGSI_OPCODE_DP2;
431 case OPCODE_DP2A:
432 return TGSI_OPCODE_DP2A;
433 case OPCODE_DP3:
434 return TGSI_OPCODE_DP3;
435 case OPCODE_DP4:
436 return TGSI_OPCODE_DP4;
437 case OPCODE_DPH:
438 return TGSI_OPCODE_DPH;
439 case OPCODE_DST:
440 return TGSI_OPCODE_DST;
441 case OPCODE_ELSE:
442 return TGSI_OPCODE_ELSE;
443 case OPCODE_ENDIF:
444 return TGSI_OPCODE_ENDIF;
445 case OPCODE_ENDLOOP:
446 return TGSI_OPCODE_ENDLOOP;
447 case OPCODE_ENDSUB:
448 return TGSI_OPCODE_ENDSUB;
449 case OPCODE_EX2:
450 return TGSI_OPCODE_EX2;
451 case OPCODE_EXP:
452 return TGSI_OPCODE_EXP;
453 case OPCODE_FLR:
454 return TGSI_OPCODE_FLR;
455 case OPCODE_FRC:
456 return TGSI_OPCODE_FRC;
457 case OPCODE_IF:
458 return TGSI_OPCODE_IF;
459 case OPCODE_TRUNC:
460 return TGSI_OPCODE_TRUNC;
461 case OPCODE_KIL:
462 return TGSI_OPCODE_KIL;
463 case OPCODE_KIL_NV:
464 return TGSI_OPCODE_KILP;
465 case OPCODE_LG2:
466 return TGSI_OPCODE_LG2;
467 case OPCODE_LOG:
468 return TGSI_OPCODE_LOG;
469 case OPCODE_LIT:
470 return TGSI_OPCODE_LIT;
471 case OPCODE_LRP:
472 return TGSI_OPCODE_LRP;
473 case OPCODE_MAD:
474 return TGSI_OPCODE_MAD;
475 case OPCODE_MAX:
476 return TGSI_OPCODE_MAX;
477 case OPCODE_MIN:
478 return TGSI_OPCODE_MIN;
479 case OPCODE_MOV:
480 return TGSI_OPCODE_MOV;
481 case OPCODE_MUL:
482 return TGSI_OPCODE_MUL;
483 case OPCODE_NOISE1:
484 return TGSI_OPCODE_NOISE1;
485 case OPCODE_NOISE2:
486 return TGSI_OPCODE_NOISE2;
487 case OPCODE_NOISE3:
488 return TGSI_OPCODE_NOISE3;
489 case OPCODE_NOISE4:
490 return TGSI_OPCODE_NOISE4;
491 case OPCODE_NOP:
492 return TGSI_OPCODE_NOP;
493 case OPCODE_NRM3:
494 return TGSI_OPCODE_NRM;
495 case OPCODE_NRM4:
496 return TGSI_OPCODE_NRM4;
497 case OPCODE_POW:
498 return TGSI_OPCODE_POW;
499 case OPCODE_RCP:
500 return TGSI_OPCODE_RCP;
501 case OPCODE_RET:
502 return TGSI_OPCODE_RET;
503 case OPCODE_RSQ:
504 return TGSI_OPCODE_RSQ;
505 case OPCODE_SCS:
506 return TGSI_OPCODE_SCS;
507 case OPCODE_SEQ:
508 return TGSI_OPCODE_SEQ;
509 case OPCODE_SGE:
510 return TGSI_OPCODE_SGE;
511 case OPCODE_SGT:
512 return TGSI_OPCODE_SGT;
513 case OPCODE_SIN:
514 return TGSI_OPCODE_SIN;
515 case OPCODE_SLE:
516 return TGSI_OPCODE_SLE;
517 case OPCODE_SLT:
518 return TGSI_OPCODE_SLT;
519 case OPCODE_SNE:
520 return TGSI_OPCODE_SNE;
521 case OPCODE_SSG:
522 return TGSI_OPCODE_SSG;
523 case OPCODE_SUB:
524 return TGSI_OPCODE_SUB;
525 case OPCODE_SWZ:
526 return TGSI_OPCODE_SWZ;
527 case OPCODE_TEX:
528 return TGSI_OPCODE_TEX;
529 case OPCODE_TXB:
530 return TGSI_OPCODE_TXB;
531 case OPCODE_TXD:
532 return TGSI_OPCODE_TXD;
533 case OPCODE_TXL:
534 return TGSI_OPCODE_TXL;
535 case OPCODE_TXP:
536 return TGSI_OPCODE_TXP;
537 case OPCODE_XPD:
538 return TGSI_OPCODE_XPD;
539 case OPCODE_END:
540 return TGSI_OPCODE_END;
541 default:
542 assert( 0 );
543 return TGSI_OPCODE_NOP;
544 }
545 }
546
547
548 static void
549 compile_instruction(
550 struct st_translate *t,
551 const struct prog_instruction *inst )
552 {
553 struct ureg_program *ureg = t->ureg;
554 GLuint i;
555 struct ureg_dst dst[1];
556 struct ureg_src src[4];
557 unsigned num_dst;
558 unsigned num_src;
559
560 num_dst = _mesa_num_inst_dst_regs( inst->Opcode );
561 num_src = _mesa_num_inst_src_regs( inst->Opcode );
562
563 if (num_dst)
564 dst[0] = translate_dst( t,
565 &inst->DstReg,
566 inst->SaturateMode );
567
568 for (i = 0; i < num_src; i++)
569 src[i] = translate_src( t, &inst->SrcReg[i] );
570
571 switch( inst->Opcode ) {
572 case OPCODE_SWZ:
573 emit_swz( t, dst[0], &inst->SrcReg[0] );
574 return;
575
576 case OPCODE_BGNLOOP:
577 case OPCODE_CAL:
578 case OPCODE_ELSE:
579 case OPCODE_ENDLOOP:
580 case OPCODE_IF:
581 assert(num_dst == 0);
582 ureg_label_insn( ureg,
583 translate_opcode( inst->Opcode ),
584 src, num_src,
585 get_label( t, inst->BranchTarget ));
586 return;
587
588 case OPCODE_TEX:
589 case OPCODE_TXB:
590 case OPCODE_TXD:
591 case OPCODE_TXL:
592 case OPCODE_TXP:
593 src[num_src++] = t->samplers[inst->TexSrcUnit];
594 ureg_tex_insn( ureg,
595 translate_opcode( inst->Opcode ),
596 dst, num_dst,
597 translate_texture_target( inst->TexSrcTarget,
598 inst->TexShadow ),
599 src, num_src );
600 return;
601
602 case OPCODE_SCS:
603 dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XY );
604 ureg_insn( ureg,
605 translate_opcode( inst->Opcode ),
606 dst, num_dst,
607 src, num_src );
608 break;
609
610 case OPCODE_XPD:
611 dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XYZ );
612 ureg_insn( ureg,
613 translate_opcode( inst->Opcode ),
614 dst, num_dst,
615 src, num_src );
616 break;
617
618 default:
619 ureg_insn( ureg,
620 translate_opcode( inst->Opcode ),
621 dst, num_dst,
622 src, num_src );
623 break;
624 }
625 }
626
627
628 /**
629 * Emit the TGSI instructions for inverting the WPOS y coordinate.
630 */
631 static void
632 emit_inverted_wpos( struct st_translate *t,
633 const struct gl_program *program )
634 {
635 struct ureg_program *ureg = t->ureg;
636
637 /* Fragment program uses fragment position input.
638 * Need to replace instances of INPUT[WPOS] with temp T
639 * where T = INPUT[WPOS] by y is inverted.
640 */
641 static const gl_state_index winSizeState[STATE_LENGTH]
642 = { STATE_INTERNAL, STATE_FB_SIZE, 0, 0, 0 };
643
644 /* XXX: note we are modifying the incoming shader here! Need to
645 * do this before emitting the constant decls below, or this
646 * will be missed:
647 */
648 unsigned winHeightConst = _mesa_add_state_reference(program->Parameters,
649 winSizeState);
650
651 struct ureg_src winsize = ureg_DECL_constant( ureg, winHeightConst );
652 struct ureg_dst wpos_temp = ureg_DECL_temporary( ureg );
653 struct ureg_src wpos_input = t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]];
654
655 /* MOV wpos_temp, input[wpos]
656 */
657 ureg_MOV( ureg, wpos_temp, wpos_input );
658
659 /* SUB wpos_temp.y, winsize_const, wpos_input
660 */
661 ureg_SUB( ureg,
662 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
663 winsize,
664 wpos_input);
665
666 /* Use wpos_temp as position input from here on:
667 */
668 t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]] = ureg_src(wpos_temp);
669 }
670
671
672 /**
673 * Translate Mesa program to TGSI format.
674 * \param program the program to translate
675 * \param numInputs number of input registers used
676 * \param inputMapping maps Mesa fragment program inputs to TGSI generic
677 * input indexes
678 * \param inputSemanticName the TGSI_SEMANTIC flag for each input
679 * \param inputSemanticIndex the semantic index (ex: which texcoord) for
680 * each input
681 * \param interpMode the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
682 * \param numOutputs number of output registers used
683 * \param outputMapping maps Mesa fragment program outputs to TGSI
684 * generic outputs
685 * \param outputSemanticName the TGSI_SEMANTIC flag for each output
686 * \param outputSemanticIndex the semantic index (ex: which texcoord) for
687 * each output
688 *
689 * \return array of translated tokens, caller's responsibility to free
690 */
691 const struct tgsi_token *
692 st_translate_mesa_program(
693 GLcontext *ctx,
694 uint procType,
695 const struct gl_program *program,
696 GLuint numInputs,
697 const GLuint inputMapping[],
698 const ubyte inputSemanticName[],
699 const ubyte inputSemanticIndex[],
700 const GLuint interpMode[],
701 const GLbitfield inputFlags[],
702 GLuint numOutputs,
703 const GLuint outputMapping[],
704 const ubyte outputSemanticName[],
705 const ubyte outputSemanticIndex[],
706 const GLbitfield outputFlags[] )
707 {
708 struct st_translate translate, *t;
709 struct ureg_program *ureg;
710 const struct tgsi_token *tokens = NULL;
711 unsigned i;
712
713 t = &translate;
714 memset(t, 0, sizeof *t);
715
716 t->procType = procType;
717 t->inputMapping = inputMapping;
718 t->outputMapping = outputMapping;
719 t->ureg = ureg_create( procType );
720 if (t->ureg == NULL)
721 return NULL;
722
723 ureg = t->ureg;
724
725 /*_mesa_print_program(program);*/
726
727 /*
728 * Declare input attributes.
729 */
730 if (procType == TGSI_PROCESSOR_FRAGMENT) {
731 for (i = 0; i < numInputs; i++) {
732 t->inputs[i] = ureg_DECL_fs_input(ureg,
733 inputSemanticName[i],
734 inputSemanticIndex[i],
735 interpMode[i]);
736 }
737
738 if (program->InputsRead & FRAG_BIT_WPOS) {
739 /* Must do this after setting up t->inputs, and before
740 * emitting constant references, below:
741 */
742 emit_inverted_wpos( t, program );
743 }
744
745 /*
746 * Declare output attributes.
747 */
748 for (i = 0; i < numOutputs; i++) {
749 switch (outputSemanticName[i]) {
750 case TGSI_SEMANTIC_POSITION:
751 t->outputs[i] = ureg_DECL_output( ureg,
752 TGSI_SEMANTIC_POSITION, /* Z / Depth */
753 outputSemanticIndex[i] );
754
755 t->outputs[i] = ureg_writemask( t->outputs[i],
756 TGSI_WRITEMASK_Z );
757 break;
758 case TGSI_SEMANTIC_COLOR:
759 t->outputs[i] = ureg_DECL_output( ureg,
760 TGSI_SEMANTIC_COLOR,
761 outputSemanticIndex[i] );
762 break;
763 default:
764 assert(0);
765 return 0;
766 }
767 }
768 }
769 else {
770 for (i = 0; i < numInputs; i++) {
771 t->inputs[i] = ureg_DECL_vs_input(ureg, i);
772 }
773
774 for (i = 0; i < numOutputs; i++) {
775 t->outputs[i] = ureg_DECL_output( ureg,
776 outputSemanticName[i],
777 outputSemanticIndex[i] );
778 }
779 }
780
781 /* Declare address register.
782 */
783 if (program->NumAddressRegs > 0) {
784 assert( program->NumAddressRegs == 1 );
785 t->address[0] = ureg_DECL_address( ureg );
786 }
787
788
789 /* Emit constants and immediates. Mesa uses a single index space
790 * for these, so we put all the translated regs in t->constants.
791 */
792 if (program->Parameters) {
793
794 t->constants = CALLOC( program->Parameters->NumParameters,
795 sizeof t->constants[0] );
796 if (t->constants == NULL)
797 goto out;
798
799 for (i = 0; i < program->Parameters->NumParameters; i++) {
800 switch (program->Parameters->Parameters[i].Type) {
801 case PROGRAM_ENV_PARAM:
802 case PROGRAM_STATE_VAR:
803 case PROGRAM_NAMED_PARAM:
804 case PROGRAM_UNIFORM:
805 t->constants[i] = ureg_DECL_constant( ureg, i );
806 break;
807
808 /* Emit immediates only when there is no address register
809 * in use. FIXME: Be smarter and recognize param arrays:
810 * indirect addressing is only valid within the referenced
811 * array.
812 */
813 case PROGRAM_CONSTANT:
814 if (program->NumAddressRegs > 0)
815 t->constants[i] = ureg_DECL_constant( ureg, i );
816 else
817 t->constants[i] =
818 ureg_DECL_immediate( ureg,
819 program->Parameters->ParameterValues[i],
820 4 );
821 break;
822 default:
823 break;
824 }
825 }
826 }
827
828 /* texture samplers */
829 for (i = 0; i < ctx->Const.MaxTextureImageUnits; i++) {
830 if (program->SamplersUsed & (1 << i)) {
831 t->samplers[i] = ureg_DECL_sampler( ureg, i );
832 }
833 }
834
835 /* Emit each instruction in turn:
836 */
837 for (i = 0; i < program->NumInstructions; i++) {
838 set_insn_start( t, ureg_get_instruction_number( ureg ));
839 compile_instruction( t, &program->Instructions[i] );
840 }
841
842 /* Fix up all emitted labels:
843 */
844 for (i = 0; i < t->labels_count; i++) {
845 ureg_fixup_label( ureg,
846 t->labels[i].token,
847 t->insn[t->labels[i].branch_target] );
848 }
849
850 tokens = ureg_get_tokens( ureg, NULL );
851 ureg_destroy( ureg );
852
853 out:
854 FREE(t->insn);
855 FREE(t->labels);
856 FREE(t->constants);
857
858 if (t->error) {
859 debug_printf("%s: translate error flag set\n", __FUNCTION__);
860 FREE((void *)tokens);
861 tokens = NULL;
862 }
863
864 if (!tokens) {
865 debug_printf("%s: failed to translate Mesa program:\n", __FUNCTION__);
866 _mesa_print_program(program);
867 assert(0);
868 }
869
870 return tokens;
871 }
872
873
874 /**
875 * Tokens cannot be free with _mesa_free otherwise the builtin gallium
876 * malloc debugging will get confused.
877 */
878 void
879 st_free_tokens(const struct tgsi_token *tokens)
880 {
881 FREE((void *)tokens);
882 }