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st/mesa: fix incorrect fragcoord.x translation
[mesa.git] / src / mesa / state_tracker / st_mesa_to_tgsi.c
1 /**************************************************************************
2 *
3 * Copyright 2007-2008 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 /*
29 * \author
30 * Michal Krol,
31 * Keith Whitwell
32 */
33
34 #include "pipe/p_compiler.h"
35 #include "pipe/p_context.h"
36 #include "pipe/p_screen.h"
37 #include "pipe/p_shader_tokens.h"
38 #include "pipe/p_state.h"
39 #include "tgsi/tgsi_ureg.h"
40 #include "st_mesa_to_tgsi.h"
41 #include "st_context.h"
42 #include "program/prog_instruction.h"
43 #include "program/prog_parameter.h"
44 #include "util/u_debug.h"
45 #include "util/u_math.h"
46 #include "util/u_memory.h"
47
48
49 #define PROGRAM_ANY_CONST ((1 << PROGRAM_LOCAL_PARAM) | \
50 (1 << PROGRAM_ENV_PARAM) | \
51 (1 << PROGRAM_STATE_VAR) | \
52 (1 << PROGRAM_NAMED_PARAM) | \
53 (1 << PROGRAM_CONSTANT) | \
54 (1 << PROGRAM_UNIFORM))
55
56
57 struct label {
58 unsigned branch_target;
59 unsigned token;
60 };
61
62
63 /**
64 * Intermediate state used during shader translation.
65 */
66 struct st_translate {
67 struct ureg_program *ureg;
68
69 struct ureg_dst temps[MAX_PROGRAM_TEMPS];
70 struct ureg_src *constants;
71 struct ureg_dst outputs[PIPE_MAX_SHADER_OUTPUTS];
72 struct ureg_src inputs[PIPE_MAX_SHADER_INPUTS];
73 struct ureg_dst address[1];
74 struct ureg_src samplers[PIPE_MAX_SAMPLERS];
75 struct ureg_src systemValues[SYSTEM_VALUE_MAX];
76
77 /* Extra info for handling point size clamping in vertex shader */
78 struct ureg_dst pointSizeResult; /**< Actual point size output register */
79 struct ureg_src pointSizeConst; /**< Point size range constant register */
80 GLint pointSizeOutIndex; /**< Temp point size output register */
81 GLboolean prevInstWrotePointSize;
82
83 const GLuint *inputMapping;
84 const GLuint *outputMapping;
85
86 /* For every instruction that contains a label (eg CALL), keep
87 * details so that we can go back afterwards and emit the correct
88 * tgsi instruction number for each label.
89 */
90 struct label *labels;
91 unsigned labels_size;
92 unsigned labels_count;
93
94 /* Keep a record of the tgsi instruction number that each mesa
95 * instruction starts at, will be used to fix up labels after
96 * translation.
97 */
98 unsigned *insn;
99 unsigned insn_size;
100 unsigned insn_count;
101
102 unsigned procType; /**< TGSI_PROCESSOR_VERTEX/FRAGMENT */
103
104 boolean error;
105 };
106
107
108 /** Map Mesa's SYSTEM_VALUE_x to TGSI_SEMANTIC_x */
109 static unsigned mesa_sysval_to_semantic[SYSTEM_VALUE_MAX] = {
110 TGSI_SEMANTIC_FACE,
111 TGSI_SEMANTIC_INSTANCEID
112 };
113
114
115 /**
116 * Make note of a branch to a label in the TGSI code.
117 * After we've emitted all instructions, we'll go over the list
118 * of labels built here and patch the TGSI code with the actual
119 * location of each label.
120 */
121 static unsigned *get_label( struct st_translate *t,
122 unsigned branch_target )
123 {
124 unsigned i;
125
126 if (t->labels_count + 1 >= t->labels_size) {
127 unsigned old_size = t->labels_size;
128 t->labels_size = 1 << (util_logbase2(t->labels_size) + 1);
129 t->labels = REALLOC( t->labels,
130 old_size * sizeof t->labels[0],
131 t->labels_size * sizeof t->labels[0] );
132 if (t->labels == NULL) {
133 static unsigned dummy;
134 t->error = TRUE;
135 return &dummy;
136 }
137 }
138
139 i = t->labels_count++;
140 t->labels[i].branch_target = branch_target;
141 return &t->labels[i].token;
142 }
143
144
145 /**
146 * Called prior to emitting the TGSI code for each Mesa instruction.
147 * Allocate additional space for instructions if needed.
148 * Update the insn[] array so the next Mesa instruction points to
149 * the next TGSI instruction.
150 */
151 static void set_insn_start( struct st_translate *t,
152 unsigned start )
153 {
154 if (t->insn_count + 1 >= t->insn_size) {
155 unsigned old_size = t->insn_size;
156 t->insn_size = 1 << (util_logbase2(t->insn_size) + 1);
157 t->insn = REALLOC( t->insn,
158 old_size * sizeof t->insn[0],
159 t->insn_size * sizeof t->insn[0] );
160 if (t->insn == NULL) {
161 t->error = TRUE;
162 return;
163 }
164 }
165
166 t->insn[t->insn_count++] = start;
167 }
168
169
170 /**
171 * Map a Mesa dst register to a TGSI ureg_dst register.
172 */
173 static struct ureg_dst
174 dst_register( struct st_translate *t,
175 gl_register_file file,
176 GLuint index )
177 {
178 switch( file ) {
179 case PROGRAM_UNDEFINED:
180 return ureg_dst_undef();
181
182 case PROGRAM_TEMPORARY:
183 if (ureg_dst_is_undef(t->temps[index]))
184 t->temps[index] = ureg_DECL_temporary( t->ureg );
185
186 return t->temps[index];
187
188 case PROGRAM_OUTPUT:
189 if (t->procType == TGSI_PROCESSOR_VERTEX && index == VERT_RESULT_PSIZ)
190 t->prevInstWrotePointSize = GL_TRUE;
191
192 if (t->procType == TGSI_PROCESSOR_VERTEX)
193 assert(index < VERT_RESULT_MAX);
194 else if (t->procType == TGSI_PROCESSOR_FRAGMENT)
195 assert(index < FRAG_RESULT_MAX);
196 else
197 assert(index < GEOM_RESULT_MAX);
198
199 assert(t->outputMapping[index] < Elements(t->outputs));
200
201 return t->outputs[t->outputMapping[index]];
202
203 case PROGRAM_ADDRESS:
204 return t->address[index];
205
206 default:
207 debug_assert( 0 );
208 return ureg_dst_undef();
209 }
210 }
211
212
213 /**
214 * Map a Mesa src register to a TGSI ureg_src register.
215 */
216 static struct ureg_src
217 src_register( struct st_translate *t,
218 gl_register_file file,
219 GLint index )
220 {
221 switch( file ) {
222 case PROGRAM_UNDEFINED:
223 return ureg_src_undef();
224
225 case PROGRAM_TEMPORARY:
226 assert(index >= 0);
227 if (ureg_dst_is_undef(t->temps[index]))
228 t->temps[index] = ureg_DECL_temporary( t->ureg );
229 assert(index < Elements(t->temps));
230 return ureg_src(t->temps[index]);
231
232 case PROGRAM_NAMED_PARAM:
233 case PROGRAM_ENV_PARAM:
234 case PROGRAM_LOCAL_PARAM:
235 case PROGRAM_UNIFORM:
236 assert(index >= 0);
237 return t->constants[index];
238 case PROGRAM_STATE_VAR:
239 case PROGRAM_CONSTANT: /* ie, immediate */
240 if (index < 0)
241 return ureg_DECL_constant( t->ureg, 0 );
242 else
243 return t->constants[index];
244
245 case PROGRAM_INPUT:
246 assert(t->inputMapping[index] < Elements(t->inputs));
247 return t->inputs[t->inputMapping[index]];
248
249 case PROGRAM_OUTPUT:
250 assert(t->outputMapping[index] < Elements(t->outputs));
251 return ureg_src(t->outputs[t->outputMapping[index]]); /* not needed? */
252
253 case PROGRAM_ADDRESS:
254 return ureg_src(t->address[index]);
255
256 case PROGRAM_SYSTEM_VALUE:
257 assert(index < Elements(t->systemValues));
258 return t->systemValues[index];
259
260 default:
261 debug_assert( 0 );
262 return ureg_src_undef();
263 }
264 }
265
266
267 /**
268 * Map mesa texture target to TGSI texture target.
269 */
270 static unsigned
271 translate_texture_target( GLuint textarget,
272 GLboolean shadow )
273 {
274 if (shadow) {
275 switch( textarget ) {
276 case TEXTURE_1D_INDEX: return TGSI_TEXTURE_SHADOW1D;
277 case TEXTURE_2D_INDEX: return TGSI_TEXTURE_SHADOW2D;
278 case TEXTURE_RECT_INDEX: return TGSI_TEXTURE_SHADOWRECT;
279 default: break;
280 }
281 }
282
283 switch( textarget ) {
284 case TEXTURE_1D_INDEX: return TGSI_TEXTURE_1D;
285 case TEXTURE_2D_INDEX: return TGSI_TEXTURE_2D;
286 case TEXTURE_3D_INDEX: return TGSI_TEXTURE_3D;
287 case TEXTURE_CUBE_INDEX: return TGSI_TEXTURE_CUBE;
288 case TEXTURE_RECT_INDEX: return TGSI_TEXTURE_RECT;
289 default:
290 debug_assert( 0 );
291 return TGSI_TEXTURE_1D;
292 }
293 }
294
295
296 /**
297 * Create a TGSI ureg_dst register from a Mesa dest register.
298 */
299 static struct ureg_dst
300 translate_dst( struct st_translate *t,
301 const struct prog_dst_register *DstReg,
302 boolean saturate )
303 {
304 struct ureg_dst dst = dst_register( t,
305 DstReg->File,
306 DstReg->Index );
307
308 dst = ureg_writemask( dst,
309 DstReg->WriteMask );
310
311 if (saturate)
312 dst = ureg_saturate( dst );
313
314 if (DstReg->RelAddr)
315 dst = ureg_dst_indirect( dst, ureg_src(t->address[0]) );
316
317 return dst;
318 }
319
320
321 /**
322 * Create a TGSI ureg_src register from a Mesa src register.
323 */
324 static struct ureg_src
325 translate_src( struct st_translate *t,
326 const struct prog_src_register *SrcReg )
327 {
328 struct ureg_src src = src_register( t, SrcReg->File, SrcReg->Index );
329
330 if (t->procType == TGSI_PROCESSOR_GEOMETRY && SrcReg->HasIndex2) {
331 src = src_register( t, SrcReg->File, SrcReg->Index2 );
332 if (SrcReg->RelAddr2)
333 src = ureg_src_dimension_indirect( src, ureg_src(t->address[0]),
334 SrcReg->Index);
335 else
336 src = ureg_src_dimension( src, SrcReg->Index);
337 }
338
339 src = ureg_swizzle( src,
340 GET_SWZ( SrcReg->Swizzle, 0 ) & 0x3,
341 GET_SWZ( SrcReg->Swizzle, 1 ) & 0x3,
342 GET_SWZ( SrcReg->Swizzle, 2 ) & 0x3,
343 GET_SWZ( SrcReg->Swizzle, 3 ) & 0x3);
344
345 if (SrcReg->Negate == NEGATE_XYZW)
346 src = ureg_negate(src);
347
348 if (SrcReg->Abs)
349 src = ureg_abs(src);
350
351 if (SrcReg->RelAddr) {
352 src = ureg_src_indirect( src, ureg_src(t->address[0]));
353 if (SrcReg->File != PROGRAM_INPUT &&
354 SrcReg->File != PROGRAM_OUTPUT) {
355 /* If SrcReg->Index was negative, it was set to zero in
356 * src_register(). Reassign it now. But don't do this
357 * for input/output regs since they get remapped while
358 * const buffers don't.
359 */
360 src.Index = SrcReg->Index;
361 }
362 }
363
364 return src;
365 }
366
367
368 static struct ureg_src swizzle_4v( struct ureg_src src,
369 const unsigned *swz )
370 {
371 return ureg_swizzle( src, swz[0], swz[1], swz[2], swz[3] );
372 }
373
374
375 /**
376 * Translate a SWZ instruction into a MOV, MUL or MAD instruction. EG:
377 *
378 * SWZ dst, src.x-y10
379 *
380 * becomes:
381 *
382 * MAD dst {1,-1,0,0}, src.xyxx, {0,0,1,0}
383 */
384 static void emit_swz( struct st_translate *t,
385 struct ureg_dst dst,
386 const struct prog_src_register *SrcReg )
387 {
388 struct ureg_program *ureg = t->ureg;
389 struct ureg_src src = src_register( t, SrcReg->File, SrcReg->Index );
390
391 unsigned negate_mask = SrcReg->Negate;
392
393 unsigned one_mask = ((GET_SWZ(SrcReg->Swizzle, 0) == SWIZZLE_ONE) << 0 |
394 (GET_SWZ(SrcReg->Swizzle, 1) == SWIZZLE_ONE) << 1 |
395 (GET_SWZ(SrcReg->Swizzle, 2) == SWIZZLE_ONE) << 2 |
396 (GET_SWZ(SrcReg->Swizzle, 3) == SWIZZLE_ONE) << 3);
397
398 unsigned zero_mask = ((GET_SWZ(SrcReg->Swizzle, 0) == SWIZZLE_ZERO) << 0 |
399 (GET_SWZ(SrcReg->Swizzle, 1) == SWIZZLE_ZERO) << 1 |
400 (GET_SWZ(SrcReg->Swizzle, 2) == SWIZZLE_ZERO) << 2 |
401 (GET_SWZ(SrcReg->Swizzle, 3) == SWIZZLE_ZERO) << 3);
402
403 unsigned negative_one_mask = one_mask & negate_mask;
404 unsigned positive_one_mask = one_mask & ~negate_mask;
405
406 struct ureg_src imm;
407 unsigned i;
408 unsigned mul_swizzle[4] = {0,0,0,0};
409 unsigned add_swizzle[4] = {0,0,0,0};
410 unsigned src_swizzle[4] = {0,0,0,0};
411 boolean need_add = FALSE;
412 boolean need_mul = FALSE;
413
414 if (dst.WriteMask == 0)
415 return;
416
417 /* Is this just a MOV?
418 */
419 if (zero_mask == 0 &&
420 one_mask == 0 &&
421 (negate_mask == 0 || negate_mask == TGSI_WRITEMASK_XYZW))
422 {
423 ureg_MOV( ureg, dst, translate_src( t, SrcReg ));
424 return;
425 }
426
427 #define IMM_ZERO 0
428 #define IMM_ONE 1
429 #define IMM_NEG_ONE 2
430
431 imm = ureg_imm3f( ureg, 0, 1, -1 );
432
433 for (i = 0; i < 4; i++) {
434 unsigned bit = 1 << i;
435
436 if (dst.WriteMask & bit) {
437 if (positive_one_mask & bit) {
438 mul_swizzle[i] = IMM_ZERO;
439 add_swizzle[i] = IMM_ONE;
440 need_add = TRUE;
441 }
442 else if (negative_one_mask & bit) {
443 mul_swizzle[i] = IMM_ZERO;
444 add_swizzle[i] = IMM_NEG_ONE;
445 need_add = TRUE;
446 }
447 else if (zero_mask & bit) {
448 mul_swizzle[i] = IMM_ZERO;
449 add_swizzle[i] = IMM_ZERO;
450 need_add = TRUE;
451 }
452 else {
453 add_swizzle[i] = IMM_ZERO;
454 src_swizzle[i] = GET_SWZ(SrcReg->Swizzle, i);
455 need_mul = TRUE;
456 if (negate_mask & bit) {
457 mul_swizzle[i] = IMM_NEG_ONE;
458 }
459 else {
460 mul_swizzle[i] = IMM_ONE;
461 }
462 }
463 }
464 }
465
466 if (need_mul && need_add) {
467 ureg_MAD( ureg,
468 dst,
469 swizzle_4v( src, src_swizzle ),
470 swizzle_4v( imm, mul_swizzle ),
471 swizzle_4v( imm, add_swizzle ) );
472 }
473 else if (need_mul) {
474 ureg_MUL( ureg,
475 dst,
476 swizzle_4v( src, src_swizzle ),
477 swizzle_4v( imm, mul_swizzle ) );
478 }
479 else if (need_add) {
480 ureg_MOV( ureg,
481 dst,
482 swizzle_4v( imm, add_swizzle ) );
483 }
484 else {
485 debug_assert(0);
486 }
487
488 #undef IMM_ZERO
489 #undef IMM_ONE
490 #undef IMM_NEG_ONE
491 }
492
493
494 /**
495 * Negate the value of DDY to match GL semantics where (0,0) is the
496 * lower-left corner of the window.
497 * Note that the GL_ARB_fragment_coord_conventions extension will
498 * effect this someday.
499 */
500 static void emit_ddy( struct st_translate *t,
501 struct ureg_dst dst,
502 const struct prog_src_register *SrcReg )
503 {
504 struct ureg_program *ureg = t->ureg;
505 struct ureg_src src = translate_src( t, SrcReg );
506 src = ureg_negate( src );
507 ureg_DDY( ureg, dst, src );
508 }
509
510
511
512 static unsigned
513 translate_opcode( unsigned op )
514 {
515 switch( op ) {
516 case OPCODE_ARL:
517 return TGSI_OPCODE_ARL;
518 case OPCODE_ABS:
519 return TGSI_OPCODE_ABS;
520 case OPCODE_ADD:
521 return TGSI_OPCODE_ADD;
522 case OPCODE_BGNLOOP:
523 return TGSI_OPCODE_BGNLOOP;
524 case OPCODE_BGNSUB:
525 return TGSI_OPCODE_BGNSUB;
526 case OPCODE_BRA:
527 return TGSI_OPCODE_BRA;
528 case OPCODE_BRK:
529 return TGSI_OPCODE_BRK;
530 case OPCODE_CAL:
531 return TGSI_OPCODE_CAL;
532 case OPCODE_CMP:
533 return TGSI_OPCODE_CMP;
534 case OPCODE_CONT:
535 return TGSI_OPCODE_CONT;
536 case OPCODE_COS:
537 return TGSI_OPCODE_COS;
538 case OPCODE_DDX:
539 return TGSI_OPCODE_DDX;
540 case OPCODE_DDY:
541 return TGSI_OPCODE_DDY;
542 case OPCODE_DP2:
543 return TGSI_OPCODE_DP2;
544 case OPCODE_DP2A:
545 return TGSI_OPCODE_DP2A;
546 case OPCODE_DP3:
547 return TGSI_OPCODE_DP3;
548 case OPCODE_DP4:
549 return TGSI_OPCODE_DP4;
550 case OPCODE_DPH:
551 return TGSI_OPCODE_DPH;
552 case OPCODE_DST:
553 return TGSI_OPCODE_DST;
554 case OPCODE_ELSE:
555 return TGSI_OPCODE_ELSE;
556 case OPCODE_EMIT_VERTEX:
557 return TGSI_OPCODE_EMIT;
558 case OPCODE_END_PRIMITIVE:
559 return TGSI_OPCODE_ENDPRIM;
560 case OPCODE_ENDIF:
561 return TGSI_OPCODE_ENDIF;
562 case OPCODE_ENDLOOP:
563 return TGSI_OPCODE_ENDLOOP;
564 case OPCODE_ENDSUB:
565 return TGSI_OPCODE_ENDSUB;
566 case OPCODE_EX2:
567 return TGSI_OPCODE_EX2;
568 case OPCODE_EXP:
569 return TGSI_OPCODE_EXP;
570 case OPCODE_FLR:
571 return TGSI_OPCODE_FLR;
572 case OPCODE_FRC:
573 return TGSI_OPCODE_FRC;
574 case OPCODE_IF:
575 return TGSI_OPCODE_IF;
576 case OPCODE_TRUNC:
577 return TGSI_OPCODE_TRUNC;
578 case OPCODE_KIL:
579 return TGSI_OPCODE_KIL;
580 case OPCODE_KIL_NV:
581 return TGSI_OPCODE_KILP;
582 case OPCODE_LG2:
583 return TGSI_OPCODE_LG2;
584 case OPCODE_LOG:
585 return TGSI_OPCODE_LOG;
586 case OPCODE_LIT:
587 return TGSI_OPCODE_LIT;
588 case OPCODE_LRP:
589 return TGSI_OPCODE_LRP;
590 case OPCODE_MAD:
591 return TGSI_OPCODE_MAD;
592 case OPCODE_MAX:
593 return TGSI_OPCODE_MAX;
594 case OPCODE_MIN:
595 return TGSI_OPCODE_MIN;
596 case OPCODE_MOV:
597 return TGSI_OPCODE_MOV;
598 case OPCODE_MUL:
599 return TGSI_OPCODE_MUL;
600 case OPCODE_NOP:
601 return TGSI_OPCODE_NOP;
602 case OPCODE_NRM3:
603 return TGSI_OPCODE_NRM;
604 case OPCODE_NRM4:
605 return TGSI_OPCODE_NRM4;
606 case OPCODE_POW:
607 return TGSI_OPCODE_POW;
608 case OPCODE_RCP:
609 return TGSI_OPCODE_RCP;
610 case OPCODE_RET:
611 return TGSI_OPCODE_RET;
612 case OPCODE_RSQ:
613 return TGSI_OPCODE_RSQ;
614 case OPCODE_SCS:
615 return TGSI_OPCODE_SCS;
616 case OPCODE_SEQ:
617 return TGSI_OPCODE_SEQ;
618 case OPCODE_SGE:
619 return TGSI_OPCODE_SGE;
620 case OPCODE_SGT:
621 return TGSI_OPCODE_SGT;
622 case OPCODE_SIN:
623 return TGSI_OPCODE_SIN;
624 case OPCODE_SLE:
625 return TGSI_OPCODE_SLE;
626 case OPCODE_SLT:
627 return TGSI_OPCODE_SLT;
628 case OPCODE_SNE:
629 return TGSI_OPCODE_SNE;
630 case OPCODE_SSG:
631 return TGSI_OPCODE_SSG;
632 case OPCODE_SUB:
633 return TGSI_OPCODE_SUB;
634 case OPCODE_TEX:
635 return TGSI_OPCODE_TEX;
636 case OPCODE_TXB:
637 return TGSI_OPCODE_TXB;
638 case OPCODE_TXD:
639 return TGSI_OPCODE_TXD;
640 case OPCODE_TXL:
641 return TGSI_OPCODE_TXL;
642 case OPCODE_TXP:
643 return TGSI_OPCODE_TXP;
644 case OPCODE_XPD:
645 return TGSI_OPCODE_XPD;
646 case OPCODE_END:
647 return TGSI_OPCODE_END;
648 default:
649 debug_assert( 0 );
650 return TGSI_OPCODE_NOP;
651 }
652 }
653
654
655 static void
656 compile_instruction(
657 struct st_translate *t,
658 const struct prog_instruction *inst )
659 {
660 struct ureg_program *ureg = t->ureg;
661 GLuint i;
662 struct ureg_dst dst[1];
663 struct ureg_src src[4];
664 unsigned num_dst;
665 unsigned num_src;
666
667 num_dst = _mesa_num_inst_dst_regs( inst->Opcode );
668 num_src = _mesa_num_inst_src_regs( inst->Opcode );
669
670 if (num_dst)
671 dst[0] = translate_dst( t,
672 &inst->DstReg,
673 inst->SaturateMode );
674
675 for (i = 0; i < num_src; i++)
676 src[i] = translate_src( t, &inst->SrcReg[i] );
677
678 switch( inst->Opcode ) {
679 case OPCODE_SWZ:
680 emit_swz( t, dst[0], &inst->SrcReg[0] );
681 return;
682
683 case OPCODE_BGNLOOP:
684 case OPCODE_CAL:
685 case OPCODE_ELSE:
686 case OPCODE_ENDLOOP:
687 case OPCODE_IF:
688 debug_assert(num_dst == 0);
689 ureg_label_insn( ureg,
690 translate_opcode( inst->Opcode ),
691 src, num_src,
692 get_label( t, inst->BranchTarget ));
693 return;
694
695 case OPCODE_TEX:
696 case OPCODE_TXB:
697 case OPCODE_TXD:
698 case OPCODE_TXL:
699 case OPCODE_TXP:
700 src[num_src++] = t->samplers[inst->TexSrcUnit];
701 ureg_tex_insn( ureg,
702 translate_opcode( inst->Opcode ),
703 dst, num_dst,
704 translate_texture_target( inst->TexSrcTarget,
705 inst->TexShadow ),
706 src, num_src );
707 return;
708
709 case OPCODE_SCS:
710 dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XY );
711 ureg_insn( ureg,
712 translate_opcode( inst->Opcode ),
713 dst, num_dst,
714 src, num_src );
715 break;
716
717 case OPCODE_XPD:
718 dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XYZ );
719 ureg_insn( ureg,
720 translate_opcode( inst->Opcode ),
721 dst, num_dst,
722 src, num_src );
723 break;
724
725 case OPCODE_NOISE1:
726 case OPCODE_NOISE2:
727 case OPCODE_NOISE3:
728 case OPCODE_NOISE4:
729 /* At some point, a motivated person could add a better
730 * implementation of noise. Currently not even the nvidia
731 * binary drivers do anything more than this. In any case, the
732 * place to do this is in the GL state tracker, not the poor
733 * driver.
734 */
735 ureg_MOV( ureg, dst[0], ureg_imm1f(ureg, 0.5) );
736 break;
737
738 case OPCODE_DDY:
739 emit_ddy( t, dst[0], &inst->SrcReg[0] );
740 break;
741
742 default:
743 ureg_insn( ureg,
744 translate_opcode( inst->Opcode ),
745 dst, num_dst,
746 src, num_src );
747 break;
748 }
749 }
750
751
752 /**
753 * Emit the TGSI instructions to adjust the WPOS pixel center convention
754 * Basically, add (adjX, adjY) to the fragment position.
755 */
756 static void
757 emit_adjusted_wpos( struct st_translate *t,
758 const struct gl_program *program,
759 GLfloat adjX, GLfloat adjY)
760 {
761 struct ureg_program *ureg = t->ureg;
762 struct ureg_dst wpos_temp = ureg_DECL_temporary(ureg);
763 struct ureg_src wpos_input = t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]];
764
765 /* Note that we bias X and Y and pass Z and W through unchanged.
766 * The shader might also use gl_FragCoord.w and .z.
767 */
768 ureg_ADD(ureg, wpos_temp, wpos_input,
769 ureg_imm4f(ureg, adjX, adjY, 0.0f, 0.0f));
770
771 t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]] = ureg_src(wpos_temp);
772 }
773
774
775 /**
776 * Emit the TGSI instructions for inverting the WPOS y coordinate.
777 * This code is unavoidable because it also depends on whether
778 * a FBO is bound (STATE_FB_WPOS_Y_TRANSFORM).
779 */
780 static void
781 emit_wpos_inversion( struct st_translate *t,
782 const struct gl_program *program,
783 boolean invert)
784 {
785 struct ureg_program *ureg = t->ureg;
786
787 /* Fragment program uses fragment position input.
788 * Need to replace instances of INPUT[WPOS] with temp T
789 * where T = INPUT[WPOS] by y is inverted.
790 */
791 static const gl_state_index wposTransformState[STATE_LENGTH]
792 = { STATE_INTERNAL, STATE_FB_WPOS_Y_TRANSFORM, 0, 0, 0 };
793
794 /* XXX: note we are modifying the incoming shader here! Need to
795 * do this before emitting the constant decls below, or this
796 * will be missed:
797 */
798 unsigned wposTransConst = _mesa_add_state_reference(program->Parameters,
799 wposTransformState);
800
801 struct ureg_src wpostrans = ureg_DECL_constant( ureg, wposTransConst );
802 struct ureg_dst wpos_temp;
803 struct ureg_src wpos_input = t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]];
804
805 /* MOV wpos_temp, input[wpos]
806 */
807 if (wpos_input.File == TGSI_FILE_TEMPORARY)
808 wpos_temp = ureg_dst(wpos_input);
809 else {
810 wpos_temp = ureg_DECL_temporary( ureg );
811 ureg_MOV( ureg, wpos_temp, wpos_input );
812 }
813
814 if (invert) {
815 /* MAD wpos_temp.y, wpos_input, wpostrans.xxxx, wpostrans.yyyy
816 */
817 ureg_MAD( ureg,
818 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
819 wpos_input,
820 ureg_scalar(wpostrans, 0),
821 ureg_scalar(wpostrans, 1));
822 } else {
823 /* MAD wpos_temp.y, wpos_input, wpostrans.zzzz, wpostrans.wwww
824 */
825 ureg_MAD( ureg,
826 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
827 wpos_input,
828 ureg_scalar(wpostrans, 2),
829 ureg_scalar(wpostrans, 3));
830 }
831
832 /* Use wpos_temp as position input from here on:
833 */
834 t->inputs[t->inputMapping[FRAG_ATTRIB_WPOS]] = ureg_src(wpos_temp);
835 }
836
837
838 /**
839 * Emit fragment position/ooordinate code.
840 */
841 static void
842 emit_wpos(struct st_context *st,
843 struct st_translate *t,
844 const struct gl_program *program,
845 struct ureg_program *ureg)
846 {
847 const struct gl_fragment_program *fp =
848 (const struct gl_fragment_program *) program;
849 struct pipe_screen *pscreen = st->pipe->screen;
850 boolean invert = FALSE;
851
852 if (fp->OriginUpperLeft) {
853 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT)) {
854 }
855 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT)) {
856 ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
857 invert = TRUE;
858 }
859 else
860 assert(0);
861 }
862 else {
863 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT))
864 ureg_property_fs_coord_origin(ureg, TGSI_FS_COORD_ORIGIN_LOWER_LEFT);
865 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT))
866 invert = TRUE;
867 else
868 assert(0);
869 }
870
871 if (fp->PixelCenterInteger) {
872 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER))
873 ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
874 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER))
875 emit_adjusted_wpos(t, program, 0.5f, invert ? 0.5f : -0.5f);
876 else
877 assert(0);
878 }
879 else {
880 if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER)) {
881 }
882 else if (pscreen->get_param(pscreen, PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER)) {
883 ureg_property_fs_coord_pixel_center(ureg, TGSI_FS_COORD_PIXEL_CENTER_INTEGER);
884 emit_adjusted_wpos(t, program, 0.5f, invert ? -0.5f : 0.5f);
885 }
886 else
887 assert(0);
888 }
889
890 /* we invert after adjustment so that we avoid the MOV to temporary,
891 * and reuse the adjustment ADD instead */
892 emit_wpos_inversion(t, program, invert);
893 }
894
895
896 /**
897 * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back.
898 * TGSI uses +1 for front, -1 for back.
899 * This function converts the TGSI value to the GL value. Simply clamping/
900 * saturating the value to [0,1] does the job.
901 */
902 static void
903 emit_face_var( struct st_translate *t,
904 const struct gl_program *program )
905 {
906 struct ureg_program *ureg = t->ureg;
907 struct ureg_dst face_temp = ureg_DECL_temporary( ureg );
908 struct ureg_src face_input = t->inputs[t->inputMapping[FRAG_ATTRIB_FACE]];
909
910 /* MOV_SAT face_temp, input[face]
911 */
912 face_temp = ureg_saturate( face_temp );
913 ureg_MOV( ureg, face_temp, face_input );
914
915 /* Use face_temp as face input from here on:
916 */
917 t->inputs[t->inputMapping[FRAG_ATTRIB_FACE]] = ureg_src(face_temp);
918 }
919
920
921 static void
922 emit_edgeflags( struct st_translate *t,
923 const struct gl_program *program )
924 {
925 struct ureg_program *ureg = t->ureg;
926 struct ureg_dst edge_dst = t->outputs[t->outputMapping[VERT_RESULT_EDGE]];
927 struct ureg_src edge_src = t->inputs[t->inputMapping[VERT_ATTRIB_EDGEFLAG]];
928
929 ureg_MOV( ureg, edge_dst, edge_src );
930 }
931
932
933 /**
934 * Translate Mesa program to TGSI format.
935 * \param program the program to translate
936 * \param numInputs number of input registers used
937 * \param inputMapping maps Mesa fragment program inputs to TGSI generic
938 * input indexes
939 * \param inputSemanticName the TGSI_SEMANTIC flag for each input
940 * \param inputSemanticIndex the semantic index (ex: which texcoord) for
941 * each input
942 * \param interpMode the TGSI_INTERPOLATE_LINEAR/PERSP mode for each input
943 * \param numOutputs number of output registers used
944 * \param outputMapping maps Mesa fragment program outputs to TGSI
945 * generic outputs
946 * \param outputSemanticName the TGSI_SEMANTIC flag for each output
947 * \param outputSemanticIndex the semantic index (ex: which texcoord) for
948 * each output
949 *
950 * \return PIPE_OK or PIPE_ERROR_OUT_OF_MEMORY
951 */
952 enum pipe_error
953 st_translate_mesa_program(
954 struct gl_context *ctx,
955 uint procType,
956 struct ureg_program *ureg,
957 const struct gl_program *program,
958 GLuint numInputs,
959 const GLuint inputMapping[],
960 const ubyte inputSemanticName[],
961 const ubyte inputSemanticIndex[],
962 const GLuint interpMode[],
963 GLuint numOutputs,
964 const GLuint outputMapping[],
965 const ubyte outputSemanticName[],
966 const ubyte outputSemanticIndex[],
967 boolean passthrough_edgeflags )
968 {
969 struct st_translate translate, *t;
970 unsigned i;
971 enum pipe_error ret = PIPE_OK;
972
973 assert(numInputs <= Elements(t->inputs));
974 assert(numOutputs <= Elements(t->outputs));
975
976 t = &translate;
977 memset(t, 0, sizeof *t);
978
979 t->procType = procType;
980 t->inputMapping = inputMapping;
981 t->outputMapping = outputMapping;
982 t->ureg = ureg;
983 t->pointSizeOutIndex = -1;
984 t->prevInstWrotePointSize = GL_FALSE;
985
986 /*_mesa_print_program(program);*/
987
988 /*
989 * Declare input attributes.
990 */
991 if (procType == TGSI_PROCESSOR_FRAGMENT) {
992 for (i = 0; i < numInputs; i++) {
993 if (program->InputFlags[0] & PROG_PARAM_BIT_CYL_WRAP) {
994 t->inputs[i] = ureg_DECL_fs_input_cyl(ureg,
995 inputSemanticName[i],
996 inputSemanticIndex[i],
997 interpMode[i],
998 TGSI_CYLINDRICAL_WRAP_X);
999 }
1000 else {
1001 t->inputs[i] = ureg_DECL_fs_input(ureg,
1002 inputSemanticName[i],
1003 inputSemanticIndex[i],
1004 interpMode[i]);
1005 }
1006 }
1007
1008 if (program->InputsRead & FRAG_BIT_WPOS) {
1009 /* Must do this after setting up t->inputs, and before
1010 * emitting constant references, below:
1011 */
1012 emit_wpos(st_context(ctx), t, program, ureg);
1013 }
1014
1015 if (program->InputsRead & FRAG_BIT_FACE) {
1016 emit_face_var( t, program );
1017 }
1018
1019 /*
1020 * Declare output attributes.
1021 */
1022 for (i = 0; i < numOutputs; i++) {
1023 switch (outputSemanticName[i]) {
1024 case TGSI_SEMANTIC_POSITION:
1025 t->outputs[i] = ureg_DECL_output( ureg,
1026 TGSI_SEMANTIC_POSITION, /* Z / Depth */
1027 outputSemanticIndex[i] );
1028
1029 t->outputs[i] = ureg_writemask( t->outputs[i],
1030 TGSI_WRITEMASK_Z );
1031 break;
1032 case TGSI_SEMANTIC_STENCIL:
1033 t->outputs[i] = ureg_DECL_output( ureg,
1034 TGSI_SEMANTIC_STENCIL, /* Stencil */
1035 outputSemanticIndex[i] );
1036 t->outputs[i] = ureg_writemask( t->outputs[i],
1037 TGSI_WRITEMASK_Y );
1038 break;
1039 case TGSI_SEMANTIC_COLOR:
1040 t->outputs[i] = ureg_DECL_output( ureg,
1041 TGSI_SEMANTIC_COLOR,
1042 outputSemanticIndex[i] );
1043 break;
1044 default:
1045 debug_assert(0);
1046 return 0;
1047 }
1048 }
1049 }
1050 else if (procType == TGSI_PROCESSOR_GEOMETRY) {
1051 for (i = 0; i < numInputs; i++) {
1052 t->inputs[i] = ureg_DECL_gs_input(ureg,
1053 i,
1054 inputSemanticName[i],
1055 inputSemanticIndex[i]);
1056 }
1057
1058 for (i = 0; i < numOutputs; i++) {
1059 t->outputs[i] = ureg_DECL_output( ureg,
1060 outputSemanticName[i],
1061 outputSemanticIndex[i] );
1062 }
1063 }
1064 else {
1065 assert(procType == TGSI_PROCESSOR_VERTEX);
1066
1067 for (i = 0; i < numInputs; i++) {
1068 t->inputs[i] = ureg_DECL_vs_input(ureg, i);
1069 }
1070
1071 for (i = 0; i < numOutputs; i++) {
1072 t->outputs[i] = ureg_DECL_output( ureg,
1073 outputSemanticName[i],
1074 outputSemanticIndex[i] );
1075 if ((outputSemanticName[i] == TGSI_SEMANTIC_PSIZE) && program->Id) {
1076 /* Writing to the point size result register requires special
1077 * handling to implement clamping.
1078 */
1079 static const gl_state_index pointSizeClampState[STATE_LENGTH]
1080 = { STATE_INTERNAL, STATE_POINT_SIZE_IMPL_CLAMP, 0, 0, 0 };
1081 /* XXX: note we are modifying the incoming shader here! Need to
1082 * do this before emitting the constant decls below, or this
1083 * will be missed:
1084 */
1085 unsigned pointSizeClampConst =
1086 _mesa_add_state_reference(program->Parameters,
1087 pointSizeClampState);
1088 struct ureg_dst psizregtemp = ureg_DECL_temporary( ureg );
1089 t->pointSizeConst = ureg_DECL_constant( ureg, pointSizeClampConst );
1090 t->pointSizeResult = t->outputs[i];
1091 t->pointSizeOutIndex = i;
1092 t->outputs[i] = psizregtemp;
1093 }
1094 }
1095 if (passthrough_edgeflags)
1096 emit_edgeflags( t, program );
1097 }
1098
1099 /* Declare address register.
1100 */
1101 if (program->NumAddressRegs > 0) {
1102 debug_assert( program->NumAddressRegs == 1 );
1103 t->address[0] = ureg_DECL_address( ureg );
1104 }
1105
1106 /* Declare misc input registers
1107 */
1108 {
1109 GLbitfield sysInputs = program->SystemValuesRead;
1110 unsigned numSys = 0;
1111 for (i = 0; sysInputs; i++) {
1112 if (sysInputs & (1 << i)) {
1113 unsigned semName = mesa_sysval_to_semantic[i];
1114 t->systemValues[i] = ureg_DECL_system_value(ureg, numSys, semName, 0);
1115 numSys++;
1116 sysInputs &= ~(1 << i);
1117 }
1118 }
1119 }
1120
1121 if (program->IndirectRegisterFiles & (1 << PROGRAM_TEMPORARY)) {
1122 /* If temps are accessed with indirect addressing, declare temporaries
1123 * in sequential order. Else, we declare them on demand elsewhere.
1124 */
1125 for (i = 0; i < program->NumTemporaries; i++) {
1126 /* XXX use TGSI_FILE_TEMPORARY_ARRAY when it's supported by ureg */
1127 t->temps[i] = ureg_DECL_temporary( t->ureg );
1128 }
1129 }
1130
1131 /* Emit constants and immediates. Mesa uses a single index space
1132 * for these, so we put all the translated regs in t->constants.
1133 */
1134 if (program->Parameters) {
1135 t->constants = CALLOC( program->Parameters->NumParameters,
1136 sizeof t->constants[0] );
1137 if (t->constants == NULL) {
1138 ret = PIPE_ERROR_OUT_OF_MEMORY;
1139 goto out;
1140 }
1141
1142 for (i = 0; i < program->Parameters->NumParameters; i++) {
1143 switch (program->Parameters->Parameters[i].Type) {
1144 case PROGRAM_ENV_PARAM:
1145 case PROGRAM_LOCAL_PARAM:
1146 case PROGRAM_STATE_VAR:
1147 case PROGRAM_NAMED_PARAM:
1148 case PROGRAM_UNIFORM:
1149 t->constants[i] = ureg_DECL_constant( ureg, i );
1150 break;
1151
1152 /* Emit immediates only when there's no indirect addressing of
1153 * the const buffer.
1154 * FIXME: Be smarter and recognize param arrays:
1155 * indirect addressing is only valid within the referenced
1156 * array.
1157 */
1158 case PROGRAM_CONSTANT:
1159 if (program->IndirectRegisterFiles & PROGRAM_ANY_CONST)
1160 t->constants[i] = ureg_DECL_constant( ureg, i );
1161 else
1162 t->constants[i] =
1163 ureg_DECL_immediate( ureg,
1164 program->Parameters->ParameterValues[i],
1165 4 );
1166 break;
1167 default:
1168 break;
1169 }
1170 }
1171 }
1172
1173 /* texture samplers */
1174 for (i = 0; i < ctx->Const.MaxTextureImageUnits; i++) {
1175 if (program->SamplersUsed & (1 << i)) {
1176 t->samplers[i] = ureg_DECL_sampler( ureg, i );
1177 }
1178 }
1179
1180 /* Emit each instruction in turn:
1181 */
1182 for (i = 0; i < program->NumInstructions; i++) {
1183 set_insn_start( t, ureg_get_instruction_number( ureg ));
1184 compile_instruction( t, &program->Instructions[i] );
1185
1186 if (t->prevInstWrotePointSize && program->Id) {
1187 /* The previous instruction wrote to the (fake) vertex point size
1188 * result register. Now we need to clamp that value to the min/max
1189 * point size range, putting the result into the real point size
1190 * register.
1191 * Note that we can't do this easily at the end of program due to
1192 * possible early return.
1193 */
1194 set_insn_start( t, ureg_get_instruction_number( ureg ));
1195 ureg_MAX( t->ureg,
1196 ureg_writemask(t->outputs[t->pointSizeOutIndex], WRITEMASK_X),
1197 ureg_src(t->outputs[t->pointSizeOutIndex]),
1198 ureg_swizzle(t->pointSizeConst, 1,1,1,1));
1199 ureg_MIN( t->ureg, ureg_writemask(t->pointSizeResult, WRITEMASK_X),
1200 ureg_src(t->outputs[t->pointSizeOutIndex]),
1201 ureg_swizzle(t->pointSizeConst, 2,2,2,2));
1202 }
1203 t->prevInstWrotePointSize = GL_FALSE;
1204 }
1205
1206 /* Fix up all emitted labels:
1207 */
1208 for (i = 0; i < t->labels_count; i++) {
1209 ureg_fixup_label( ureg,
1210 t->labels[i].token,
1211 t->insn[t->labels[i].branch_target] );
1212 }
1213
1214 out:
1215 FREE(t->insn);
1216 FREE(t->labels);
1217 FREE(t->constants);
1218
1219 if (t->error) {
1220 debug_printf("%s: translate error flag set\n", __FUNCTION__);
1221 }
1222
1223 return ret;
1224 }
1225
1226
1227 /**
1228 * Tokens cannot be free with free otherwise the builtin gallium
1229 * malloc debugging will get confused.
1230 */
1231 void
1232 st_free_tokens(const struct tgsi_token *tokens)
1233 {
1234 FREE((void *)tokens);
1235 }