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pan/bi: Print bad instruction on src packing fail
[mesa.git] / src / panfrost / bifrost / bi_pack.c
1 /*
2 * Copyright (C) 2020 Collabora, Ltd.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 */
23
24 #include "compiler.h"
25 #include "bi_print.h"
26
27 #define RETURN_PACKED(str) { \
28 uint64_t temp = 0; \
29 memcpy(&temp, &str, sizeof(str)); \
30 return temp; \
31 }
32
33 /* This file contains the final passes of the compiler. Running after
34 * scheduling and RA, the IR is now finalized, so we need to emit it to actual
35 * bits on the wire (as well as fixup branches) */
36
37 static uint64_t
38 bi_pack_header(bi_clause *clause, bi_clause *next, bool is_fragment)
39 {
40 struct bifrost_header header = {
41 .back_to_back = clause->back_to_back,
42 .no_end_of_shader = (next != NULL),
43 .elide_writes = is_fragment,
44 .branch_cond = clause->branch_conditional,
45 .datareg_writebarrier = clause->data_register_write_barrier,
46 .datareg = clause->data_register,
47 .scoreboard_deps = next ? next->dependencies : 0,
48 .scoreboard_index = clause->scoreboard_id,
49 .clause_type = clause->clause_type,
50 .next_clause_type = next ? next->clause_type : 0,
51 };
52
53 header.branch_cond |= header.back_to_back;
54
55 uint64_t u = 0;
56 memcpy(&u, &header, sizeof(header));
57 return u;
58 }
59
60 /* Represents the assignment of ports for a given bundle */
61
62 struct bi_registers {
63 /* Register to assign to each port */
64 unsigned port[4];
65
66 /* Read ports can be disabled */
67 bool enabled[2];
68
69 /* Should we write FMA? what about ADD? If only a single port is
70 * enabled it is in port 2, else ADD/FMA is 2/3 respectively */
71 bool write_fma, write_add;
72
73 /* Should we read with port 3? */
74 bool read_port3;
75
76 /* Packed uniform/constant */
77 uint8_t uniform_constant;
78
79 /* Whether writes are actually for the last instruction */
80 bool first_instruction;
81 };
82
83 static inline void
84 bi_print_ports(struct bi_registers *regs)
85 {
86 for (unsigned i = 0; i < 2; ++i) {
87 if (regs->enabled[i])
88 printf("port %u: %u\n", i, regs->port[i]);
89 }
90
91 if (regs->write_fma || regs->write_add) {
92 printf("port 2 (%s): %u\n",
93 regs->write_add ? "ADD" : "FMA",
94 regs->port[2]);
95 }
96
97 if ((regs->write_fma && regs->write_add) || regs->read_port3) {
98 printf("port 3 (%s): %u\n",
99 regs->read_port3 ? "read" : "FMA",
100 regs->port[3]);
101 }
102 }
103
104 /* The uniform/constant slot allows loading a contiguous 64-bit immediate or
105 * pushed uniform per bundle. Figure out which one we need in the bundle (the
106 * scheduler needs to ensure we only have one type per bundle), validate
107 * everything, and rewrite away the register/uniform indices to use 3-bit
108 * sources directly. */
109
110 static unsigned
111 bi_lookup_constant(bi_clause *clause, uint64_t cons, bool *hi, bool b64)
112 {
113 uint64_t want = (cons >> 4);
114
115 for (unsigned i = 0; i < clause->constant_count; ++i) {
116 /* Only check top 60-bits since that's what's actually embedded
117 * in the clause, the bottom 4-bits are bundle-inline */
118
119 uint64_t candidates[2] = {
120 clause->constants[i] >> 4,
121 clause->constants[i] >> 36
122 };
123
124 /* For <64-bit mode, we treat lo/hi separately */
125
126 if (!b64)
127 candidates[0] &= (0xFFFFFFFF >> 4);
128
129 if (candidates[0] == want)
130 return i;
131
132 if (candidates[1] == want && !b64) {
133 *hi = true;
134 return i;
135 }
136 }
137
138 unreachable("Invalid constant accessed");
139 }
140
141 static unsigned
142 bi_constant_field(unsigned idx)
143 {
144 assert(idx <= 5);
145
146 const unsigned values[] = {
147 4, 5, 6, 7, 2, 3
148 };
149
150 return values[idx] << 4;
151 }
152
153 static bool
154 bi_assign_uniform_constant_single(
155 struct bi_registers *regs,
156 bi_clause *clause,
157 bi_instruction *ins, bool assigned, bool fast_zero)
158 {
159 if (!ins)
160 return assigned;
161
162 if (ins->type == BI_BLEND) {
163 assert(!assigned);
164 regs->uniform_constant = 0x8;
165 return true;
166 }
167
168 bi_foreach_src(ins, s) {
169 if (s == 0 && (ins->type == BI_LOAD_VAR_ADDRESS || ins->type == BI_LOAD_ATTR)) continue;
170
171 if (ins->src[s] & BIR_INDEX_CONSTANT) {
172 bool hi = false;
173 bool b64 = nir_alu_type_get_type_size(ins->src_types[s]) > 32;
174 uint64_t cons = bi_get_immediate(ins, s);
175 unsigned idx = bi_lookup_constant(clause, cons, &hi, b64);
176 unsigned lo = clause->constants[idx] & 0xF;
177 unsigned f = bi_constant_field(idx) | lo;
178
179 if (assigned && regs->uniform_constant != f)
180 unreachable("Mismatched uniform/const field: imm");
181
182 regs->uniform_constant = f;
183 ins->src[s] = BIR_INDEX_PASS | (hi ? BIFROST_SRC_CONST_HI : BIFROST_SRC_CONST_LO);
184 assigned = true;
185 } else if (ins->src[s] & BIR_INDEX_ZERO && (ins->type == BI_LOAD_UNIFORM || ins->type == BI_LOAD_VAR)) {
186 /* XXX: HACK UNTIL WE HAVE HI MATCHING DUE TO OVERFLOW XXX */
187 ins->src[s] = BIR_INDEX_PASS | BIFROST_SRC_CONST_HI;
188 } else if (ins->src[s] & BIR_INDEX_ZERO && !fast_zero) {
189 /* FMAs have a fast zero port, ADD needs to use the
190 * uniform/const port's special 0 mode handled here */
191 unsigned f = 0;
192
193 if (assigned && regs->uniform_constant != f)
194 unreachable("Mismatched uniform/const field: 0");
195
196 regs->uniform_constant = f;
197 ins->src[s] = BIR_INDEX_PASS | BIFROST_SRC_CONST_LO;
198 assigned = true;
199 } else if (s & BIR_INDEX_UNIFORM) {
200 unreachable("Push uniforms not implemented yet");
201 }
202 }
203
204 return assigned;
205 }
206
207 static void
208 bi_assign_uniform_constant(
209 bi_clause *clause,
210 struct bi_registers *regs,
211 bi_bundle bundle)
212 {
213 bool assigned =
214 bi_assign_uniform_constant_single(regs, clause, bundle.fma, false, true);
215
216 bi_assign_uniform_constant_single(regs, clause, bundle.add, assigned, false);
217 }
218
219 /* Assigns a port for reading, before anything is written */
220
221 static void
222 bi_assign_port_read(struct bi_registers *regs, unsigned src)
223 {
224 /* We only assign for registers */
225 if (!(src & BIR_INDEX_REGISTER))
226 return;
227
228 unsigned reg = src & ~BIR_INDEX_REGISTER;
229
230 /* Check if we already assigned the port */
231 for (unsigned i = 0; i <= 1; ++i) {
232 if (regs->port[i] == reg && regs->enabled[i])
233 return;
234 }
235
236 if (regs->port[3] == reg && regs->read_port3)
237 return;
238
239 /* Assign it now */
240
241 for (unsigned i = 0; i <= 1; ++i) {
242 if (!regs->enabled[i]) {
243 regs->port[i] = reg;
244 regs->enabled[i] = true;
245 return;
246 }
247 }
248
249 if (!regs->read_port3) {
250 regs->port[3] = reg;
251 regs->read_port3 = true;
252 return;
253 }
254
255 bi_print_ports(regs);
256 unreachable("Failed to find a free port for src");
257 }
258
259 static struct bi_registers
260 bi_assign_ports(bi_bundle now, bi_bundle prev)
261 {
262 struct bi_registers regs = { 0 };
263
264 /* We assign ports for the main register mechanism. Special ops
265 * use the data registers, which has its own mechanism entirely
266 * and thus gets skipped over here. */
267
268 unsigned read_dreg = now.add &&
269 bi_class_props[now.add->type] & BI_DATA_REG_SRC;
270
271 unsigned write_dreg = prev.add &&
272 bi_class_props[prev.add->type] & BI_DATA_REG_DEST;
273
274 /* First, assign reads */
275
276 if (now.fma)
277 bi_foreach_src(now.fma, src)
278 bi_assign_port_read(&regs, now.fma->src[src]);
279
280 if (now.add) {
281 bi_foreach_src(now.add, src) {
282 if (!(src == 0 && read_dreg))
283 bi_assign_port_read(&regs, now.add->src[src]);
284 }
285 }
286
287 /* Next, assign writes */
288
289 if (prev.add && prev.add->dest & BIR_INDEX_REGISTER && !write_dreg) {
290 regs.port[2] = prev.add->dest & ~BIR_INDEX_REGISTER;
291 regs.write_add = true;
292 }
293
294 if (prev.fma && prev.fma->dest & BIR_INDEX_REGISTER) {
295 unsigned r = prev.fma->dest & ~BIR_INDEX_REGISTER;
296
297 if (regs.write_add) {
298 /* Scheduler constraint: cannot read 3 and write 2 */
299 assert(!regs.read_port3);
300 regs.port[3] = r;
301 } else {
302 regs.port[2] = r;
303 }
304
305 regs.write_fma = true;
306 }
307
308 /* Finally, ensure port 1 > port 0 for the 63-x trick to function */
309
310 if (regs.enabled[0] && regs.enabled[1] && regs.port[1] < regs.port[0]) {
311 unsigned temp = regs.port[0];
312 regs.port[0] = regs.port[1];
313 regs.port[1] = temp;
314 }
315
316 return regs;
317 }
318
319 /* Determines the register control field, ignoring the first? flag */
320
321 static enum bifrost_reg_control
322 bi_pack_register_ctrl_lo(struct bi_registers r)
323 {
324 if (r.write_fma) {
325 if (r.write_add) {
326 assert(!r.read_port3);
327 return BIFROST_WRITE_ADD_P2_FMA_P3;
328 } else {
329 if (r.read_port3)
330 return BIFROST_WRITE_FMA_P2_READ_P3;
331 else
332 return BIFROST_WRITE_FMA_P2;
333 }
334 } else if (r.write_add) {
335 if (r.read_port3)
336 return BIFROST_WRITE_ADD_P2_READ_P3;
337 else
338 return BIFROST_WRITE_ADD_P2;
339 } else if (r.read_port3)
340 return BIFROST_READ_P3;
341 else
342 return BIFROST_REG_NONE;
343 }
344
345 /* Ditto but account for the first? flag this time */
346
347 static enum bifrost_reg_control
348 bi_pack_register_ctrl(struct bi_registers r)
349 {
350 enum bifrost_reg_control ctrl = bi_pack_register_ctrl_lo(r);
351
352 if (r.first_instruction) {
353 if (ctrl == BIFROST_REG_NONE)
354 ctrl = BIFROST_FIRST_NONE;
355 else if (ctrl == BIFROST_WRITE_FMA_P2_READ_P3)
356 ctrl = BIFROST_FIRST_WRITE_FMA_P2_READ_P3;
357 else
358 ctrl |= BIFROST_FIRST_NONE;
359 }
360
361 return ctrl;
362 }
363
364 static uint64_t
365 bi_pack_registers(struct bi_registers regs)
366 {
367 enum bifrost_reg_control ctrl = bi_pack_register_ctrl(regs);
368 struct bifrost_regs s = { 0 };
369 uint64_t packed = 0;
370
371 if (regs.enabled[1]) {
372 /* Gotta save that bit!~ Required by the 63-x trick */
373 assert(regs.port[1] > regs.port[0]);
374 assert(regs.enabled[0]);
375
376 /* Do the 63-x trick, see docs/disasm */
377 if (regs.port[0] > 31) {
378 regs.port[0] = 63 - regs.port[0];
379 regs.port[1] = 63 - regs.port[1];
380 }
381
382 assert(regs.port[0] <= 31);
383 assert(regs.port[1] <= 63);
384
385 s.ctrl = ctrl;
386 s.reg1 = regs.port[1];
387 s.reg0 = regs.port[0];
388 } else {
389 /* Port 1 disabled, so set to zero and use port 1 for ctrl */
390 s.ctrl = 0;
391 s.reg1 = ctrl << 2;
392
393 if (regs.enabled[0]) {
394 /* Bit 0 upper bit of port 0 */
395 s.reg1 |= (regs.port[0] >> 5);
396
397 /* Rest of port 0 in usual spot */
398 s.reg0 = (regs.port[0] & 0b11111);
399 } else {
400 /* Bit 1 set if port 0 also disabled */
401 s.reg1 |= (1 << 1);
402 }
403 }
404
405 /* When port 3 isn't used, we have to set it to port 2, and vice versa,
406 * or INSTR_INVALID_ENC is raised. The reason is unknown. */
407
408 bool has_port2 = regs.write_fma || regs.write_add;
409 bool has_port3 = regs.read_port3 || (regs.write_fma && regs.write_add);
410
411 if (!has_port3)
412 regs.port[3] = regs.port[2];
413
414 if (!has_port2)
415 regs.port[2] = regs.port[3];
416
417 s.reg3 = regs.port[3];
418 s.reg2 = regs.port[2];
419 s.uniform_const = regs.uniform_constant;
420
421 memcpy(&packed, &s, sizeof(s));
422 return packed;
423 }
424
425 static void
426 bi_set_data_register(bi_clause *clause, unsigned idx)
427 {
428 assert(idx & BIR_INDEX_REGISTER);
429 unsigned reg = idx & ~BIR_INDEX_REGISTER;
430 assert(reg <= 63);
431 clause->data_register = reg;
432 }
433
434 static void
435 bi_read_data_register(bi_clause *clause, bi_instruction *ins)
436 {
437 bi_set_data_register(clause, ins->src[0]);
438 }
439
440 static void
441 bi_write_data_register(bi_clause *clause, bi_instruction *ins)
442 {
443 bi_set_data_register(clause, ins->dest);
444 }
445
446 static enum bifrost_packed_src
447 bi_get_src_reg_port(struct bi_registers *regs, unsigned src)
448 {
449 unsigned reg = src & ~BIR_INDEX_REGISTER;
450
451 if (regs->port[0] == reg && regs->enabled[0])
452 return BIFROST_SRC_PORT0;
453 else if (regs->port[1] == reg && regs->enabled[1])
454 return BIFROST_SRC_PORT1;
455 else if (regs->port[3] == reg && regs->read_port3)
456 return BIFROST_SRC_PORT3;
457 else
458 unreachable("Tried to access register with no port");
459 }
460
461 static enum bifrost_packed_src
462 bi_get_src(bi_instruction *ins, struct bi_registers *regs, unsigned s, bool is_fma)
463 {
464 unsigned src = ins->src[s];
465
466 if (src & BIR_INDEX_REGISTER)
467 return bi_get_src_reg_port(regs, src);
468 else if (src & BIR_INDEX_ZERO && is_fma)
469 return BIFROST_SRC_STAGE;
470 else if (src & BIR_INDEX_PASS)
471 return src & ~BIR_INDEX_PASS;
472 else {
473 bi_print_instruction(ins, stderr);
474 unreachable("Unknown src in above instruction");
475 }
476 }
477
478 /* Constructs a packed 2-bit swizzle for a 16-bit vec2 source. Source must be
479 * 16-bit and written components must correspond to valid swizzles (component x
480 * or y). */
481
482 static unsigned
483 bi_swiz16(bi_instruction *ins, unsigned src)
484 {
485 assert(nir_alu_type_get_type_size(ins->src_types[src]) == 16);
486 unsigned swizzle = 0;
487
488 for (unsigned c = 0; c < 2; ++c) {
489 if (!bi_writes_component(ins, src)) continue;
490
491 unsigned k = ins->swizzle[src][c];
492 assert(k <= 1);
493 swizzle |= (k << c);
494 }
495
496 return swizzle;
497 }
498
499 static unsigned
500 bi_pack_fma_fma(bi_instruction *ins, struct bi_registers *regs)
501 {
502 /* (-a)(-b) = ab, so we only need one negate bit */
503 bool negate_mul = ins->src_neg[0] ^ ins->src_neg[1];
504
505 if (ins->op.mscale) {
506 assert(!(ins->src_abs[0] && ins->src_abs[1]));
507 assert(!ins->src_abs[2] || !ins->src_neg[3] || !ins->src_abs[3]);
508
509 /* We can have exactly one abs, and can flip the multiplication
510 * to make it fit if we have to */
511 bool flip_ab = ins->src_abs[1];
512
513 struct bifrost_fma_mscale pack = {
514 .src0 = bi_get_src(ins, regs, flip_ab ? 1 : 0, true),
515 .src1 = bi_get_src(ins, regs, flip_ab ? 0 : 1, true),
516 .src2 = bi_get_src(ins, regs, 2, true),
517 .src3 = bi_get_src(ins, regs, 3, true),
518 .mscale_mode = 0,
519 .mode = ins->outmod,
520 .src0_abs = ins->src_abs[0] || ins->src_abs[1],
521 .src1_neg = negate_mul,
522 .src2_neg = ins->src_neg[2],
523 .op = BIFROST_FMA_OP_MSCALE,
524 };
525
526 RETURN_PACKED(pack);
527 } else if (ins->dest_type == nir_type_float32) {
528 struct bifrost_fma_fma pack = {
529 .src0 = bi_get_src(ins, regs, 0, true),
530 .src1 = bi_get_src(ins, regs, 1, true),
531 .src2 = bi_get_src(ins, regs, 2, true),
532 .src0_abs = ins->src_abs[0],
533 .src1_abs = ins->src_abs[1],
534 .src2_abs = ins->src_abs[2],
535 .src0_neg = negate_mul,
536 .src2_neg = ins->src_neg[2],
537 .outmod = ins->outmod,
538 .roundmode = ins->roundmode,
539 .op = BIFROST_FMA_OP_FMA
540 };
541
542 RETURN_PACKED(pack);
543 } else if (ins->dest_type == nir_type_float16) {
544 struct bifrost_fma_fma16 pack = {
545 .src0 = bi_get_src(ins, regs, 0, true),
546 .src1 = bi_get_src(ins, regs, 1, true),
547 .src2 = bi_get_src(ins, regs, 2, true),
548 .swizzle_0 = bi_swiz16(ins, 0),
549 .swizzle_1 = bi_swiz16(ins, 1),
550 .swizzle_2 = bi_swiz16(ins, 2),
551 .src0_neg = negate_mul,
552 .src2_neg = ins->src_neg[2],
553 .outmod = ins->outmod,
554 .roundmode = ins->roundmode,
555 .op = BIFROST_FMA_OP_FMA16
556 };
557
558 RETURN_PACKED(pack);
559 } else {
560 unreachable("Invalid fma dest type");
561 }
562 }
563
564 static unsigned
565 bi_pack_fma_addmin_f32(bi_instruction *ins, struct bi_registers *regs)
566 {
567 unsigned op =
568 (ins->type == BI_ADD) ? BIFROST_FMA_OP_FADD32 :
569 (ins->op.minmax == BI_MINMAX_MIN) ? BIFROST_FMA_OP_FMIN32 :
570 BIFROST_FMA_OP_FMAX32;
571
572 struct bifrost_fma_add pack = {
573 .src0 = bi_get_src(ins, regs, 0, true),
574 .src1 = bi_get_src(ins, regs, 1, true),
575 .src0_abs = ins->src_abs[0],
576 .src1_abs = ins->src_abs[1],
577 .src0_neg = ins->src_neg[0],
578 .src1_neg = ins->src_neg[1],
579 .unk = 0x0,
580 .outmod = ins->outmod,
581 .roundmode = (ins->type == BI_ADD) ? ins->roundmode : ins->minmax,
582 .op = op
583 };
584
585 RETURN_PACKED(pack);
586 }
587
588 static bool
589 bi_pack_fp16_abs(bi_instruction *ins, struct bi_registers *regs, bool *flip)
590 {
591 /* Absolute values are packed in a quirky way. Let k = src1 < src0. Let
592 * l be an auxiliary bit we encode. Then the hardware determines:
593 *
594 * abs0 = l || k
595 * abs1 = l && k
596 *
597 * Since add/min/max are commutative, this saves a bit by using the
598 * order of the operands as a bit (k). To pack this, first note:
599 *
600 * (l && k) implies (l || k).
601 *
602 * That is, if the second argument is abs'd, then the first argument
603 * also has abs. So there are three cases:
604 *
605 * Case 0: Neither src has absolute value. Then we have l = k = 0.
606 *
607 * Case 1: Exactly one src has absolute value. Assign that source to
608 * src0 and the other source to src1. Compute k = src1 < src0 based on
609 * that assignment. Then l = ~k.
610 *
611 * Case 2: Both sources have absolute value. Then we have l = k = 1.
612 * Note to force k = 1 requires that (src1 < src0) OR (src0 < src1).
613 * That is, this encoding is only valid if src1 and src0 are distinct.
614 * This is a scheduling restriction (XXX); if an op of this type
615 * requires both identical sources to have abs value, then we must
616 * schedule to ADD (which does not use this ordering trick).
617 */
618
619 unsigned abs_0 = ins->src_abs[0], abs_1 = ins->src_abs[1];
620 unsigned src_0 = bi_get_src(ins, regs, 0, true);
621 unsigned src_1 = bi_get_src(ins, regs, 1, true);
622
623 assert(!(abs_0 && abs_1 && src_0 == src_1));
624
625 if (!abs_0 && !abs_1) {
626 /* Force k = 0 <===> NOT(src1 < src0) */
627 *flip = (src_1 < src_0);
628 return false;
629 } else if (abs_0 && !abs_1) {
630 return src_1 >= src_0;
631 } else if (abs_1 && !abs_0) {
632 *flip = true;
633 return src_0 >= src_1;
634 } else {
635 *flip = (src_0 >= src_1);
636 return true;
637 }
638 }
639
640 static unsigned
641 bi_pack_fmadd_min_f16(bi_instruction *ins, struct bi_registers *regs, bool FMA)
642 {
643 unsigned op =
644 (!FMA) ? ((ins->op.minmax == BI_MINMAX_MIN) ?
645 BIFROST_ADD_OP_FMIN16 : BIFROST_ADD_OP_FMAX16) :
646 (ins->type == BI_ADD) ? BIFROST_FMA_OP_FADD16 :
647 (ins->op.minmax == BI_MINMAX_MIN) ? BIFROST_FMA_OP_FMIN16 :
648 BIFROST_FMA_OP_FMAX16;
649
650 bool flip = false;
651 bool l = bi_pack_fp16_abs(ins, regs, &flip);
652 unsigned src_0 = bi_get_src(ins, regs, 0, true);
653 unsigned src_1 = bi_get_src(ins, regs, 1, true);
654
655 if (FMA) {
656 struct bifrost_fma_add_minmax16 pack = {
657 .src0 = flip ? src_1 : src_0,
658 .src1 = flip ? src_0 : src_1,
659 .src0_neg = ins->src_neg[flip ? 1 : 0],
660 .src1_neg = ins->src_neg[flip ? 0 : 1],
661 .abs1 = l,
662 .outmod = ins->outmod,
663 .mode = (ins->type == BI_ADD) ? ins->roundmode : ins->minmax,
664 .op = op
665 };
666
667 RETURN_PACKED(pack);
668 } else {
669 /* Can't have modes for fp16 */
670 assert(ins->outmod == 0);
671
672 struct bifrost_add_fmin16 pack = {
673 .src0 = flip ? src_1 : src_0,
674 .src1 = flip ? src_0 : src_1,
675 .src0_neg = ins->src_neg[flip ? 1 : 0],
676 .src1_neg = ins->src_neg[flip ? 0 : 1],
677 .abs1 = l,
678 .src0_swizzle = bi_swiz16(ins, 0),
679 .src1_swizzle = bi_swiz16(ins, 1),
680 .mode = ins->minmax,
681 .op = op
682 };
683
684 RETURN_PACKED(pack);
685 }
686 }
687
688 static unsigned
689 bi_pack_fma_addmin(bi_instruction *ins, struct bi_registers *regs)
690 {
691 if (ins->dest_type == nir_type_float32)
692 return bi_pack_fma_addmin_f32(ins, regs);
693 else if(ins->dest_type == nir_type_float16)
694 return bi_pack_fmadd_min_f16(ins, regs, true);
695 else
696 unreachable("Unknown FMA/ADD type");
697 }
698
699 static unsigned
700 bi_pack_fma_1src(bi_instruction *ins, struct bi_registers *regs, unsigned op)
701 {
702 struct bifrost_fma_inst pack = {
703 .src0 = bi_get_src(ins, regs, 0, true),
704 .op = op
705 };
706
707 RETURN_PACKED(pack);
708 }
709
710 static unsigned
711 bi_pack_fma_2src(bi_instruction *ins, struct bi_registers *regs, unsigned op)
712 {
713 struct bifrost_fma_2src pack = {
714 .src0 = bi_get_src(ins, regs, 0, true),
715 .src1 = bi_get_src(ins, regs, 1, true),
716 .op = op
717 };
718
719 RETURN_PACKED(pack);
720 }
721
722 static unsigned
723 bi_pack_add_1src(bi_instruction *ins, struct bi_registers *regs, unsigned op)
724 {
725 struct bifrost_add_inst pack = {
726 .src0 = bi_get_src(ins, regs, 0, true),
727 .op = op
728 };
729
730 RETURN_PACKED(pack);
731 }
732
733 static enum bifrost_csel_cond
734 bi_cond_to_csel(enum bi_cond cond, bool *flip, bool *invert, nir_alu_type T)
735 {
736 nir_alu_type B = nir_alu_type_get_base_type(T);
737 unsigned idx = (B == nir_type_float) ? 0 :
738 ((B == nir_type_int) ? 1 : 2);
739
740 switch (cond){
741 case BI_COND_LT:
742 *flip = true;
743 case BI_COND_GT: {
744 const enum bifrost_csel_cond ops[] = {
745 BIFROST_FGT_F,
746 BIFROST_IGT_I,
747 BIFROST_UGT_I
748 };
749
750 return ops[idx];
751 }
752 case BI_COND_LE:
753 *flip = true;
754 case BI_COND_GE: {
755 const enum bifrost_csel_cond ops[] = {
756 BIFROST_FGE_F,
757 BIFROST_IGE_I,
758 BIFROST_UGE_I
759 };
760
761 return ops[idx];
762 }
763 case BI_COND_NE:
764 *invert = true;
765 case BI_COND_EQ: {
766 const enum bifrost_csel_cond ops[] = {
767 BIFROST_FEQ_F,
768 BIFROST_IEQ_F,
769 BIFROST_IEQ_F /* sign is irrelevant */
770 };
771
772 return ops[idx];
773 }
774 default:
775 unreachable("Invalid op for csel");
776 }
777 }
778
779 static unsigned
780 bi_pack_fma_csel(bi_instruction *ins, struct bi_registers *regs)
781 {
782 /* TODO: Use csel3 as well */
783 bool flip = false, invert = false;
784
785 enum bifrost_csel_cond cond =
786 bi_cond_to_csel(ins->cond, &flip, &invert, ins->src_types[0]);
787
788 unsigned size = nir_alu_type_get_type_size(ins->dest_type);
789
790 unsigned cmp_0 = (flip ? 1 : 0);
791 unsigned cmp_1 = (flip ? 0 : 1);
792 unsigned res_0 = (invert ? 3 : 2);
793 unsigned res_1 = (invert ? 2 : 3);
794
795 struct bifrost_csel4 pack = {
796 .src0 = bi_get_src(ins, regs, cmp_0, true),
797 .src1 = bi_get_src(ins, regs, cmp_1, true),
798 .src2 = bi_get_src(ins, regs, res_0, true),
799 .src3 = bi_get_src(ins, regs, res_1, true),
800 .cond = cond,
801 .op = (size == 16) ? BIFROST_FMA_OP_CSEL4_V16 :
802 BIFROST_FMA_OP_CSEL4
803 };
804
805 RETURN_PACKED(pack);
806 }
807
808 static unsigned
809 bi_pack_fma_frexp(bi_instruction *ins, struct bi_registers *regs)
810 {
811 unsigned op = BIFROST_FMA_OP_FREXPE_LOG;
812 return bi_pack_fma_1src(ins, regs, op);
813 }
814
815 static unsigned
816 bi_pack_fma_reduce(bi_instruction *ins, struct bi_registers *regs)
817 {
818 if (ins->op.reduce == BI_REDUCE_ADD_FREXPM) {
819 return bi_pack_fma_2src(ins, regs, BIFROST_FMA_OP_ADD_FREXPM);
820 } else {
821 unreachable("Invalid reduce op");
822 }
823 }
824
825 /* We have a single convert opcode in the IR but a number of opcodes that could
826 * come out. In particular we have native opcodes for:
827 *
828 * [ui]16 --> [fui]32 -- int16_to_32
829 * f16 --> f32 -- float16_to_32
830 * f32 --> f16 -- float32_to_16
831 * f32 --> [ui]32 -- float32_to_int
832 * [ui]32 --> f32 -- int_to_float32
833 * [fui]16 --> [fui]16 -- f2i_i2f16
834 */
835
836 static unsigned
837 bi_pack_convert(bi_instruction *ins, struct bi_registers *regs, bool FMA)
838 {
839 nir_alu_type from_base = nir_alu_type_get_base_type(ins->src_types[0]);
840 unsigned from_size = nir_alu_type_get_type_size(ins->src_types[0]);
841 bool from_unsigned = from_base == nir_type_uint;
842
843 nir_alu_type to_base = nir_alu_type_get_base_type(ins->dest_type);
844 unsigned to_size = nir_alu_type_get_type_size(ins->dest_type);
845 bool to_unsigned = to_base == nir_type_uint;
846 bool to_float = to_base == nir_type_float;
847
848 /* Sanity check */
849 assert((from_base != to_base) || (from_size != to_size));
850 assert((MAX2(from_size, to_size) / MIN2(from_size, to_size)) <= 2);
851
852 /* f32 to f16 is special */
853 if (from_size == 32 && to_size == 16 && from_base == nir_type_float && to_base == from_base) {
854 /* TODO: second vectorized source? */
855 struct bifrost_fma_2src pfma = {
856 .src0 = bi_get_src(ins, regs, 0, true),
857 .src1 = BIFROST_SRC_STAGE, /* 0 */
858 .op = BIFROST_FMA_FLOAT32_TO_16
859 };
860
861 struct bifrost_add_2src padd = {
862 .src0 = bi_get_src(ins, regs, 0, true),
863 .src1 = BIFROST_SRC_STAGE, /* 0 */
864 .op = BIFROST_ADD_FLOAT32_TO_16
865 };
866
867 if (FMA) {
868 RETURN_PACKED(pfma);
869 } else {
870 RETURN_PACKED(padd);
871 }
872 }
873
874 /* Otherwise, figure out the mode */
875 unsigned op = 0;
876
877 if (from_size == 16 && to_size == 32) {
878 unsigned component = ins->swizzle[0][0];
879 assert(component <= 1);
880
881 if (from_base == nir_type_float)
882 op = BIFROST_CONVERT_5(component);
883 else
884 op = BIFROST_CONVERT_4(from_unsigned, component, to_float);
885 } else {
886 unsigned mode = 0;
887 unsigned swizzle = (from_size == 16) ? bi_swiz16(ins, 0) : 0;
888 bool is_unsigned = from_unsigned;
889
890 if (from_base == nir_type_float) {
891 assert(to_base != nir_type_float);
892 is_unsigned = to_unsigned;
893
894 if (from_size == 32 && to_size == 32)
895 mode = BIFROST_CONV_F32_TO_I32;
896 else if (from_size == 16 && to_size == 16)
897 mode = BIFROST_CONV_F16_TO_I16;
898 else
899 unreachable("Invalid float conversion");
900 } else {
901 assert(to_base == nir_type_float);
902 assert(from_size == to_size);
903
904 if (to_size == 32)
905 mode = BIFROST_CONV_I32_TO_F32;
906 else if (to_size == 16)
907 mode = BIFROST_CONV_I16_TO_F16;
908 else
909 unreachable("Invalid int conversion");
910 }
911
912 /* Fixup swizzle for 32-bit only modes */
913
914 if (mode == BIFROST_CONV_I32_TO_F32)
915 swizzle = 0b11;
916 else if (mode == BIFROST_CONV_F32_TO_I32)
917 swizzle = 0b10;
918
919 op = BIFROST_CONVERT(is_unsigned, ins->roundmode, swizzle, mode);
920
921 /* Unclear what the top bit is for... maybe 16-bit related */
922 bool mode2 = mode == BIFROST_CONV_F16_TO_I16;
923 bool mode6 = mode == BIFROST_CONV_I16_TO_F16;
924
925 if (!(mode2 || mode6))
926 op |= 0x100;
927 }
928
929 if (FMA)
930 return bi_pack_fma_1src(ins, regs, BIFROST_FMA_CONVERT | op);
931 else
932 return bi_pack_add_1src(ins, regs, BIFROST_ADD_CONVERT | op);
933 }
934
935 static unsigned
936 bi_pack_fma_select(bi_instruction *ins, struct bi_registers *regs)
937 {
938 unsigned size = nir_alu_type_get_type_size(ins->src_types[0]);
939
940 if (size == 16) {
941 unsigned swiz = (ins->swizzle[0][0] | (ins->swizzle[1][0] << 1));
942 unsigned op = BIFROST_FMA_SEL_16(swiz);
943 return bi_pack_fma_2src(ins, regs, op);
944 } else if (size == 8) {
945 unsigned swiz = 0;
946
947 for (unsigned c = 0; c < 4; ++c) {
948 if (ins->swizzle[c][0]) {
949 /* Ensure lowering restriction is met */
950 assert(ins->swizzle[c][0] == 2);
951 swiz |= (1 << c);
952 }
953 }
954
955 struct bifrost_fma_sel8 pack = {
956 .src0 = bi_get_src(ins, regs, 0, true),
957 .src1 = bi_get_src(ins, regs, 1, true),
958 .src2 = bi_get_src(ins, regs, 2, true),
959 .src3 = bi_get_src(ins, regs, 3, true),
960 .swizzle = swiz,
961 .op = BIFROST_FMA_OP_SEL8
962 };
963
964 RETURN_PACKED(pack);
965 } else {
966 unreachable("Unimplemented");
967 }
968 }
969
970 static enum bifrost_fcmp_cond
971 bi_fcmp_cond(enum bi_cond cond)
972 {
973 switch (cond) {
974 case BI_COND_LT: return BIFROST_OLT;
975 case BI_COND_LE: return BIFROST_OLE;
976 case BI_COND_GE: return BIFROST_OGE;
977 case BI_COND_GT: return BIFROST_OGT;
978 case BI_COND_EQ: return BIFROST_OEQ;
979 case BI_COND_NE: return BIFROST_UNE;
980 default: unreachable("Unknown bi_cond");
981 }
982 }
983
984 /* a <?> b <==> b <flip(?)> a (TODO: NaN behaviour?) */
985
986 static enum bifrost_fcmp_cond
987 bi_flip_fcmp(enum bifrost_fcmp_cond cond)
988 {
989 switch (cond) {
990 case BIFROST_OGT:
991 return BIFROST_OLT;
992 case BIFROST_OGE:
993 return BIFROST_OLE;
994 case BIFROST_OLT:
995 return BIFROST_OGT;
996 case BIFROST_OLE:
997 return BIFROST_OGE;
998 case BIFROST_OEQ:
999 case BIFROST_UNE:
1000 return cond;
1001 default:
1002 unreachable("Unknown fcmp cond");
1003 }
1004 }
1005
1006 static unsigned
1007 bi_pack_fma_cmp(bi_instruction *ins, struct bi_registers *regs)
1008 {
1009 nir_alu_type Tl = ins->src_types[0];
1010 nir_alu_type Tr = ins->src_types[1];
1011
1012 if (Tl == nir_type_float32 || Tr == nir_type_float32) {
1013 /* TODO: Mixed 32/16 cmp */
1014 assert(Tl == Tr);
1015
1016 enum bifrost_fcmp_cond cond = bi_fcmp_cond(ins->cond);
1017
1018 /* Only src1 has neg, so we arrange:
1019 * a < b --- native
1020 * a < -b --- native
1021 * -a < -b <===> a > b
1022 * -a < b <===> a > -b
1023 * TODO: Is this NaN-precise?
1024 */
1025
1026 bool flip = ins->src_neg[0];
1027 bool neg = ins->src_neg[0] ^ ins->src_neg[1];
1028
1029 if (flip)
1030 cond = bi_flip_fcmp(cond);
1031
1032 struct bifrost_fma_fcmp pack = {
1033 .src0 = bi_get_src(ins, regs, 0, true),
1034 .src1 = bi_get_src(ins, regs, 1, true),
1035 .src0_abs = ins->src_abs[0],
1036 .src1_abs = ins->src_abs[1],
1037 .src1_neg = neg,
1038 .src_expand = 0,
1039 .unk1 = 0,
1040 .cond = cond,
1041 .op = BIFROST_FMA_OP_FCMP_GL
1042 };
1043
1044 RETURN_PACKED(pack);
1045 } else if (Tl == nir_type_float16 && Tr == nir_type_float16) {
1046 bool flip = false;
1047 bool l = bi_pack_fp16_abs(ins, regs, &flip);
1048 enum bifrost_fcmp_cond cond = bi_fcmp_cond(ins->cond);
1049
1050 if (flip)
1051 cond = bi_flip_fcmp(cond);
1052
1053 struct bifrost_fma_fcmp16 pack = {
1054 .src0 = bi_get_src(ins, regs, flip ? 1 : 0, true),
1055 .src1 = bi_get_src(ins, regs, flip ? 0 : 1, true),
1056 .src0_swizzle = bi_swiz16(ins, flip ? 1 : 0),
1057 .src1_swizzle = bi_swiz16(ins, flip ? 0 : 1),
1058 .abs1 = l,
1059 .unk = 0,
1060 .cond = cond,
1061 .op = BIFROST_FMA_OP_FCMP_GL_16,
1062 };
1063
1064 RETURN_PACKED(pack);
1065 } else {
1066 unreachable("Unknown cmp type");
1067 }
1068 }
1069
1070 static unsigned
1071 bi_fma_bitwise_op(enum bi_bitwise_op op, bool rshift)
1072 {
1073 switch (op) {
1074 case BI_BITWISE_OR:
1075 /* Via De Morgan's */
1076 return rshift ?
1077 BIFROST_FMA_OP_RSHIFT_NAND :
1078 BIFROST_FMA_OP_LSHIFT_NAND;
1079 case BI_BITWISE_AND:
1080 return rshift ?
1081 BIFROST_FMA_OP_RSHIFT_AND :
1082 BIFROST_FMA_OP_LSHIFT_AND;
1083 case BI_BITWISE_XOR:
1084 /* Shift direction handled out of band */
1085 return BIFROST_FMA_OP_RSHIFT_XOR;
1086 default:
1087 unreachable("Unknown op");
1088 }
1089 }
1090
1091 static unsigned
1092 bi_pack_fma_bitwise(bi_instruction *ins, struct bi_registers *regs)
1093 {
1094 unsigned size = nir_alu_type_get_type_size(ins->dest_type);
1095 assert(size <= 32);
1096
1097 bool invert_0 = ins->bitwise.src_invert[0];
1098 bool invert_1 = ins->bitwise.src_invert[1];
1099
1100 if (ins->op.bitwise == BI_BITWISE_OR) {
1101 /* Becomes NAND, so via De Morgan's:
1102 * f(A) | f(B) = ~(~f(A) & ~f(B))
1103 * = NAND(~f(A), ~f(B))
1104 */
1105
1106 invert_0 = !invert_0;
1107 invert_1 = !invert_1;
1108 } else if (ins->op.bitwise == BI_BITWISE_XOR) {
1109 /* ~A ^ ~B = ~(A ^ ~B) = ~(~(A ^ B)) = A ^ B
1110 * ~A ^ B = ~(A ^ B) = A ^ ~B
1111 */
1112
1113 invert_0 ^= invert_1;
1114 invert_1 = false;
1115
1116 /* invert_1 ends up specifying shift direction */
1117 invert_1 = !ins->bitwise.rshift;
1118 }
1119
1120 struct bifrost_shift_fma pack = {
1121 .src0 = bi_get_src(ins, regs, 0, true),
1122 .src1 = bi_get_src(ins, regs, 1, true),
1123 .src2 = bi_get_src(ins, regs, 2, true),
1124 .half = (size == 32) ? 0 : (size == 16) ? 0x7 : (size == 8) ? 0x4 : 0,
1125 .unk = 1, /* XXX */
1126 .invert_1 = invert_0,
1127 .invert_2 = invert_1,
1128 .op = bi_fma_bitwise_op(ins->op.bitwise, ins->bitwise.rshift)
1129 };
1130
1131 RETURN_PACKED(pack);
1132 }
1133
1134 static unsigned
1135 bi_pack_fma_round(bi_instruction *ins, struct bi_registers *regs)
1136 {
1137 bool fp16 = ins->dest_type == nir_type_float16;
1138 assert(fp16 || ins->dest_type == nir_type_float32);
1139
1140 unsigned op = fp16
1141 ? BIFROST_FMA_ROUND_16(ins->roundmode, bi_swiz16(ins, 0))
1142 : BIFROST_FMA_ROUND_32(ins->roundmode);
1143
1144 return bi_pack_fma_1src(ins, regs, op);
1145 }
1146
1147 static unsigned
1148 bi_pack_fma(bi_clause *clause, bi_bundle bundle, struct bi_registers *regs)
1149 {
1150 if (!bundle.fma)
1151 return BIFROST_FMA_NOP;
1152
1153 switch (bundle.fma->type) {
1154 case BI_ADD:
1155 return bi_pack_fma_addmin(bundle.fma, regs);
1156 case BI_CMP:
1157 return bi_pack_fma_cmp(bundle.fma, regs);
1158 case BI_BITWISE:
1159 return bi_pack_fma_bitwise(bundle.fma, regs);
1160 case BI_CONVERT:
1161 return bi_pack_convert(bundle.fma, regs, true);
1162 case BI_CSEL:
1163 return bi_pack_fma_csel(bundle.fma, regs);
1164 case BI_FMA:
1165 return bi_pack_fma_fma(bundle.fma, regs);
1166 case BI_FREXP:
1167 return bi_pack_fma_frexp(bundle.fma, regs);
1168 case BI_ISUB:
1169 unreachable("Packing todo");
1170 case BI_MINMAX:
1171 return bi_pack_fma_addmin(bundle.fma, regs);
1172 case BI_MOV:
1173 return bi_pack_fma_1src(bundle.fma, regs, BIFROST_FMA_OP_MOV);
1174 case BI_SHIFT:
1175 unreachable("Packing todo");
1176 case BI_SELECT:
1177 return bi_pack_fma_select(bundle.fma, regs);
1178 case BI_ROUND:
1179 return bi_pack_fma_round(bundle.fma, regs);
1180 case BI_REDUCE_FMA:
1181 return bi_pack_fma_reduce(bundle.fma, regs);
1182 default:
1183 unreachable("Cannot encode class as FMA");
1184 }
1185 }
1186
1187 static unsigned
1188 bi_pack_add_ld_vary(bi_clause *clause, bi_instruction *ins, struct bi_registers *regs)
1189 {
1190 unsigned size = nir_alu_type_get_type_size(ins->dest_type);
1191 assert(size == 32 || size == 16);
1192
1193 unsigned op = (size == 32) ?
1194 BIFROST_ADD_OP_LD_VAR_32 :
1195 BIFROST_ADD_OP_LD_VAR_16;
1196
1197 unsigned packed_addr = 0;
1198
1199 if (ins->src[0] & BIR_INDEX_CONSTANT) {
1200 /* Direct uses address field directly */
1201 packed_addr = bi_get_immediate(ins, 0);
1202 assert(packed_addr < 0b1000);
1203 } else {
1204 /* Indirect gets an extra source */
1205 packed_addr = bi_get_src(ins, regs, 0, false) | 0b11000;
1206 }
1207
1208 /* The destination is thrown in the data register */
1209 assert(ins->dest & BIR_INDEX_REGISTER);
1210 clause->data_register = ins->dest & ~BIR_INDEX_REGISTER;
1211
1212 unsigned channels = ins->vector_channels;
1213 assert(channels >= 1 && channels <= 4);
1214
1215 struct bifrost_ld_var pack = {
1216 .src0 = bi_get_src(ins, regs, 1, false),
1217 .addr = packed_addr,
1218 .channels = MALI_POSITIVE(channels),
1219 .interp_mode = ins->load_vary.interp_mode,
1220 .reuse = ins->load_vary.reuse,
1221 .flat = ins->load_vary.flat,
1222 .op = op
1223 };
1224
1225 RETURN_PACKED(pack);
1226 }
1227
1228 static unsigned
1229 bi_pack_add_2src(bi_instruction *ins, struct bi_registers *regs, unsigned op)
1230 {
1231 struct bifrost_add_2src pack = {
1232 .src0 = bi_get_src(ins, regs, 0, true),
1233 .src1 = bi_get_src(ins, regs, 1, true),
1234 .op = op
1235 };
1236
1237 RETURN_PACKED(pack);
1238 }
1239
1240 static unsigned
1241 bi_pack_add_addmin_f32(bi_instruction *ins, struct bi_registers *regs)
1242 {
1243 unsigned op =
1244 (ins->type == BI_ADD) ? BIFROST_ADD_OP_FADD32 :
1245 (ins->op.minmax == BI_MINMAX_MIN) ? BIFROST_ADD_OP_FMIN32 :
1246 BIFROST_ADD_OP_FMAX32;
1247
1248 struct bifrost_add_faddmin pack = {
1249 .src0 = bi_get_src(ins, regs, 0, true),
1250 .src1 = bi_get_src(ins, regs, 1, true),
1251 .src0_abs = ins->src_abs[0],
1252 .src1_abs = ins->src_abs[1],
1253 .src0_neg = ins->src_neg[0],
1254 .src1_neg = ins->src_neg[1],
1255 .outmod = ins->outmod,
1256 .mode = (ins->type == BI_ADD) ? ins->roundmode : ins->minmax,
1257 .op = op
1258 };
1259
1260 RETURN_PACKED(pack);
1261 }
1262
1263 static unsigned
1264 bi_pack_add_add_f16(bi_instruction *ins, struct bi_registers *regs)
1265 {
1266 /* ADD.v2f16 can't have outmod */
1267 assert(ins->outmod == BIFROST_NONE);
1268
1269 struct bifrost_add_faddmin pack = {
1270 .src0 = bi_get_src(ins, regs, 0, true),
1271 .src1 = bi_get_src(ins, regs, 1, true),
1272 .src0_abs = ins->src_abs[0],
1273 .src1_abs = ins->src_abs[1],
1274 .src0_neg = ins->src_neg[0],
1275 .src1_neg = ins->src_neg[1],
1276 .select = bi_swiz16(ins, 0), /* swizzle_0 */
1277 .outmod = bi_swiz16(ins, 1), /* swizzle_1 */
1278 .mode = ins->roundmode,
1279 .op = BIFROST_ADD_OP_FADD16
1280 };
1281
1282 RETURN_PACKED(pack);
1283 }
1284
1285 static unsigned
1286 bi_pack_add_addmin(bi_instruction *ins, struct bi_registers *regs)
1287 {
1288 if (ins->dest_type == nir_type_float32)
1289 return bi_pack_add_addmin_f32(ins, regs);
1290 else if (ins->dest_type == nir_type_float16) {
1291 if (ins->type == BI_ADD)
1292 return bi_pack_add_add_f16(ins, regs);
1293 else
1294 return bi_pack_fmadd_min_f16(ins, regs, false);
1295 } else
1296 unreachable("Unknown FMA/ADD type");
1297 }
1298
1299 static unsigned
1300 bi_pack_add_ld_ubo(bi_clause *clause, bi_instruction *ins, struct bi_registers *regs)
1301 {
1302 assert(ins->vector_channels >= 1 && ins->vector_channels <= 4);
1303
1304 const unsigned ops[4] = {
1305 BIFROST_ADD_OP_LD_UBO_1,
1306 BIFROST_ADD_OP_LD_UBO_2,
1307 BIFROST_ADD_OP_LD_UBO_3,
1308 BIFROST_ADD_OP_LD_UBO_4
1309 };
1310
1311 bi_write_data_register(clause, ins);
1312 return bi_pack_add_2src(ins, regs, ops[ins->vector_channels - 1]);
1313 }
1314
1315 static enum bifrost_ldst_type
1316 bi_pack_ldst_type(nir_alu_type T)
1317 {
1318 switch (T) {
1319 case nir_type_float16: return BIFROST_LDST_F16;
1320 case nir_type_float32: return BIFROST_LDST_F32;
1321 case nir_type_int32: return BIFROST_LDST_I32;
1322 case nir_type_uint32: return BIFROST_LDST_U32;
1323 default: unreachable("Invalid type loaded");
1324 }
1325 }
1326
1327 static unsigned
1328 bi_pack_add_ld_var_addr(bi_clause *clause, bi_instruction *ins, struct bi_registers *regs)
1329 {
1330 struct bifrost_ld_var_addr pack = {
1331 .src0 = bi_get_src(ins, regs, 1, false),
1332 .src1 = bi_get_src(ins, regs, 2, false),
1333 .location = bi_get_immediate(ins, 0),
1334 .type = bi_pack_ldst_type(ins->src_types[3]),
1335 .op = BIFROST_ADD_OP_LD_VAR_ADDR
1336 };
1337
1338 bi_write_data_register(clause, ins);
1339 RETURN_PACKED(pack);
1340 }
1341
1342 static unsigned
1343 bi_pack_add_ld_attr(bi_clause *clause, bi_instruction *ins, struct bi_registers *regs)
1344 {
1345 assert(ins->vector_channels >= 0 && ins->vector_channels <= 4);
1346
1347 struct bifrost_ld_attr pack = {
1348 .src0 = bi_get_src(ins, regs, 1, false),
1349 .src1 = bi_get_src(ins, regs, 2, false),
1350 .location = bi_get_immediate(ins, 0),
1351 .channels = MALI_POSITIVE(ins->vector_channels),
1352 .type = bi_pack_ldst_type(ins->dest_type),
1353 .op = BIFROST_ADD_OP_LD_ATTR
1354 };
1355
1356 bi_write_data_register(clause, ins);
1357 RETURN_PACKED(pack);
1358 }
1359
1360 static unsigned
1361 bi_pack_add_st_vary(bi_clause *clause, bi_instruction *ins, struct bi_registers *regs)
1362 {
1363 assert(ins->vector_channels >= 1 && ins->vector_channels <= 4);
1364
1365 struct bifrost_st_vary pack = {
1366 .src0 = bi_get_src(ins, regs, 1, false),
1367 .src1 = bi_get_src(ins, regs, 2, false),
1368 .src2 = bi_get_src(ins, regs, 3, false),
1369 .channels = MALI_POSITIVE(ins->vector_channels),
1370 .op = BIFROST_ADD_OP_ST_VAR
1371 };
1372
1373 bi_read_data_register(clause, ins);
1374 RETURN_PACKED(pack);
1375 }
1376
1377 static unsigned
1378 bi_pack_add_atest(bi_clause *clause, bi_instruction *ins, struct bi_registers *regs)
1379 {
1380 bool fp16 = (ins->src_types[1] == nir_type_float16);
1381
1382 struct bifrost_add_atest pack = {
1383 .src0 = bi_get_src(ins, regs, 0, false),
1384 .src1 = bi_get_src(ins, regs, 1, false),
1385 .half = fp16,
1386 .component = fp16 ? ins->swizzle[1][0] : 1, /* Set for fp32 */
1387 .op = BIFROST_ADD_OP_ATEST,
1388 };
1389
1390 /* Despite *also* writing with the usual mechanism... quirky and
1391 * perhaps unnecessary, but let's match the blob */
1392 clause->data_register = ins->dest & ~BIR_INDEX_REGISTER;
1393
1394 RETURN_PACKED(pack);
1395 }
1396
1397 static unsigned
1398 bi_pack_add_blend(bi_clause *clause, bi_instruction *ins, struct bi_registers *regs)
1399 {
1400 struct bifrost_add_inst pack = {
1401 .src0 = bi_get_src(ins, regs, 1, false),
1402 .op = BIFROST_ADD_OP_BLEND
1403 };
1404
1405 /* TODO: Pack location in uniform_const */
1406 assert(ins->blend_location == 0);
1407
1408 bi_read_data_register(clause, ins);
1409 RETURN_PACKED(pack);
1410 }
1411
1412 static unsigned
1413 bi_pack_add_special(bi_instruction *ins, struct bi_registers *regs)
1414 {
1415 unsigned op = 0;
1416 bool fp16 = ins->dest_type == nir_type_float16;
1417 bool Y = ins->swizzle[0][0];
1418
1419 if (ins->op.special == BI_SPECIAL_FRCP) {
1420 op = fp16 ?
1421 (Y ? BIFROST_ADD_OP_FRCP_FAST_F16_Y :
1422 BIFROST_ADD_OP_FRCP_FAST_F16_X) :
1423 BIFROST_ADD_OP_FRCP_FAST_F32;
1424 } else if (ins->op.special == BI_SPECIAL_FRSQ) {
1425 op = fp16 ?
1426 (Y ? BIFROST_ADD_OP_FRSQ_FAST_F16_Y :
1427 BIFROST_ADD_OP_FRSQ_FAST_F16_X) :
1428 BIFROST_ADD_OP_FRSQ_FAST_F32;
1429
1430 } else if (ins->op.special == BI_SPECIAL_EXP2_LOW) {
1431 assert(!fp16);
1432 op = BIFROST_ADD_OP_FEXP2_FAST;
1433 } else {
1434 unreachable("Unknown special op");
1435 }
1436
1437 return bi_pack_add_1src(ins, regs, op);
1438 }
1439
1440 static unsigned
1441 bi_pack_add_table(bi_instruction *ins, struct bi_registers *regs)
1442 {
1443 unsigned op = 0;
1444 assert(ins->dest_type == nir_type_float32);
1445
1446 op = BIFROST_ADD_OP_LOG2_HELP;
1447 return bi_pack_add_1src(ins, regs, op);
1448 }
1449 static unsigned
1450 bi_pack_add_tex_compact(bi_clause *clause, bi_instruction *ins, struct bi_registers *regs)
1451 {
1452 bool f16 = ins->dest_type == nir_type_float16;
1453
1454 struct bifrost_tex_compact pack = {
1455 .src0 = bi_get_src(ins, regs, 0, false),
1456 .src1 = bi_get_src(ins, regs, 1, false),
1457 .op = f16 ? BIFROST_ADD_OP_TEX_COMPACT_F16 :
1458 BIFROST_ADD_OP_TEX_COMPACT_F32,
1459 .unknown = 1,
1460 .tex_index = ins->texture.texture_index,
1461 .sampler_index = ins->texture.sampler_index
1462 };
1463
1464 bi_write_data_register(clause, ins);
1465 RETURN_PACKED(pack);
1466 }
1467
1468 static unsigned
1469 bi_pack_add_select(bi_instruction *ins, struct bi_registers *regs)
1470 {
1471 unsigned size = nir_alu_type_get_type_size(ins->src_types[0]);
1472 assert(size == 16);
1473
1474 unsigned swiz = (ins->swizzle[0][0] | (ins->swizzle[1][0] << 1));
1475 unsigned op = BIFROST_ADD_SEL_16(swiz);
1476 return bi_pack_add_2src(ins, regs, op);
1477 }
1478
1479 static unsigned
1480 bi_pack_add(bi_clause *clause, bi_bundle bundle, struct bi_registers *regs)
1481 {
1482 if (!bundle.add)
1483 return BIFROST_ADD_NOP;
1484
1485 switch (bundle.add->type) {
1486 case BI_ADD:
1487 return bi_pack_add_addmin(bundle.add, regs);
1488 case BI_ATEST:
1489 return bi_pack_add_atest(clause, bundle.add, regs);
1490 case BI_BRANCH:
1491 case BI_CMP:
1492 unreachable("Packing todo");
1493 case BI_BLEND:
1494 return bi_pack_add_blend(clause, bundle.add, regs);
1495 case BI_BITWISE:
1496 unreachable("Packing todo");
1497 case BI_CONVERT:
1498 return bi_pack_convert(bundle.add, regs, false);
1499 case BI_DISCARD:
1500 case BI_FREXP:
1501 case BI_ISUB:
1502 case BI_LOAD:
1503 unreachable("Packing todo");
1504 case BI_LOAD_ATTR:
1505 return bi_pack_add_ld_attr(clause, bundle.add, regs);
1506 case BI_LOAD_UNIFORM:
1507 return bi_pack_add_ld_ubo(clause, bundle.add, regs);
1508 case BI_LOAD_VAR:
1509 return bi_pack_add_ld_vary(clause, bundle.add, regs);
1510 case BI_LOAD_VAR_ADDRESS:
1511 return bi_pack_add_ld_var_addr(clause, bundle.add, regs);
1512 case BI_MINMAX:
1513 return bi_pack_add_addmin(bundle.add, regs);
1514 case BI_MOV:
1515 case BI_SHIFT:
1516 case BI_STORE:
1517 unreachable("Packing todo");
1518 case BI_STORE_VAR:
1519 return bi_pack_add_st_vary(clause, bundle.add, regs);
1520 case BI_SPECIAL:
1521 return bi_pack_add_special(bundle.add, regs);
1522 case BI_TABLE:
1523 return bi_pack_add_table(bundle.add, regs);
1524 case BI_SELECT:
1525 return bi_pack_add_select(bundle.add, regs);
1526 case BI_TEX:
1527 if (bundle.add->op.texture == BI_TEX_COMPACT)
1528 return bi_pack_add_tex_compact(clause, bundle.add, regs);
1529 else
1530 unreachable("Unknown tex type");
1531 case BI_ROUND:
1532 unreachable("Packing todo");
1533 default:
1534 unreachable("Cannot encode class as ADD");
1535 }
1536 }
1537
1538 struct bi_packed_bundle {
1539 uint64_t lo;
1540 uint64_t hi;
1541 };
1542
1543 static struct bi_packed_bundle
1544 bi_pack_bundle(bi_clause *clause, bi_bundle bundle, bi_bundle prev, bool first_bundle)
1545 {
1546 struct bi_registers regs = bi_assign_ports(bundle, prev);
1547 bi_assign_uniform_constant(clause, &regs, bundle);
1548 regs.first_instruction = first_bundle;
1549
1550 uint64_t reg = bi_pack_registers(regs);
1551 uint64_t fma = bi_pack_fma(clause, bundle, &regs);
1552 uint64_t add = bi_pack_add(clause, bundle, &regs);
1553
1554 struct bi_packed_bundle packed = {
1555 .lo = reg | (fma << 35) | ((add & 0b111111) << 58),
1556 .hi = add >> 6
1557 };
1558
1559 return packed;
1560 }
1561
1562 /* Packs the next two constants as a dedicated constant quadword at the end of
1563 * the clause, returning the number packed. */
1564
1565 static unsigned
1566 bi_pack_constants(bi_context *ctx, bi_clause *clause,
1567 unsigned index,
1568 struct util_dynarray *emission)
1569 {
1570 /* After these two, are we done? Determines tag */
1571 bool done = clause->constant_count <= (index + 2);
1572 bool only = clause->constant_count <= (index + 1);
1573
1574 /* TODO: Pos */
1575 assert(index == 0 && clause->bundle_count == 1);
1576 assert(only);
1577
1578 uint64_t hi = clause->constants[index + 0] >> 60ull;
1579
1580 struct bifrost_fmt_constant quad = {
1581 .pos = 0, /* TODO */
1582 .tag = done ? BIFROST_FMTC_FINAL : BIFROST_FMTC_CONSTANTS,
1583 .imm_1 = clause->constants[index + 0] >> 4,
1584 .imm_2 = ((hi < 8) ? (hi << 60ull) : 0) >> 4,
1585 };
1586
1587 /* XXX: On G71, Connor observed that the difference of the top 4 bits
1588 * of the second constant with the first must be less than 8, otherwise
1589 * we have to swap them. On G52, I'm able to reproduce a similar issue
1590 * but with a different workaround (modeled above with a single
1591 * constant, unclear how to workaround for multiple constants.) Further
1592 * investigation needed. Possibly an errata. XXX */
1593
1594 util_dynarray_append(emission, struct bifrost_fmt_constant, quad);
1595
1596 return 2;
1597 }
1598
1599 static void
1600 bi_pack_clause(bi_context *ctx, bi_clause *clause, bi_clause *next,
1601 struct util_dynarray *emission)
1602 {
1603 struct bi_packed_bundle ins_1 = bi_pack_bundle(clause, clause->bundles[0], clause->bundles[0], true);
1604 assert(clause->bundle_count == 1);
1605
1606 /* Used to decide if we elide writes */
1607 bool is_fragment = ctx->stage == MESA_SHADER_FRAGMENT;
1608
1609 /* State for packing constants throughout */
1610 unsigned constant_index = 0;
1611
1612 struct bifrost_fmt1 quad_1 = {
1613 .tag = clause->constant_count ? BIFROST_FMT1_CONSTANTS : BIFROST_FMT1_FINAL,
1614 .header = bi_pack_header(clause, next, is_fragment),
1615 .ins_1 = ins_1.lo,
1616 .ins_2 = ins_1.hi & ((1 << 11) - 1),
1617 .ins_0 = (ins_1.hi >> 11) & 0b111,
1618 };
1619
1620 util_dynarray_append(emission, struct bifrost_fmt1, quad_1);
1621
1622 /* Pack the remaining constants */
1623
1624 while (constant_index < clause->constant_count) {
1625 constant_index += bi_pack_constants(ctx, clause,
1626 constant_index, emission);
1627 }
1628 }
1629
1630 static bi_clause *
1631 bi_next_clause(bi_context *ctx, pan_block *block, bi_clause *clause)
1632 {
1633 /* Try the next clause in this block */
1634 if (clause->link.next != &((bi_block *) block)->clauses)
1635 return list_first_entry(&(clause->link), bi_clause, link);
1636
1637 /* Try the next block, or the one after that if it's empty, etc .*/
1638 pan_block *next_block = pan_next_block(block);
1639
1640 bi_foreach_block_from(ctx, next_block, block) {
1641 bi_block *blk = (bi_block *) block;
1642
1643 if (!list_is_empty(&blk->clauses))
1644 return list_first_entry(&(blk->clauses), bi_clause, link);
1645 }
1646
1647 return NULL;
1648 }
1649
1650 void
1651 bi_pack(bi_context *ctx, struct util_dynarray *emission)
1652 {
1653 util_dynarray_init(emission, NULL);
1654
1655 bi_foreach_block(ctx, _block) {
1656 bi_block *block = (bi_block *) _block;
1657
1658 bi_foreach_clause_in_block(block, clause) {
1659 bi_clause *next = bi_next_clause(ctx, _block, clause);
1660 bi_pack_clause(ctx, clause, next, emission);
1661 }
1662 }
1663 }