2 * Copyright (C) 2020 Collabora, Ltd.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
26 #define RETURN_PACKED(str) { \
28 memcpy(&temp, &str, sizeof(str)); \
32 /* This file contains the final passes of the compiler. Running after
33 * scheduling and RA, the IR is now finalized, so we need to emit it to actual
34 * bits on the wire (as well as fixup branches) */
37 bi_pack_header(bi_clause
*clause
, bi_clause
*next
, bool is_fragment
)
39 struct bifrost_header header
= {
40 .back_to_back
= clause
->back_to_back
,
41 .no_end_of_shader
= (next
!= NULL
),
42 .elide_writes
= is_fragment
,
43 .branch_cond
= clause
->branch_conditional
,
44 .datareg_writebarrier
= clause
->data_register_write_barrier
,
45 .datareg
= clause
->data_register
,
46 .scoreboard_deps
= next
? next
->dependencies
: 0,
47 .scoreboard_index
= clause
->scoreboard_id
,
48 .clause_type
= clause
->clause_type
,
49 .next_clause_type
= next
? next
->clause_type
: 0,
53 memcpy(&u
, &header
, sizeof(header
));
57 /* Represents the assignment of ports for a given bundle */
60 /* Register to assign to each port */
63 /* Read ports can be disabled */
66 /* Should we write FMA? what about ADD? If only a single port is
67 * enabled it is in port 2, else ADD/FMA is 2/3 respectively */
68 bool write_fma
, write_add
;
70 /* Should we read with port 3? */
73 /* Packed uniform/constant */
74 uint8_t uniform_constant
;
76 /* Whether writes are actually for the last instruction */
77 bool first_instruction
;
80 /* The uniform/constant slot allows loading a contiguous 64-bit immediate or
81 * pushed uniform per bundle. Figure out which one we need in the bundle (the
82 * scheduler needs to ensure we only have one type per bundle), validate
83 * everything, and rewrite away the register/uniform indices to use 3-bit
84 * sources directly. */
87 bi_lookup_constant(bi_clause
*clause
, uint64_t cons
, bool *hi
, bool b64
)
89 uint64_t want
= (cons
>> 4);
91 for (unsigned i
= 0; i
< clause
->constant_count
; ++i
) {
92 /* Only check top 60-bits since that's what's actually embedded
93 * in the clause, the bottom 4-bits are bundle-inline */
95 unsigned candidates
[2] = {
96 clause
->constants
[i
] >> 4,
97 clause
->constants
[i
] >> 36
101 candidates
[0] &= 0xFFFFFFFF;
103 if (candidates
[0] == want
)
106 if (candidates
[1] == want
&& !b64
) {
112 unreachable("Invalid constant accessed");
116 bi_constant_field(unsigned idx
)
120 const unsigned values
[] = {
124 return values
[idx
] << 4;
128 bi_assign_uniform_constant_single(
129 struct bi_registers
*regs
,
131 bi_instruction
*ins
, bool assigned
, bool fast_zero
)
136 bi_foreach_src(ins
, s
) {
137 if (s
== 0 && (ins
->type
== BI_LOAD_VAR_ADDRESS
|| ins
->type
== BI_LOAD_ATTR
)) continue;
139 if (ins
->src
[s
] & BIR_INDEX_CONSTANT
) {
141 bool b64
= nir_alu_type_get_type_size(ins
->src_types
[s
]) > 32;
142 uint64_t cons
= bi_get_immediate(ins
, ins
->src
[s
]);
143 unsigned idx
= bi_lookup_constant(clause
, cons
, &hi
, b64
);
144 unsigned f
= bi_constant_field(idx
) | (cons
& 0xF);
146 if (assigned
&& regs
->uniform_constant
!= f
)
147 unreachable("Mismatched uniform/const field: imm");
149 regs
->uniform_constant
= f
;
150 ins
->src
[s
] = BIR_INDEX_PASS
| (hi
? BIFROST_SRC_CONST_HI
: BIFROST_SRC_CONST_LO
);
152 } else if (ins
->src
[s
] & BIR_INDEX_ZERO
&& (ins
->type
== BI_LOAD_UNIFORM
|| ins
->type
== BI_LOAD_VAR
)) {
153 /* XXX: HACK UNTIL WE HAVE HI MATCHING DUE TO OVERFLOW XXX */
154 ins
->src
[s
] = BIR_INDEX_PASS
| BIFROST_SRC_CONST_HI
;
155 } else if (ins
->src
[s
] & BIR_INDEX_ZERO
&& !fast_zero
) {
156 /* FMAs have a fast zero port, ADD needs to use the
157 * uniform/const port's special 0 mode handled here */
160 if (assigned
&& regs
->uniform_constant
!= f
)
161 unreachable("Mismatched uniform/const field: 0");
163 regs
->uniform_constant
= f
;
164 ins
->src
[s
] = BIR_INDEX_PASS
| BIFROST_SRC_CONST_LO
;
166 } else if (s
& BIR_INDEX_UNIFORM
) {
167 unreachable("Push uniforms not implemented yet");
175 bi_assign_uniform_constant(
177 struct bi_registers
*regs
,
181 bi_assign_uniform_constant_single(regs
, clause
, bundle
.fma
, false, true);
183 bi_assign_uniform_constant_single(regs
, clause
, bundle
.add
, assigned
, false);
186 /* Assigns a port for reading, before anything is written */
189 bi_assign_port_read(struct bi_registers
*regs
, unsigned src
)
191 /* We only assign for registers */
192 if (!(src
& BIR_INDEX_REGISTER
))
195 unsigned reg
= src
& ~BIR_INDEX_REGISTER
;
197 /* Check if we already assigned the port */
198 for (unsigned i
= 0; i
<= 1; ++i
) {
199 if (regs
->port
[i
] == reg
&& regs
->enabled
[i
])
203 if (regs
->port
[3] == reg
&& regs
->read_port3
)
208 for (unsigned i
= 0; i
<= 1; ++i
) {
209 if (!regs
->enabled
[i
]) {
211 regs
->enabled
[i
] = true;
216 if (!regs
->read_port3
) {
218 regs
->read_port3
= true;
222 static struct bi_registers
223 bi_assign_ports(bi_bundle now
, bi_bundle prev
)
225 struct bi_registers regs
= { 0 };
227 /* We assign ports for the main register mechanism. Special ops
228 * use the data registers, which has its own mechanism entirely
229 * and thus gets skipped over here. */
231 unsigned read_dreg
= now
.add
&&
232 bi_class_props
[now
.add
->type
] & BI_DATA_REG_SRC
;
234 unsigned write_dreg
= prev
.add
&&
235 bi_class_props
[prev
.add
->type
] & BI_DATA_REG_DEST
;
237 /* First, assign reads */
240 bi_foreach_src(now
.fma
, src
)
241 bi_assign_port_read(®s
, now
.fma
->src
[src
]);
244 bi_foreach_src(now
.add
, src
) {
245 if (!(src
== 0 && read_dreg
))
246 bi_assign_port_read(®s
, now
.add
->src
[src
]);
250 /* Next, assign writes */
252 if (prev
.fma
&& prev
.fma
->dest
& BIR_INDEX_REGISTER
) {
253 regs
.port
[2] = prev
.fma
->dest
& ~BIR_INDEX_REGISTER
;
254 regs
.write_fma
= true;
257 if (prev
.add
&& prev
.add
->dest
& BIR_INDEX_REGISTER
&& !write_dreg
) {
258 unsigned r
= prev
.add
->dest
& ~BIR_INDEX_REGISTER
;
260 if (regs
.write_fma
) {
261 /* Scheduler constraint: cannot read 3 and write 2 */
262 assert(!regs
.read_port3
);
268 regs
.write_add
= true;
271 /* Finally, ensure port 1 > port 0 for the 63-x trick to function */
273 if (regs
.enabled
[0] && regs
.enabled
[1] && regs
.port
[1] < regs
.port
[0]) {
274 unsigned temp
= regs
.port
[0];
275 regs
.port
[0] = regs
.port
[1];
282 /* Determines the register control field, ignoring the first? flag */
284 static enum bifrost_reg_control
285 bi_pack_register_ctrl_lo(struct bi_registers r
)
289 assert(!r
.read_port3
);
290 return BIFROST_WRITE_ADD_P2_FMA_P3
;
293 return BIFROST_WRITE_FMA_P2_READ_P3
;
295 return BIFROST_WRITE_FMA_P2
;
297 } else if (r
.write_add
) {
299 return BIFROST_WRITE_ADD_P2_READ_P3
;
301 return BIFROST_WRITE_ADD_P2
;
302 } else if (r
.read_port3
)
303 return BIFROST_READ_P3
;
305 return BIFROST_REG_NONE
;
308 /* Ditto but account for the first? flag this time */
310 static enum bifrost_reg_control
311 bi_pack_register_ctrl(struct bi_registers r
)
313 enum bifrost_reg_control ctrl
= bi_pack_register_ctrl_lo(r
);
315 if (r
.first_instruction
) {
316 if (ctrl
== BIFROST_REG_NONE
)
317 ctrl
= BIFROST_FIRST_NONE
;
319 ctrl
|= BIFROST_FIRST_NONE
;
326 bi_pack_registers(struct bi_registers regs
)
328 enum bifrost_reg_control ctrl
= bi_pack_register_ctrl(regs
);
329 struct bifrost_regs s
;
332 if (regs
.enabled
[1]) {
333 /* Gotta save that bit!~ Required by the 63-x trick */
334 assert(regs
.port
[1] > regs
.port
[0]);
335 assert(regs
.enabled
[0]);
337 /* Do the 63-x trick, see docs/disasm */
338 if (regs
.port
[0] > 31) {
339 regs
.port
[0] = 63 - regs
.port
[0];
340 regs
.port
[1] = 63 - regs
.port
[1];
343 assert(regs
.port
[0] <= 31);
344 assert(regs
.port
[1] <= 63);
347 s
.reg1
= regs
.port
[1];
348 s
.reg0
= regs
.port
[0];
350 /* Port 1 disabled, so set to zero and use port 1 for ctrl */
353 if (regs
.enabled
[0]) {
354 /* Bit 0 upper bit of port 0 */
355 s
.reg1
|= (regs
.port
[0] >> 5);
357 /* Rest of port 0 in usual spot */
358 s
.reg0
= (regs
.port
[0] & 0b11111);
360 /* Bit 1 set if port 0 also disabled */
365 /* When port 3 isn't used, we have to set it to port 2, and vice versa,
366 * or we an INSTR_INVALID_ENC is raised. The reason is unknown. */
369 regs
.port
[3] = regs
.port
[2];
372 regs
.port
[2] = regs
.port
[3];
374 s
.reg3
= regs
.port
[3];
375 s
.reg2
= regs
.port
[2];
376 s
.uniform_const
= regs
.uniform_constant
;
378 memcpy(&packed
, &s
, sizeof(s
));
383 bi_set_data_register(bi_clause
*clause
, unsigned idx
)
385 assert(idx
& BIR_INDEX_REGISTER
);
386 unsigned reg
= idx
& ~BIR_INDEX_REGISTER
;
388 clause
->data_register
= reg
;
392 bi_read_data_register(bi_clause
*clause
, bi_instruction
*ins
)
394 bi_set_data_register(clause
, ins
->src
[0]);
398 bi_write_data_register(bi_clause
*clause
, bi_instruction
*ins
)
400 bi_set_data_register(clause
, ins
->dest
);
403 static enum bifrost_packed_src
404 bi_get_src_reg_port(struct bi_registers
*regs
, unsigned src
)
406 unsigned reg
= src
& ~BIR_INDEX_REGISTER
;
408 if (regs
->port
[0] == reg
&& regs
->enabled
[0])
409 return BIFROST_SRC_PORT0
;
410 else if (regs
->port
[1] == reg
&& regs
->enabled
[1])
411 return BIFROST_SRC_PORT1
;
412 else if (regs
->port
[3] == reg
&& regs
->read_port3
)
413 return BIFROST_SRC_PORT3
;
415 unreachable("Tried to access register with no port");
418 static enum bifrost_packed_src
419 bi_get_src(bi_instruction
*ins
, struct bi_registers
*regs
, unsigned s
, bool is_fma
)
421 unsigned src
= ins
->src
[s
];
423 if (src
& BIR_INDEX_REGISTER
)
424 return bi_get_src_reg_port(regs
, src
);
425 else if (src
& BIR_INDEX_ZERO
&& is_fma
)
426 return BIFROST_SRC_STAGE
;
427 else if (src
& BIR_INDEX_PASS
)
428 return src
& ~BIR_INDEX_PASS
;
430 unreachable("Unknown src");
433 /* Constructs a packed 2-bit swizzle for a 16-bit vec2 source. Source must be
434 * 16-bit and written components must correspond to valid swizzles (component x
438 bi_swiz16(bi_instruction
*ins
, unsigned src
)
440 assert(nir_alu_type_get_type_size(ins
->src_types
[src
]) == 16);
441 unsigned swizzle
= 0;
443 for (unsigned c
= 0; c
< 2; ++c
) {
444 if (!bi_writes_component(ins
, src
)) continue;
446 unsigned k
= ins
->swizzle
[src
][c
];
455 bi_pack_fma_fma(bi_instruction
*ins
, struct bi_registers
*regs
)
457 /* (-a)(-b) = ab, so we only need one negate bit */
458 bool negate_mul
= ins
->src_neg
[0] ^ ins
->src_neg
[1];
460 if (ins
->dest_type
== nir_type_float32
) {
461 struct bifrost_fma_fma pack
= {
462 .src0
= bi_get_src(ins
, regs
, 0, true),
463 .src1
= bi_get_src(ins
, regs
, 1, true),
464 .src2
= bi_get_src(ins
, regs
, 2, true),
465 .src0_abs
= ins
->src_abs
[0],
466 .src1_abs
= ins
->src_abs
[1],
467 .src2_abs
= ins
->src_abs
[2],
468 .src0_neg
= negate_mul
,
469 .src2_neg
= ins
->src_neg
[2],
470 .outmod
= ins
->outmod
,
471 .roundmode
= ins
->roundmode
,
472 .op
= BIFROST_FMA_OP_FMA
476 } else if (ins
->dest_type
== nir_type_float16
) {
477 struct bifrost_fma_fma16 pack
= {
478 .src0
= bi_get_src(ins
, regs
, 0, true),
479 .src1
= bi_get_src(ins
, regs
, 1, true),
480 .src2
= bi_get_src(ins
, regs
, 2, true),
481 .swizzle_0
= bi_swiz16(ins
, 0),
482 .swizzle_1
= bi_swiz16(ins
, 1),
483 .swizzle_2
= bi_swiz16(ins
, 2),
484 .src0_neg
= negate_mul
,
485 .src2_neg
= ins
->src_neg
[2],
486 .outmod
= ins
->outmod
,
487 .roundmode
= ins
->roundmode
,
488 .op
= BIFROST_FMA_OP_FMA16
493 unreachable("Invalid fma dest type");
498 bi_pack_fma_add_f32(bi_instruction
*ins
, struct bi_registers
*regs
)
500 struct bifrost_fma_add pack
= {
501 .src0
= bi_get_src(ins
, regs
, 0, true),
502 .src1
= bi_get_src(ins
, regs
, 1, true),
503 .src0_abs
= ins
->src_abs
[0],
504 .src1_abs
= ins
->src_abs
[1],
505 .src0_neg
= ins
->src_neg
[0],
506 .src1_neg
= ins
->src_neg
[1],
508 .outmod
= ins
->outmod
,
509 .roundmode
= ins
->roundmode
,
510 .op
= BIFROST_FMA_OP_FADD32
517 bi_pack_fma_addmin_f16(bi_instruction
*ins
, struct bi_registers
*regs
)
520 (ins
->type
== BI_ADD
) ? BIFROST_FMA_OP_FADD16
:
521 (ins
->op
.minmax
== BI_MINMAX_MIN
) ? BIFROST_FMA_OP_FMIN16
:
522 BIFROST_FMA_OP_FMAX16
;
524 /* Absolute values are packed in a quirky way. Let k = src1 < src0. Let
525 * l be an auxiliary bit we encode. Then the hardware determines:
530 * Since add/min/max are commutative, this saves a bit by using the
531 * order of the operands as a bit (k). To pack this, first note:
533 * (l && k) implies (l || k).
535 * That is, if the second argument is abs'd, then the first argument
536 * also has abs. So there are three cases:
538 * Case 0: Neither src has absolute value. Then we have l = k = 0.
540 * Case 1: Exactly one src has absolute value. Assign that source to
541 * src0 and the other source to src1. Compute k = src1 < src0 based on
542 * that assignment. Then l = ~k.
544 * Case 2: Both sources have absolute value. Then we have l = k = 1.
545 * Note to force k = 1 requires that (src1 < src0) OR (src0 < src1).
546 * That is, this encoding is only valid if src1 and src0 are distinct.
547 * This is a scheduling restriction (XXX); if an op of this type
548 * requires both identical sources to have abs value, then we must
549 * schedule to ADD (which does not use this ordering trick).
552 unsigned abs_0
= ins
->src_abs
[0], abs_1
= ins
->src_abs
[1];
553 unsigned src_0
= bi_get_src(ins
, regs
, 0, true);
554 unsigned src_1
= bi_get_src(ins
, regs
, 1, true);
557 if (!abs_0
&& !abs_1
) {
558 /* Force k = 0 <===> NOT(src1 < src0) <==> src1 >= src0 */
560 unsigned tmp
= src_0
;
564 } else if (abs_0
&& !abs_1
) {
566 } else if (abs_1
&& !abs_0
) {
567 unsigned tmp
= src_0
;
573 if (src_0
>= src_1
) {
574 unsigned tmp
= src_0
;
582 struct bifrost_fma_add_minmax16 pack
= {
585 .src0_neg
= ins
->src_neg
[0],
586 .src1_neg
= ins
->src_neg
[1],
588 .outmod
= ins
->outmod
,
589 .mode
= (ins
->type
== BI_ADD
) ? ins
->roundmode
: ins
->minmax
,
597 bi_pack_fma_add(bi_instruction
*ins
, struct bi_registers
*regs
)
599 if (ins
->dest_type
== nir_type_float32
)
600 return bi_pack_fma_add_f32(ins
, regs
);
601 else if(ins
->dest_type
== nir_type_float16
)
602 return bi_pack_fma_addmin_f16(ins
, regs
);
604 unreachable("Unknown FMA/ADD type");
608 bi_pack_fma_1src(bi_instruction
*ins
, struct bi_registers
*regs
, unsigned op
)
610 struct bifrost_fma_inst pack
= {
611 .src0
= bi_get_src(ins
, regs
, 0, true),
618 static enum bifrost_csel_cond
619 bi_cond_to_csel(enum bi_cond cond
, bool *flip
, bool *invert
, nir_alu_type T
)
621 nir_alu_type B
= nir_alu_type_get_base_type(T
);
622 unsigned idx
= (B
== nir_type_float
) ? 0 :
623 ((B
== nir_type_int
) ? 1 : 2);
629 const enum bifrost_csel_cond ops
[] = {
640 const enum bifrost_csel_cond ops
[] = {
651 const enum bifrost_csel_cond ops
[] = {
654 BIFROST_IEQ_F
/* sign is irrelevant */
660 unreachable("Invalid op for csel");
665 bi_pack_fma_csel(bi_instruction
*ins
, struct bi_registers
*regs
)
667 /* TODO: Use csel3 as well */
668 bool flip
= false, invert
= false;
670 enum bifrost_csel_cond cond
=
671 bi_cond_to_csel(ins
->csel_cond
, &flip
, &invert
, ins
->src_types
[0]);
673 unsigned size
= nir_alu_type_get_type_size(ins
->dest_type
);
675 unsigned cmp_0
= (flip
? 3 : 0);
676 unsigned cmp_1
= (flip
? 0 : 3);
677 unsigned res_0
= (invert
? 2 : 1);
678 unsigned res_1
= (invert
? 1 : 2);
680 struct bifrost_csel4 pack
= {
681 .src0
= bi_get_src(ins
, regs
, cmp_0
, true),
682 .src1
= bi_get_src(ins
, regs
, cmp_1
, true),
683 .src2
= bi_get_src(ins
, regs
, res_0
, true),
684 .src3
= bi_get_src(ins
, regs
, res_1
, true),
686 .op
= (size
== 16) ? BIFROST_FMA_OP_CSEL4_V16
:
693 /* We have a single convert opcode in the IR but a number of opcodes that could
694 * come out. In particular we have native opcodes for:
696 * [ui]16 --> [fui]32 -- int16_to_32
697 * f16 --> f32 -- float16_to_32
698 * f32 --> f16 -- float32_to_16
699 * f32 --> [ui]32 -- float32_to_int
700 * [ui]32 --> f32 -- int_to_float32
701 * [fui]16 --> [fui]16 -- f2i_i2f16
705 bi_pack_fma_convert(bi_instruction
*ins
, struct bi_registers
*regs
)
707 nir_alu_type from_base
= nir_alu_type_get_base_type(ins
->src_types
[0]);
708 unsigned from_size
= nir_alu_type_get_type_size(ins
->src_types
[0]);
709 bool from_unsigned
= from_base
== nir_type_uint
;
711 nir_alu_type to_base
= nir_alu_type_get_base_type(ins
->dest_type
);
712 unsigned to_size
= nir_alu_type_get_type_size(ins
->dest_type
);
713 bool to_unsigned
= to_base
== nir_type_uint
;
716 assert((from_base
!= to_base
) || (from_size
!= to_size
));
717 assert((MAX2(from_size
, to_size
) / MIN2(from_size
, to_size
)) <= 2);
719 if (from_size
== 16 && to_size
== 16) {
721 unreachable("i16 not yet implemented");
722 } else if (from_size
== 32 && to_size
== 32) {
725 if (from_base
== nir_type_float
) {
726 op
= BIFROST_FMA_FLOAT32_TO_INT(to_unsigned
);
728 op
= BIFROST_FMA_INT_TO_FLOAT32(from_unsigned
);
731 return bi_pack_fma_1src(ins
, regs
, op
);
732 } else if (from_size
== 16 && to_size
== 32) {
733 bool from_y
= ins
->swizzle
[0][0];
735 if (from_base
== nir_type_float
) {
736 return bi_pack_fma_1src(ins
, regs
,
737 BIFROST_FMA_FLOAT16_TO_32(from_y
));
739 unreachable("i16 not yet implemented");
741 } else if (from_size
== 32 && to_size
== 16) {
742 if (from_base
== nir_type_float
) {
743 /* TODO: second vectorized source? */
744 struct bifrost_fma_2src pack
= {
745 .src0
= bi_get_src(ins
, regs
, 0, true),
746 .src1
= BIFROST_SRC_STAGE
, /* 0 */
747 .op
= BIFROST_FMA_FLOAT32_TO_16
752 unreachable("i16 not yet implemented");
756 unreachable("Unknown convert");
760 bi_pack_fma(bi_clause
*clause
, bi_bundle bundle
, struct bi_registers
*regs
)
763 return BIFROST_FMA_NOP
;
765 switch (bundle
.fma
->type
) {
767 return bi_pack_fma_add(bundle
.fma
, regs
);
770 return BIFROST_FMA_NOP
;
772 return bi_pack_fma_convert(bundle
.fma
, regs
);
774 return bi_pack_fma_csel(bundle
.fma
, regs
);
776 return bi_pack_fma_fma(bundle
.fma
, regs
);
780 return BIFROST_FMA_NOP
;
782 return bi_pack_fma_1src(bundle
.fma
, regs
, BIFROST_FMA_OP_MOV
);
786 return BIFROST_FMA_NOP
;
788 unreachable("Cannot encode class as FMA");
793 bi_pack_add_ld_vary(bi_clause
*clause
, bi_instruction
*ins
, struct bi_registers
*regs
)
795 unsigned size
= nir_alu_type_get_type_size(ins
->dest_type
);
796 assert(size
== 32 || size
== 16);
798 unsigned op
= (size
== 32) ?
799 BIFROST_ADD_OP_LD_VAR_32
:
800 BIFROST_ADD_OP_LD_VAR_16
;
802 unsigned cmask
= bi_from_bytemask(ins
->writemask
, size
/ 8);
803 unsigned channels
= util_bitcount(cmask
);
804 assert(cmask
== ((1 << channels
) - 1));
806 unsigned packed_addr
= 0;
808 if (ins
->src
[0] & BIR_INDEX_CONSTANT
) {
809 /* Direct uses address field directly */
810 packed_addr
= bi_get_immediate(ins
, ins
->src
[0]);
811 assert(packed_addr
< 0b1000);
813 /* Indirect gets an extra source */
814 packed_addr
= bi_get_src(ins
, regs
, 0, false) | 0b11000;
817 /* The destination is thrown in the data register */
818 assert(ins
->dest
& BIR_INDEX_REGISTER
);
819 clause
->data_register
= ins
->dest
& ~BIR_INDEX_REGISTER
;
821 assert(channels
>= 1 && channels
<= 4);
823 struct bifrost_ld_var pack
= {
824 .src0
= bi_get_src(ins
, regs
, 1, false),
826 .channels
= MALI_POSITIVE(channels
),
827 .interp_mode
= ins
->load_vary
.interp_mode
,
828 .reuse
= ins
->load_vary
.reuse
,
829 .flat
= ins
->load_vary
.flat
,
837 bi_pack_add_2src(bi_instruction
*ins
, struct bi_registers
*regs
, unsigned op
)
839 struct bifrost_add_2src pack
= {
840 .src0
= bi_get_src(ins
, regs
, 0, true),
841 .src1
= bi_get_src(ins
, regs
, 1, true),
849 bi_pack_add_ld_ubo(bi_clause
*clause
, bi_instruction
*ins
, struct bi_registers
*regs
)
851 unsigned components
= bi_load32_components(ins
);
853 const unsigned ops
[4] = {
854 BIFROST_ADD_OP_LD_UBO_1
,
855 BIFROST_ADD_OP_LD_UBO_2
,
856 BIFROST_ADD_OP_LD_UBO_3
,
857 BIFROST_ADD_OP_LD_UBO_4
860 bi_write_data_register(clause
, ins
);
861 return bi_pack_add_2src(ins
, regs
, ops
[components
- 1]);
864 static enum bifrost_ldst_type
865 bi_pack_ldst_type(nir_alu_type T
)
868 case nir_type_float16
: return BIFROST_LDST_F16
;
869 case nir_type_float32
: return BIFROST_LDST_F32
;
870 case nir_type_int32
: return BIFROST_LDST_I32
;
871 case nir_type_uint32
: return BIFROST_LDST_U32
;
872 default: unreachable("Invalid type loaded");
877 bi_pack_add_ld_var_addr(bi_clause
*clause
, bi_instruction
*ins
, struct bi_registers
*regs
)
879 struct bifrost_ld_var_addr pack
= {
880 .src0
= bi_get_src(ins
, regs
, 1, false),
881 .src1
= bi_get_src(ins
, regs
, 2, false),
882 .location
= bi_get_immediate(ins
, ins
->src
[0]),
883 .type
= bi_pack_ldst_type(ins
->src_types
[3]),
884 .op
= BIFROST_ADD_OP_LD_VAR_ADDR
887 bi_write_data_register(clause
, ins
);
892 bi_pack_add_ld_attr(bi_clause
*clause
, bi_instruction
*ins
, struct bi_registers
*regs
)
894 struct bifrost_ld_attr pack
= {
895 .src0
= bi_get_src(ins
, regs
, 1, false),
896 .src1
= bi_get_src(ins
, regs
, 2, false),
897 .location
= bi_get_immediate(ins
, ins
->src
[0]),
898 .channels
= MALI_POSITIVE(bi_load32_components(ins
)),
899 .type
= bi_pack_ldst_type(ins
->dest_type
),
900 .op
= BIFROST_ADD_OP_LD_ATTR
903 bi_write_data_register(clause
, ins
);
908 bi_pack_add_st_vary(bi_clause
*clause
, bi_instruction
*ins
, struct bi_registers
*regs
)
910 assert(ins
->store_channels
>= 1 && ins
->store_channels
<= 4);
912 struct bifrost_st_vary pack
= {
913 .src0
= bi_get_src(ins
, regs
, 1, false),
914 .src1
= bi_get_src(ins
, regs
, 2, false),
915 .src2
= bi_get_src(ins
, regs
, 3, false),
916 .channels
= MALI_POSITIVE(ins
->store_channels
),
917 .op
= BIFROST_ADD_OP_ST_VAR
920 bi_read_data_register(clause
, ins
);
925 bi_pack_add_atest(bi_clause
*clause
, bi_instruction
*ins
, struct bi_registers
*regs
)
928 assert(ins
->src_types
[1] == nir_type_float32
);
930 struct bifrost_add_atest pack
= {
931 .src0
= bi_get_src(ins
, regs
, 0, false),
932 .src1
= bi_get_src(ins
, regs
, 1, false),
933 .component
= 1, /* Set for fp32 */
934 .op
= BIFROST_ADD_OP_ATEST
,
937 /* Despite *also* writing with the usual mechanism... quirky and
938 * perhaps unnecessary, but let's match the blob */
939 clause
->data_register
= ins
->dest
& ~BIR_INDEX_REGISTER
;
945 bi_pack_add_blend(bi_instruction
*ins
, struct bi_registers
*regs
)
947 struct bifrost_add_inst pack
= {
948 .src0
= bi_get_src(ins
, regs
, 0, false),
949 .op
= BIFROST_ADD_OP_BLEND
952 /* TODO: Pack location in uniform_const */
953 assert(ins
->blend_location
== 0);
959 bi_pack_add(bi_clause
*clause
, bi_bundle bundle
, struct bi_registers
*regs
)
962 return BIFROST_ADD_NOP
;
964 switch (bundle
.add
->type
) {
966 return BIFROST_ADD_NOP
;
968 return bi_pack_add_atest(clause
, bundle
.add
, regs
);
971 return BIFROST_ADD_NOP
;
973 return bi_pack_add_blend(bundle
.add
, regs
);
980 return BIFROST_ADD_NOP
;
982 return bi_pack_add_ld_attr(clause
, bundle
.add
, regs
);
983 case BI_LOAD_UNIFORM
:
984 return bi_pack_add_ld_ubo(clause
, bundle
.add
, regs
);
986 return bi_pack_add_ld_vary(clause
, bundle
.add
, regs
);
987 case BI_LOAD_VAR_ADDRESS
:
988 return bi_pack_add_ld_var_addr(clause
, bundle
.add
, regs
);
993 return BIFROST_ADD_NOP
;
995 return bi_pack_add_st_vary(clause
, bundle
.add
, regs
);
1000 return BIFROST_ADD_NOP
;
1002 unreachable("Cannot encode class as ADD");
1006 struct bi_packed_bundle
{
1011 static struct bi_packed_bundle
1012 bi_pack_bundle(bi_clause
*clause
, bi_bundle bundle
, bi_bundle prev
, bool first_bundle
)
1014 struct bi_registers regs
= bi_assign_ports(bundle
, prev
);
1015 bi_assign_uniform_constant(clause
, ®s
, bundle
);
1016 regs
.first_instruction
= first_bundle
;
1018 uint64_t reg
= bi_pack_registers(regs
);
1019 uint64_t fma
= bi_pack_fma(clause
, bundle
, ®s
);
1020 uint64_t add
= bi_pack_add(clause
, bundle
, ®s
);
1022 struct bi_packed_bundle packed
= {
1023 .lo
= reg
| (fma
<< 35) | ((add
& 0b111111) << 58),
1030 /* Packs the next two constants as a dedicated constant quadword at the end of
1031 * the clause, returning the number packed. */
1034 bi_pack_constants(bi_context
*ctx
, bi_clause
*clause
,
1036 struct util_dynarray
*emission
)
1038 /* After these two, are we done? Determines tag */
1039 bool done
= clause
->constant_count
<= (index
+ 2);
1040 bool only
= clause
->constant_count
<= (index
+ 1);
1043 assert(index
== 0 && clause
->bundle_count
== 1);
1045 struct bifrost_fmt_constant quad
= {
1046 .pos
= 0, /* TODO */
1047 .tag
= done
? BIFROST_FMTC_FINAL
: BIFROST_FMTC_CONSTANTS
,
1048 .imm_1
= clause
->constants
[index
+ 0] >> 4,
1049 .imm_2
= only
? 0 : clause
->constants
[index
+ 1] >> 4
1052 /* XXX: On G71, Connor observed that the difference of the top 4 bits
1053 * of the second constant with the first must be less than 8, otherwise
1054 * we have to swap them. I am not able to reproduce this on G52,
1055 * further investigation needed. Possibly an errata. XXX */
1057 util_dynarray_append(emission
, struct bifrost_fmt_constant
, quad
);
1063 bi_pack_clause(bi_context
*ctx
, bi_clause
*clause
, bi_clause
*next
,
1064 struct util_dynarray
*emission
)
1066 struct bi_packed_bundle ins_1
= bi_pack_bundle(clause
, clause
->bundles
[0], clause
->bundles
[0], true);
1067 assert(clause
->bundle_count
== 1);
1069 /* Used to decide if we elide writes */
1070 bool is_fragment
= ctx
->stage
== MESA_SHADER_FRAGMENT
;
1072 /* State for packing constants throughout */
1073 unsigned constant_index
= 0;
1075 struct bifrost_fmt1 quad_1
= {
1076 .tag
= clause
->constant_count
? BIFROST_FMT1_CONSTANTS
: BIFROST_FMT1_FINAL
,
1077 .header
= bi_pack_header(clause
, next
, is_fragment
),
1079 .ins_2
= ins_1
.hi
& ((1 << 11) - 1),
1080 .ins_0
= (ins_1
.hi
>> 11) & 0b111,
1083 util_dynarray_append(emission
, struct bifrost_fmt1
, quad_1
);
1085 /* Pack the remaining constants */
1087 while (constant_index
< clause
->constant_count
) {
1088 constant_index
+= bi_pack_constants(ctx
, clause
,
1089 constant_index
, emission
);
1094 bi_next_clause(bi_context
*ctx
, pan_block
*block
, bi_clause
*clause
)
1096 /* Try the next clause in this block */
1097 if (clause
->link
.next
!= &((bi_block
*) block
)->clauses
)
1098 return list_first_entry(&(clause
->link
), bi_clause
, link
);
1100 /* Try the next block, or the one after that if it's empty, etc .*/
1101 pan_block
*next_block
= pan_next_block(block
);
1103 bi_foreach_block_from(ctx
, next_block
, block
) {
1104 bi_block
*blk
= (bi_block
*) block
;
1106 if (!list_is_empty(&blk
->clauses
))
1107 return list_first_entry(&(blk
->clauses
), bi_clause
, link
);
1114 bi_pack(bi_context
*ctx
, struct util_dynarray
*emission
)
1116 util_dynarray_init(emission
, NULL
);
1118 bi_foreach_block(ctx
, _block
) {
1119 bi_block
*block
= (bi_block
*) _block
;
1121 bi_foreach_clause_in_block(block
, clause
) {
1122 bi_clause
*next
= bi_next_clause(ctx
, _block
, clause
);
1123 bi_pack_clause(ctx
, clause
, next
, emission
);