2 * Copyright (C) 2020 Collabora, Ltd.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
26 #define RETURN_PACKED(str) { \
28 memcpy(&temp, &str, sizeof(str)); \
32 /* This file contains the final passes of the compiler. Running after
33 * scheduling and RA, the IR is now finalized, so we need to emit it to actual
34 * bits on the wire (as well as fixup branches) */
37 bi_pack_header(bi_clause
*clause
, bi_clause
*next
, bool is_fragment
)
39 struct bifrost_header header
= {
40 .back_to_back
= clause
->back_to_back
,
41 .no_end_of_shader
= (next
!= NULL
),
42 .elide_writes
= is_fragment
,
43 .branch_cond
= clause
->branch_conditional
,
44 .datareg_writebarrier
= clause
->data_register_write_barrier
,
45 .datareg
= clause
->data_register
,
46 .scoreboard_deps
= next
? next
->dependencies
: 0,
47 .scoreboard_index
= clause
->scoreboard_id
,
48 .clause_type
= clause
->clause_type
,
49 .next_clause_type
= next
? next
->clause_type
: 0,
52 header
.branch_cond
|= header
.back_to_back
;
55 memcpy(&u
, &header
, sizeof(header
));
59 /* Represents the assignment of ports for a given bundle */
62 /* Register to assign to each port */
65 /* Read ports can be disabled */
68 /* Should we write FMA? what about ADD? If only a single port is
69 * enabled it is in port 2, else ADD/FMA is 2/3 respectively */
70 bool write_fma
, write_add
;
72 /* Should we read with port 3? */
75 /* Packed uniform/constant */
76 uint8_t uniform_constant
;
78 /* Whether writes are actually for the last instruction */
79 bool first_instruction
;
83 bi_print_ports(struct bi_registers
*regs
)
85 for (unsigned i
= 0; i
< 2; ++i
) {
87 printf("port %u: %u\n", i
, regs
->port
[i
]);
90 if (regs
->write_fma
|| regs
->write_add
) {
91 printf("port 2 (%s): %u\n",
92 regs
->write_add
? "ADD" : "FMA",
96 if ((regs
->write_fma
&& regs
->write_add
) || regs
->read_port3
) {
97 printf("port 3 (%s): %u\n",
98 regs
->read_port3
? "read" : "FMA",
103 /* The uniform/constant slot allows loading a contiguous 64-bit immediate or
104 * pushed uniform per bundle. Figure out which one we need in the bundle (the
105 * scheduler needs to ensure we only have one type per bundle), validate
106 * everything, and rewrite away the register/uniform indices to use 3-bit
107 * sources directly. */
110 bi_lookup_constant(bi_clause
*clause
, uint64_t cons
, bool *hi
, bool b64
)
112 uint64_t want
= (cons
>> 4);
114 for (unsigned i
= 0; i
< clause
->constant_count
; ++i
) {
115 /* Only check top 60-bits since that's what's actually embedded
116 * in the clause, the bottom 4-bits are bundle-inline */
118 unsigned candidates
[2] = {
119 clause
->constants
[i
] >> 4,
120 clause
->constants
[i
] >> 36
124 candidates
[0] &= 0xFFFFFFFF;
126 if (candidates
[0] == want
)
129 if (candidates
[1] == want
&& !b64
) {
135 unreachable("Invalid constant accessed");
139 bi_constant_field(unsigned idx
)
143 const unsigned values
[] = {
147 return values
[idx
] << 4;
151 bi_assign_uniform_constant_single(
152 struct bi_registers
*regs
,
154 bi_instruction
*ins
, bool assigned
, bool fast_zero
)
159 bi_foreach_src(ins
, s
) {
160 if (s
== 0 && (ins
->type
== BI_LOAD_VAR_ADDRESS
|| ins
->type
== BI_LOAD_ATTR
)) continue;
162 if (ins
->src
[s
] & BIR_INDEX_CONSTANT
) {
164 bool b64
= nir_alu_type_get_type_size(ins
->src_types
[s
]) > 32;
165 uint64_t cons
= bi_get_immediate(ins
, ins
->src
[s
]);
166 unsigned idx
= bi_lookup_constant(clause
, cons
, &hi
, b64
);
167 unsigned f
= bi_constant_field(idx
) | (cons
& 0xF);
169 if (assigned
&& regs
->uniform_constant
!= f
)
170 unreachable("Mismatched uniform/const field: imm");
172 regs
->uniform_constant
= f
;
173 ins
->src
[s
] = BIR_INDEX_PASS
| (hi
? BIFROST_SRC_CONST_HI
: BIFROST_SRC_CONST_LO
);
175 } else if (ins
->src
[s
] & BIR_INDEX_ZERO
&& (ins
->type
== BI_LOAD_UNIFORM
|| ins
->type
== BI_LOAD_VAR
)) {
176 /* XXX: HACK UNTIL WE HAVE HI MATCHING DUE TO OVERFLOW XXX */
177 ins
->src
[s
] = BIR_INDEX_PASS
| BIFROST_SRC_CONST_HI
;
178 } else if (ins
->src
[s
] & BIR_INDEX_ZERO
&& !fast_zero
) {
179 /* FMAs have a fast zero port, ADD needs to use the
180 * uniform/const port's special 0 mode handled here */
183 if (assigned
&& regs
->uniform_constant
!= f
)
184 unreachable("Mismatched uniform/const field: 0");
186 regs
->uniform_constant
= f
;
187 ins
->src
[s
] = BIR_INDEX_PASS
| BIFROST_SRC_CONST_LO
;
189 } else if (s
& BIR_INDEX_UNIFORM
) {
190 unreachable("Push uniforms not implemented yet");
198 bi_assign_uniform_constant(
200 struct bi_registers
*regs
,
204 bi_assign_uniform_constant_single(regs
, clause
, bundle
.fma
, false, true);
206 bi_assign_uniform_constant_single(regs
, clause
, bundle
.add
, assigned
, false);
209 /* Assigns a port for reading, before anything is written */
212 bi_assign_port_read(struct bi_registers
*regs
, unsigned src
)
214 /* We only assign for registers */
215 if (!(src
& BIR_INDEX_REGISTER
))
218 unsigned reg
= src
& ~BIR_INDEX_REGISTER
;
220 /* Check if we already assigned the port */
221 for (unsigned i
= 0; i
<= 1; ++i
) {
222 if (regs
->port
[i
] == reg
&& regs
->enabled
[i
])
226 if (regs
->port
[3] == reg
&& regs
->read_port3
)
231 for (unsigned i
= 0; i
<= 1; ++i
) {
232 if (!regs
->enabled
[i
]) {
234 regs
->enabled
[i
] = true;
239 if (!regs
->read_port3
) {
241 regs
->read_port3
= true;
245 bi_print_ports(regs
);
246 unreachable("Failed to find a free port for src");
249 static struct bi_registers
250 bi_assign_ports(bi_bundle now
, bi_bundle prev
)
252 struct bi_registers regs
= { 0 };
254 /* We assign ports for the main register mechanism. Special ops
255 * use the data registers, which has its own mechanism entirely
256 * and thus gets skipped over here. */
258 unsigned read_dreg
= now
.add
&&
259 bi_class_props
[now
.add
->type
] & BI_DATA_REG_SRC
;
261 unsigned write_dreg
= prev
.add
&&
262 bi_class_props
[prev
.add
->type
] & BI_DATA_REG_DEST
;
264 /* First, assign reads */
267 bi_foreach_src(now
.fma
, src
)
268 bi_assign_port_read(®s
, now
.fma
->src
[src
]);
271 bi_foreach_src(now
.add
, src
) {
272 if (!(src
== 0 && read_dreg
))
273 bi_assign_port_read(®s
, now
.add
->src
[src
]);
277 /* Next, assign writes */
279 if (prev
.add
&& prev
.add
->dest
& BIR_INDEX_REGISTER
&& !write_dreg
) {
280 regs
.port
[2] = prev
.add
->dest
& ~BIR_INDEX_REGISTER
;
281 regs
.write_add
= true;
284 if (prev
.fma
&& prev
.fma
->dest
& BIR_INDEX_REGISTER
) {
285 unsigned r
= prev
.fma
->dest
& ~BIR_INDEX_REGISTER
;
287 if (regs
.write_add
) {
288 /* Scheduler constraint: cannot read 3 and write 2 */
289 assert(!regs
.read_port3
);
295 regs
.write_fma
= true;
298 /* Finally, ensure port 1 > port 0 for the 63-x trick to function */
300 if (regs
.enabled
[0] && regs
.enabled
[1] && regs
.port
[1] < regs
.port
[0]) {
301 unsigned temp
= regs
.port
[0];
302 regs
.port
[0] = regs
.port
[1];
309 /* Determines the register control field, ignoring the first? flag */
311 static enum bifrost_reg_control
312 bi_pack_register_ctrl_lo(struct bi_registers r
)
316 assert(!r
.read_port3
);
317 return BIFROST_WRITE_ADD_P2_FMA_P3
;
320 return BIFROST_WRITE_FMA_P2_READ_P3
;
322 return BIFROST_WRITE_FMA_P2
;
324 } else if (r
.write_add
) {
326 return BIFROST_WRITE_ADD_P2_READ_P3
;
328 return BIFROST_WRITE_ADD_P2
;
329 } else if (r
.read_port3
)
330 return BIFROST_READ_P3
;
332 return BIFROST_REG_NONE
;
335 /* Ditto but account for the first? flag this time */
337 static enum bifrost_reg_control
338 bi_pack_register_ctrl(struct bi_registers r
)
340 enum bifrost_reg_control ctrl
= bi_pack_register_ctrl_lo(r
);
342 if (r
.first_instruction
) {
343 if (ctrl
== BIFROST_REG_NONE
)
344 ctrl
= BIFROST_FIRST_NONE
;
345 else if (ctrl
== BIFROST_WRITE_FMA_P2_READ_P3
)
346 ctrl
= BIFROST_FIRST_WRITE_FMA_P2_READ_P3
;
348 ctrl
|= BIFROST_FIRST_NONE
;
355 bi_pack_registers(struct bi_registers regs
)
357 enum bifrost_reg_control ctrl
= bi_pack_register_ctrl(regs
);
358 struct bifrost_regs s
= { 0 };
361 if (regs
.enabled
[1]) {
362 /* Gotta save that bit!~ Required by the 63-x trick */
363 assert(regs
.port
[1] > regs
.port
[0]);
364 assert(regs
.enabled
[0]);
366 /* Do the 63-x trick, see docs/disasm */
367 if (regs
.port
[0] > 31) {
368 regs
.port
[0] = 63 - regs
.port
[0];
369 regs
.port
[1] = 63 - regs
.port
[1];
372 assert(regs
.port
[0] <= 31);
373 assert(regs
.port
[1] <= 63);
376 s
.reg1
= regs
.port
[1];
377 s
.reg0
= regs
.port
[0];
379 /* Port 1 disabled, so set to zero and use port 1 for ctrl */
383 if (regs
.enabled
[0]) {
384 /* Bit 0 upper bit of port 0 */
385 s
.reg1
|= (regs
.port
[0] >> 5);
387 /* Rest of port 0 in usual spot */
388 s
.reg0
= (regs
.port
[0] & 0b11111);
390 /* Bit 1 set if port 0 also disabled */
395 /* When port 3 isn't used, we have to set it to port 2, and vice versa,
396 * or INSTR_INVALID_ENC is raised. The reason is unknown. */
398 bool has_port2
= regs
.write_fma
|| regs
.write_add
;
399 bool has_port3
= regs
.read_port3
|| (regs
.write_fma
&& regs
.write_add
);
402 regs
.port
[3] = regs
.port
[2];
405 regs
.port
[2] = regs
.port
[3];
407 s
.reg3
= regs
.port
[3];
408 s
.reg2
= regs
.port
[2];
409 s
.uniform_const
= regs
.uniform_constant
;
411 memcpy(&packed
, &s
, sizeof(s
));
416 bi_set_data_register(bi_clause
*clause
, unsigned idx
)
418 assert(idx
& BIR_INDEX_REGISTER
);
419 unsigned reg
= idx
& ~BIR_INDEX_REGISTER
;
421 clause
->data_register
= reg
;
425 bi_read_data_register(bi_clause
*clause
, bi_instruction
*ins
)
427 bi_set_data_register(clause
, ins
->src
[0]);
431 bi_write_data_register(bi_clause
*clause
, bi_instruction
*ins
)
433 bi_set_data_register(clause
, ins
->dest
);
436 static enum bifrost_packed_src
437 bi_get_src_reg_port(struct bi_registers
*regs
, unsigned src
)
439 unsigned reg
= src
& ~BIR_INDEX_REGISTER
;
441 if (regs
->port
[0] == reg
&& regs
->enabled
[0])
442 return BIFROST_SRC_PORT0
;
443 else if (regs
->port
[1] == reg
&& regs
->enabled
[1])
444 return BIFROST_SRC_PORT1
;
445 else if (regs
->port
[3] == reg
&& regs
->read_port3
)
446 return BIFROST_SRC_PORT3
;
448 unreachable("Tried to access register with no port");
451 static enum bifrost_packed_src
452 bi_get_src(bi_instruction
*ins
, struct bi_registers
*regs
, unsigned s
, bool is_fma
)
454 unsigned src
= ins
->src
[s
];
456 if (src
& BIR_INDEX_REGISTER
)
457 return bi_get_src_reg_port(regs
, src
);
458 else if (src
& BIR_INDEX_ZERO
&& is_fma
)
459 return BIFROST_SRC_STAGE
;
460 else if (src
& BIR_INDEX_PASS
)
461 return src
& ~BIR_INDEX_PASS
;
463 unreachable("Unknown src");
466 /* Constructs a packed 2-bit swizzle for a 16-bit vec2 source. Source must be
467 * 16-bit and written components must correspond to valid swizzles (component x
471 bi_swiz16(bi_instruction
*ins
, unsigned src
)
473 assert(nir_alu_type_get_type_size(ins
->src_types
[src
]) == 16);
474 unsigned swizzle
= 0;
476 for (unsigned c
= 0; c
< 2; ++c
) {
477 if (!bi_writes_component(ins
, src
)) continue;
479 unsigned k
= ins
->swizzle
[src
][c
];
488 bi_pack_fma_fma(bi_instruction
*ins
, struct bi_registers
*regs
)
490 /* (-a)(-b) = ab, so we only need one negate bit */
491 bool negate_mul
= ins
->src_neg
[0] ^ ins
->src_neg
[1];
493 if (ins
->dest_type
== nir_type_float32
) {
494 struct bifrost_fma_fma pack
= {
495 .src0
= bi_get_src(ins
, regs
, 0, true),
496 .src1
= bi_get_src(ins
, regs
, 1, true),
497 .src2
= bi_get_src(ins
, regs
, 2, true),
498 .src0_abs
= ins
->src_abs
[0],
499 .src1_abs
= ins
->src_abs
[1],
500 .src2_abs
= ins
->src_abs
[2],
501 .src0_neg
= negate_mul
,
502 .src2_neg
= ins
->src_neg
[2],
503 .outmod
= ins
->outmod
,
504 .roundmode
= ins
->roundmode
,
505 .op
= BIFROST_FMA_OP_FMA
509 } else if (ins
->dest_type
== nir_type_float16
) {
510 struct bifrost_fma_fma16 pack
= {
511 .src0
= bi_get_src(ins
, regs
, 0, true),
512 .src1
= bi_get_src(ins
, regs
, 1, true),
513 .src2
= bi_get_src(ins
, regs
, 2, true),
514 .swizzle_0
= bi_swiz16(ins
, 0),
515 .swizzle_1
= bi_swiz16(ins
, 1),
516 .swizzle_2
= bi_swiz16(ins
, 2),
517 .src0_neg
= negate_mul
,
518 .src2_neg
= ins
->src_neg
[2],
519 .outmod
= ins
->outmod
,
520 .roundmode
= ins
->roundmode
,
521 .op
= BIFROST_FMA_OP_FMA16
526 unreachable("Invalid fma dest type");
531 bi_pack_fma_addmin_f32(bi_instruction
*ins
, struct bi_registers
*regs
)
534 (ins
->type
== BI_ADD
) ? BIFROST_FMA_OP_FADD32
:
535 (ins
->op
.minmax
== BI_MINMAX_MIN
) ? BIFROST_FMA_OP_FMIN32
:
536 BIFROST_FMA_OP_FMAX32
;
538 struct bifrost_fma_add pack
= {
539 .src0
= bi_get_src(ins
, regs
, 0, true),
540 .src1
= bi_get_src(ins
, regs
, 1, true),
541 .src0_abs
= ins
->src_abs
[0],
542 .src1_abs
= ins
->src_abs
[1],
543 .src0_neg
= ins
->src_neg
[0],
544 .src1_neg
= ins
->src_neg
[1],
546 .outmod
= ins
->outmod
,
547 .roundmode
= (ins
->type
== BI_ADD
) ? ins
->roundmode
: ins
->minmax
,
555 bi_pack_fma_addmin_f16(bi_instruction
*ins
, struct bi_registers
*regs
)
558 (ins
->type
== BI_ADD
) ? BIFROST_FMA_OP_FADD16
:
559 (ins
->op
.minmax
== BI_MINMAX_MIN
) ? BIFROST_FMA_OP_FMIN16
:
560 BIFROST_FMA_OP_FMAX16
;
562 /* Absolute values are packed in a quirky way. Let k = src1 < src0. Let
563 * l be an auxiliary bit we encode. Then the hardware determines:
568 * Since add/min/max are commutative, this saves a bit by using the
569 * order of the operands as a bit (k). To pack this, first note:
571 * (l && k) implies (l || k).
573 * That is, if the second argument is abs'd, then the first argument
574 * also has abs. So there are three cases:
576 * Case 0: Neither src has absolute value. Then we have l = k = 0.
578 * Case 1: Exactly one src has absolute value. Assign that source to
579 * src0 and the other source to src1. Compute k = src1 < src0 based on
580 * that assignment. Then l = ~k.
582 * Case 2: Both sources have absolute value. Then we have l = k = 1.
583 * Note to force k = 1 requires that (src1 < src0) OR (src0 < src1).
584 * That is, this encoding is only valid if src1 and src0 are distinct.
585 * This is a scheduling restriction (XXX); if an op of this type
586 * requires both identical sources to have abs value, then we must
587 * schedule to ADD (which does not use this ordering trick).
590 unsigned abs_0
= ins
->src_abs
[0], abs_1
= ins
->src_abs
[1];
591 unsigned src_0
= bi_get_src(ins
, regs
, 0, true);
592 unsigned src_1
= bi_get_src(ins
, regs
, 1, true);
596 if (!abs_0
&& !abs_1
) {
597 /* Force k = 0 <===> NOT(src1 < src0) */
598 flip
= (src_1
< src_0
);
599 } else if (abs_0
&& !abs_1
) {
601 } else if (abs_1
&& !abs_0
) {
605 flip
= (src_0
>= src_1
);
609 struct bifrost_fma_add_minmax16 pack
= {
610 .src0
= flip
? src_1
: src_0
,
611 .src1
= flip
? src_0
: src_1
,
612 .src0_neg
= ins
->src_neg
[flip
? 1 : 0],
613 .src1_neg
= ins
->src_neg
[flip
? 0 : 1],
615 .outmod
= ins
->outmod
,
616 .mode
= (ins
->type
== BI_ADD
) ? ins
->roundmode
: ins
->minmax
,
624 bi_pack_fma_addmin(bi_instruction
*ins
, struct bi_registers
*regs
)
626 if (ins
->dest_type
== nir_type_float32
)
627 return bi_pack_fma_addmin_f32(ins
, regs
);
628 else if(ins
->dest_type
== nir_type_float16
)
629 return bi_pack_fma_addmin_f16(ins
, regs
);
631 unreachable("Unknown FMA/ADD type");
635 bi_pack_fma_1src(bi_instruction
*ins
, struct bi_registers
*regs
, unsigned op
)
637 struct bifrost_fma_inst pack
= {
638 .src0
= bi_get_src(ins
, regs
, 0, true),
646 bi_pack_add_1src(bi_instruction
*ins
, struct bi_registers
*regs
, unsigned op
)
648 struct bifrost_add_inst pack
= {
649 .src0
= bi_get_src(ins
, regs
, 0, true),
656 static enum bifrost_csel_cond
657 bi_cond_to_csel(enum bi_cond cond
, bool *flip
, bool *invert
, nir_alu_type T
)
659 nir_alu_type B
= nir_alu_type_get_base_type(T
);
660 unsigned idx
= (B
== nir_type_float
) ? 0 :
661 ((B
== nir_type_int
) ? 1 : 2);
667 const enum bifrost_csel_cond ops
[] = {
678 const enum bifrost_csel_cond ops
[] = {
689 const enum bifrost_csel_cond ops
[] = {
692 BIFROST_IEQ_F
/* sign is irrelevant */
698 unreachable("Invalid op for csel");
703 bi_pack_fma_csel(bi_instruction
*ins
, struct bi_registers
*regs
)
705 /* TODO: Use csel3 as well */
706 bool flip
= false, invert
= false;
708 enum bifrost_csel_cond cond
=
709 bi_cond_to_csel(ins
->csel_cond
, &flip
, &invert
, ins
->src_types
[0]);
711 unsigned size
= nir_alu_type_get_type_size(ins
->dest_type
);
713 unsigned cmp_0
= (flip
? 1 : 0);
714 unsigned cmp_1
= (flip
? 0 : 1);
715 unsigned res_0
= (invert
? 3 : 2);
716 unsigned res_1
= (invert
? 2 : 3);
718 struct bifrost_csel4 pack
= {
719 .src0
= bi_get_src(ins
, regs
, cmp_0
, true),
720 .src1
= bi_get_src(ins
, regs
, cmp_1
, true),
721 .src2
= bi_get_src(ins
, regs
, res_0
, true),
722 .src3
= bi_get_src(ins
, regs
, res_1
, true),
724 .op
= (size
== 16) ? BIFROST_FMA_OP_CSEL4_V16
:
731 /* We have a single convert opcode in the IR but a number of opcodes that could
732 * come out. In particular we have native opcodes for:
734 * [ui]16 --> [fui]32 -- int16_to_32
735 * f16 --> f32 -- float16_to_32
736 * f32 --> f16 -- float32_to_16
737 * f32 --> [ui]32 -- float32_to_int
738 * [ui]32 --> f32 -- int_to_float32
739 * [fui]16 --> [fui]16 -- f2i_i2f16
743 bi_pack_fma_convert(bi_instruction
*ins
, struct bi_registers
*regs
)
745 nir_alu_type from_base
= nir_alu_type_get_base_type(ins
->src_types
[0]);
746 unsigned from_size
= nir_alu_type_get_type_size(ins
->src_types
[0]);
747 bool from_unsigned
= from_base
== nir_type_uint
;
749 nir_alu_type to_base
= nir_alu_type_get_base_type(ins
->dest_type
);
750 unsigned to_size
= nir_alu_type_get_type_size(ins
->dest_type
);
751 bool to_unsigned
= to_base
== nir_type_uint
;
752 bool to_float
= to_base
== nir_type_float
;
755 assert((from_base
!= to_base
) || (from_size
!= to_size
));
756 assert((MAX2(from_size
, to_size
) / MIN2(from_size
, to_size
)) <= 2);
758 /* f32 to f16 is special */
759 if (from_size
== 32 && to_size
== 16 && from_base
== nir_type_float
&& to_base
== from_base
) {
760 /* TODO: second vectorized source? */
761 struct bifrost_fma_2src pack
= {
762 .src0
= bi_get_src(ins
, regs
, 0, true),
763 .src1
= BIFROST_SRC_STAGE
, /* 0 */
764 .op
= BIFROST_FMA_FLOAT32_TO_16
770 /* Otherwise, figure out the mode */
773 if (from_size
== 16 && to_size
== 32) {
774 unsigned component
= ins
->swizzle
[0][0];
775 assert(component
<= 1);
777 if (from_base
== nir_type_float
)
778 op
= BIFROST_CONVERT_5(component
);
780 op
= BIFROST_CONVERT_4(from_unsigned
, component
, to_float
);
783 unsigned swizzle
= (from_size
== 16) ? bi_swiz16(ins
, 0) : 0;
784 bool is_unsigned
= from_unsigned
;
786 if (from_base
== nir_type_float
) {
787 assert(to_base
!= nir_type_float
);
788 is_unsigned
= to_unsigned
;
790 if (from_size
== 32 && to_size
== 32)
791 mode
= BIFROST_CONV_F32_TO_I32
;
792 else if (from_size
== 16 && to_size
== 16)
793 mode
= BIFROST_CONV_F16_TO_I16
;
795 unreachable("Invalid float conversion");
797 assert(to_base
== nir_type_float
);
798 assert(from_size
== to_size
);
801 mode
= BIFROST_CONV_I32_TO_F32
;
802 else if (to_size
== 16)
803 mode
= BIFROST_CONV_I16_TO_F16
;
805 unreachable("Invalid int conversion");
808 /* Fixup swizzle for 32-bit only modes */
810 if (mode
== BIFROST_CONV_I32_TO_F32
)
812 else if (mode
== BIFROST_CONV_F32_TO_I32
)
815 op
= BIFROST_CONVERT(is_unsigned
, ins
->roundmode
, swizzle
, mode
);
817 /* Unclear what the top bit is for... maybe 16-bit related */
818 bool mode2
= mode
== BIFROST_CONV_F16_TO_I16
;
819 bool mode6
= mode
== BIFROST_CONV_I16_TO_F16
;
821 if (!(mode2
|| mode6
))
825 return bi_pack_fma_1src(ins
, regs
, BIFROST_FMA_CONVERT
| op
);
829 bi_pack_fma(bi_clause
*clause
, bi_bundle bundle
, struct bi_registers
*regs
)
832 return BIFROST_FMA_NOP
;
834 switch (bundle
.fma
->type
) {
836 return bi_pack_fma_addmin(bundle
.fma
, regs
);
839 return BIFROST_FMA_NOP
;
841 return bi_pack_fma_convert(bundle
.fma
, regs
);
843 return bi_pack_fma_csel(bundle
.fma
, regs
);
845 return bi_pack_fma_fma(bundle
.fma
, regs
);
848 return BIFROST_FMA_NOP
;
850 return bi_pack_fma_addmin(bundle
.fma
, regs
);
852 return bi_pack_fma_1src(bundle
.fma
, regs
, BIFROST_FMA_OP_MOV
);
856 return BIFROST_FMA_NOP
;
858 unreachable("Cannot encode class as FMA");
863 bi_pack_add_ld_vary(bi_clause
*clause
, bi_instruction
*ins
, struct bi_registers
*regs
)
865 unsigned size
= nir_alu_type_get_type_size(ins
->dest_type
);
866 assert(size
== 32 || size
== 16);
868 unsigned op
= (size
== 32) ?
869 BIFROST_ADD_OP_LD_VAR_32
:
870 BIFROST_ADD_OP_LD_VAR_16
;
872 unsigned cmask
= bi_from_bytemask(ins
->writemask
, size
/ 8);
873 unsigned channels
= util_bitcount(cmask
);
874 assert(cmask
== ((1 << channels
) - 1));
876 unsigned packed_addr
= 0;
878 if (ins
->src
[0] & BIR_INDEX_CONSTANT
) {
879 /* Direct uses address field directly */
880 packed_addr
= bi_get_immediate(ins
, ins
->src
[0]);
881 assert(packed_addr
< 0b1000);
883 /* Indirect gets an extra source */
884 packed_addr
= bi_get_src(ins
, regs
, 0, false) | 0b11000;
887 /* The destination is thrown in the data register */
888 assert(ins
->dest
& BIR_INDEX_REGISTER
);
889 clause
->data_register
= ins
->dest
& ~BIR_INDEX_REGISTER
;
891 assert(channels
>= 1 && channels
<= 4);
893 struct bifrost_ld_var pack
= {
894 .src0
= bi_get_src(ins
, regs
, 1, false),
896 .channels
= MALI_POSITIVE(channels
),
897 .interp_mode
= ins
->load_vary
.interp_mode
,
898 .reuse
= ins
->load_vary
.reuse
,
899 .flat
= ins
->load_vary
.flat
,
907 bi_pack_add_2src(bi_instruction
*ins
, struct bi_registers
*regs
, unsigned op
)
909 struct bifrost_add_2src pack
= {
910 .src0
= bi_get_src(ins
, regs
, 0, true),
911 .src1
= bi_get_src(ins
, regs
, 1, true),
919 bi_pack_add_addmin_f32(bi_instruction
*ins
, struct bi_registers
*regs
)
922 (ins
->type
== BI_ADD
) ? BIFROST_ADD_OP_FADD32
:
923 (ins
->op
.minmax
== BI_MINMAX_MIN
) ? BIFROST_ADD_OP_FMIN32
:
924 BIFROST_ADD_OP_FMAX32
;
926 struct bifrost_add_faddmin pack
= {
927 .src0
= bi_get_src(ins
, regs
, 0, true),
928 .src1
= bi_get_src(ins
, regs
, 1, true),
929 .src0_abs
= ins
->src_abs
[0],
930 .src1_abs
= ins
->src_abs
[1],
931 .src0_neg
= ins
->src_neg
[0],
932 .src1_neg
= ins
->src_neg
[1],
933 .outmod
= ins
->outmod
,
934 .mode
= (ins
->type
== BI_ADD
) ? ins
->roundmode
: ins
->minmax
,
942 bi_pack_add_addmin(bi_instruction
*ins
, struct bi_registers
*regs
)
944 if (ins
->dest_type
== nir_type_float32
)
945 return bi_pack_add_addmin_f32(ins
, regs
);
946 else if(ins
->dest_type
== nir_type_float16
)
948 //return bi_pack_add_addmin_f16(ins, regs);
950 unreachable("Unknown FMA/ADD type");
954 bi_pack_add_ld_ubo(bi_clause
*clause
, bi_instruction
*ins
, struct bi_registers
*regs
)
956 unsigned components
= bi_load32_components(ins
);
958 const unsigned ops
[4] = {
959 BIFROST_ADD_OP_LD_UBO_1
,
960 BIFROST_ADD_OP_LD_UBO_2
,
961 BIFROST_ADD_OP_LD_UBO_3
,
962 BIFROST_ADD_OP_LD_UBO_4
965 bi_write_data_register(clause
, ins
);
966 return bi_pack_add_2src(ins
, regs
, ops
[components
- 1]);
969 static enum bifrost_ldst_type
970 bi_pack_ldst_type(nir_alu_type T
)
973 case nir_type_float16
: return BIFROST_LDST_F16
;
974 case nir_type_float32
: return BIFROST_LDST_F32
;
975 case nir_type_int32
: return BIFROST_LDST_I32
;
976 case nir_type_uint32
: return BIFROST_LDST_U32
;
977 default: unreachable("Invalid type loaded");
982 bi_pack_add_ld_var_addr(bi_clause
*clause
, bi_instruction
*ins
, struct bi_registers
*regs
)
984 struct bifrost_ld_var_addr pack
= {
985 .src0
= bi_get_src(ins
, regs
, 1, false),
986 .src1
= bi_get_src(ins
, regs
, 2, false),
987 .location
= bi_get_immediate(ins
, ins
->src
[0]),
988 .type
= bi_pack_ldst_type(ins
->src_types
[3]),
989 .op
= BIFROST_ADD_OP_LD_VAR_ADDR
992 bi_write_data_register(clause
, ins
);
997 bi_pack_add_ld_attr(bi_clause
*clause
, bi_instruction
*ins
, struct bi_registers
*regs
)
999 struct bifrost_ld_attr pack
= {
1000 .src0
= bi_get_src(ins
, regs
, 1, false),
1001 .src1
= bi_get_src(ins
, regs
, 2, false),
1002 .location
= bi_get_immediate(ins
, ins
->src
[0]),
1003 .channels
= MALI_POSITIVE(bi_load32_components(ins
)),
1004 .type
= bi_pack_ldst_type(ins
->dest_type
),
1005 .op
= BIFROST_ADD_OP_LD_ATTR
1008 bi_write_data_register(clause
, ins
);
1009 RETURN_PACKED(pack
);
1013 bi_pack_add_st_vary(bi_clause
*clause
, bi_instruction
*ins
, struct bi_registers
*regs
)
1015 assert(ins
->store_channels
>= 1 && ins
->store_channels
<= 4);
1017 struct bifrost_st_vary pack
= {
1018 .src0
= bi_get_src(ins
, regs
, 1, false),
1019 .src1
= bi_get_src(ins
, regs
, 2, false),
1020 .src2
= bi_get_src(ins
, regs
, 3, false),
1021 .channels
= MALI_POSITIVE(ins
->store_channels
),
1022 .op
= BIFROST_ADD_OP_ST_VAR
1025 bi_read_data_register(clause
, ins
);
1026 RETURN_PACKED(pack
);
1030 bi_pack_add_atest(bi_clause
*clause
, bi_instruction
*ins
, struct bi_registers
*regs
)
1033 assert(ins
->src_types
[1] == nir_type_float32
);
1035 struct bifrost_add_atest pack
= {
1036 .src0
= bi_get_src(ins
, regs
, 0, false),
1037 .src1
= bi_get_src(ins
, regs
, 1, false),
1038 .component
= 1, /* Set for fp32 */
1039 .op
= BIFROST_ADD_OP_ATEST
,
1042 /* Despite *also* writing with the usual mechanism... quirky and
1043 * perhaps unnecessary, but let's match the blob */
1044 clause
->data_register
= ins
->dest
& ~BIR_INDEX_REGISTER
;
1046 RETURN_PACKED(pack
);
1050 bi_pack_add_blend(bi_clause
*clause
, bi_instruction
*ins
, struct bi_registers
*regs
)
1052 struct bifrost_add_inst pack
= {
1053 .src0
= bi_get_src(ins
, regs
, 1, false),
1054 .op
= BIFROST_ADD_OP_BLEND
1057 /* TODO: Pack location in uniform_const */
1058 assert(ins
->blend_location
== 0);
1060 bi_read_data_register(clause
, ins
);
1061 RETURN_PACKED(pack
);
1065 bi_pack_add_special(bi_instruction
*ins
, struct bi_registers
*regs
)
1068 bool fp16
= ins
->dest_type
== nir_type_float16
;
1069 bool Y
= ins
->swizzle
[0][0];
1071 if (ins
->op
.special
== BI_SPECIAL_FRCP
) {
1073 (Y
? BIFROST_ADD_OP_FRCP_FAST_F16_Y
:
1074 BIFROST_ADD_OP_FRCP_FAST_F16_X
) :
1075 BIFROST_ADD_OP_FRCP_FAST_F32
;
1078 (Y
? BIFROST_ADD_OP_FRSQ_FAST_F16_Y
:
1079 BIFROST_ADD_OP_FRSQ_FAST_F16_X
) :
1080 BIFROST_ADD_OP_FRSQ_FAST_F32
;
1084 return bi_pack_add_1src(ins
, regs
, op
);
1088 bi_pack_add(bi_clause
*clause
, bi_bundle bundle
, struct bi_registers
*regs
)
1091 return BIFROST_ADD_NOP
;
1093 switch (bundle
.add
->type
) {
1095 return bi_pack_add_addmin(bundle
.add
, regs
);
1097 return bi_pack_add_atest(clause
, bundle
.add
, regs
);
1100 return BIFROST_ADD_NOP
;
1102 return bi_pack_add_blend(clause
, bundle
.add
, regs
);
1109 return BIFROST_ADD_NOP
;
1111 return bi_pack_add_ld_attr(clause
, bundle
.add
, regs
);
1112 case BI_LOAD_UNIFORM
:
1113 return bi_pack_add_ld_ubo(clause
, bundle
.add
, regs
);
1115 return bi_pack_add_ld_vary(clause
, bundle
.add
, regs
);
1116 case BI_LOAD_VAR_ADDRESS
:
1117 return bi_pack_add_ld_var_addr(clause
, bundle
.add
, regs
);
1119 return bi_pack_add_addmin(bundle
.add
, regs
);
1123 return BIFROST_ADD_NOP
;
1125 return bi_pack_add_st_vary(clause
, bundle
.add
, regs
);
1127 return bi_pack_add_special(bundle
.add
, regs
);
1131 return BIFROST_ADD_NOP
;
1133 unreachable("Cannot encode class as ADD");
1137 struct bi_packed_bundle
{
1142 static struct bi_packed_bundle
1143 bi_pack_bundle(bi_clause
*clause
, bi_bundle bundle
, bi_bundle prev
, bool first_bundle
)
1145 struct bi_registers regs
= bi_assign_ports(bundle
, prev
);
1146 bi_assign_uniform_constant(clause
, ®s
, bundle
);
1147 regs
.first_instruction
= first_bundle
;
1149 uint64_t reg
= bi_pack_registers(regs
);
1150 uint64_t fma
= bi_pack_fma(clause
, bundle
, ®s
);
1151 uint64_t add
= bi_pack_add(clause
, bundle
, ®s
);
1153 struct bi_packed_bundle packed
= {
1154 .lo
= reg
| (fma
<< 35) | ((add
& 0b111111) << 58),
1161 /* Packs the next two constants as a dedicated constant quadword at the end of
1162 * the clause, returning the number packed. */
1165 bi_pack_constants(bi_context
*ctx
, bi_clause
*clause
,
1167 struct util_dynarray
*emission
)
1169 /* After these two, are we done? Determines tag */
1170 bool done
= clause
->constant_count
<= (index
+ 2);
1171 bool only
= clause
->constant_count
<= (index
+ 1);
1174 assert(index
== 0 && clause
->bundle_count
== 1);
1176 struct bifrost_fmt_constant quad
= {
1177 .pos
= 0, /* TODO */
1178 .tag
= done
? BIFROST_FMTC_FINAL
: BIFROST_FMTC_CONSTANTS
,
1179 .imm_1
= clause
->constants
[index
+ 0] >> 4,
1180 .imm_2
= only
? 0 : clause
->constants
[index
+ 1] >> 4
1183 /* XXX: On G71, Connor observed that the difference of the top 4 bits
1184 * of the second constant with the first must be less than 8, otherwise
1185 * we have to swap them. I am not able to reproduce this on G52,
1186 * further investigation needed. Possibly an errata. XXX */
1188 util_dynarray_append(emission
, struct bifrost_fmt_constant
, quad
);
1194 bi_pack_clause(bi_context
*ctx
, bi_clause
*clause
, bi_clause
*next
,
1195 struct util_dynarray
*emission
)
1197 struct bi_packed_bundle ins_1
= bi_pack_bundle(clause
, clause
->bundles
[0], clause
->bundles
[0], true);
1198 assert(clause
->bundle_count
== 1);
1200 /* Used to decide if we elide writes */
1201 bool is_fragment
= ctx
->stage
== MESA_SHADER_FRAGMENT
;
1203 /* State for packing constants throughout */
1204 unsigned constant_index
= 0;
1206 struct bifrost_fmt1 quad_1
= {
1207 .tag
= clause
->constant_count
? BIFROST_FMT1_CONSTANTS
: BIFROST_FMT1_FINAL
,
1208 .header
= bi_pack_header(clause
, next
, is_fragment
),
1210 .ins_2
= ins_1
.hi
& ((1 << 11) - 1),
1211 .ins_0
= (ins_1
.hi
>> 11) & 0b111,
1214 util_dynarray_append(emission
, struct bifrost_fmt1
, quad_1
);
1216 /* Pack the remaining constants */
1218 while (constant_index
< clause
->constant_count
) {
1219 constant_index
+= bi_pack_constants(ctx
, clause
,
1220 constant_index
, emission
);
1225 bi_next_clause(bi_context
*ctx
, pan_block
*block
, bi_clause
*clause
)
1227 /* Try the next clause in this block */
1228 if (clause
->link
.next
!= &((bi_block
*) block
)->clauses
)
1229 return list_first_entry(&(clause
->link
), bi_clause
, link
);
1231 /* Try the next block, or the one after that if it's empty, etc .*/
1232 pan_block
*next_block
= pan_next_block(block
);
1234 bi_foreach_block_from(ctx
, next_block
, block
) {
1235 bi_block
*blk
= (bi_block
*) block
;
1237 if (!list_is_empty(&blk
->clauses
))
1238 return list_first_entry(&(blk
->clauses
), bi_clause
, link
);
1245 bi_pack(bi_context
*ctx
, struct util_dynarray
*emission
)
1247 util_dynarray_init(emission
, NULL
);
1249 bi_foreach_block(ctx
, _block
) {
1250 bi_block
*block
= (bi_block
*) _block
;
1252 bi_foreach_clause_in_block(block
, clause
) {
1253 bi_clause
*next
= bi_next_clause(ctx
, _block
, clause
);
1254 bi_pack_clause(ctx
, clause
, next
, emission
);