2 * Copyright (C) 2020 Collabora, Ltd.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
26 #define RETURN_PACKED(str) { \
28 memcpy(&temp, &str, sizeof(str)); \
32 /* This file contains the final passes of the compiler. Running after
33 * scheduling and RA, the IR is now finalized, so we need to emit it to actual
34 * bits on the wire (as well as fixup branches) */
37 bi_pack_header(bi_clause
*clause
, bi_clause
*next
, bool is_fragment
)
39 struct bifrost_header header
= {
40 .back_to_back
= clause
->back_to_back
,
41 .no_end_of_shader
= (next
!= NULL
),
42 .elide_writes
= is_fragment
,
43 .branch_cond
= clause
->branch_conditional
,
44 .datareg_writebarrier
= clause
->data_register_write_barrier
,
45 .datareg
= clause
->data_register
,
46 .scoreboard_deps
= next
? next
->dependencies
: 0,
47 .scoreboard_index
= clause
->scoreboard_id
,
48 .clause_type
= clause
->clause_type
,
49 .next_clause_type
= next
? next
->clause_type
: 0,
52 header
.branch_cond
|= header
.back_to_back
;
55 memcpy(&u
, &header
, sizeof(header
));
59 /* Represents the assignment of ports for a given bundle */
62 /* Register to assign to each port */
65 /* Read ports can be disabled */
68 /* Should we write FMA? what about ADD? If only a single port is
69 * enabled it is in port 2, else ADD/FMA is 2/3 respectively */
70 bool write_fma
, write_add
;
72 /* Should we read with port 3? */
75 /* Packed uniform/constant */
76 uint8_t uniform_constant
;
78 /* Whether writes are actually for the last instruction */
79 bool first_instruction
;
83 bi_print_ports(struct bi_registers
*regs
)
85 for (unsigned i
= 0; i
< 2; ++i
) {
87 printf("port %u: %u\n", i
, regs
->port
[i
]);
90 if (regs
->write_fma
|| regs
->write_add
) {
91 printf("port 2 (%s): %u\n",
92 regs
->write_add
? "ADD" : "FMA",
96 if ((regs
->write_fma
&& regs
->write_add
) || regs
->read_port3
) {
97 printf("port 3 (%s): %u\n",
98 regs
->read_port3
? "read" : "FMA",
103 /* The uniform/constant slot allows loading a contiguous 64-bit immediate or
104 * pushed uniform per bundle. Figure out which one we need in the bundle (the
105 * scheduler needs to ensure we only have one type per bundle), validate
106 * everything, and rewrite away the register/uniform indices to use 3-bit
107 * sources directly. */
110 bi_lookup_constant(bi_clause
*clause
, uint64_t cons
, bool *hi
, bool b64
)
112 uint64_t want
= (cons
>> 4);
114 for (unsigned i
= 0; i
< clause
->constant_count
; ++i
) {
115 /* Only check top 60-bits since that's what's actually embedded
116 * in the clause, the bottom 4-bits are bundle-inline */
118 unsigned candidates
[2] = {
119 clause
->constants
[i
] >> 4,
120 clause
->constants
[i
] >> 36
124 candidates
[0] &= 0xFFFFFFFF;
126 if (candidates
[0] == want
)
129 if (candidates
[1] == want
&& !b64
) {
135 unreachable("Invalid constant accessed");
139 bi_constant_field(unsigned idx
)
143 const unsigned values
[] = {
147 return values
[idx
] << 4;
151 bi_assign_uniform_constant_single(
152 struct bi_registers
*regs
,
154 bi_instruction
*ins
, bool assigned
, bool fast_zero
)
159 bi_foreach_src(ins
, s
) {
160 if (s
== 0 && (ins
->type
== BI_LOAD_VAR_ADDRESS
|| ins
->type
== BI_LOAD_ATTR
)) continue;
162 if (ins
->src
[s
] & BIR_INDEX_CONSTANT
) {
164 bool b64
= nir_alu_type_get_type_size(ins
->src_types
[s
]) > 32;
165 uint64_t cons
= bi_get_immediate(ins
, ins
->src
[s
]);
166 unsigned idx
= bi_lookup_constant(clause
, cons
, &hi
, b64
);
167 unsigned f
= bi_constant_field(idx
) | (cons
& 0xF);
169 if (assigned
&& regs
->uniform_constant
!= f
)
170 unreachable("Mismatched uniform/const field: imm");
172 regs
->uniform_constant
= f
;
173 ins
->src
[s
] = BIR_INDEX_PASS
| (hi
? BIFROST_SRC_CONST_HI
: BIFROST_SRC_CONST_LO
);
175 } else if (ins
->src
[s
] & BIR_INDEX_ZERO
&& (ins
->type
== BI_LOAD_UNIFORM
|| ins
->type
== BI_LOAD_VAR
)) {
176 /* XXX: HACK UNTIL WE HAVE HI MATCHING DUE TO OVERFLOW XXX */
177 ins
->src
[s
] = BIR_INDEX_PASS
| BIFROST_SRC_CONST_HI
;
178 } else if (ins
->src
[s
] & BIR_INDEX_ZERO
&& !fast_zero
) {
179 /* FMAs have a fast zero port, ADD needs to use the
180 * uniform/const port's special 0 mode handled here */
183 if (assigned
&& regs
->uniform_constant
!= f
)
184 unreachable("Mismatched uniform/const field: 0");
186 regs
->uniform_constant
= f
;
187 ins
->src
[s
] = BIR_INDEX_PASS
| BIFROST_SRC_CONST_LO
;
189 } else if (s
& BIR_INDEX_UNIFORM
) {
190 unreachable("Push uniforms not implemented yet");
198 bi_assign_uniform_constant(
200 struct bi_registers
*regs
,
204 bi_assign_uniform_constant_single(regs
, clause
, bundle
.fma
, false, true);
206 bi_assign_uniform_constant_single(regs
, clause
, bundle
.add
, assigned
, false);
209 /* Assigns a port for reading, before anything is written */
212 bi_assign_port_read(struct bi_registers
*regs
, unsigned src
)
214 /* We only assign for registers */
215 if (!(src
& BIR_INDEX_REGISTER
))
218 unsigned reg
= src
& ~BIR_INDEX_REGISTER
;
220 /* Check if we already assigned the port */
221 for (unsigned i
= 0; i
<= 1; ++i
) {
222 if (regs
->port
[i
] == reg
&& regs
->enabled
[i
])
226 if (regs
->port
[3] == reg
&& regs
->read_port3
)
231 for (unsigned i
= 0; i
<= 1; ++i
) {
232 if (!regs
->enabled
[i
]) {
234 regs
->enabled
[i
] = true;
239 if (!regs
->read_port3
) {
241 regs
->read_port3
= true;
245 bi_print_ports(regs
);
246 unreachable("Failed to find a free port for src");
249 static struct bi_registers
250 bi_assign_ports(bi_bundle now
, bi_bundle prev
)
252 struct bi_registers regs
= { 0 };
254 /* We assign ports for the main register mechanism. Special ops
255 * use the data registers, which has its own mechanism entirely
256 * and thus gets skipped over here. */
258 unsigned read_dreg
= now
.add
&&
259 bi_class_props
[now
.add
->type
] & BI_DATA_REG_SRC
;
261 unsigned write_dreg
= prev
.add
&&
262 bi_class_props
[prev
.add
->type
] & BI_DATA_REG_DEST
;
264 /* First, assign reads */
267 bi_foreach_src(now
.fma
, src
)
268 bi_assign_port_read(®s
, now
.fma
->src
[src
]);
271 bi_foreach_src(now
.add
, src
) {
272 if (!(src
== 0 && read_dreg
))
273 bi_assign_port_read(®s
, now
.add
->src
[src
]);
277 /* Next, assign writes */
279 if (prev
.add
&& prev
.add
->dest
& BIR_INDEX_REGISTER
&& !write_dreg
) {
280 regs
.port
[2] = prev
.add
->dest
& ~BIR_INDEX_REGISTER
;
281 regs
.write_add
= true;
284 if (prev
.fma
&& prev
.fma
->dest
& BIR_INDEX_REGISTER
) {
285 unsigned r
= prev
.fma
->dest
& ~BIR_INDEX_REGISTER
;
287 if (regs
.write_add
) {
288 /* Scheduler constraint: cannot read 3 and write 2 */
289 assert(!regs
.read_port3
);
295 regs
.write_fma
= true;
298 /* Finally, ensure port 1 > port 0 for the 63-x trick to function */
300 if (regs
.enabled
[0] && regs
.enabled
[1] && regs
.port
[1] < regs
.port
[0]) {
301 unsigned temp
= regs
.port
[0];
302 regs
.port
[0] = regs
.port
[1];
309 /* Determines the register control field, ignoring the first? flag */
311 static enum bifrost_reg_control
312 bi_pack_register_ctrl_lo(struct bi_registers r
)
316 assert(!r
.read_port3
);
317 return BIFROST_WRITE_ADD_P2_FMA_P3
;
320 return BIFROST_WRITE_FMA_P2_READ_P3
;
322 return BIFROST_WRITE_FMA_P2
;
324 } else if (r
.write_add
) {
326 return BIFROST_WRITE_ADD_P2_READ_P3
;
328 return BIFROST_WRITE_ADD_P2
;
329 } else if (r
.read_port3
)
330 return BIFROST_READ_P3
;
332 return BIFROST_REG_NONE
;
335 /* Ditto but account for the first? flag this time */
337 static enum bifrost_reg_control
338 bi_pack_register_ctrl(struct bi_registers r
)
340 enum bifrost_reg_control ctrl
= bi_pack_register_ctrl_lo(r
);
342 if (r
.first_instruction
) {
343 if (ctrl
== BIFROST_REG_NONE
)
344 ctrl
= BIFROST_FIRST_NONE
;
345 else if (ctrl
== BIFROST_WRITE_FMA_P2_READ_P3
)
346 ctrl
= BIFROST_FIRST_WRITE_FMA_P2_READ_P3
;
348 ctrl
|= BIFROST_FIRST_NONE
;
355 bi_pack_registers(struct bi_registers regs
)
357 enum bifrost_reg_control ctrl
= bi_pack_register_ctrl(regs
);
358 struct bifrost_regs s
= { 0 };
361 if (regs
.enabled
[1]) {
362 /* Gotta save that bit!~ Required by the 63-x trick */
363 assert(regs
.port
[1] > regs
.port
[0]);
364 assert(regs
.enabled
[0]);
366 /* Do the 63-x trick, see docs/disasm */
367 if (regs
.port
[0] > 31) {
368 regs
.port
[0] = 63 - regs
.port
[0];
369 regs
.port
[1] = 63 - regs
.port
[1];
372 assert(regs
.port
[0] <= 31);
373 assert(regs
.port
[1] <= 63);
376 s
.reg1
= regs
.port
[1];
377 s
.reg0
= regs
.port
[0];
379 /* Port 1 disabled, so set to zero and use port 1 for ctrl */
383 if (regs
.enabled
[0]) {
384 /* Bit 0 upper bit of port 0 */
385 s
.reg1
|= (regs
.port
[0] >> 5);
387 /* Rest of port 0 in usual spot */
388 s
.reg0
= (regs
.port
[0] & 0b11111);
390 /* Bit 1 set if port 0 also disabled */
395 /* When port 3 isn't used, we have to set it to port 2, and vice versa,
396 * or INSTR_INVALID_ENC is raised. The reason is unknown. */
398 bool has_port2
= regs
.write_fma
|| regs
.write_add
;
399 bool has_port3
= regs
.read_port3
|| (regs
.write_fma
&& regs
.write_add
);
402 regs
.port
[3] = regs
.port
[2];
405 regs
.port
[2] = regs
.port
[3];
407 s
.reg3
= regs
.port
[3];
408 s
.reg2
= regs
.port
[2];
409 s
.uniform_const
= regs
.uniform_constant
;
411 memcpy(&packed
, &s
, sizeof(s
));
416 bi_set_data_register(bi_clause
*clause
, unsigned idx
)
418 assert(idx
& BIR_INDEX_REGISTER
);
419 unsigned reg
= idx
& ~BIR_INDEX_REGISTER
;
421 clause
->data_register
= reg
;
425 bi_read_data_register(bi_clause
*clause
, bi_instruction
*ins
)
427 bi_set_data_register(clause
, ins
->src
[0]);
431 bi_write_data_register(bi_clause
*clause
, bi_instruction
*ins
)
433 bi_set_data_register(clause
, ins
->dest
);
436 static enum bifrost_packed_src
437 bi_get_src_reg_port(struct bi_registers
*regs
, unsigned src
)
439 unsigned reg
= src
& ~BIR_INDEX_REGISTER
;
441 if (regs
->port
[0] == reg
&& regs
->enabled
[0])
442 return BIFROST_SRC_PORT0
;
443 else if (regs
->port
[1] == reg
&& regs
->enabled
[1])
444 return BIFROST_SRC_PORT1
;
445 else if (regs
->port
[3] == reg
&& regs
->read_port3
)
446 return BIFROST_SRC_PORT3
;
448 unreachable("Tried to access register with no port");
451 static enum bifrost_packed_src
452 bi_get_src(bi_instruction
*ins
, struct bi_registers
*regs
, unsigned s
, bool is_fma
)
454 unsigned src
= ins
->src
[s
];
456 if (src
& BIR_INDEX_REGISTER
)
457 return bi_get_src_reg_port(regs
, src
);
458 else if (src
& BIR_INDEX_ZERO
&& is_fma
)
459 return BIFROST_SRC_STAGE
;
460 else if (src
& BIR_INDEX_PASS
)
461 return src
& ~BIR_INDEX_PASS
;
463 unreachable("Unknown src");
466 /* Constructs a packed 2-bit swizzle for a 16-bit vec2 source. Source must be
467 * 16-bit and written components must correspond to valid swizzles (component x
471 bi_swiz16(bi_instruction
*ins
, unsigned src
)
473 assert(nir_alu_type_get_type_size(ins
->src_types
[src
]) == 16);
474 unsigned swizzle
= 0;
476 for (unsigned c
= 0; c
< 2; ++c
) {
477 if (!bi_writes_component(ins
, src
)) continue;
479 unsigned k
= ins
->swizzle
[src
][c
];
488 bi_pack_fma_fma(bi_instruction
*ins
, struct bi_registers
*regs
)
490 /* (-a)(-b) = ab, so we only need one negate bit */
491 bool negate_mul
= ins
->src_neg
[0] ^ ins
->src_neg
[1];
493 if (ins
->op
.mscale
) {
494 assert(!(ins
->src_abs
[0] && ins
->src_abs
[1]));
495 assert(!ins
->src_abs
[2] || !ins
->src_neg
[3] || !ins
->src_abs
[3]);
497 /* We can have exactly one abs, and can flip the multiplication
498 * to make it fit if we have to */
499 bool flip_ab
= ins
->src_abs
[1];
501 struct bifrost_fma_mscale pack
= {
502 .src0
= bi_get_src(ins
, regs
, flip_ab
? 1 : 0, true),
503 .src1
= bi_get_src(ins
, regs
, flip_ab
? 0 : 1, true),
504 .src2
= bi_get_src(ins
, regs
, 2, true),
505 .src3
= bi_get_src(ins
, regs
, 3, true),
508 .src0_abs
= ins
->src_abs
[0] || ins
->src_abs
[1],
509 .src1_neg
= negate_mul
,
510 .src2_neg
= ins
->src_neg
[2],
511 .op
= BIFROST_FMA_OP_MSCALE
,
515 } else if (ins
->dest_type
== nir_type_float32
) {
516 struct bifrost_fma_fma pack
= {
517 .src0
= bi_get_src(ins
, regs
, 0, true),
518 .src1
= bi_get_src(ins
, regs
, 1, true),
519 .src2
= bi_get_src(ins
, regs
, 2, true),
520 .src0_abs
= ins
->src_abs
[0],
521 .src1_abs
= ins
->src_abs
[1],
522 .src2_abs
= ins
->src_abs
[2],
523 .src0_neg
= negate_mul
,
524 .src2_neg
= ins
->src_neg
[2],
525 .outmod
= ins
->outmod
,
526 .roundmode
= ins
->roundmode
,
527 .op
= BIFROST_FMA_OP_FMA
531 } else if (ins
->dest_type
== nir_type_float16
) {
532 struct bifrost_fma_fma16 pack
= {
533 .src0
= bi_get_src(ins
, regs
, 0, true),
534 .src1
= bi_get_src(ins
, regs
, 1, true),
535 .src2
= bi_get_src(ins
, regs
, 2, true),
536 .swizzle_0
= bi_swiz16(ins
, 0),
537 .swizzle_1
= bi_swiz16(ins
, 1),
538 .swizzle_2
= bi_swiz16(ins
, 2),
539 .src0_neg
= negate_mul
,
540 .src2_neg
= ins
->src_neg
[2],
541 .outmod
= ins
->outmod
,
542 .roundmode
= ins
->roundmode
,
543 .op
= BIFROST_FMA_OP_FMA16
548 unreachable("Invalid fma dest type");
553 bi_pack_fma_addmin_f32(bi_instruction
*ins
, struct bi_registers
*regs
)
556 (ins
->type
== BI_ADD
) ? BIFROST_FMA_OP_FADD32
:
557 (ins
->op
.minmax
== BI_MINMAX_MIN
) ? BIFROST_FMA_OP_FMIN32
:
558 BIFROST_FMA_OP_FMAX32
;
560 struct bifrost_fma_add pack
= {
561 .src0
= bi_get_src(ins
, regs
, 0, true),
562 .src1
= bi_get_src(ins
, regs
, 1, true),
563 .src0_abs
= ins
->src_abs
[0],
564 .src1_abs
= ins
->src_abs
[1],
565 .src0_neg
= ins
->src_neg
[0],
566 .src1_neg
= ins
->src_neg
[1],
568 .outmod
= ins
->outmod
,
569 .roundmode
= (ins
->type
== BI_ADD
) ? ins
->roundmode
: ins
->minmax
,
577 bi_pack_fma_addmin_f16(bi_instruction
*ins
, struct bi_registers
*regs
)
580 (ins
->type
== BI_ADD
) ? BIFROST_FMA_OP_FADD16
:
581 (ins
->op
.minmax
== BI_MINMAX_MIN
) ? BIFROST_FMA_OP_FMIN16
:
582 BIFROST_FMA_OP_FMAX16
;
584 /* Absolute values are packed in a quirky way. Let k = src1 < src0. Let
585 * l be an auxiliary bit we encode. Then the hardware determines:
590 * Since add/min/max are commutative, this saves a bit by using the
591 * order of the operands as a bit (k). To pack this, first note:
593 * (l && k) implies (l || k).
595 * That is, if the second argument is abs'd, then the first argument
596 * also has abs. So there are three cases:
598 * Case 0: Neither src has absolute value. Then we have l = k = 0.
600 * Case 1: Exactly one src has absolute value. Assign that source to
601 * src0 and the other source to src1. Compute k = src1 < src0 based on
602 * that assignment. Then l = ~k.
604 * Case 2: Both sources have absolute value. Then we have l = k = 1.
605 * Note to force k = 1 requires that (src1 < src0) OR (src0 < src1).
606 * That is, this encoding is only valid if src1 and src0 are distinct.
607 * This is a scheduling restriction (XXX); if an op of this type
608 * requires both identical sources to have abs value, then we must
609 * schedule to ADD (which does not use this ordering trick).
612 unsigned abs_0
= ins
->src_abs
[0], abs_1
= ins
->src_abs
[1];
613 unsigned src_0
= bi_get_src(ins
, regs
, 0, true);
614 unsigned src_1
= bi_get_src(ins
, regs
, 1, true);
618 if (!abs_0
&& !abs_1
) {
619 /* Force k = 0 <===> NOT(src1 < src0) */
620 flip
= (src_1
< src_0
);
621 } else if (abs_0
&& !abs_1
) {
623 } else if (abs_1
&& !abs_0
) {
627 flip
= (src_0
>= src_1
);
631 struct bifrost_fma_add_minmax16 pack
= {
632 .src0
= flip
? src_1
: src_0
,
633 .src1
= flip
? src_0
: src_1
,
634 .src0_neg
= ins
->src_neg
[flip
? 1 : 0],
635 .src1_neg
= ins
->src_neg
[flip
? 0 : 1],
637 .outmod
= ins
->outmod
,
638 .mode
= (ins
->type
== BI_ADD
) ? ins
->roundmode
: ins
->minmax
,
646 bi_pack_fma_addmin(bi_instruction
*ins
, struct bi_registers
*regs
)
648 if (ins
->dest_type
== nir_type_float32
)
649 return bi_pack_fma_addmin_f32(ins
, regs
);
650 else if(ins
->dest_type
== nir_type_float16
)
651 return bi_pack_fma_addmin_f16(ins
, regs
);
653 unreachable("Unknown FMA/ADD type");
657 bi_pack_fma_1src(bi_instruction
*ins
, struct bi_registers
*regs
, unsigned op
)
659 struct bifrost_fma_inst pack
= {
660 .src0
= bi_get_src(ins
, regs
, 0, true),
668 bi_pack_fma_2src(bi_instruction
*ins
, struct bi_registers
*regs
, unsigned op
)
670 struct bifrost_fma_2src pack
= {
671 .src0
= bi_get_src(ins
, regs
, 0, true),
672 .src1
= bi_get_src(ins
, regs
, 1, true),
680 bi_pack_add_1src(bi_instruction
*ins
, struct bi_registers
*regs
, unsigned op
)
682 struct bifrost_add_inst pack
= {
683 .src0
= bi_get_src(ins
, regs
, 0, true),
690 static enum bifrost_csel_cond
691 bi_cond_to_csel(enum bi_cond cond
, bool *flip
, bool *invert
, nir_alu_type T
)
693 nir_alu_type B
= nir_alu_type_get_base_type(T
);
694 unsigned idx
= (B
== nir_type_float
) ? 0 :
695 ((B
== nir_type_int
) ? 1 : 2);
701 const enum bifrost_csel_cond ops
[] = {
712 const enum bifrost_csel_cond ops
[] = {
723 const enum bifrost_csel_cond ops
[] = {
726 BIFROST_IEQ_F
/* sign is irrelevant */
732 unreachable("Invalid op for csel");
737 bi_pack_fma_csel(bi_instruction
*ins
, struct bi_registers
*regs
)
739 /* TODO: Use csel3 as well */
740 bool flip
= false, invert
= false;
742 enum bifrost_csel_cond cond
=
743 bi_cond_to_csel(ins
->csel_cond
, &flip
, &invert
, ins
->src_types
[0]);
745 unsigned size
= nir_alu_type_get_type_size(ins
->dest_type
);
747 unsigned cmp_0
= (flip
? 1 : 0);
748 unsigned cmp_1
= (flip
? 0 : 1);
749 unsigned res_0
= (invert
? 3 : 2);
750 unsigned res_1
= (invert
? 2 : 3);
752 struct bifrost_csel4 pack
= {
753 .src0
= bi_get_src(ins
, regs
, cmp_0
, true),
754 .src1
= bi_get_src(ins
, regs
, cmp_1
, true),
755 .src2
= bi_get_src(ins
, regs
, res_0
, true),
756 .src3
= bi_get_src(ins
, regs
, res_1
, true),
758 .op
= (size
== 16) ? BIFROST_FMA_OP_CSEL4_V16
:
766 bi_pack_fma_frexp(bi_instruction
*ins
, struct bi_registers
*regs
)
768 unsigned op
= BIFROST_FMA_OP_FREXPE_LOG
;
769 return bi_pack_fma_1src(ins
, regs
, op
);
773 bi_pack_fma_reduce(bi_instruction
*ins
, struct bi_registers
*regs
)
775 if (ins
->op
.reduce
== BI_REDUCE_ADD_FREXPM
) {
776 return bi_pack_fma_2src(ins
, regs
, BIFROST_FMA_OP_ADD_FREXPM
);
778 unreachable("Invalid reduce op");
782 /* We have a single convert opcode in the IR but a number of opcodes that could
783 * come out. In particular we have native opcodes for:
785 * [ui]16 --> [fui]32 -- int16_to_32
786 * f16 --> f32 -- float16_to_32
787 * f32 --> f16 -- float32_to_16
788 * f32 --> [ui]32 -- float32_to_int
789 * [ui]32 --> f32 -- int_to_float32
790 * [fui]16 --> [fui]16 -- f2i_i2f16
794 bi_pack_convert(bi_instruction
*ins
, struct bi_registers
*regs
, bool FMA
)
796 nir_alu_type from_base
= nir_alu_type_get_base_type(ins
->src_types
[0]);
797 unsigned from_size
= nir_alu_type_get_type_size(ins
->src_types
[0]);
798 bool from_unsigned
= from_base
== nir_type_uint
;
800 nir_alu_type to_base
= nir_alu_type_get_base_type(ins
->dest_type
);
801 unsigned to_size
= nir_alu_type_get_type_size(ins
->dest_type
);
802 bool to_unsigned
= to_base
== nir_type_uint
;
803 bool to_float
= to_base
== nir_type_float
;
806 assert((from_base
!= to_base
) || (from_size
!= to_size
));
807 assert((MAX2(from_size
, to_size
) / MIN2(from_size
, to_size
)) <= 2);
809 /* f32 to f16 is special */
810 if (from_size
== 32 && to_size
== 16 && from_base
== nir_type_float
&& to_base
== from_base
) {
811 /* TODO: second vectorized source? */
812 struct bifrost_fma_2src pfma
= {
813 .src0
= bi_get_src(ins
, regs
, 0, true),
814 .src1
= BIFROST_SRC_STAGE
, /* 0 */
815 .op
= BIFROST_FMA_FLOAT32_TO_16
818 struct bifrost_add_2src padd
= {
819 .src0
= bi_get_src(ins
, regs
, 0, true),
820 .src1
= BIFROST_SRC_STAGE
, /* 0 */
821 .op
= BIFROST_ADD_FLOAT32_TO_16
831 /* Otherwise, figure out the mode */
834 if (from_size
== 16 && to_size
== 32) {
835 unsigned component
= ins
->swizzle
[0][0];
836 assert(component
<= 1);
838 if (from_base
== nir_type_float
)
839 op
= BIFROST_CONVERT_5(component
);
841 op
= BIFROST_CONVERT_4(from_unsigned
, component
, to_float
);
844 unsigned swizzle
= (from_size
== 16) ? bi_swiz16(ins
, 0) : 0;
845 bool is_unsigned
= from_unsigned
;
847 if (from_base
== nir_type_float
) {
848 assert(to_base
!= nir_type_float
);
849 is_unsigned
= to_unsigned
;
851 if (from_size
== 32 && to_size
== 32)
852 mode
= BIFROST_CONV_F32_TO_I32
;
853 else if (from_size
== 16 && to_size
== 16)
854 mode
= BIFROST_CONV_F16_TO_I16
;
856 unreachable("Invalid float conversion");
858 assert(to_base
== nir_type_float
);
859 assert(from_size
== to_size
);
862 mode
= BIFROST_CONV_I32_TO_F32
;
863 else if (to_size
== 16)
864 mode
= BIFROST_CONV_I16_TO_F16
;
866 unreachable("Invalid int conversion");
869 /* Fixup swizzle for 32-bit only modes */
871 if (mode
== BIFROST_CONV_I32_TO_F32
)
873 else if (mode
== BIFROST_CONV_F32_TO_I32
)
876 op
= BIFROST_CONVERT(is_unsigned
, ins
->roundmode
, swizzle
, mode
);
878 /* Unclear what the top bit is for... maybe 16-bit related */
879 bool mode2
= mode
== BIFROST_CONV_F16_TO_I16
;
880 bool mode6
= mode
== BIFROST_CONV_I16_TO_F16
;
882 if (!(mode2
|| mode6
))
887 return bi_pack_fma_1src(ins
, regs
, BIFROST_FMA_CONVERT
| op
);
889 return bi_pack_add_1src(ins
, regs
, BIFROST_ADD_CONVERT
| op
);
893 bi_pack_fma(bi_clause
*clause
, bi_bundle bundle
, struct bi_registers
*regs
)
896 return BIFROST_FMA_NOP
;
898 switch (bundle
.fma
->type
) {
900 return bi_pack_fma_addmin(bundle
.fma
, regs
);
903 return BIFROST_FMA_NOP
;
905 return bi_pack_convert(bundle
.fma
, regs
, true);
907 return bi_pack_fma_csel(bundle
.fma
, regs
);
909 return bi_pack_fma_fma(bundle
.fma
, regs
);
911 return bi_pack_fma_frexp(bundle
.fma
, regs
);
913 return BIFROST_FMA_NOP
;
915 return bi_pack_fma_addmin(bundle
.fma
, regs
);
917 return bi_pack_fma_1src(bundle
.fma
, regs
, BIFROST_FMA_OP_MOV
);
921 return BIFROST_FMA_NOP
;
923 return bi_pack_fma_reduce(bundle
.fma
, regs
);
925 unreachable("Cannot encode class as FMA");
930 bi_pack_add_ld_vary(bi_clause
*clause
, bi_instruction
*ins
, struct bi_registers
*regs
)
932 unsigned size
= nir_alu_type_get_type_size(ins
->dest_type
);
933 assert(size
== 32 || size
== 16);
935 unsigned op
= (size
== 32) ?
936 BIFROST_ADD_OP_LD_VAR_32
:
937 BIFROST_ADD_OP_LD_VAR_16
;
939 unsigned cmask
= bi_from_bytemask(ins
->writemask
, size
/ 8);
940 unsigned channels
= util_bitcount(cmask
);
941 assert(cmask
== ((1 << channels
) - 1));
943 unsigned packed_addr
= 0;
945 if (ins
->src
[0] & BIR_INDEX_CONSTANT
) {
946 /* Direct uses address field directly */
947 packed_addr
= bi_get_immediate(ins
, ins
->src
[0]);
948 assert(packed_addr
< 0b1000);
950 /* Indirect gets an extra source */
951 packed_addr
= bi_get_src(ins
, regs
, 0, false) | 0b11000;
954 /* The destination is thrown in the data register */
955 assert(ins
->dest
& BIR_INDEX_REGISTER
);
956 clause
->data_register
= ins
->dest
& ~BIR_INDEX_REGISTER
;
958 assert(channels
>= 1 && channels
<= 4);
960 struct bifrost_ld_var pack
= {
961 .src0
= bi_get_src(ins
, regs
, 1, false),
963 .channels
= MALI_POSITIVE(channels
),
964 .interp_mode
= ins
->load_vary
.interp_mode
,
965 .reuse
= ins
->load_vary
.reuse
,
966 .flat
= ins
->load_vary
.flat
,
974 bi_pack_add_2src(bi_instruction
*ins
, struct bi_registers
*regs
, unsigned op
)
976 struct bifrost_add_2src pack
= {
977 .src0
= bi_get_src(ins
, regs
, 0, true),
978 .src1
= bi_get_src(ins
, regs
, 1, true),
986 bi_pack_add_addmin_f32(bi_instruction
*ins
, struct bi_registers
*regs
)
989 (ins
->type
== BI_ADD
) ? BIFROST_ADD_OP_FADD32
:
990 (ins
->op
.minmax
== BI_MINMAX_MIN
) ? BIFROST_ADD_OP_FMIN32
:
991 BIFROST_ADD_OP_FMAX32
;
993 struct bifrost_add_faddmin pack
= {
994 .src0
= bi_get_src(ins
, regs
, 0, true),
995 .src1
= bi_get_src(ins
, regs
, 1, true),
996 .src0_abs
= ins
->src_abs
[0],
997 .src1_abs
= ins
->src_abs
[1],
998 .src0_neg
= ins
->src_neg
[0],
999 .src1_neg
= ins
->src_neg
[1],
1000 .outmod
= ins
->outmod
,
1001 .mode
= (ins
->type
== BI_ADD
) ? ins
->roundmode
: ins
->minmax
,
1005 RETURN_PACKED(pack
);
1009 bi_pack_add_addmin(bi_instruction
*ins
, struct bi_registers
*regs
)
1011 if (ins
->dest_type
== nir_type_float32
)
1012 return bi_pack_add_addmin_f32(ins
, regs
);
1013 else if(ins
->dest_type
== nir_type_float16
)
1014 unreachable("todo");
1015 //return bi_pack_add_addmin_f16(ins, regs);
1017 unreachable("Unknown FMA/ADD type");
1021 bi_pack_add_ld_ubo(bi_clause
*clause
, bi_instruction
*ins
, struct bi_registers
*regs
)
1023 unsigned components
= bi_load32_components(ins
);
1025 const unsigned ops
[4] = {
1026 BIFROST_ADD_OP_LD_UBO_1
,
1027 BIFROST_ADD_OP_LD_UBO_2
,
1028 BIFROST_ADD_OP_LD_UBO_3
,
1029 BIFROST_ADD_OP_LD_UBO_4
1032 bi_write_data_register(clause
, ins
);
1033 return bi_pack_add_2src(ins
, regs
, ops
[components
- 1]);
1036 static enum bifrost_ldst_type
1037 bi_pack_ldst_type(nir_alu_type T
)
1040 case nir_type_float16
: return BIFROST_LDST_F16
;
1041 case nir_type_float32
: return BIFROST_LDST_F32
;
1042 case nir_type_int32
: return BIFROST_LDST_I32
;
1043 case nir_type_uint32
: return BIFROST_LDST_U32
;
1044 default: unreachable("Invalid type loaded");
1049 bi_pack_add_ld_var_addr(bi_clause
*clause
, bi_instruction
*ins
, struct bi_registers
*regs
)
1051 struct bifrost_ld_var_addr pack
= {
1052 .src0
= bi_get_src(ins
, regs
, 1, false),
1053 .src1
= bi_get_src(ins
, regs
, 2, false),
1054 .location
= bi_get_immediate(ins
, ins
->src
[0]),
1055 .type
= bi_pack_ldst_type(ins
->src_types
[3]),
1056 .op
= BIFROST_ADD_OP_LD_VAR_ADDR
1059 bi_write_data_register(clause
, ins
);
1060 RETURN_PACKED(pack
);
1064 bi_pack_add_ld_attr(bi_clause
*clause
, bi_instruction
*ins
, struct bi_registers
*regs
)
1066 struct bifrost_ld_attr pack
= {
1067 .src0
= bi_get_src(ins
, regs
, 1, false),
1068 .src1
= bi_get_src(ins
, regs
, 2, false),
1069 .location
= bi_get_immediate(ins
, ins
->src
[0]),
1070 .channels
= MALI_POSITIVE(bi_load32_components(ins
)),
1071 .type
= bi_pack_ldst_type(ins
->dest_type
),
1072 .op
= BIFROST_ADD_OP_LD_ATTR
1075 bi_write_data_register(clause
, ins
);
1076 RETURN_PACKED(pack
);
1080 bi_pack_add_st_vary(bi_clause
*clause
, bi_instruction
*ins
, struct bi_registers
*regs
)
1082 assert(ins
->store_channels
>= 1 && ins
->store_channels
<= 4);
1084 struct bifrost_st_vary pack
= {
1085 .src0
= bi_get_src(ins
, regs
, 1, false),
1086 .src1
= bi_get_src(ins
, regs
, 2, false),
1087 .src2
= bi_get_src(ins
, regs
, 3, false),
1088 .channels
= MALI_POSITIVE(ins
->store_channels
),
1089 .op
= BIFROST_ADD_OP_ST_VAR
1092 bi_read_data_register(clause
, ins
);
1093 RETURN_PACKED(pack
);
1097 bi_pack_add_atest(bi_clause
*clause
, bi_instruction
*ins
, struct bi_registers
*regs
)
1100 assert(ins
->src_types
[1] == nir_type_float32
);
1102 struct bifrost_add_atest pack
= {
1103 .src0
= bi_get_src(ins
, regs
, 0, false),
1104 .src1
= bi_get_src(ins
, regs
, 1, false),
1105 .component
= 1, /* Set for fp32 */
1106 .op
= BIFROST_ADD_OP_ATEST
,
1109 /* Despite *also* writing with the usual mechanism... quirky and
1110 * perhaps unnecessary, but let's match the blob */
1111 clause
->data_register
= ins
->dest
& ~BIR_INDEX_REGISTER
;
1113 RETURN_PACKED(pack
);
1117 bi_pack_add_blend(bi_clause
*clause
, bi_instruction
*ins
, struct bi_registers
*regs
)
1119 struct bifrost_add_inst pack
= {
1120 .src0
= bi_get_src(ins
, regs
, 1, false),
1121 .op
= BIFROST_ADD_OP_BLEND
1124 /* TODO: Pack location in uniform_const */
1125 assert(ins
->blend_location
== 0);
1127 bi_read_data_register(clause
, ins
);
1128 RETURN_PACKED(pack
);
1132 bi_pack_add_special(bi_instruction
*ins
, struct bi_registers
*regs
)
1135 bool fp16
= ins
->dest_type
== nir_type_float16
;
1136 bool Y
= ins
->swizzle
[0][0];
1138 if (ins
->op
.special
== BI_SPECIAL_FRCP
) {
1140 (Y
? BIFROST_ADD_OP_FRCP_FAST_F16_Y
:
1141 BIFROST_ADD_OP_FRCP_FAST_F16_X
) :
1142 BIFROST_ADD_OP_FRCP_FAST_F32
;
1145 (Y
? BIFROST_ADD_OP_FRSQ_FAST_F16_Y
:
1146 BIFROST_ADD_OP_FRSQ_FAST_F16_X
) :
1147 BIFROST_ADD_OP_FRSQ_FAST_F32
;
1151 return bi_pack_add_1src(ins
, regs
, op
);
1155 bi_pack_add_table(bi_instruction
*ins
, struct bi_registers
*regs
)
1158 assert(ins
->dest_type
== nir_type_float32
);
1160 op
= BIFROST_ADD_OP_LOG2_HELP
;
1161 return bi_pack_add_1src(ins
, regs
, op
);
1165 bi_pack_add(bi_clause
*clause
, bi_bundle bundle
, struct bi_registers
*regs
)
1168 return BIFROST_ADD_NOP
;
1170 switch (bundle
.add
->type
) {
1172 return bi_pack_add_addmin(bundle
.add
, regs
);
1174 return bi_pack_add_atest(clause
, bundle
.add
, regs
);
1177 return BIFROST_ADD_NOP
;
1179 return bi_pack_add_blend(clause
, bundle
.add
, regs
);
1181 return BIFROST_ADD_NOP
;
1183 return bi_pack_convert(bundle
.add
, regs
, false);
1188 return BIFROST_ADD_NOP
;
1190 return bi_pack_add_ld_attr(clause
, bundle
.add
, regs
);
1191 case BI_LOAD_UNIFORM
:
1192 return bi_pack_add_ld_ubo(clause
, bundle
.add
, regs
);
1194 return bi_pack_add_ld_vary(clause
, bundle
.add
, regs
);
1195 case BI_LOAD_VAR_ADDRESS
:
1196 return bi_pack_add_ld_var_addr(clause
, bundle
.add
, regs
);
1198 return bi_pack_add_addmin(bundle
.add
, regs
);
1202 return BIFROST_ADD_NOP
;
1204 return bi_pack_add_st_vary(clause
, bundle
.add
, regs
);
1206 return bi_pack_add_special(bundle
.add
, regs
);
1208 return bi_pack_add_table(bundle
.add
, regs
);
1212 return BIFROST_ADD_NOP
;
1214 unreachable("Cannot encode class as ADD");
1218 struct bi_packed_bundle
{
1223 static struct bi_packed_bundle
1224 bi_pack_bundle(bi_clause
*clause
, bi_bundle bundle
, bi_bundle prev
, bool first_bundle
)
1226 struct bi_registers regs
= bi_assign_ports(bundle
, prev
);
1227 bi_assign_uniform_constant(clause
, ®s
, bundle
);
1228 regs
.first_instruction
= first_bundle
;
1230 uint64_t reg
= bi_pack_registers(regs
);
1231 uint64_t fma
= bi_pack_fma(clause
, bundle
, ®s
);
1232 uint64_t add
= bi_pack_add(clause
, bundle
, ®s
);
1234 struct bi_packed_bundle packed
= {
1235 .lo
= reg
| (fma
<< 35) | ((add
& 0b111111) << 58),
1242 /* Packs the next two constants as a dedicated constant quadword at the end of
1243 * the clause, returning the number packed. */
1246 bi_pack_constants(bi_context
*ctx
, bi_clause
*clause
,
1248 struct util_dynarray
*emission
)
1250 /* After these two, are we done? Determines tag */
1251 bool done
= clause
->constant_count
<= (index
+ 2);
1252 bool only
= clause
->constant_count
<= (index
+ 1);
1255 assert(index
== 0 && clause
->bundle_count
== 1);
1257 struct bifrost_fmt_constant quad
= {
1258 .pos
= 0, /* TODO */
1259 .tag
= done
? BIFROST_FMTC_FINAL
: BIFROST_FMTC_CONSTANTS
,
1260 .imm_1
= clause
->constants
[index
+ 0] >> 4,
1261 .imm_2
= only
? 0 : clause
->constants
[index
+ 1] >> 4
1264 /* XXX: On G71, Connor observed that the difference of the top 4 bits
1265 * of the second constant with the first must be less than 8, otherwise
1266 * we have to swap them. I am not able to reproduce this on G52,
1267 * further investigation needed. Possibly an errata. XXX */
1269 util_dynarray_append(emission
, struct bifrost_fmt_constant
, quad
);
1275 bi_pack_clause(bi_context
*ctx
, bi_clause
*clause
, bi_clause
*next
,
1276 struct util_dynarray
*emission
)
1278 struct bi_packed_bundle ins_1
= bi_pack_bundle(clause
, clause
->bundles
[0], clause
->bundles
[0], true);
1279 assert(clause
->bundle_count
== 1);
1281 /* Used to decide if we elide writes */
1282 bool is_fragment
= ctx
->stage
== MESA_SHADER_FRAGMENT
;
1284 /* State for packing constants throughout */
1285 unsigned constant_index
= 0;
1287 struct bifrost_fmt1 quad_1
= {
1288 .tag
= clause
->constant_count
? BIFROST_FMT1_CONSTANTS
: BIFROST_FMT1_FINAL
,
1289 .header
= bi_pack_header(clause
, next
, is_fragment
),
1291 .ins_2
= ins_1
.hi
& ((1 << 11) - 1),
1292 .ins_0
= (ins_1
.hi
>> 11) & 0b111,
1295 util_dynarray_append(emission
, struct bifrost_fmt1
, quad_1
);
1297 /* Pack the remaining constants */
1299 while (constant_index
< clause
->constant_count
) {
1300 constant_index
+= bi_pack_constants(ctx
, clause
,
1301 constant_index
, emission
);
1306 bi_next_clause(bi_context
*ctx
, pan_block
*block
, bi_clause
*clause
)
1308 /* Try the next clause in this block */
1309 if (clause
->link
.next
!= &((bi_block
*) block
)->clauses
)
1310 return list_first_entry(&(clause
->link
), bi_clause
, link
);
1312 /* Try the next block, or the one after that if it's empty, etc .*/
1313 pan_block
*next_block
= pan_next_block(block
);
1315 bi_foreach_block_from(ctx
, next_block
, block
) {
1316 bi_block
*blk
= (bi_block
*) block
;
1318 if (!list_is_empty(&blk
->clauses
))
1319 return list_first_entry(&(blk
->clauses
), bi_clause
, link
);
1326 bi_pack(bi_context
*ctx
, struct util_dynarray
*emission
)
1328 util_dynarray_init(emission
, NULL
);
1330 bi_foreach_block(ctx
, _block
) {
1331 bi_block
*block
= (bi_block
*) _block
;
1333 bi_foreach_clause_in_block(block
, clause
) {
1334 bi_clause
*next
= bi_next_clause(ctx
, _block
, clause
);
1335 bi_pack_clause(ctx
, clause
, next
, emission
);