pan/bi: Add log2_help packing
[mesa.git] / src / panfrost / bifrost / bi_pack.c
1 /*
2 * Copyright (C) 2020 Collabora, Ltd.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 */
23
24 #include "compiler.h"
25
26 #define RETURN_PACKED(str) { \
27 uint64_t temp = 0; \
28 memcpy(&temp, &str, sizeof(str)); \
29 return temp; \
30 }
31
32 /* This file contains the final passes of the compiler. Running after
33 * scheduling and RA, the IR is now finalized, so we need to emit it to actual
34 * bits on the wire (as well as fixup branches) */
35
36 static uint64_t
37 bi_pack_header(bi_clause *clause, bi_clause *next, bool is_fragment)
38 {
39 struct bifrost_header header = {
40 .back_to_back = clause->back_to_back,
41 .no_end_of_shader = (next != NULL),
42 .elide_writes = is_fragment,
43 .branch_cond = clause->branch_conditional,
44 .datareg_writebarrier = clause->data_register_write_barrier,
45 .datareg = clause->data_register,
46 .scoreboard_deps = next ? next->dependencies : 0,
47 .scoreboard_index = clause->scoreboard_id,
48 .clause_type = clause->clause_type,
49 .next_clause_type = next ? next->clause_type : 0,
50 };
51
52 header.branch_cond |= header.back_to_back;
53
54 uint64_t u = 0;
55 memcpy(&u, &header, sizeof(header));
56 return u;
57 }
58
59 /* Represents the assignment of ports for a given bundle */
60
61 struct bi_registers {
62 /* Register to assign to each port */
63 unsigned port[4];
64
65 /* Read ports can be disabled */
66 bool enabled[2];
67
68 /* Should we write FMA? what about ADD? If only a single port is
69 * enabled it is in port 2, else ADD/FMA is 2/3 respectively */
70 bool write_fma, write_add;
71
72 /* Should we read with port 3? */
73 bool read_port3;
74
75 /* Packed uniform/constant */
76 uint8_t uniform_constant;
77
78 /* Whether writes are actually for the last instruction */
79 bool first_instruction;
80 };
81
82 static inline void
83 bi_print_ports(struct bi_registers *regs)
84 {
85 for (unsigned i = 0; i < 2; ++i) {
86 if (regs->enabled[i])
87 printf("port %u: %u\n", i, regs->port[i]);
88 }
89
90 if (regs->write_fma || regs->write_add) {
91 printf("port 2 (%s): %u\n",
92 regs->write_add ? "ADD" : "FMA",
93 regs->port[2]);
94 }
95
96 if ((regs->write_fma && regs->write_add) || regs->read_port3) {
97 printf("port 3 (%s): %u\n",
98 regs->read_port3 ? "read" : "FMA",
99 regs->port[3]);
100 }
101 }
102
103 /* The uniform/constant slot allows loading a contiguous 64-bit immediate or
104 * pushed uniform per bundle. Figure out which one we need in the bundle (the
105 * scheduler needs to ensure we only have one type per bundle), validate
106 * everything, and rewrite away the register/uniform indices to use 3-bit
107 * sources directly. */
108
109 static unsigned
110 bi_lookup_constant(bi_clause *clause, uint64_t cons, bool *hi, bool b64)
111 {
112 uint64_t want = (cons >> 4);
113
114 for (unsigned i = 0; i < clause->constant_count; ++i) {
115 /* Only check top 60-bits since that's what's actually embedded
116 * in the clause, the bottom 4-bits are bundle-inline */
117
118 unsigned candidates[2] = {
119 clause->constants[i] >> 4,
120 clause->constants[i] >> 36
121 };
122
123 if (!b64)
124 candidates[0] &= 0xFFFFFFFF;
125
126 if (candidates[0] == want)
127 return i;
128
129 if (candidates[1] == want && !b64) {
130 *hi = true;
131 return i;
132 }
133 }
134
135 unreachable("Invalid constant accessed");
136 }
137
138 static unsigned
139 bi_constant_field(unsigned idx)
140 {
141 assert(idx <= 5);
142
143 const unsigned values[] = {
144 4, 5, 6, 7, 2, 3
145 };
146
147 return values[idx] << 4;
148 }
149
150 static bool
151 bi_assign_uniform_constant_single(
152 struct bi_registers *regs,
153 bi_clause *clause,
154 bi_instruction *ins, bool assigned, bool fast_zero)
155 {
156 if (!ins)
157 return assigned;
158
159 bi_foreach_src(ins, s) {
160 if (s == 0 && (ins->type == BI_LOAD_VAR_ADDRESS || ins->type == BI_LOAD_ATTR)) continue;
161
162 if (ins->src[s] & BIR_INDEX_CONSTANT) {
163 bool hi = false;
164 bool b64 = nir_alu_type_get_type_size(ins->src_types[s]) > 32;
165 uint64_t cons = bi_get_immediate(ins, ins->src[s]);
166 unsigned idx = bi_lookup_constant(clause, cons, &hi, b64);
167 unsigned f = bi_constant_field(idx) | (cons & 0xF);
168
169 if (assigned && regs->uniform_constant != f)
170 unreachable("Mismatched uniform/const field: imm");
171
172 regs->uniform_constant = f;
173 ins->src[s] = BIR_INDEX_PASS | (hi ? BIFROST_SRC_CONST_HI : BIFROST_SRC_CONST_LO);
174 assigned = true;
175 } else if (ins->src[s] & BIR_INDEX_ZERO && (ins->type == BI_LOAD_UNIFORM || ins->type == BI_LOAD_VAR)) {
176 /* XXX: HACK UNTIL WE HAVE HI MATCHING DUE TO OVERFLOW XXX */
177 ins->src[s] = BIR_INDEX_PASS | BIFROST_SRC_CONST_HI;
178 } else if (ins->src[s] & BIR_INDEX_ZERO && !fast_zero) {
179 /* FMAs have a fast zero port, ADD needs to use the
180 * uniform/const port's special 0 mode handled here */
181 unsigned f = 0;
182
183 if (assigned && regs->uniform_constant != f)
184 unreachable("Mismatched uniform/const field: 0");
185
186 regs->uniform_constant = f;
187 ins->src[s] = BIR_INDEX_PASS | BIFROST_SRC_CONST_LO;
188 assigned = true;
189 } else if (s & BIR_INDEX_UNIFORM) {
190 unreachable("Push uniforms not implemented yet");
191 }
192 }
193
194 return assigned;
195 }
196
197 static void
198 bi_assign_uniform_constant(
199 bi_clause *clause,
200 struct bi_registers *regs,
201 bi_bundle bundle)
202 {
203 bool assigned =
204 bi_assign_uniform_constant_single(regs, clause, bundle.fma, false, true);
205
206 bi_assign_uniform_constant_single(regs, clause, bundle.add, assigned, false);
207 }
208
209 /* Assigns a port for reading, before anything is written */
210
211 static void
212 bi_assign_port_read(struct bi_registers *regs, unsigned src)
213 {
214 /* We only assign for registers */
215 if (!(src & BIR_INDEX_REGISTER))
216 return;
217
218 unsigned reg = src & ~BIR_INDEX_REGISTER;
219
220 /* Check if we already assigned the port */
221 for (unsigned i = 0; i <= 1; ++i) {
222 if (regs->port[i] == reg && regs->enabled[i])
223 return;
224 }
225
226 if (regs->port[3] == reg && regs->read_port3)
227 return;
228
229 /* Assign it now */
230
231 for (unsigned i = 0; i <= 1; ++i) {
232 if (!regs->enabled[i]) {
233 regs->port[i] = reg;
234 regs->enabled[i] = true;
235 return;
236 }
237 }
238
239 if (!regs->read_port3) {
240 regs->port[3] = reg;
241 regs->read_port3 = true;
242 return;
243 }
244
245 bi_print_ports(regs);
246 unreachable("Failed to find a free port for src");
247 }
248
249 static struct bi_registers
250 bi_assign_ports(bi_bundle now, bi_bundle prev)
251 {
252 struct bi_registers regs = { 0 };
253
254 /* We assign ports for the main register mechanism. Special ops
255 * use the data registers, which has its own mechanism entirely
256 * and thus gets skipped over here. */
257
258 unsigned read_dreg = now.add &&
259 bi_class_props[now.add->type] & BI_DATA_REG_SRC;
260
261 unsigned write_dreg = prev.add &&
262 bi_class_props[prev.add->type] & BI_DATA_REG_DEST;
263
264 /* First, assign reads */
265
266 if (now.fma)
267 bi_foreach_src(now.fma, src)
268 bi_assign_port_read(&regs, now.fma->src[src]);
269
270 if (now.add) {
271 bi_foreach_src(now.add, src) {
272 if (!(src == 0 && read_dreg))
273 bi_assign_port_read(&regs, now.add->src[src]);
274 }
275 }
276
277 /* Next, assign writes */
278
279 if (prev.add && prev.add->dest & BIR_INDEX_REGISTER && !write_dreg) {
280 regs.port[2] = prev.add->dest & ~BIR_INDEX_REGISTER;
281 regs.write_add = true;
282 }
283
284 if (prev.fma && prev.fma->dest & BIR_INDEX_REGISTER) {
285 unsigned r = prev.fma->dest & ~BIR_INDEX_REGISTER;
286
287 if (regs.write_add) {
288 /* Scheduler constraint: cannot read 3 and write 2 */
289 assert(!regs.read_port3);
290 regs.port[3] = r;
291 } else {
292 regs.port[2] = r;
293 }
294
295 regs.write_fma = true;
296 }
297
298 /* Finally, ensure port 1 > port 0 for the 63-x trick to function */
299
300 if (regs.enabled[0] && regs.enabled[1] && regs.port[1] < regs.port[0]) {
301 unsigned temp = regs.port[0];
302 regs.port[0] = regs.port[1];
303 regs.port[1] = temp;
304 }
305
306 return regs;
307 }
308
309 /* Determines the register control field, ignoring the first? flag */
310
311 static enum bifrost_reg_control
312 bi_pack_register_ctrl_lo(struct bi_registers r)
313 {
314 if (r.write_fma) {
315 if (r.write_add) {
316 assert(!r.read_port3);
317 return BIFROST_WRITE_ADD_P2_FMA_P3;
318 } else {
319 if (r.read_port3)
320 return BIFROST_WRITE_FMA_P2_READ_P3;
321 else
322 return BIFROST_WRITE_FMA_P2;
323 }
324 } else if (r.write_add) {
325 if (r.read_port3)
326 return BIFROST_WRITE_ADD_P2_READ_P3;
327 else
328 return BIFROST_WRITE_ADD_P2;
329 } else if (r.read_port3)
330 return BIFROST_READ_P3;
331 else
332 return BIFROST_REG_NONE;
333 }
334
335 /* Ditto but account for the first? flag this time */
336
337 static enum bifrost_reg_control
338 bi_pack_register_ctrl(struct bi_registers r)
339 {
340 enum bifrost_reg_control ctrl = bi_pack_register_ctrl_lo(r);
341
342 if (r.first_instruction) {
343 if (ctrl == BIFROST_REG_NONE)
344 ctrl = BIFROST_FIRST_NONE;
345 else if (ctrl == BIFROST_WRITE_FMA_P2_READ_P3)
346 ctrl = BIFROST_FIRST_WRITE_FMA_P2_READ_P3;
347 else
348 ctrl |= BIFROST_FIRST_NONE;
349 }
350
351 return ctrl;
352 }
353
354 static uint64_t
355 bi_pack_registers(struct bi_registers regs)
356 {
357 enum bifrost_reg_control ctrl = bi_pack_register_ctrl(regs);
358 struct bifrost_regs s = { 0 };
359 uint64_t packed = 0;
360
361 if (regs.enabled[1]) {
362 /* Gotta save that bit!~ Required by the 63-x trick */
363 assert(regs.port[1] > regs.port[0]);
364 assert(regs.enabled[0]);
365
366 /* Do the 63-x trick, see docs/disasm */
367 if (regs.port[0] > 31) {
368 regs.port[0] = 63 - regs.port[0];
369 regs.port[1] = 63 - regs.port[1];
370 }
371
372 assert(regs.port[0] <= 31);
373 assert(regs.port[1] <= 63);
374
375 s.ctrl = ctrl;
376 s.reg1 = regs.port[1];
377 s.reg0 = regs.port[0];
378 } else {
379 /* Port 1 disabled, so set to zero and use port 1 for ctrl */
380 s.ctrl = 0;
381 s.reg1 = ctrl << 2;
382
383 if (regs.enabled[0]) {
384 /* Bit 0 upper bit of port 0 */
385 s.reg1 |= (regs.port[0] >> 5);
386
387 /* Rest of port 0 in usual spot */
388 s.reg0 = (regs.port[0] & 0b11111);
389 } else {
390 /* Bit 1 set if port 0 also disabled */
391 s.reg1 |= (1 << 1);
392 }
393 }
394
395 /* When port 3 isn't used, we have to set it to port 2, and vice versa,
396 * or INSTR_INVALID_ENC is raised. The reason is unknown. */
397
398 bool has_port2 = regs.write_fma || regs.write_add;
399 bool has_port3 = regs.read_port3 || (regs.write_fma && regs.write_add);
400
401 if (!has_port3)
402 regs.port[3] = regs.port[2];
403
404 if (!has_port2)
405 regs.port[2] = regs.port[3];
406
407 s.reg3 = regs.port[3];
408 s.reg2 = regs.port[2];
409 s.uniform_const = regs.uniform_constant;
410
411 memcpy(&packed, &s, sizeof(s));
412 return packed;
413 }
414
415 static void
416 bi_set_data_register(bi_clause *clause, unsigned idx)
417 {
418 assert(idx & BIR_INDEX_REGISTER);
419 unsigned reg = idx & ~BIR_INDEX_REGISTER;
420 assert(reg <= 63);
421 clause->data_register = reg;
422 }
423
424 static void
425 bi_read_data_register(bi_clause *clause, bi_instruction *ins)
426 {
427 bi_set_data_register(clause, ins->src[0]);
428 }
429
430 static void
431 bi_write_data_register(bi_clause *clause, bi_instruction *ins)
432 {
433 bi_set_data_register(clause, ins->dest);
434 }
435
436 static enum bifrost_packed_src
437 bi_get_src_reg_port(struct bi_registers *regs, unsigned src)
438 {
439 unsigned reg = src & ~BIR_INDEX_REGISTER;
440
441 if (regs->port[0] == reg && regs->enabled[0])
442 return BIFROST_SRC_PORT0;
443 else if (regs->port[1] == reg && regs->enabled[1])
444 return BIFROST_SRC_PORT1;
445 else if (regs->port[3] == reg && regs->read_port3)
446 return BIFROST_SRC_PORT3;
447 else
448 unreachable("Tried to access register with no port");
449 }
450
451 static enum bifrost_packed_src
452 bi_get_src(bi_instruction *ins, struct bi_registers *regs, unsigned s, bool is_fma)
453 {
454 unsigned src = ins->src[s];
455
456 if (src & BIR_INDEX_REGISTER)
457 return bi_get_src_reg_port(regs, src);
458 else if (src & BIR_INDEX_ZERO && is_fma)
459 return BIFROST_SRC_STAGE;
460 else if (src & BIR_INDEX_PASS)
461 return src & ~BIR_INDEX_PASS;
462 else
463 unreachable("Unknown src");
464 }
465
466 /* Constructs a packed 2-bit swizzle for a 16-bit vec2 source. Source must be
467 * 16-bit and written components must correspond to valid swizzles (component x
468 * or y). */
469
470 static unsigned
471 bi_swiz16(bi_instruction *ins, unsigned src)
472 {
473 assert(nir_alu_type_get_type_size(ins->src_types[src]) == 16);
474 unsigned swizzle = 0;
475
476 for (unsigned c = 0; c < 2; ++c) {
477 if (!bi_writes_component(ins, src)) continue;
478
479 unsigned k = ins->swizzle[src][c];
480 assert(k <= 1);
481 swizzle |= (k << c);
482 }
483
484 return swizzle;
485 }
486
487 static unsigned
488 bi_pack_fma_fma(bi_instruction *ins, struct bi_registers *regs)
489 {
490 /* (-a)(-b) = ab, so we only need one negate bit */
491 bool negate_mul = ins->src_neg[0] ^ ins->src_neg[1];
492
493 if (ins->dest_type == nir_type_float32) {
494 struct bifrost_fma_fma pack = {
495 .src0 = bi_get_src(ins, regs, 0, true),
496 .src1 = bi_get_src(ins, regs, 1, true),
497 .src2 = bi_get_src(ins, regs, 2, true),
498 .src0_abs = ins->src_abs[0],
499 .src1_abs = ins->src_abs[1],
500 .src2_abs = ins->src_abs[2],
501 .src0_neg = negate_mul,
502 .src2_neg = ins->src_neg[2],
503 .outmod = ins->outmod,
504 .roundmode = ins->roundmode,
505 .op = BIFROST_FMA_OP_FMA
506 };
507
508 RETURN_PACKED(pack);
509 } else if (ins->dest_type == nir_type_float16) {
510 struct bifrost_fma_fma16 pack = {
511 .src0 = bi_get_src(ins, regs, 0, true),
512 .src1 = bi_get_src(ins, regs, 1, true),
513 .src2 = bi_get_src(ins, regs, 2, true),
514 .swizzle_0 = bi_swiz16(ins, 0),
515 .swizzle_1 = bi_swiz16(ins, 1),
516 .swizzle_2 = bi_swiz16(ins, 2),
517 .src0_neg = negate_mul,
518 .src2_neg = ins->src_neg[2],
519 .outmod = ins->outmod,
520 .roundmode = ins->roundmode,
521 .op = BIFROST_FMA_OP_FMA16
522 };
523
524 RETURN_PACKED(pack);
525 } else {
526 unreachable("Invalid fma dest type");
527 }
528 }
529
530 static unsigned
531 bi_pack_fma_addmin_f32(bi_instruction *ins, struct bi_registers *regs)
532 {
533 unsigned op =
534 (ins->type == BI_ADD) ? BIFROST_FMA_OP_FADD32 :
535 (ins->op.minmax == BI_MINMAX_MIN) ? BIFROST_FMA_OP_FMIN32 :
536 BIFROST_FMA_OP_FMAX32;
537
538 struct bifrost_fma_add pack = {
539 .src0 = bi_get_src(ins, regs, 0, true),
540 .src1 = bi_get_src(ins, regs, 1, true),
541 .src0_abs = ins->src_abs[0],
542 .src1_abs = ins->src_abs[1],
543 .src0_neg = ins->src_neg[0],
544 .src1_neg = ins->src_neg[1],
545 .unk = 0x0,
546 .outmod = ins->outmod,
547 .roundmode = (ins->type == BI_ADD) ? ins->roundmode : ins->minmax,
548 .op = op
549 };
550
551 RETURN_PACKED(pack);
552 }
553
554 static unsigned
555 bi_pack_fma_addmin_f16(bi_instruction *ins, struct bi_registers *regs)
556 {
557 unsigned op =
558 (ins->type == BI_ADD) ? BIFROST_FMA_OP_FADD16 :
559 (ins->op.minmax == BI_MINMAX_MIN) ? BIFROST_FMA_OP_FMIN16 :
560 BIFROST_FMA_OP_FMAX16;
561
562 /* Absolute values are packed in a quirky way. Let k = src1 < src0. Let
563 * l be an auxiliary bit we encode. Then the hardware determines:
564 *
565 * abs0 = l || k
566 * abs1 = l && k
567 *
568 * Since add/min/max are commutative, this saves a bit by using the
569 * order of the operands as a bit (k). To pack this, first note:
570 *
571 * (l && k) implies (l || k).
572 *
573 * That is, if the second argument is abs'd, then the first argument
574 * also has abs. So there are three cases:
575 *
576 * Case 0: Neither src has absolute value. Then we have l = k = 0.
577 *
578 * Case 1: Exactly one src has absolute value. Assign that source to
579 * src0 and the other source to src1. Compute k = src1 < src0 based on
580 * that assignment. Then l = ~k.
581 *
582 * Case 2: Both sources have absolute value. Then we have l = k = 1.
583 * Note to force k = 1 requires that (src1 < src0) OR (src0 < src1).
584 * That is, this encoding is only valid if src1 and src0 are distinct.
585 * This is a scheduling restriction (XXX); if an op of this type
586 * requires both identical sources to have abs value, then we must
587 * schedule to ADD (which does not use this ordering trick).
588 */
589
590 unsigned abs_0 = ins->src_abs[0], abs_1 = ins->src_abs[1];
591 unsigned src_0 = bi_get_src(ins, regs, 0, true);
592 unsigned src_1 = bi_get_src(ins, regs, 1, true);
593 bool l = false;
594 bool flip = false;
595
596 if (!abs_0 && !abs_1) {
597 /* Force k = 0 <===> NOT(src1 < src0) */
598 flip = (src_1 < src_0);
599 } else if (abs_0 && !abs_1) {
600 l = src_1 >= src_0;
601 } else if (abs_1 && !abs_0) {
602 flip = true;
603 l = src_0 >= src_1;
604 } else {
605 flip = (src_0 >= src_1);
606 l = true;
607 }
608
609 struct bifrost_fma_add_minmax16 pack = {
610 .src0 = flip ? src_1 : src_0,
611 .src1 = flip ? src_0 : src_1,
612 .src0_neg = ins->src_neg[flip ? 1 : 0],
613 .src1_neg = ins->src_neg[flip ? 0 : 1],
614 .abs1 = l,
615 .outmod = ins->outmod,
616 .mode = (ins->type == BI_ADD) ? ins->roundmode : ins->minmax,
617 .op = op
618 };
619
620 RETURN_PACKED(pack);
621 }
622
623 static unsigned
624 bi_pack_fma_addmin(bi_instruction *ins, struct bi_registers *regs)
625 {
626 if (ins->dest_type == nir_type_float32)
627 return bi_pack_fma_addmin_f32(ins, regs);
628 else if(ins->dest_type == nir_type_float16)
629 return bi_pack_fma_addmin_f16(ins, regs);
630 else
631 unreachable("Unknown FMA/ADD type");
632 }
633
634 static unsigned
635 bi_pack_fma_1src(bi_instruction *ins, struct bi_registers *regs, unsigned op)
636 {
637 struct bifrost_fma_inst pack = {
638 .src0 = bi_get_src(ins, regs, 0, true),
639 .op = op
640 };
641
642 RETURN_PACKED(pack);
643 }
644
645 static unsigned
646 bi_pack_fma_2src(bi_instruction *ins, struct bi_registers *regs, unsigned op)
647 {
648 struct bifrost_fma_2src pack = {
649 .src0 = bi_get_src(ins, regs, 0, true),
650 .src1 = bi_get_src(ins, regs, 1, true),
651 .op = op
652 };
653
654 RETURN_PACKED(pack);
655 }
656
657 static unsigned
658 bi_pack_add_1src(bi_instruction *ins, struct bi_registers *regs, unsigned op)
659 {
660 struct bifrost_add_inst pack = {
661 .src0 = bi_get_src(ins, regs, 0, true),
662 .op = op
663 };
664
665 RETURN_PACKED(pack);
666 }
667
668 static enum bifrost_csel_cond
669 bi_cond_to_csel(enum bi_cond cond, bool *flip, bool *invert, nir_alu_type T)
670 {
671 nir_alu_type B = nir_alu_type_get_base_type(T);
672 unsigned idx = (B == nir_type_float) ? 0 :
673 ((B == nir_type_int) ? 1 : 2);
674
675 switch (cond){
676 case BI_COND_LT:
677 *flip = true;
678 case BI_COND_GT: {
679 const enum bifrost_csel_cond ops[] = {
680 BIFROST_FGT_F,
681 BIFROST_IGT_I,
682 BIFROST_UGT_I
683 };
684
685 return ops[idx];
686 }
687 case BI_COND_LE:
688 *flip = true;
689 case BI_COND_GE: {
690 const enum bifrost_csel_cond ops[] = {
691 BIFROST_FGE_F,
692 BIFROST_IGE_I,
693 BIFROST_UGE_I
694 };
695
696 return ops[idx];
697 }
698 case BI_COND_NE:
699 *invert = true;
700 case BI_COND_EQ: {
701 const enum bifrost_csel_cond ops[] = {
702 BIFROST_FEQ_F,
703 BIFROST_IEQ_F,
704 BIFROST_IEQ_F /* sign is irrelevant */
705 };
706
707 return ops[idx];
708 }
709 default:
710 unreachable("Invalid op for csel");
711 }
712 }
713
714 static unsigned
715 bi_pack_fma_csel(bi_instruction *ins, struct bi_registers *regs)
716 {
717 /* TODO: Use csel3 as well */
718 bool flip = false, invert = false;
719
720 enum bifrost_csel_cond cond =
721 bi_cond_to_csel(ins->csel_cond, &flip, &invert, ins->src_types[0]);
722
723 unsigned size = nir_alu_type_get_type_size(ins->dest_type);
724
725 unsigned cmp_0 = (flip ? 1 : 0);
726 unsigned cmp_1 = (flip ? 0 : 1);
727 unsigned res_0 = (invert ? 3 : 2);
728 unsigned res_1 = (invert ? 2 : 3);
729
730 struct bifrost_csel4 pack = {
731 .src0 = bi_get_src(ins, regs, cmp_0, true),
732 .src1 = bi_get_src(ins, regs, cmp_1, true),
733 .src2 = bi_get_src(ins, regs, res_0, true),
734 .src3 = bi_get_src(ins, regs, res_1, true),
735 .cond = cond,
736 .op = (size == 16) ? BIFROST_FMA_OP_CSEL4_V16 :
737 BIFROST_FMA_OP_CSEL4
738 };
739
740 RETURN_PACKED(pack);
741 }
742
743 static unsigned
744 bi_pack_fma_frexp(bi_instruction *ins, struct bi_registers *regs)
745 {
746 unsigned op = BIFROST_FMA_OP_FREXPE_LOG;
747 return bi_pack_fma_1src(ins, regs, op);
748 }
749
750 static unsigned
751 bi_pack_fma_reduce(bi_instruction *ins, struct bi_registers *regs)
752 {
753 if (ins->op.reduce == BI_REDUCE_ADD_FREXPM) {
754 return bi_pack_fma_2src(ins, regs, BIFROST_FMA_OP_ADD_FREXPM);
755 } else {
756 unreachable("Invalid reduce op");
757 }
758 }
759
760 /* We have a single convert opcode in the IR but a number of opcodes that could
761 * come out. In particular we have native opcodes for:
762 *
763 * [ui]16 --> [fui]32 -- int16_to_32
764 * f16 --> f32 -- float16_to_32
765 * f32 --> f16 -- float32_to_16
766 * f32 --> [ui]32 -- float32_to_int
767 * [ui]32 --> f32 -- int_to_float32
768 * [fui]16 --> [fui]16 -- f2i_i2f16
769 */
770
771 static unsigned
772 bi_pack_convert(bi_instruction *ins, struct bi_registers *regs, bool FMA)
773 {
774 nir_alu_type from_base = nir_alu_type_get_base_type(ins->src_types[0]);
775 unsigned from_size = nir_alu_type_get_type_size(ins->src_types[0]);
776 bool from_unsigned = from_base == nir_type_uint;
777
778 nir_alu_type to_base = nir_alu_type_get_base_type(ins->dest_type);
779 unsigned to_size = nir_alu_type_get_type_size(ins->dest_type);
780 bool to_unsigned = to_base == nir_type_uint;
781 bool to_float = to_base == nir_type_float;
782
783 /* Sanity check */
784 assert((from_base != to_base) || (from_size != to_size));
785 assert((MAX2(from_size, to_size) / MIN2(from_size, to_size)) <= 2);
786
787 /* f32 to f16 is special */
788 if (from_size == 32 && to_size == 16 && from_base == nir_type_float && to_base == from_base) {
789 /* TODO: second vectorized source? */
790 struct bifrost_fma_2src pfma = {
791 .src0 = bi_get_src(ins, regs, 0, true),
792 .src1 = BIFROST_SRC_STAGE, /* 0 */
793 .op = BIFROST_FMA_FLOAT32_TO_16
794 };
795
796 struct bifrost_add_2src padd = {
797 .src0 = bi_get_src(ins, regs, 0, true),
798 .src1 = BIFROST_SRC_STAGE, /* 0 */
799 .op = BIFROST_ADD_FLOAT32_TO_16
800 };
801
802 if (FMA) {
803 RETURN_PACKED(pfma);
804 } else {
805 RETURN_PACKED(padd);
806 }
807 }
808
809 /* Otherwise, figure out the mode */
810 unsigned op = 0;
811
812 if (from_size == 16 && to_size == 32) {
813 unsigned component = ins->swizzle[0][0];
814 assert(component <= 1);
815
816 if (from_base == nir_type_float)
817 op = BIFROST_CONVERT_5(component);
818 else
819 op = BIFROST_CONVERT_4(from_unsigned, component, to_float);
820 } else {
821 unsigned mode = 0;
822 unsigned swizzle = (from_size == 16) ? bi_swiz16(ins, 0) : 0;
823 bool is_unsigned = from_unsigned;
824
825 if (from_base == nir_type_float) {
826 assert(to_base != nir_type_float);
827 is_unsigned = to_unsigned;
828
829 if (from_size == 32 && to_size == 32)
830 mode = BIFROST_CONV_F32_TO_I32;
831 else if (from_size == 16 && to_size == 16)
832 mode = BIFROST_CONV_F16_TO_I16;
833 else
834 unreachable("Invalid float conversion");
835 } else {
836 assert(to_base == nir_type_float);
837 assert(from_size == to_size);
838
839 if (to_size == 32)
840 mode = BIFROST_CONV_I32_TO_F32;
841 else if (to_size == 16)
842 mode = BIFROST_CONV_I16_TO_F16;
843 else
844 unreachable("Invalid int conversion");
845 }
846
847 /* Fixup swizzle for 32-bit only modes */
848
849 if (mode == BIFROST_CONV_I32_TO_F32)
850 swizzle = 0b11;
851 else if (mode == BIFROST_CONV_F32_TO_I32)
852 swizzle = 0b10;
853
854 op = BIFROST_CONVERT(is_unsigned, ins->roundmode, swizzle, mode);
855
856 /* Unclear what the top bit is for... maybe 16-bit related */
857 bool mode2 = mode == BIFROST_CONV_F16_TO_I16;
858 bool mode6 = mode == BIFROST_CONV_I16_TO_F16;
859
860 if (!(mode2 || mode6))
861 op |= 0x100;
862 }
863
864 if (FMA)
865 return bi_pack_fma_1src(ins, regs, BIFROST_FMA_CONVERT | op);
866 else
867 return bi_pack_add_1src(ins, regs, BIFROST_ADD_CONVERT | op);
868 }
869
870 static unsigned
871 bi_pack_fma(bi_clause *clause, bi_bundle bundle, struct bi_registers *regs)
872 {
873 if (!bundle.fma)
874 return BIFROST_FMA_NOP;
875
876 switch (bundle.fma->type) {
877 case BI_ADD:
878 return bi_pack_fma_addmin(bundle.fma, regs);
879 case BI_CMP:
880 case BI_BITWISE:
881 return BIFROST_FMA_NOP;
882 case BI_CONVERT:
883 return bi_pack_convert(bundle.fma, regs, true);
884 case BI_CSEL:
885 return bi_pack_fma_csel(bundle.fma, regs);
886 case BI_FMA:
887 return bi_pack_fma_fma(bundle.fma, regs);
888 case BI_FREXP:
889 return bi_pack_fma_frexp(bundle.fma, regs);
890 case BI_ISUB:
891 return BIFROST_FMA_NOP;
892 case BI_MINMAX:
893 return bi_pack_fma_addmin(bundle.fma, regs);
894 case BI_MOV:
895 return bi_pack_fma_1src(bundle.fma, regs, BIFROST_FMA_OP_MOV);
896 case BI_SHIFT:
897 case BI_SWIZZLE:
898 case BI_ROUND:
899 return BIFROST_FMA_NOP;
900 case BI_REDUCE_FMA:
901 return bi_pack_fma_reduce(bundle.fma, regs);
902 default:
903 unreachable("Cannot encode class as FMA");
904 }
905 }
906
907 static unsigned
908 bi_pack_add_ld_vary(bi_clause *clause, bi_instruction *ins, struct bi_registers *regs)
909 {
910 unsigned size = nir_alu_type_get_type_size(ins->dest_type);
911 assert(size == 32 || size == 16);
912
913 unsigned op = (size == 32) ?
914 BIFROST_ADD_OP_LD_VAR_32 :
915 BIFROST_ADD_OP_LD_VAR_16;
916
917 unsigned cmask = bi_from_bytemask(ins->writemask, size / 8);
918 unsigned channels = util_bitcount(cmask);
919 assert(cmask == ((1 << channels) - 1));
920
921 unsigned packed_addr = 0;
922
923 if (ins->src[0] & BIR_INDEX_CONSTANT) {
924 /* Direct uses address field directly */
925 packed_addr = bi_get_immediate(ins, ins->src[0]);
926 assert(packed_addr < 0b1000);
927 } else {
928 /* Indirect gets an extra source */
929 packed_addr = bi_get_src(ins, regs, 0, false) | 0b11000;
930 }
931
932 /* The destination is thrown in the data register */
933 assert(ins->dest & BIR_INDEX_REGISTER);
934 clause->data_register = ins->dest & ~BIR_INDEX_REGISTER;
935
936 assert(channels >= 1 && channels <= 4);
937
938 struct bifrost_ld_var pack = {
939 .src0 = bi_get_src(ins, regs, 1, false),
940 .addr = packed_addr,
941 .channels = MALI_POSITIVE(channels),
942 .interp_mode = ins->load_vary.interp_mode,
943 .reuse = ins->load_vary.reuse,
944 .flat = ins->load_vary.flat,
945 .op = op
946 };
947
948 RETURN_PACKED(pack);
949 }
950
951 static unsigned
952 bi_pack_add_2src(bi_instruction *ins, struct bi_registers *regs, unsigned op)
953 {
954 struct bifrost_add_2src pack = {
955 .src0 = bi_get_src(ins, regs, 0, true),
956 .src1 = bi_get_src(ins, regs, 1, true),
957 .op = op
958 };
959
960 RETURN_PACKED(pack);
961 }
962
963 static unsigned
964 bi_pack_add_addmin_f32(bi_instruction *ins, struct bi_registers *regs)
965 {
966 unsigned op =
967 (ins->type == BI_ADD) ? BIFROST_ADD_OP_FADD32 :
968 (ins->op.minmax == BI_MINMAX_MIN) ? BIFROST_ADD_OP_FMIN32 :
969 BIFROST_ADD_OP_FMAX32;
970
971 struct bifrost_add_faddmin pack = {
972 .src0 = bi_get_src(ins, regs, 0, true),
973 .src1 = bi_get_src(ins, regs, 1, true),
974 .src0_abs = ins->src_abs[0],
975 .src1_abs = ins->src_abs[1],
976 .src0_neg = ins->src_neg[0],
977 .src1_neg = ins->src_neg[1],
978 .outmod = ins->outmod,
979 .mode = (ins->type == BI_ADD) ? ins->roundmode : ins->minmax,
980 .op = op
981 };
982
983 RETURN_PACKED(pack);
984 }
985
986 static unsigned
987 bi_pack_add_addmin(bi_instruction *ins, struct bi_registers *regs)
988 {
989 if (ins->dest_type == nir_type_float32)
990 return bi_pack_add_addmin_f32(ins, regs);
991 else if(ins->dest_type == nir_type_float16)
992 unreachable("todo");
993 //return bi_pack_add_addmin_f16(ins, regs);
994 else
995 unreachable("Unknown FMA/ADD type");
996 }
997
998 static unsigned
999 bi_pack_add_ld_ubo(bi_clause *clause, bi_instruction *ins, struct bi_registers *regs)
1000 {
1001 unsigned components = bi_load32_components(ins);
1002
1003 const unsigned ops[4] = {
1004 BIFROST_ADD_OP_LD_UBO_1,
1005 BIFROST_ADD_OP_LD_UBO_2,
1006 BIFROST_ADD_OP_LD_UBO_3,
1007 BIFROST_ADD_OP_LD_UBO_4
1008 };
1009
1010 bi_write_data_register(clause, ins);
1011 return bi_pack_add_2src(ins, regs, ops[components - 1]);
1012 }
1013
1014 static enum bifrost_ldst_type
1015 bi_pack_ldst_type(nir_alu_type T)
1016 {
1017 switch (T) {
1018 case nir_type_float16: return BIFROST_LDST_F16;
1019 case nir_type_float32: return BIFROST_LDST_F32;
1020 case nir_type_int32: return BIFROST_LDST_I32;
1021 case nir_type_uint32: return BIFROST_LDST_U32;
1022 default: unreachable("Invalid type loaded");
1023 }
1024 }
1025
1026 static unsigned
1027 bi_pack_add_ld_var_addr(bi_clause *clause, bi_instruction *ins, struct bi_registers *regs)
1028 {
1029 struct bifrost_ld_var_addr pack = {
1030 .src0 = bi_get_src(ins, regs, 1, false),
1031 .src1 = bi_get_src(ins, regs, 2, false),
1032 .location = bi_get_immediate(ins, ins->src[0]),
1033 .type = bi_pack_ldst_type(ins->src_types[3]),
1034 .op = BIFROST_ADD_OP_LD_VAR_ADDR
1035 };
1036
1037 bi_write_data_register(clause, ins);
1038 RETURN_PACKED(pack);
1039 }
1040
1041 static unsigned
1042 bi_pack_add_ld_attr(bi_clause *clause, bi_instruction *ins, struct bi_registers *regs)
1043 {
1044 struct bifrost_ld_attr pack = {
1045 .src0 = bi_get_src(ins, regs, 1, false),
1046 .src1 = bi_get_src(ins, regs, 2, false),
1047 .location = bi_get_immediate(ins, ins->src[0]),
1048 .channels = MALI_POSITIVE(bi_load32_components(ins)),
1049 .type = bi_pack_ldst_type(ins->dest_type),
1050 .op = BIFROST_ADD_OP_LD_ATTR
1051 };
1052
1053 bi_write_data_register(clause, ins);
1054 RETURN_PACKED(pack);
1055 }
1056
1057 static unsigned
1058 bi_pack_add_st_vary(bi_clause *clause, bi_instruction *ins, struct bi_registers *regs)
1059 {
1060 assert(ins->store_channels >= 1 && ins->store_channels <= 4);
1061
1062 struct bifrost_st_vary pack = {
1063 .src0 = bi_get_src(ins, regs, 1, false),
1064 .src1 = bi_get_src(ins, regs, 2, false),
1065 .src2 = bi_get_src(ins, regs, 3, false),
1066 .channels = MALI_POSITIVE(ins->store_channels),
1067 .op = BIFROST_ADD_OP_ST_VAR
1068 };
1069
1070 bi_read_data_register(clause, ins);
1071 RETURN_PACKED(pack);
1072 }
1073
1074 static unsigned
1075 bi_pack_add_atest(bi_clause *clause, bi_instruction *ins, struct bi_registers *regs)
1076 {
1077 /* TODO: fp16 */
1078 assert(ins->src_types[1] == nir_type_float32);
1079
1080 struct bifrost_add_atest pack = {
1081 .src0 = bi_get_src(ins, regs, 0, false),
1082 .src1 = bi_get_src(ins, regs, 1, false),
1083 .component = 1, /* Set for fp32 */
1084 .op = BIFROST_ADD_OP_ATEST,
1085 };
1086
1087 /* Despite *also* writing with the usual mechanism... quirky and
1088 * perhaps unnecessary, but let's match the blob */
1089 clause->data_register = ins->dest & ~BIR_INDEX_REGISTER;
1090
1091 RETURN_PACKED(pack);
1092 }
1093
1094 static unsigned
1095 bi_pack_add_blend(bi_clause *clause, bi_instruction *ins, struct bi_registers *regs)
1096 {
1097 struct bifrost_add_inst pack = {
1098 .src0 = bi_get_src(ins, regs, 1, false),
1099 .op = BIFROST_ADD_OP_BLEND
1100 };
1101
1102 /* TODO: Pack location in uniform_const */
1103 assert(ins->blend_location == 0);
1104
1105 bi_read_data_register(clause, ins);
1106 RETURN_PACKED(pack);
1107 }
1108
1109 static unsigned
1110 bi_pack_add_special(bi_instruction *ins, struct bi_registers *regs)
1111 {
1112 unsigned op = 0;
1113 bool fp16 = ins->dest_type == nir_type_float16;
1114 bool Y = ins->swizzle[0][0];
1115
1116 if (ins->op.special == BI_SPECIAL_FRCP) {
1117 op = fp16 ?
1118 (Y ? BIFROST_ADD_OP_FRCP_FAST_F16_Y :
1119 BIFROST_ADD_OP_FRCP_FAST_F16_X) :
1120 BIFROST_ADD_OP_FRCP_FAST_F32;
1121 } else {
1122 op = fp16 ?
1123 (Y ? BIFROST_ADD_OP_FRSQ_FAST_F16_Y :
1124 BIFROST_ADD_OP_FRSQ_FAST_F16_X) :
1125 BIFROST_ADD_OP_FRSQ_FAST_F32;
1126
1127 }
1128
1129 return bi_pack_add_1src(ins, regs, op);
1130 }
1131
1132 static unsigned
1133 bi_pack_add_table(bi_instruction *ins, struct bi_registers *regs)
1134 {
1135 unsigned op = 0;
1136 assert(ins->dest_type == nir_type_float32);
1137
1138 op = BIFROST_ADD_OP_LOG2_HELP;
1139 return bi_pack_add_1src(ins, regs, op);
1140 }
1141
1142 static unsigned
1143 bi_pack_add(bi_clause *clause, bi_bundle bundle, struct bi_registers *regs)
1144 {
1145 if (!bundle.add)
1146 return BIFROST_ADD_NOP;
1147
1148 switch (bundle.add->type) {
1149 case BI_ADD:
1150 return bi_pack_add_addmin(bundle.add, regs);
1151 case BI_ATEST:
1152 return bi_pack_add_atest(clause, bundle.add, regs);
1153 case BI_BRANCH:
1154 case BI_CMP:
1155 return BIFROST_ADD_NOP;
1156 case BI_BLEND:
1157 return bi_pack_add_blend(clause, bundle.add, regs);
1158 case BI_BITWISE:
1159 return BIFROST_ADD_NOP;
1160 case BI_CONVERT:
1161 return bi_pack_convert(bundle.add, regs, false);
1162 case BI_DISCARD:
1163 case BI_FREXP:
1164 case BI_ISUB:
1165 case BI_LOAD:
1166 return BIFROST_ADD_NOP;
1167 case BI_LOAD_ATTR:
1168 return bi_pack_add_ld_attr(clause, bundle.add, regs);
1169 case BI_LOAD_UNIFORM:
1170 return bi_pack_add_ld_ubo(clause, bundle.add, regs);
1171 case BI_LOAD_VAR:
1172 return bi_pack_add_ld_vary(clause, bundle.add, regs);
1173 case BI_LOAD_VAR_ADDRESS:
1174 return bi_pack_add_ld_var_addr(clause, bundle.add, regs);
1175 case BI_MINMAX:
1176 return bi_pack_add_addmin(bundle.add, regs);
1177 case BI_MOV:
1178 case BI_SHIFT:
1179 case BI_STORE:
1180 return BIFROST_ADD_NOP;
1181 case BI_STORE_VAR:
1182 return bi_pack_add_st_vary(clause, bundle.add, regs);
1183 case BI_SPECIAL:
1184 return bi_pack_add_special(bundle.add, regs);
1185 case BI_TABLE:
1186 return bi_pack_add_table(bundle.add, regs);
1187 case BI_SWIZZLE:
1188 case BI_TEX:
1189 case BI_ROUND:
1190 return BIFROST_ADD_NOP;
1191 default:
1192 unreachable("Cannot encode class as ADD");
1193 }
1194 }
1195
1196 struct bi_packed_bundle {
1197 uint64_t lo;
1198 uint64_t hi;
1199 };
1200
1201 static struct bi_packed_bundle
1202 bi_pack_bundle(bi_clause *clause, bi_bundle bundle, bi_bundle prev, bool first_bundle)
1203 {
1204 struct bi_registers regs = bi_assign_ports(bundle, prev);
1205 bi_assign_uniform_constant(clause, &regs, bundle);
1206 regs.first_instruction = first_bundle;
1207
1208 uint64_t reg = bi_pack_registers(regs);
1209 uint64_t fma = bi_pack_fma(clause, bundle, &regs);
1210 uint64_t add = bi_pack_add(clause, bundle, &regs);
1211
1212 struct bi_packed_bundle packed = {
1213 .lo = reg | (fma << 35) | ((add & 0b111111) << 58),
1214 .hi = add >> 6
1215 };
1216
1217 return packed;
1218 }
1219
1220 /* Packs the next two constants as a dedicated constant quadword at the end of
1221 * the clause, returning the number packed. */
1222
1223 static unsigned
1224 bi_pack_constants(bi_context *ctx, bi_clause *clause,
1225 unsigned index,
1226 struct util_dynarray *emission)
1227 {
1228 /* After these two, are we done? Determines tag */
1229 bool done = clause->constant_count <= (index + 2);
1230 bool only = clause->constant_count <= (index + 1);
1231
1232 /* TODO: Pos */
1233 assert(index == 0 && clause->bundle_count == 1);
1234
1235 struct bifrost_fmt_constant quad = {
1236 .pos = 0, /* TODO */
1237 .tag = done ? BIFROST_FMTC_FINAL : BIFROST_FMTC_CONSTANTS,
1238 .imm_1 = clause->constants[index + 0] >> 4,
1239 .imm_2 = only ? 0 : clause->constants[index + 1] >> 4
1240 };
1241
1242 /* XXX: On G71, Connor observed that the difference of the top 4 bits
1243 * of the second constant with the first must be less than 8, otherwise
1244 * we have to swap them. I am not able to reproduce this on G52,
1245 * further investigation needed. Possibly an errata. XXX */
1246
1247 util_dynarray_append(emission, struct bifrost_fmt_constant, quad);
1248
1249 return 2;
1250 }
1251
1252 static void
1253 bi_pack_clause(bi_context *ctx, bi_clause *clause, bi_clause *next,
1254 struct util_dynarray *emission)
1255 {
1256 struct bi_packed_bundle ins_1 = bi_pack_bundle(clause, clause->bundles[0], clause->bundles[0], true);
1257 assert(clause->bundle_count == 1);
1258
1259 /* Used to decide if we elide writes */
1260 bool is_fragment = ctx->stage == MESA_SHADER_FRAGMENT;
1261
1262 /* State for packing constants throughout */
1263 unsigned constant_index = 0;
1264
1265 struct bifrost_fmt1 quad_1 = {
1266 .tag = clause->constant_count ? BIFROST_FMT1_CONSTANTS : BIFROST_FMT1_FINAL,
1267 .header = bi_pack_header(clause, next, is_fragment),
1268 .ins_1 = ins_1.lo,
1269 .ins_2 = ins_1.hi & ((1 << 11) - 1),
1270 .ins_0 = (ins_1.hi >> 11) & 0b111,
1271 };
1272
1273 util_dynarray_append(emission, struct bifrost_fmt1, quad_1);
1274
1275 /* Pack the remaining constants */
1276
1277 while (constant_index < clause->constant_count) {
1278 constant_index += bi_pack_constants(ctx, clause,
1279 constant_index, emission);
1280 }
1281 }
1282
1283 static bi_clause *
1284 bi_next_clause(bi_context *ctx, pan_block *block, bi_clause *clause)
1285 {
1286 /* Try the next clause in this block */
1287 if (clause->link.next != &((bi_block *) block)->clauses)
1288 return list_first_entry(&(clause->link), bi_clause, link);
1289
1290 /* Try the next block, or the one after that if it's empty, etc .*/
1291 pan_block *next_block = pan_next_block(block);
1292
1293 bi_foreach_block_from(ctx, next_block, block) {
1294 bi_block *blk = (bi_block *) block;
1295
1296 if (!list_is_empty(&blk->clauses))
1297 return list_first_entry(&(blk->clauses), bi_clause, link);
1298 }
1299
1300 return NULL;
1301 }
1302
1303 void
1304 bi_pack(bi_context *ctx, struct util_dynarray *emission)
1305 {
1306 util_dynarray_init(emission, NULL);
1307
1308 bi_foreach_block(ctx, _block) {
1309 bi_block *block = (bi_block *) _block;
1310
1311 bi_foreach_clause_in_block(block, clause) {
1312 bi_clause *next = bi_next_clause(ctx, _block, clause);
1313 bi_pack_clause(ctx, clause, next, emission);
1314 }
1315 }
1316 }